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Merge tag 'iio-fixes-for-4.0a' of git://git.kernel.org/pub/scm/linux/kernel/git/jic23...
[linux.git] / sound / pci / lola / lola.c
CommitLineData
d43f3010
TI		 1/*
2 * Support for Digigram Lola PCI-e boards
3 *
4 * Copyright (c) 2011 Takashi Iwai <[email protected]>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the Free
8 * Software Foundation; either version 2 of the License, or (at your option)
9 * any later version.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program; if not, write to the Free Software Foundation, Inc., 59
18 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 */
20
21#include <linux/kernel.h>
22#include <linux/init.h>
65a77217 23#include <linux/module.h>
d43f3010
TI		 24#include <linux/dma-mapping.h>
25#include <linux/delay.h>
26#include <linux/interrupt.h>
27#include <linux/slab.h>
28#include <linux/pci.h>
29#include <sound/core.h>
30#include <sound/control.h>
31#include <sound/pcm.h>
32#include <sound/initval.h>
33#include "lola.h"
34
fe3d393e 35/* Standard options */
d43f3010
TI		 36static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
37static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
a67ff6a5 38static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
d43f3010
TI		 39
40module_param_array(index, int, NULL, 0444);
41MODULE_PARM_DESC(index, "Index value for Digigram Lola driver.");
42module_param_array(id, charp, NULL, 0444);
43MODULE_PARM_DESC(id, "ID string for Digigram Lola driver.");
44module_param_array(enable, bool, NULL, 0444);
45MODULE_PARM_DESC(enable, "Enable Digigram Lola driver.");
46
fe3d393e
TI		 47/* Lola-specific options */
48
49/* for instance use always max granularity which is compatible
50 * with all sample rates
51 */
52static int granularity[SNDRV_CARDS] = {
53 [0 ... (SNDRV_CARDS - 1)] = LOLA_GRANULARITY_MAX
54};
55
56/* below a sample_rate of 16kHz the analogue audio quality is NOT excellent */
57static int sample_rate_min[SNDRV_CARDS] = {
58 [0 ... (SNDRV_CARDS - 1) ] = 16000
59};
60
61module_param_array(granularity, int, NULL, 0444);
62MODULE_PARM_DESC(granularity, "Granularity value");
63module_param_array(sample_rate_min, int, NULL, 0444);
64MODULE_PARM_DESC(sample_rate_min, "Minimal sample rate");
65
66/*
67 */
68
d43f3010
TI		 69MODULE_LICENSE("GPL");
70MODULE_SUPPORTED_DEVICE("{{Digigram, Lola}}");
71MODULE_DESCRIPTION("Digigram Lola driver");
72MODULE_AUTHOR("Takashi Iwai <[email protected]>");
73
74#ifdef CONFIG_SND_DEBUG_VERBOSE
75static int debug;
76module_param(debug, int, 0644);
77#define verbose_debug(fmt, args...) \
f58e2fce 78 do { if (debug > 1) pr_debug(SFX fmt, ##args); } while (0)
d43f3010
TI		 79#else
80#define verbose_debug(fmt, args...)
81#endif
82
83/*
84 * pseudo-codec read/write via CORB/RIRB
85 */
86
87static int corb_send_verb(struct lola *chip, unsigned int nid,
88 unsigned int verb, unsigned int data,
89 unsigned int extdata)
90{
91 unsigned long flags;
92 int ret = -EIO;
93
94 chip->last_cmd_nid = nid;
95 chip->last_verb = verb;
96 chip->last_data = data;
97 chip->last_extdata = extdata;
98 data |= (nid << 20) | (verb << 8);
0f8f56c9 99
d43f3010
TI		 100 spin_lock_irqsave(&chip->reg_lock, flags);
101 if (chip->rirb.cmds < LOLA_CORB_ENTRIES - 1) {
102 unsigned int wp = chip->corb.wp + 1;
103 wp %= LOLA_CORB_ENTRIES;
104 chip->corb.wp = wp;
105 chip->corb.buf[wp * 2] = cpu_to_le32(data);
106 chip->corb.buf[wp * 2 + 1] = cpu_to_le32(extdata);
107 lola_writew(chip, BAR0, CORBWP, wp);
108 chip->rirb.cmds++;
109 smp_wmb();
110 ret = 0;
111 }
112 spin_unlock_irqrestore(&chip->reg_lock, flags);
113 return ret;
114}
115
116static void lola_queue_unsol_event(struct lola *chip, unsigned int res,
117 unsigned int res_ex)
118{
119 lola_update_ext_clock_freq(chip, res);
120}
121
122/* retrieve RIRB entry - called from interrupt handler */
123static void lola_update_rirb(struct lola *chip)
124{
125 unsigned int rp, wp;
126 u32 res, res_ex;
127
128 wp = lola_readw(chip, BAR0, RIRBWP);
129 if (wp == chip->rirb.wp)
130 return;
131 chip->rirb.wp = wp;
132
133 while (chip->rirb.rp != wp) {
134 chip->rirb.rp++;
135 chip->rirb.rp %= LOLA_CORB_ENTRIES;
136
137 rp = chip->rirb.rp << 1; /* an RIRB entry is 8-bytes */
138 res_ex = le32_to_cpu(chip->rirb.buf[rp + 1]);
139 res = le32_to_cpu(chip->rirb.buf[rp]);
140 if (res_ex & LOLA_RIRB_EX_UNSOL_EV)
141 lola_queue_unsol_event(chip, res, res_ex);
142 else if (chip->rirb.cmds) {
143 chip->res = res;
144 chip->res_ex = res_ex;
145 smp_wmb();
146 chip->rirb.cmds--;
147 }
148 }
149}
150
151static int rirb_get_response(struct lola *chip, unsigned int *val,
152 unsigned int *extval)
153{
154 unsigned long timeout;
155
fe4af1b5 156 again:
d43f3010
TI		 157 timeout = jiffies + msecs_to_jiffies(1000);
158 for (;;) {
fe4af1b5
TI		 159 if (chip->polling_mode) {
160 spin_lock_irq(&chip->reg_lock);
161 lola_update_rirb(chip);
162 spin_unlock_irq(&chip->reg_lock);
163 }
d43f3010
TI		 164 if (!chip->rirb.cmds) {
165 *val = chip->res;
166 if (extval)
167 *extval = chip->res_ex;
168 verbose_debug("get_response: %x, %x\n",
169 chip->res, chip->res_ex);
170 if (chip->res_ex & LOLA_RIRB_EX_ERROR) {
f58e2fce 171 dev_warn(chip->card->dev, "RIRB ERROR: "
d43f3010
TI		 172 "NID=%x, verb=%x, data=%x, ext=%x\n",
173 chip->last_cmd_nid,
174 chip->last_verb, chip->last_data,
175 chip->last_extdata);
176 return -EIO;
177 }
178 return 0;
179 }
180 if (time_after(jiffies, timeout))
181 break;
182 udelay(20);
183 cond_resched();
d43f3010 184 }
f58e2fce 185 dev_warn(chip->card->dev, "RIRB response error\n");
fe4af1b5 186 if (!chip->polling_mode) {
f58e2fce 187 dev_warn(chip->card->dev, "switching to polling mode\n");
fe4af1b5
TI		 188 chip->polling_mode = 1;
189 goto again;
190 }
d43f3010
TI		 191 return -EIO;
192}
193
194/* aynchronous write of a codec verb with data */
195int lola_codec_write(struct lola *chip, unsigned int nid, unsigned int verb,
196 unsigned int data, unsigned int extdata)
197{
198 verbose_debug("codec_write NID=%x, verb=%x, data=%x, ext=%x\n",
199 nid, verb, data, extdata);
200 return corb_send_verb(chip, nid, verb, data, extdata);
201}
202
203/* write a codec verb with data and read the returned status */
204int lola_codec_read(struct lola *chip, unsigned int nid, unsigned int verb,
205 unsigned int data, unsigned int extdata,
206 unsigned int *val, unsigned int *extval)
207{
208 int err;
209
210 verbose_debug("codec_read NID=%x, verb=%x, data=%x, ext=%x\n",
211 nid, verb, data, extdata);
212 err = corb_send_verb(chip, nid, verb, data, extdata);
213 if (err < 0)
214 return err;
215 err = rirb_get_response(chip, val, extval);
216 return err;
217}
218
219/* flush all pending codec writes */
220int lola_codec_flush(struct lola *chip)
221{
222 unsigned int tmp;
223 return rirb_get_response(chip, &tmp, NULL);
224}
225
226/*
227 * interrupt handler
228 */
229static irqreturn_t lola_interrupt(int irq, void *dev_id)
230{
231 struct lola *chip = dev_id;
232 unsigned int notify_ins, notify_outs, error_ins, error_outs;
233 int handled = 0;
234 int i;
235
236 notify_ins = notify_outs = error_ins = error_outs = 0;
237 spin_lock(&chip->reg_lock);
238 for (;;) {
239 unsigned int status, in_sts, out_sts;
240 unsigned int reg;
241
242 status = lola_readl(chip, BAR1, DINTSTS);
243 if (!status || status == -1)
244 break;
245
246 in_sts = lola_readl(chip, BAR1, DIINTSTS);
247 out_sts = lola_readl(chip, BAR1, DOINTSTS);
248
249 /* clear Input Interrupts */
250 for (i = 0; in_sts && i < chip->pcm[CAPT].num_streams; i++) {
251 if (!(in_sts & (1 << i)))
252 continue;
253 in_sts &= ~(1 << i);
254 reg = lola_dsd_read(chip, i, STS);
255 if (reg & LOLA_DSD_STS_DESE) /* error */
256 error_ins |= (1 << i);
257 if (reg & LOLA_DSD_STS_BCIS) /* notify */
258 notify_ins |= (1 << i);
259 /* clear */
260 lola_dsd_write(chip, i, STS, reg);
261 }
262
263 /* clear Output Interrupts */
264 for (i = 0; out_sts && i < chip->pcm[PLAY].num_streams; i++) {
265 if (!(out_sts & (1 << i)))
266 continue;
267 out_sts &= ~(1 << i);
268 reg = lola_dsd_read(chip, i + MAX_STREAM_IN_COUNT, STS);
269 if (reg & LOLA_DSD_STS_DESE) /* error */
270 error_outs |= (1 << i);
271 if (reg & LOLA_DSD_STS_BCIS) /* notify */
272 notify_outs |= (1 << i);
273 lola_dsd_write(chip, i + MAX_STREAM_IN_COUNT, STS, reg);
274 }
275
276 if (status & LOLA_DINT_CTRL) {
277 unsigned char rbsts; /* ring status is byte access */
278 rbsts = lola_readb(chip, BAR0, RIRBSTS);
279 rbsts &= LOLA_RIRB_INT_MASK;
280 if (rbsts)
281 lola_writeb(chip, BAR0, RIRBSTS, rbsts);
282 rbsts = lola_readb(chip, BAR0, CORBSTS);
283 rbsts &= LOLA_CORB_INT_MASK;
284 if (rbsts)
285 lola_writeb(chip, BAR0, CORBSTS, rbsts);
286
287 lola_update_rirb(chip);
288 }
289
290 if (status & (LOLA_DINT_FIFOERR | LOLA_DINT_MUERR)) {
291 /* clear global fifo error interrupt */
292 lola_writel(chip, BAR1, DINTSTS,
293 (status & (LOLA_DINT_FIFOERR | LOLA_DINT_MUERR)));
294 }
295 handled = 1;
296 }
297 spin_unlock(&chip->reg_lock);
298
299 lola_pcm_update(chip, &chip->pcm[CAPT], notify_ins);
300 lola_pcm_update(chip, &chip->pcm[PLAY], notify_outs);
301
302 return IRQ_RETVAL(handled);
303}
304
305
306/*
307 * controller
308 */
309static int reset_controller(struct lola *chip)
310{
311 unsigned int gctl = lola_readl(chip, BAR0, GCTL);
312 unsigned long end_time;
313
314 if (gctl) {
315 /* to be sure */
316 lola_writel(chip, BAR1, BOARD_MODE, 0);
317 return 0;
318 }
319
320 chip->cold_reset = 1;
321 lola_writel(chip, BAR0, GCTL, LOLA_GCTL_RESET);
322 end_time = jiffies + msecs_to_jiffies(200);
323 do {
324 msleep(1);
325 gctl = lola_readl(chip, BAR0, GCTL);
326 if (gctl)
327 break;
328 } while (time_before(jiffies, end_time));
329 if (!gctl) {
f58e2fce 330 dev_err(chip->card->dev, "cannot reset controller\n");
d43f3010
TI		 331 return -EIO;
332 }
333 return 0;
334}
335
336static void lola_irq_enable(struct lola *chip)
337{
338 unsigned int val;
339
340 /* enalbe all I/O streams */
341 val = (1 << chip->pcm[PLAY].num_streams) - 1;
342 lola_writel(chip, BAR1, DOINTCTL, val);
343 val = (1 << chip->pcm[CAPT].num_streams) - 1;
344 lola_writel(chip, BAR1, DIINTCTL, val);
345
346 /* enable global irqs */
347 val = LOLA_DINT_GLOBAL | LOLA_DINT_CTRL | LOLA_DINT_FIFOERR |
348 LOLA_DINT_MUERR;
349 lola_writel(chip, BAR1, DINTCTL, val);
350}
351
352static void lola_irq_disable(struct lola *chip)
353{
354 lola_writel(chip, BAR1, DINTCTL, 0);
355 lola_writel(chip, BAR1, DIINTCTL, 0);
356 lola_writel(chip, BAR1, DOINTCTL, 0);
357}
358
359static int setup_corb_rirb(struct lola *chip)
360{
361 int err;
362 unsigned char tmp;
363 unsigned long end_time;
364
365 err = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV,
366 snd_dma_pci_data(chip->pci),
367 PAGE_SIZE, &chip->rb);
368 if (err < 0)
369 return err;
370
371 chip->corb.addr = chip->rb.addr;
372 chip->corb.buf = (u32 *)chip->rb.area;
373 chip->rirb.addr = chip->rb.addr + 2048;
374 chip->rirb.buf = (u32 *)(chip->rb.area + 2048);
d43f3010
TI		 375
376 /* disable ringbuffer DMAs */
377 lola_writeb(chip, BAR0, RIRBCTL, 0);
378 lola_writeb(chip, BAR0, CORBCTL, 0);
379
380 end_time = jiffies + msecs_to_jiffies(200);
381 do {
382 if (!lola_readb(chip, BAR0, RIRBCTL) &&
383 !lola_readb(chip, BAR0, CORBCTL))
384 break;
385 msleep(1);
386 } while (time_before(jiffies, end_time));
387
388 /* CORB set up */
389 lola_writel(chip, BAR0, CORBLBASE, (u32)chip->corb.addr);
390 lola_writel(chip, BAR0, CORBUBASE, upper_32_bits(chip->corb.addr));
391 /* set the corb size to 256 entries */
392 lola_writeb(chip, BAR0, CORBSIZE, 0x02);
393 /* set the corb write pointer to 0 */
394 lola_writew(chip, BAR0, CORBWP, 0);
395 /* reset the corb hw read pointer */
396 lola_writew(chip, BAR0, CORBRP, LOLA_RBRWP_CLR);
397 /* enable corb dma */
398 lola_writeb(chip, BAR0, CORBCTL, LOLA_RBCTL_DMA_EN);
399 /* clear flags if set */
400 tmp = lola_readb(chip, BAR0, CORBSTS) & LOLA_CORB_INT_MASK;
401 if (tmp)
402 lola_writeb(chip, BAR0, CORBSTS, tmp);
403 chip->corb.wp = 0;
404
405 /* RIRB set up */
406 lola_writel(chip, BAR0, RIRBLBASE, (u32)chip->rirb.addr);
407 lola_writel(chip, BAR0, RIRBUBASE, upper_32_bits(chip->rirb.addr));
408 /* set the rirb size to 256 entries */
409 lola_writeb(chip, BAR0, RIRBSIZE, 0x02);
410 /* reset the rirb hw write pointer */
411 lola_writew(chip, BAR0, RIRBWP, LOLA_RBRWP_CLR);
412 /* set N=1, get RIRB response interrupt for new entry */
413 lola_writew(chip, BAR0, RINTCNT, 1);
414 /* enable rirb dma and response irq */
415 lola_writeb(chip, BAR0, RIRBCTL, LOLA_RBCTL_DMA_EN | LOLA_RBCTL_IRQ_EN);
416 /* clear flags if set */
417 tmp = lola_readb(chip, BAR0, RIRBSTS) & LOLA_RIRB_INT_MASK;
418 if (tmp)
419 lola_writeb(chip, BAR0, RIRBSTS, tmp);
420 chip->rirb.rp = chip->rirb.cmds = 0;
421
422 return 0;
423}
424
425static void stop_corb_rirb(struct lola *chip)
426{
427 /* disable ringbuffer DMAs */
428 lola_writeb(chip, BAR0, RIRBCTL, 0);
429 lola_writeb(chip, BAR0, CORBCTL, 0);
430}
431
432static void lola_reset_setups(struct lola *chip)
433{
434 /* update the granularity */
435 lola_set_granularity(chip, chip->granularity, true);
436 /* update the sample clock */
437 lola_set_clock_index(chip, chip->clock.cur_index);
438 /* enable unsolicited events of the clock widget */
439 lola_enable_clock_events(chip);
440 /* update the analog gains */
441 lola_setup_all_analog_gains(chip, CAPT, false); /* input, update */
442 /* update SRC configuration if applicable */
443 lola_set_src_config(chip, chip->input_src_mask, false);
444 /* update the analog outputs */
445 lola_setup_all_analog_gains(chip, PLAY, false); /* output, update */
446}
447
e23e7a14 448static int lola_parse_tree(struct lola *chip)
d43f3010
TI		 449{
450 unsigned int val;
451 int nid, err;
452
453 err = lola_read_param(chip, 0, LOLA_PAR_VENDOR_ID, &val);
454 if (err < 0) {
f58e2fce 455 dev_err(chip->card->dev, "Can't read VENDOR_ID\n");
d43f3010
TI		 456 return err;
457 }
458 val >>= 16;
459 if (val != 0x1369) {
f58e2fce 460 dev_err(chip->card->dev, "Unknown codec vendor 0x%x\n", val);
d43f3010
TI		 461 return -EINVAL;
462 }
463
464 err = lola_read_param(chip, 1, LOLA_PAR_FUNCTION_TYPE, &val);
465 if (err < 0) {
f58e2fce 466 dev_err(chip->card->dev, "Can't read FUNCTION_TYPE\n");
d43f3010
TI		 467 return err;
468 }
469 if (val != 1) {
f58e2fce 470 dev_err(chip->card->dev, "Unknown function type %d\n", val);
d43f3010
TI		 471 return -EINVAL;
472 }
473
474 err = lola_read_param(chip, 1, LOLA_PAR_SPECIFIC_CAPS, &val);
475 if (err < 0) {
f58e2fce 476 dev_err(chip->card->dev, "Can't read SPECCAPS\n");
d43f3010
TI		 477 return err;
478 }
479 chip->lola_caps = val;
480 chip->pin[CAPT].num_pins = LOLA_AFG_INPUT_PIN_COUNT(chip->lola_caps);
481 chip->pin[PLAY].num_pins = LOLA_AFG_OUTPUT_PIN_COUNT(chip->lola_caps);
f58e2fce 482 dev_dbg(chip->card->dev, "speccaps=0x%x, pins in=%d, out=%d\n",
a426c787
TI		 483 chip->lola_caps,
484 chip->pin[CAPT].num_pins, chip->pin[PLAY].num_pins);
d43f3010
TI		 485
486 if (chip->pin[CAPT].num_pins > MAX_AUDIO_INOUT_COUNT ||
487 chip->pin[PLAY].num_pins > MAX_AUDIO_INOUT_COUNT) {
f58e2fce 488 dev_err(chip->card->dev, "Invalid Lola-spec caps 0x%x\n", val);
d43f3010
TI		 489 return -EINVAL;
490 }
491
492 nid = 0x02;
493 err = lola_init_pcm(chip, CAPT, &nid);
494 if (err < 0)
495 return err;
496 err = lola_init_pcm(chip, PLAY, &nid);
497 if (err < 0)
498 return err;
499
500 err = lola_init_pins(chip, CAPT, &nid);
501 if (err < 0)
502 return err;
503 err = lola_init_pins(chip, PLAY, &nid);
504 if (err < 0)
505 return err;
506
507 if (LOLA_AFG_CLOCK_WIDGET_PRESENT(chip->lola_caps)) {
508 err = lola_init_clock_widget(chip, nid);
509 if (err < 0)
510 return err;
511 nid++;
512 }
513 if (LOLA_AFG_MIXER_WIDGET_PRESENT(chip->lola_caps)) {
514 err = lola_init_mixer_widget(chip, nid);
515 if (err < 0)
516 return err;
517 nid++;
518 }
519
520 /* enable unsolicited events of the clock widget */
521 err = lola_enable_clock_events(chip);
522 if (err < 0)
523 return err;
524
525 /* if last ResetController was not a ColdReset, we don't know
526 * the state of the card; initialize here again
527 */
528 if (!chip->cold_reset) {
529 lola_reset_setups(chip);
530 chip->cold_reset = 1;
0f8f56c9
TI		 531 } else {
532 /* set the granularity if it is not the default */
533 if (chip->granularity != LOLA_GRANULARITY_MIN)
534 lola_set_granularity(chip, chip->granularity, true);
d43f3010
TI		 535 }
536
537 return 0;
538}
539
540static void lola_stop_hw(struct lola *chip)
541{
542 stop_corb_rirb(chip);
543 lola_irq_disable(chip);
544}
545
546static void lola_free(struct lola *chip)
547{
548 if (chip->initialized)
549 lola_stop_hw(chip);
550 lola_free_pcm(chip);
551 lola_free_mixer(chip);
552 if (chip->irq >= 0)
553 free_irq(chip->irq, (void *)chip);
ff6defa6
ME		 554 iounmap(chip->bar[0].remap_addr);
555 iounmap(chip->bar[1].remap_addr);
d43f3010
TI		 556 if (chip->rb.area)
557 snd_dma_free_pages(&chip->rb);
558 pci_release_regions(chip->pci);
559 pci_disable_device(chip->pci);
560 kfree(chip);
561}
562
563static int lola_dev_free(struct snd_device *device)
564{
565 lola_free(device->device_data);
566 return 0;
567}
568
e23e7a14
BP		 569static int lola_create(struct snd_card *card, struct pci_dev *pci,
570 int dev, struct lola **rchip)
d43f3010
TI		 571{
572 struct lola *chip;
573 int err;
574 unsigned int dever;
575 static struct snd_device_ops ops = {
576 .dev_free = lola_dev_free,
577 };
578
579 *rchip = NULL;
580
581 err = pci_enable_device(pci);
582 if (err < 0)
583 return err;
584
585 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
586 if (!chip) {
d43f3010
TI		 587 pci_disable_device(pci);
588 return -ENOMEM;
589 }
590
591 spin_lock_init(&chip->reg_lock);
592 mutex_init(&chip->open_mutex);
593 chip->card = card;
594 chip->pci = pci;
595 chip->irq = -1;
596
fe3d393e 597 chip->granularity = granularity[dev];
8bd172dc
TI		 598 switch (chip->granularity) {
599 case 8:
600 chip->sample_rate_max = 48000;
601 break;
602 case 16:
603 chip->sample_rate_max = 96000;
604 break;
605 case 32:
606 chip->sample_rate_max = 192000;
607 break;
608 default:
f58e2fce 609 dev_warn(chip->card->dev,
8bd172dc
TI		 610 "Invalid granularity %d, reset to %d\n",
611 chip->granularity, LOLA_GRANULARITY_MAX);
fe3d393e 612 chip->granularity = LOLA_GRANULARITY_MAX;
8bd172dc
TI		 613 chip->sample_rate_max = 192000;
614 break;
615 }
616 chip->sample_rate_min = sample_rate_min[dev];
617 if (chip->sample_rate_min > chip->sample_rate_max) {
f58e2fce 618 dev_warn(chip->card->dev,
8bd172dc
TI		 619 "Invalid sample_rate_min %d, reset to 16000\n",
620 chip->sample_rate_min);
621 chip->sample_rate_min = 16000;
fe3d393e 622 }
d43f3010
TI		 623
624 err = pci_request_regions(pci, DRVNAME);
625 if (err < 0) {
626 kfree(chip);
627 pci_disable_device(pci);
628 return err;
629 }
630
631 chip->bar[0].addr = pci_resource_start(pci, 0);
632 chip->bar[0].remap_addr = pci_ioremap_bar(pci, 0);
633 chip->bar[1].addr = pci_resource_start(pci, 2);
634 chip->bar[1].remap_addr = pci_ioremap_bar(pci, 2);
635 if (!chip->bar[0].remap_addr || !chip->bar[1].remap_addr) {
f58e2fce 636 dev_err(chip->card->dev, "ioremap error\n");
d43f3010
TI		 637 err = -ENXIO;
638 goto errout;
639 }
640
641 pci_set_master(pci);
642
643 err = reset_controller(chip);
644 if (err < 0)
645 goto errout;
646
647 if (request_irq(pci->irq, lola_interrupt, IRQF_SHARED,
934c2b6d 648 KBUILD_MODNAME, chip)) {
f58e2fce 649 dev_err(chip->card->dev, "unable to grab IRQ %d\n", pci->irq);
d43f3010
TI		 650 err = -EBUSY;
651 goto errout;
652 }
653 chip->irq = pci->irq;
654 synchronize_irq(chip->irq);
655
656 dever = lola_readl(chip, BAR1, DEVER);
657 chip->pcm[CAPT].num_streams = (dever >> 0) & 0x3ff;
658 chip->pcm[PLAY].num_streams = (dever >> 10) & 0x3ff;
659 chip->version = (dever >> 24) & 0xff;
f58e2fce 660 dev_dbg(chip->card->dev, "streams in=%d, out=%d, version=0x%x\n",
d43f3010
TI		 661 chip->pcm[CAPT].num_streams, chip->pcm[PLAY].num_streams,
662 chip->version);
663
664 /* Test LOLA_BAR1_DEVER */
665 if (chip->pcm[CAPT].num_streams > MAX_STREAM_IN_COUNT ||
666 chip->pcm[PLAY].num_streams > MAX_STREAM_OUT_COUNT ||
667 (!chip->pcm[CAPT].num_streams &&
668 !chip->pcm[PLAY].num_streams)) {
f58e2fce 669 dev_err(chip->card->dev, "invalid DEVER = %x\n", dever);
d43f3010
TI		 670 err = -EINVAL;
671 goto errout;
672 }
673
674 err = setup_corb_rirb(chip);
675 if (err < 0)
676 goto errout;
677
678 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
679 if (err < 0) {
f58e2fce 680 dev_err(chip->card->dev, "Error creating device [card]!\n");
d43f3010
TI		 681 goto errout;
682 }
683
684 strcpy(card->driver, "Lola");
685 strlcpy(card->shortname, "Digigram Lola", sizeof(card->shortname));
686 snprintf(card->longname, sizeof(card->longname),
687 "%s at 0x%lx irq %i",
688 card->shortname, chip->bar[0].addr, chip->irq);
689 strcpy(card->mixername, card->shortname);
690
691 lola_irq_enable(chip);
692
693 chip->initialized = 1;
694 *rchip = chip;
695 return 0;
696
697 errout:
698 lola_free(chip);
699 return err;
700}
701
e23e7a14
BP		 702static int lola_probe(struct pci_dev *pci,
703 const struct pci_device_id *pci_id)
d43f3010
TI		 704{
705 static int dev;
706 struct snd_card *card;
707 struct lola *chip;
708 int err;
709
710 if (dev >= SNDRV_CARDS)
711 return -ENODEV;
712 if (!enable[dev]) {
713 dev++;
714 return -ENOENT;
715 }
716
60c5772b
TI		 717 err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
718 0, &card);
d43f3010 719 if (err < 0) {
feabb67e 720 dev_err(&pci->dev, "Error creating card!\n");
d43f3010
TI		 721 return err;
722 }
723
fe3d393e 724 err = lola_create(card, pci, dev, &chip);
d43f3010
TI		 725 if (err < 0)
726 goto out_free;
727 card->private_data = chip;
728
729 err = lola_parse_tree(chip);
730 if (err < 0)
731 goto out_free;
732
733 err = lola_create_pcm(chip);
734 if (err < 0)
735 goto out_free;
736
737 err = lola_create_mixer(chip);
738 if (err < 0)
739 goto out_free;
740
741 lola_proc_debug_new(chip);
742
743 err = snd_card_register(card);
744 if (err < 0)
745 goto out_free;
746
747 pci_set_drvdata(pci, card);
748 dev++;
749 return err;
750out_free:
751 snd_card_free(card);
752 return err;
753}
754
e23e7a14 755static void lola_remove(struct pci_dev *pci)
d43f3010
TI		 756{
757 snd_card_free(pci_get_drvdata(pci));
d43f3010
TI		 758}
759
760/* PCI IDs */
9baa3c34 761static const struct pci_device_id lola_ids[] = {
d43f3010
TI		 762 { PCI_VDEVICE(DIGIGRAM, 0x0001) },
763 { 0, }
764};
765MODULE_DEVICE_TABLE(pci, lola_ids);
766
767/* pci_driver definition */
e9f66d9b 768static struct pci_driver lola_driver = {
3733e424 769 .name = KBUILD_MODNAME,
d43f3010
TI		 770 .id_table = lola_ids,
771 .probe = lola_probe,
e23e7a14 772 .remove = lola_remove,
d43f3010
TI		 773};
774
e9f66d9b 775module_pci_driver(lola_driver);
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