[linux.git] / include / linux / mv643xx_eth.h

/* SPDX-License-Identifier: GPL-2.0 */
/*
 * MV-643XX ethernet platform device data definition file.
 */

#ifndef __LINUX_MV643XX_ETH_H
#define __LINUX_MV643XX_ETH_H

#include <linux/mbus.h>
#include <linux/if_ether.h>

#define MV643XX_ETH_SHARED_NAME		"mv643xx_eth"
#define MV643XX_ETH_NAME		"mv643xx_eth_port"
#define MV643XX_ETH_SHARED_REGS		0x2000
#define MV643XX_ETH_SHARED_REGS_SIZE	0x2000
#define MV643XX_ETH_BAR_4		0x2220
#define MV643XX_ETH_SIZE_REG_4		0x2224
#define MV643XX_ETH_BASE_ADDR_ENABLE_REG	0x2290

#define MV643XX_TX_CSUM_DEFAULT_LIMIT	0

struct mv643xx_eth_shared_platform_data {
	struct mbus_dram_target_info	*dram;
	/*
	 * Max packet size for Tx IP/Layer 4 checksum, when set to 0, default
	 * limit of 9KiB will be used.
	 */
	int			tx_csum_limit;
};

#define MV643XX_ETH_PHY_ADDR_DEFAULT	0
#define MV643XX_ETH_PHY_ADDR(x)		(0x80 | (x))
#define MV643XX_ETH_PHY_NONE		0xff

struct device_node;
struct mv643xx_eth_platform_data {
	/*
	 * Pointer back to our parent instance, and our port number.
	 */
	struct platform_device	*shared;
	int			port_number;

	/*
	 * Whether a PHY is present, and if yes, at which address.
	 */
	int			phy_addr;
	struct device_node	*phy_node;

	/*
	 * Use this MAC address if it is valid, overriding the
	 * address that is already in the hardware.
	 */
	u8			mac_addr[ETH_ALEN];

	/*
	 * If speed is 0, autonegotiation is enabled.
	 *   Valid values for speed: 0, SPEED_10, SPEED_100, SPEED_1000.
	 *   Valid values for duplex: DUPLEX_HALF, DUPLEX_FULL.
	 */
	int			speed;
	int			duplex;

	/*
	 * How many RX/TX queues to use.
	 */
	int			rx_queue_count;
	int			tx_queue_count;

	/*
	 * Override default RX/TX queue sizes if nonzero.
	 */
	int			rx_queue_size;
	int			tx_queue_size;

	/*
	 * Use on-chip SRAM for RX/TX descriptors if size is nonzero
	 * and sufficient to contain all descriptors for the requested
	 * ring sizes.
	 */
	unsigned long		rx_sram_addr;
	int			rx_sram_size;
	unsigned long		tx_sram_addr;
	int			tx_sram_size;
};


#endif
Commit	Line	Data
b2441318	1	/* SPDX-License-Identifier: GPL-2.0 */
c4a6a2ab LB	2	/*
	3	* MV-643XX ethernet platform device data definition file.
	4	*/
fa3959f4	5
c4a6a2ab LB	6	#ifndef __LINUX_MV643XX_ETH_H
	7	#define __LINUX_MV643XX_ETH_H
	8
f2ce825d	9	#include <linux/mbus.h>
574e2af7	10	#include <linux/if_ether.h>
f2ce825d	11
240e4419 LB	12	#define MV643XX_ETH_SHARED_NAME "mv643xx_eth"
240e4419 LB	13	#define MV643XX_ETH_NAME "mv643xx_eth_port"
c4a6a2ab LB	14	#define MV643XX_ETH_SHARED_REGS 0x2000
c4a6a2ab LB	15	#define MV643XX_ETH_SHARED_REGS_SIZE 0x2000
3077d78a DF	16	#define MV643XX_ETH_BAR_4 0x2220
	17	#define MV643XX_ETH_SIZE_REG_4 0x2224
	18	#define MV643XX_ETH_BASE_ADDR_ENABLE_REG 0x2290
c4a6a2ab	19
58569aee AP	20	#define MV643XX_TX_CSUM_DEFAULT_LIMIT 0
58569aee AP	21
f2ce825d LB	22	struct mv643xx_eth_shared_platform_data {
f2ce825d LB	23	struct mbus_dram_target_info *dram;
9b2c2ff7 SB	24	/*
	25	* Max packet size for Tx IP/Layer 4 checksum, when set to 0, default
	26	* limit of 9KiB will be used.
	27	*/
	28	int tx_csum_limit;
f2ce825d LB	29	};
f2ce825d LB	30
ac840605 LB	31	#define MV643XX_ETH_PHY_ADDR_DEFAULT 0
	32	#define MV643XX_ETH_PHY_ADDR(x) (0x80 \| (x))
	33	#define MV643XX_ETH_PHY_NONE 0xff
	34
5f292354	35	struct device_node;
c4a6a2ab	36	struct mv643xx_eth_platform_data {
fc32b0e2 LB	37	/*
	38	* Pointer back to our parent instance, and our port number.
	39	*/
fa3959f4	40	struct platform_device *shared;
fc32b0e2	41	int port_number;
fa3959f4	42
fc32b0e2 LB	43	/*
	44	* Whether a PHY is present, and if yes, at which address.
	45	*/
fc32b0e2	46	int phy_addr;
5f292354	47	struct device_node *phy_node;
ce4e2e45	48
fc32b0e2 LB	49	/*
	50	* Use this MAC address if it is valid, overriding the
	51	* address that is already in the hardware.
	52	*/
574e2af7	53	u8 mac_addr[ETH_ALEN];
fc32b0e2 LB	54
	55	/*
	56	* If speed is 0, autonegotiation is enabled.
	57	* Valid values for speed: 0, SPEED_10, SPEED_100, SPEED_1000.
	58	* Valid values for duplex: DUPLEX_HALF, DUPLEX_FULL.
	59	*/
	60	int speed;
	61	int duplex;
	62
64da80a2	63	/*
f7981c1c	64	* How many RX/TX queues to use.
64da80a2	65	*/
f7981c1c LB	66	int rx_queue_count;
f7981c1c LB	67	int tx_queue_count;
64da80a2	68
fc32b0e2 LB	69	/*
	70	* Override default RX/TX queue sizes if nonzero.
	71	*/
	72	int rx_queue_size;
	73	int tx_queue_size;
	74
	75	/*
	76	* Use on-chip SRAM for RX/TX descriptors if size is nonzero
	77	* and sufficient to contain all descriptors for the requested
	78	* ring sizes.
	79	*/
	80	unsigned long rx_sram_addr;
	81	int rx_sram_size;
	82	unsigned long tx_sram_addr;
	83	int tx_sram_size;
c4a6a2ab LB	84	};
c4a6a2ab LB	85
fc32b0e2 LB	86
fc32b0e2 LB	87	#endif