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Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * linux/drivers/pcmcia/sa1111_generic.c | |
3 | * | |
4 | * We implement the generic parts of a SA1111 PCMCIA driver. This | |
5 | * basically means we handle everything except controlling the | |
6 | * power. Power is machine specific... | |
7 | */ | |
1da177e4 LT |
8 | #include <linux/module.h> |
9 | #include <linux/kernel.h> | |
10 | #include <linux/ioport.h> | |
11 | #include <linux/device.h> | |
12 | #include <linux/interrupt.h> | |
13 | #include <linux/init.h> | |
99730225 | 14 | #include <linux/io.h> |
5a0e3ad6 | 15 | #include <linux/slab.h> |
1da177e4 LT |
16 | |
17 | #include <pcmcia/ss.h> | |
18 | ||
a09e64fb | 19 | #include <mach/hardware.h> |
1da177e4 | 20 | #include <asm/hardware/sa1111.h> |
3f8df892 | 21 | #include <asm/mach-types.h> |
1da177e4 LT |
22 | #include <asm/irq.h> |
23 | ||
24 | #include "sa1111_generic.h" | |
25 | ||
ea8c00ac RK |
26 | /* |
27 | * These are offsets from the above base. | |
28 | */ | |
29 | #define PCCR 0x0000 | |
30 | #define PCSSR 0x0004 | |
31 | #define PCSR 0x0008 | |
32 | ||
33 | #define PCSR_S0_READY (1<<0) | |
34 | #define PCSR_S1_READY (1<<1) | |
35 | #define PCSR_S0_DETECT (1<<2) | |
36 | #define PCSR_S1_DETECT (1<<3) | |
37 | #define PCSR_S0_VS1 (1<<4) | |
38 | #define PCSR_S0_VS2 (1<<5) | |
39 | #define PCSR_S1_VS1 (1<<6) | |
40 | #define PCSR_S1_VS2 (1<<7) | |
41 | #define PCSR_S0_WP (1<<8) | |
42 | #define PCSR_S1_WP (1<<9) | |
43 | #define PCSR_S0_BVD1 (1<<10) | |
44 | #define PCSR_S0_BVD2 (1<<11) | |
45 | #define PCSR_S1_BVD1 (1<<12) | |
46 | #define PCSR_S1_BVD2 (1<<13) | |
47 | ||
48 | #define PCCR_S0_RST (1<<0) | |
49 | #define PCCR_S1_RST (1<<1) | |
50 | #define PCCR_S0_FLT (1<<2) | |
51 | #define PCCR_S1_FLT (1<<3) | |
52 | #define PCCR_S0_PWAITEN (1<<4) | |
53 | #define PCCR_S1_PWAITEN (1<<5) | |
54 | #define PCCR_S0_PSE (1<<6) | |
55 | #define PCCR_S1_PSE (1<<7) | |
56 | ||
57 | #define PCSSR_S0_SLEEP (1<<0) | |
58 | #define PCSSR_S1_SLEEP (1<<1) | |
59 | ||
08fa1590 EM |
60 | #define IDX_IRQ_S0_READY_NINT (0) |
61 | #define IDX_IRQ_S0_CD_VALID (1) | |
62 | #define IDX_IRQ_S0_BVD1_STSCHG (2) | |
63 | #define IDX_IRQ_S1_READY_NINT (3) | |
64 | #define IDX_IRQ_S1_CD_VALID (4) | |
65 | #define IDX_IRQ_S1_BVD1_STSCHG (5) | |
7170a312 | 66 | #define NUM_IRQS (6) |
08fa1590 | 67 | |
1da177e4 LT |
68 | void sa1111_pcmcia_socket_state(struct soc_pcmcia_socket *skt, struct pcmcia_state *state) |
69 | { | |
701a5dc0 | 70 | struct sa1111_pcmcia_socket *s = to_skt(skt); |
de854b33 | 71 | u32 status = readl_relaxed(s->dev->mapbase + PCSR); |
1da177e4 LT |
72 | |
73 | switch (skt->nr) { | |
74 | case 0: | |
75 | state->detect = status & PCSR_S0_DETECT ? 0 : 1; | |
76 | state->ready = status & PCSR_S0_READY ? 1 : 0; | |
77 | state->bvd1 = status & PCSR_S0_BVD1 ? 1 : 0; | |
78 | state->bvd2 = status & PCSR_S0_BVD2 ? 1 : 0; | |
79 | state->wrprot = status & PCSR_S0_WP ? 1 : 0; | |
80 | state->vs_3v = status & PCSR_S0_VS1 ? 0 : 1; | |
81 | state->vs_Xv = status & PCSR_S0_VS2 ? 0 : 1; | |
82 | break; | |
83 | ||
84 | case 1: | |
85 | state->detect = status & PCSR_S1_DETECT ? 0 : 1; | |
86 | state->ready = status & PCSR_S1_READY ? 1 : 0; | |
87 | state->bvd1 = status & PCSR_S1_BVD1 ? 1 : 0; | |
88 | state->bvd2 = status & PCSR_S1_BVD2 ? 1 : 0; | |
89 | state->wrprot = status & PCSR_S1_WP ? 1 : 0; | |
90 | state->vs_3v = status & PCSR_S1_VS1 ? 0 : 1; | |
91 | state->vs_Xv = status & PCSR_S1_VS2 ? 0 : 1; | |
92 | break; | |
93 | } | |
94 | } | |
95 | ||
96 | int sa1111_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, const socket_state_t *state) | |
97 | { | |
701a5dc0 | 98 | struct sa1111_pcmcia_socket *s = to_skt(skt); |
de854b33 | 99 | u32 pccr_skt_mask, pccr_set_mask, val; |
1da177e4 LT |
100 | unsigned long flags; |
101 | ||
102 | switch (skt->nr) { | |
103 | case 0: | |
104 | pccr_skt_mask = PCCR_S0_RST|PCCR_S0_FLT|PCCR_S0_PWAITEN|PCCR_S0_PSE; | |
105 | break; | |
106 | ||
107 | case 1: | |
108 | pccr_skt_mask = PCCR_S1_RST|PCCR_S1_FLT|PCCR_S1_PWAITEN|PCCR_S1_PSE; | |
109 | break; | |
110 | ||
111 | default: | |
112 | return -1; | |
113 | } | |
114 | ||
115 | pccr_set_mask = 0; | |
116 | ||
117 | if (state->Vcc != 0) | |
118 | pccr_set_mask |= PCCR_S0_PWAITEN|PCCR_S1_PWAITEN; | |
119 | if (state->Vcc == 50) | |
120 | pccr_set_mask |= PCCR_S0_PSE|PCCR_S1_PSE; | |
121 | if (state->flags & SS_RESET) | |
122 | pccr_set_mask |= PCCR_S0_RST|PCCR_S1_RST; | |
123 | if (state->flags & SS_OUTPUT_ENA) | |
124 | pccr_set_mask |= PCCR_S0_FLT|PCCR_S1_FLT; | |
125 | ||
126 | local_irq_save(flags); | |
de854b33 | 127 | val = readl_relaxed(s->dev->mapbase + PCCR); |
1da177e4 LT |
128 | val &= ~pccr_skt_mask; |
129 | val |= pccr_set_mask & pccr_skt_mask; | |
de854b33 | 130 | writel_relaxed(val, s->dev->mapbase + PCCR); |
1da177e4 LT |
131 | local_irq_restore(flags); |
132 | ||
133 | return 0; | |
134 | } | |
135 | ||
701a5dc0 RKAL |
136 | int sa1111_pcmcia_add(struct sa1111_dev *dev, struct pcmcia_low_level *ops, |
137 | int (*add)(struct soc_pcmcia_socket *)) | |
138 | { | |
139 | struct sa1111_pcmcia_socket *s; | |
321ae964 | 140 | struct clk *clk; |
7170a312 | 141 | int i, ret = 0, irqs[NUM_IRQS]; |
701a5dc0 | 142 | |
321ae964 RK |
143 | clk = devm_clk_get(&dev->dev, NULL); |
144 | if (IS_ERR(clk)) | |
145 | return PTR_ERR(clk); | |
146 | ||
7170a312 RK |
147 | for (i = 0; i < NUM_IRQS; i++) { |
148 | irqs[i] = sa1111_get_irq(dev, i); | |
149 | if (irqs[i] <= 0) | |
150 | return irqs[i] ? : -ENXIO; | |
151 | } | |
152 | ||
dabd1468 | 153 | ops->socket_state = sa1111_pcmcia_socket_state; |
dabd1468 | 154 | |
701a5dc0 RKAL |
155 | for (i = 0; i < ops->nr; i++) { |
156 | s = kzalloc(sizeof(*s), GFP_KERNEL); | |
157 | if (!s) | |
158 | return -ENOMEM; | |
159 | ||
160 | s->soc.nr = ops->first + i; | |
321ae964 RK |
161 | s->soc.clk = clk; |
162 | ||
e0d21178 | 163 | soc_pcmcia_init_one(&s->soc, ops, &dev->dev); |
701a5dc0 | 164 | s->dev = dev; |
81f33c65 | 165 | if (s->soc.nr) { |
7170a312 RK |
166 | s->soc.socket.pci_irq = irqs[IDX_IRQ_S1_READY_NINT]; |
167 | s->soc.stat[SOC_STAT_CD].irq = irqs[IDX_IRQ_S1_CD_VALID]; | |
81f33c65 | 168 | s->soc.stat[SOC_STAT_CD].name = "SA1111 CF card detect"; |
7170a312 | 169 | s->soc.stat[SOC_STAT_BVD1].irq = irqs[IDX_IRQ_S1_BVD1_STSCHG]; |
81f33c65 RK |
170 | s->soc.stat[SOC_STAT_BVD1].name = "SA1111 CF BVD1"; |
171 | } else { | |
7170a312 RK |
172 | s->soc.socket.pci_irq = irqs[IDX_IRQ_S0_READY_NINT]; |
173 | s->soc.stat[SOC_STAT_CD].irq = irqs[IDX_IRQ_S0_CD_VALID]; | |
81f33c65 | 174 | s->soc.stat[SOC_STAT_CD].name = "SA1111 PCMCIA card detect"; |
7170a312 | 175 | s->soc.stat[SOC_STAT_BVD1].irq = irqs[IDX_IRQ_S0_BVD1_STSCHG]; |
81f33c65 RK |
176 | s->soc.stat[SOC_STAT_BVD1].name = "SA1111 PCMCIA BVD1"; |
177 | } | |
701a5dc0 RKAL |
178 | |
179 | ret = add(&s->soc); | |
180 | if (ret == 0) { | |
181 | s->next = dev_get_drvdata(&dev->dev); | |
182 | dev_set_drvdata(&dev->dev, s); | |
183 | } else | |
184 | kfree(s); | |
185 | } | |
186 | ||
187 | return ret; | |
188 | } | |
189 | ||
1da177e4 LT |
190 | static int pcmcia_probe(struct sa1111_dev *dev) |
191 | { | |
f339ab3d | 192 | void __iomem *base; |
ae99ddbc RK |
193 | int ret; |
194 | ||
195 | ret = sa1111_enable_device(dev); | |
196 | if (ret) | |
197 | return ret; | |
1da177e4 | 198 | |
701a5dc0 RKAL |
199 | dev_set_drvdata(&dev->dev, NULL); |
200 | ||
ae99ddbc RK |
201 | if (!request_mem_region(dev->res.start, 512, SA1111_DRIVER_NAME(dev))) { |
202 | sa1111_disable_device(dev); | |
1da177e4 | 203 | return -EBUSY; |
ae99ddbc | 204 | } |
1da177e4 LT |
205 | |
206 | base = dev->mapbase; | |
207 | ||
208 | /* | |
209 | * Initialise the suspend state. | |
210 | */ | |
de854b33 RK |
211 | writel_relaxed(PCSSR_S0_SLEEP | PCSSR_S1_SLEEP, base + PCSSR); |
212 | writel_relaxed(PCCR_S0_FLT | PCCR_S1_FLT, base + PCCR); | |
1da177e4 | 213 | |
3f8df892 | 214 | ret = -ENODEV; |
1da177e4 | 215 | #ifdef CONFIG_SA1100_BADGE4 |
3f8df892 RK |
216 | if (machine_is_badge4()) |
217 | ret = pcmcia_badge4_init(dev); | |
1da177e4 LT |
218 | #endif |
219 | #ifdef CONFIG_SA1100_JORNADA720 | |
3f8df892 RK |
220 | if (machine_is_jornada720()) |
221 | ret = pcmcia_jornada720_init(dev); | |
1da177e4 LT |
222 | #endif |
223 | #ifdef CONFIG_ARCH_LUBBOCK | |
3f8df892 RK |
224 | if (machine_is_lubbock()) |
225 | ret = pcmcia_lubbock_init(dev); | |
1da177e4 LT |
226 | #endif |
227 | #ifdef CONFIG_ASSABET_NEPONSET | |
3f8df892 RK |
228 | if (machine_is_assabet()) |
229 | ret = pcmcia_neponset_init(dev); | |
1da177e4 | 230 | #endif |
3f8df892 RK |
231 | |
232 | if (ret) { | |
233 | release_mem_region(dev->res.start, 512); | |
234 | sa1111_disable_device(dev); | |
235 | } | |
236 | ||
237 | return ret; | |
1da177e4 LT |
238 | } |
239 | ||
e765a02c | 240 | static int pcmcia_remove(struct sa1111_dev *dev) |
1da177e4 | 241 | { |
701a5dc0 | 242 | struct sa1111_pcmcia_socket *next, *s = dev_get_drvdata(&dev->dev); |
be85458e RKAL |
243 | |
244 | dev_set_drvdata(&dev->dev, NULL); | |
245 | ||
171cf94c RK |
246 | for (; s; s = next) { |
247 | next = s->next; | |
701a5dc0 RKAL |
248 | soc_pcmcia_remove_one(&s->soc); |
249 | kfree(s); | |
250 | } | |
be85458e | 251 | |
1da177e4 | 252 | release_mem_region(dev->res.start, 512); |
ae99ddbc | 253 | sa1111_disable_device(dev); |
1da177e4 LT |
254 | return 0; |
255 | } | |
256 | ||
1da177e4 LT |
257 | static struct sa1111_driver pcmcia_driver = { |
258 | .drv = { | |
259 | .name = "sa1111-pcmcia", | |
260 | }, | |
261 | .devid = SA1111_DEVID_PCMCIA, | |
262 | .probe = pcmcia_probe, | |
96364e3a | 263 | .remove = pcmcia_remove, |
1da177e4 LT |
264 | }; |
265 | ||
266 | static int __init sa1111_drv_pcmcia_init(void) | |
267 | { | |
268 | return sa1111_driver_register(&pcmcia_driver); | |
269 | } | |
270 | ||
271 | static void __exit sa1111_drv_pcmcia_exit(void) | |
272 | { | |
273 | sa1111_driver_unregister(&pcmcia_driver); | |
274 | } | |
275 | ||
f36598ae | 276 | fs_initcall(sa1111_drv_pcmcia_init); |
1da177e4 LT |
277 | module_exit(sa1111_drv_pcmcia_exit); |
278 | ||
279 | MODULE_DESCRIPTION("SA1111 PCMCIA card socket driver"); | |
280 | MODULE_LICENSE("GPL"); |