Commit | Line | Data |
---|---|---|
7c2f891c | 1 | /* |
7c2f891c SH |
2 | * Freescale i.MX Frame Buffer device driver |
3 | * | |
4 | * Copyright (C) 2004 Sascha Hauer, Pengutronix | |
5 | * Based on acornfb.c Copyright (C) Russell King. | |
6 | * | |
7 | * This file is subject to the terms and conditions of the GNU General Public | |
8 | * License. See the file COPYING in the main directory of this archive for | |
9 | * more details. | |
10 | * | |
11 | * Please direct your questions and comments on this driver to the following | |
12 | * email address: | |
13 | * | |
14 | * linux-arm-kernel@lists.arm.linux.org.uk | |
15 | */ | |
16 | ||
7c2f891c SH |
17 | #include <linux/module.h> |
18 | #include <linux/kernel.h> | |
7c2f891c SH |
19 | #include <linux/errno.h> |
20 | #include <linux/string.h> | |
21 | #include <linux/interrupt.h> | |
22 | #include <linux/slab.h> | |
27ac792c | 23 | #include <linux/mm.h> |
7c2f891c SH |
24 | #include <linux/fb.h> |
25 | #include <linux/delay.h> | |
26 | #include <linux/init.h> | |
27 | #include <linux/ioport.h> | |
28 | #include <linux/cpufreq.h> | |
f909ef64 | 29 | #include <linux/clk.h> |
d052d1be | 30 | #include <linux/platform_device.h> |
7c2f891c | 31 | #include <linux/dma-mapping.h> |
72330b0e | 32 | #include <linux/io.h> |
f909ef64 | 33 | #include <linux/math64.h> |
7c2f891c | 34 | |
a09e64fb | 35 | #include <mach/imxfb.h> |
f497d015 | 36 | #include <mach/hardware.h> |
7c2f891c SH |
37 | |
38 | /* | |
39 | * Complain if VAR is out of range. | |
40 | */ | |
41 | #define DEBUG_VAR 1 | |
42 | ||
81ef8061 EB |
43 | #if defined(CONFIG_BACKLIGHT_CLASS_DEVICE) || \ |
44 | (defined(CONFIG_BACKLIGHT_CLASS_DEVICE_MODULE) && \ | |
45 | defined(CONFIG_FB_IMX_MODULE)) | |
46 | #define PWMR_BACKLIGHT_AVAILABLE | |
47 | #endif | |
48 | ||
72330b0e JB |
49 | #define DRIVER_NAME "imx-fb" |
50 | ||
51 | #define LCDC_SSA 0x00 | |
52 | ||
53 | #define LCDC_SIZE 0x04 | |
54 | #define SIZE_XMAX(x) ((((x) >> 4) & 0x3f) << 20) | |
1d0f9870 | 55 | |
60328917 FE |
56 | #define YMAX_MASK (cpu_is_mx1() ? 0x1ff : 0x3ff) |
57 | #define SIZE_YMAX(y) ((y) & YMAX_MASK) | |
72330b0e JB |
58 | |
59 | #define LCDC_VPW 0x08 | |
60 | #define VPW_VPW(x) ((x) & 0x3ff) | |
61 | ||
62 | #define LCDC_CPOS 0x0C | |
63 | #define CPOS_CC1 (1<<31) | |
64 | #define CPOS_CC0 (1<<30) | |
65 | #define CPOS_OP (1<<28) | |
66 | #define CPOS_CXP(x) (((x) & 3ff) << 16) | |
1d0f9870 SH |
67 | |
68 | #ifdef CONFIG_ARCH_MX1 | |
72330b0e | 69 | #define CPOS_CYP(y) ((y) & 0x1ff) |
1d0f9870 SH |
70 | #else |
71 | #define CPOS_CYP(y) ((y) & 0x3ff) | |
72 | #endif | |
72330b0e JB |
73 | |
74 | #define LCDC_LCWHB 0x10 | |
75 | #define LCWHB_BK_EN (1<<31) | |
76 | #define LCWHB_CW(w) (((w) & 0x1f) << 24) | |
77 | #define LCWHB_CH(h) (((h) & 0x1f) << 16) | |
78 | #define LCWHB_BD(x) ((x) & 0xff) | |
79 | ||
80 | #define LCDC_LCHCC 0x14 | |
1d0f9870 SH |
81 | |
82 | #ifdef CONFIG_ARCH_MX1 | |
72330b0e JB |
83 | #define LCHCC_CUR_COL_R(r) (((r) & 0x1f) << 11) |
84 | #define LCHCC_CUR_COL_G(g) (((g) & 0x3f) << 5) | |
85 | #define LCHCC_CUR_COL_B(b) ((b) & 0x1f) | |
1d0f9870 SH |
86 | #else |
87 | #define LCHCC_CUR_COL_R(r) (((r) & 0x3f) << 12) | |
88 | #define LCHCC_CUR_COL_G(g) (((g) & 0x3f) << 6) | |
89 | #define LCHCC_CUR_COL_B(b) ((b) & 0x3f) | |
90 | #endif | |
72330b0e JB |
91 | |
92 | #define LCDC_PCR 0x18 | |
93 | ||
94 | #define LCDC_HCR 0x1C | |
95 | #define HCR_H_WIDTH(x) (((x) & 0x3f) << 26) | |
96 | #define HCR_H_WAIT_1(x) (((x) & 0xff) << 8) | |
97 | #define HCR_H_WAIT_2(x) ((x) & 0xff) | |
98 | ||
99 | #define LCDC_VCR 0x20 | |
100 | #define VCR_V_WIDTH(x) (((x) & 0x3f) << 26) | |
101 | #define VCR_V_WAIT_1(x) (((x) & 0xff) << 8) | |
102 | #define VCR_V_WAIT_2(x) ((x) & 0xff) | |
103 | ||
104 | #define LCDC_POS 0x24 | |
105 | #define POS_POS(x) ((x) & 1f) | |
106 | ||
107 | #define LCDC_LSCR1 0x28 | |
108 | /* bit fields in imxfb.h */ | |
109 | ||
110 | #define LCDC_PWMR 0x2C | |
111 | /* bit fields in imxfb.h */ | |
112 | ||
113 | #define LCDC_DMACR 0x30 | |
114 | /* bit fields in imxfb.h */ | |
115 | ||
116 | #define LCDC_RMCR 0x34 | |
1d0f9870 SH |
117 | |
118 | #ifdef CONFIG_ARCH_MX1 | |
72330b0e | 119 | #define RMCR_LCDC_EN (1<<1) |
1d0f9870 SH |
120 | #else |
121 | #define RMCR_LCDC_EN 0 | |
122 | #endif | |
123 | ||
72330b0e JB |
124 | #define RMCR_SELF_REF (1<<0) |
125 | ||
126 | #define LCDC_LCDICR 0x38 | |
127 | #define LCDICR_INT_SYN (1<<2) | |
128 | #define LCDICR_INT_CON (1) | |
129 | ||
130 | #define LCDC_LCDISR 0x40 | |
131 | #define LCDISR_UDR_ERR (1<<3) | |
132 | #define LCDISR_ERR_RES (1<<2) | |
133 | #define LCDISR_EOF (1<<1) | |
134 | #define LCDISR_BOF (1<<0) | |
135 | ||
343684ff SH |
136 | /* Used fb-mode. Can be set on kernel command line, therefore file-static. */ |
137 | static const char *fb_mode; | |
138 | ||
139 | ||
24b9baf7 SH |
140 | /* |
141 | * These are the bitfields for each | |
142 | * display depth that we support. | |
143 | */ | |
144 | struct imxfb_rgb { | |
145 | struct fb_bitfield red; | |
146 | struct fb_bitfield green; | |
147 | struct fb_bitfield blue; | |
148 | struct fb_bitfield transp; | |
149 | }; | |
150 | ||
24b9baf7 SH |
151 | struct imxfb_info { |
152 | struct platform_device *pdev; | |
153 | void __iomem *regs; | |
f909ef64 | 154 | struct clk *clk; |
24b9baf7 | 155 | |
24b9baf7 SH |
156 | /* |
157 | * These are the addresses we mapped | |
158 | * the framebuffer memory region to. | |
159 | */ | |
160 | dma_addr_t map_dma; | |
161 | u_char *map_cpu; | |
162 | u_int map_size; | |
163 | ||
164 | u_char *screen_cpu; | |
165 | dma_addr_t screen_dma; | |
166 | u_int palette_size; | |
167 | ||
168 | dma_addr_t dbar1; | |
169 | dma_addr_t dbar2; | |
170 | ||
171 | u_int pcr; | |
172 | u_int pwmr; | |
173 | u_int lscr1; | |
174 | u_int dmacr; | |
175 | u_int cmap_inverse:1, | |
176 | cmap_static:1, | |
177 | unused:30; | |
178 | ||
343684ff SH |
179 | struct imx_fb_videomode *mode; |
180 | int num_modes; | |
81ef8061 | 181 | #ifdef PWMR_BACKLIGHT_AVAILABLE |
7a2bb23c | 182 | struct backlight_device *bl; |
81ef8061 | 183 | #endif |
343684ff | 184 | |
24b9baf7 SH |
185 | void (*lcd_power)(int); |
186 | void (*backlight_power)(int); | |
187 | }; | |
188 | ||
189 | #define IMX_NAME "IMX" | |
190 | ||
191 | /* | |
192 | * Minimum X and Y resolutions | |
193 | */ | |
194 | #define MIN_XRES 64 | |
195 | #define MIN_YRES 64 | |
196 | ||
1512222b SH |
197 | /* Actually this really is 18bit support, the lowest 2 bits of each colour |
198 | * are unused in hardware. We claim to have 24bit support to make software | |
199 | * like X work, which does not support 18bit. | |
200 | */ | |
201 | static struct imxfb_rgb def_rgb_18 = { | |
202 | .red = {.offset = 16, .length = 8,}, | |
203 | .green = {.offset = 8, .length = 8,}, | |
204 | .blue = {.offset = 0, .length = 8,}, | |
205 | .transp = {.offset = 0, .length = 0,}, | |
206 | }; | |
207 | ||
80eee6bc SH |
208 | static struct imxfb_rgb def_rgb_16_tft = { |
209 | .red = {.offset = 11, .length = 5,}, | |
210 | .green = {.offset = 5, .length = 6,}, | |
211 | .blue = {.offset = 0, .length = 5,}, | |
212 | .transp = {.offset = 0, .length = 0,}, | |
213 | }; | |
214 | ||
215 | static struct imxfb_rgb def_rgb_16_stn = { | |
66c8719b SH |
216 | .red = {.offset = 8, .length = 4,}, |
217 | .green = {.offset = 4, .length = 4,}, | |
218 | .blue = {.offset = 0, .length = 4,}, | |
219 | .transp = {.offset = 0, .length = 0,}, | |
7c2f891c SH |
220 | }; |
221 | ||
222 | static struct imxfb_rgb def_rgb_8 = { | |
66c8719b SH |
223 | .red = {.offset = 0, .length = 8,}, |
224 | .green = {.offset = 0, .length = 8,}, | |
225 | .blue = {.offset = 0, .length = 8,}, | |
226 | .transp = {.offset = 0, .length = 0,}, | |
7c2f891c SH |
227 | }; |
228 | ||
66c8719b SH |
229 | static int imxfb_activate_var(struct fb_var_screeninfo *var, |
230 | struct fb_info *info); | |
7c2f891c SH |
231 | |
232 | static inline u_int chan_to_field(u_int chan, struct fb_bitfield *bf) | |
233 | { | |
234 | chan &= 0xffff; | |
235 | chan >>= 16 - bf->length; | |
236 | return chan << bf->offset; | |
237 | } | |
238 | ||
66c8719b SH |
239 | static int imxfb_setpalettereg(u_int regno, u_int red, u_int green, u_int blue, |
240 | u_int trans, struct fb_info *info) | |
7c2f891c SH |
241 | { |
242 | struct imxfb_info *fbi = info->par; | |
243 | u_int val, ret = 1; | |
244 | ||
245 | #define CNVT_TOHW(val,width) ((((val)<<(width))+0x7FFF-(val))>>16) | |
246 | if (regno < fbi->palette_size) { | |
247 | val = (CNVT_TOHW(red, 4) << 8) | | |
248 | (CNVT_TOHW(green,4) << 4) | | |
249 | CNVT_TOHW(blue, 4); | |
250 | ||
72330b0e | 251 | writel(val, fbi->regs + 0x800 + (regno << 2)); |
7c2f891c SH |
252 | ret = 0; |
253 | } | |
254 | return ret; | |
255 | } | |
256 | ||
66c8719b | 257 | static int imxfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, |
7c2f891c SH |
258 | u_int trans, struct fb_info *info) |
259 | { | |
260 | struct imxfb_info *fbi = info->par; | |
261 | unsigned int val; | |
262 | int ret = 1; | |
263 | ||
264 | /* | |
265 | * If inverse mode was selected, invert all the colours | |
266 | * rather than the register number. The register number | |
267 | * is what you poke into the framebuffer to produce the | |
268 | * colour you requested. | |
269 | */ | |
270 | if (fbi->cmap_inverse) { | |
271 | red = 0xffff - red; | |
272 | green = 0xffff - green; | |
273 | blue = 0xffff - blue; | |
274 | } | |
275 | ||
276 | /* | |
277 | * If greyscale is true, then we convert the RGB value | |
278 | * to greyscale no mater what visual we are using. | |
279 | */ | |
280 | if (info->var.grayscale) | |
281 | red = green = blue = (19595 * red + 38470 * green + | |
282 | 7471 * blue) >> 16; | |
283 | ||
284 | switch (info->fix.visual) { | |
285 | case FB_VISUAL_TRUECOLOR: | |
286 | /* | |
287 | * 12 or 16-bit True Colour. We encode the RGB value | |
288 | * according to the RGB bitfield information. | |
289 | */ | |
290 | if (regno < 16) { | |
291 | u32 *pal = info->pseudo_palette; | |
292 | ||
293 | val = chan_to_field(red, &info->var.red); | |
294 | val |= chan_to_field(green, &info->var.green); | |
295 | val |= chan_to_field(blue, &info->var.blue); | |
296 | ||
297 | pal[regno] = val; | |
298 | ret = 0; | |
299 | } | |
300 | break; | |
301 | ||
302 | case FB_VISUAL_STATIC_PSEUDOCOLOR: | |
303 | case FB_VISUAL_PSEUDOCOLOR: | |
304 | ret = imxfb_setpalettereg(regno, red, green, blue, trans, info); | |
305 | break; | |
306 | } | |
307 | ||
308 | return ret; | |
309 | } | |
310 | ||
343684ff SH |
311 | static const struct imx_fb_videomode *imxfb_find_mode(struct imxfb_info *fbi) |
312 | { | |
313 | struct imx_fb_videomode *m; | |
314 | int i; | |
315 | ||
316 | for (i = 0, m = &fbi->mode[0]; i < fbi->num_modes; i++, m++) { | |
317 | if (!strcmp(m->mode.name, fb_mode)) | |
318 | return m; | |
319 | } | |
320 | return NULL; | |
321 | } | |
322 | ||
7c2f891c SH |
323 | /* |
324 | * imxfb_check_var(): | |
325 | * Round up in the following order: bits_per_pixel, xres, | |
326 | * yres, xres_virtual, yres_virtual, xoffset, yoffset, grayscale, | |
327 | * bitfields, horizontal timing, vertical timing. | |
328 | */ | |
66c8719b | 329 | static int imxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) |
7c2f891c SH |
330 | { |
331 | struct imxfb_info *fbi = info->par; | |
80eee6bc | 332 | struct imxfb_rgb *rgb; |
343684ff SH |
333 | const struct imx_fb_videomode *imxfb_mode; |
334 | unsigned long lcd_clk; | |
335 | unsigned long long tmp; | |
336 | u32 pcr = 0; | |
7c2f891c SH |
337 | |
338 | if (var->xres < MIN_XRES) | |
339 | var->xres = MIN_XRES; | |
340 | if (var->yres < MIN_YRES) | |
341 | var->yres = MIN_YRES; | |
343684ff SH |
342 | |
343 | imxfb_mode = imxfb_find_mode(fbi); | |
344 | if (!imxfb_mode) | |
345 | return -EINVAL; | |
346 | ||
347 | var->xres = imxfb_mode->mode.xres; | |
348 | var->yres = imxfb_mode->mode.yres; | |
349 | var->bits_per_pixel = imxfb_mode->bpp; | |
350 | var->pixclock = imxfb_mode->mode.pixclock; | |
351 | var->hsync_len = imxfb_mode->mode.hsync_len; | |
352 | var->left_margin = imxfb_mode->mode.left_margin; | |
353 | var->right_margin = imxfb_mode->mode.right_margin; | |
354 | var->vsync_len = imxfb_mode->mode.vsync_len; | |
355 | var->upper_margin = imxfb_mode->mode.upper_margin; | |
356 | var->lower_margin = imxfb_mode->mode.lower_margin; | |
357 | var->sync = imxfb_mode->mode.sync; | |
358 | var->xres_virtual = max(var->xres_virtual, var->xres); | |
359 | var->yres_virtual = max(var->yres_virtual, var->yres); | |
7c2f891c SH |
360 | |
361 | pr_debug("var->bits_per_pixel=%d\n", var->bits_per_pixel); | |
343684ff SH |
362 | |
363 | lcd_clk = clk_get_rate(fbi->clk); | |
364 | ||
365 | tmp = var->pixclock * (unsigned long long)lcd_clk; | |
366 | ||
367 | do_div(tmp, 1000000); | |
368 | ||
369 | if (do_div(tmp, 1000000) > 500000) | |
370 | tmp++; | |
371 | ||
372 | pcr = (unsigned int)tmp; | |
373 | ||
374 | if (--pcr > 0x3F) { | |
375 | pcr = 0x3F; | |
376 | printk(KERN_WARNING "Must limit pixel clock to %luHz\n", | |
377 | lcd_clk / pcr); | |
378 | } | |
379 | ||
7c2f891c | 380 | switch (var->bits_per_pixel) { |
1512222b | 381 | case 32: |
343684ff | 382 | pcr |= PCR_BPIX_18; |
1512222b SH |
383 | rgb = &def_rgb_18; |
384 | break; | |
7c2f891c | 385 | case 16: |
80eee6bc | 386 | default: |
343684ff SH |
387 | if (cpu_is_mx1()) |
388 | pcr |= PCR_BPIX_12; | |
389 | else | |
390 | pcr |= PCR_BPIX_16; | |
391 | ||
392 | if (imxfb_mode->pcr & PCR_TFT) | |
80eee6bc SH |
393 | rgb = &def_rgb_16_tft; |
394 | else | |
395 | rgb = &def_rgb_16_stn; | |
7c2f891c SH |
396 | break; |
397 | case 8: | |
343684ff | 398 | pcr |= PCR_BPIX_8; |
80eee6bc | 399 | rgb = &def_rgb_8; |
7c2f891c | 400 | break; |
7c2f891c SH |
401 | } |
402 | ||
343684ff SH |
403 | /* add sync polarities */ |
404 | pcr |= imxfb_mode->pcr & ~(0x3f | (7 << 25)); | |
405 | ||
406 | fbi->pcr = pcr; | |
407 | ||
7c2f891c SH |
408 | /* |
409 | * Copy the RGB parameters for this display | |
410 | * from the machine specific parameters. | |
411 | */ | |
80eee6bc SH |
412 | var->red = rgb->red; |
413 | var->green = rgb->green; | |
414 | var->blue = rgb->blue; | |
415 | var->transp = rgb->transp; | |
7c2f891c SH |
416 | |
417 | pr_debug("RGBT length = %d:%d:%d:%d\n", | |
418 | var->red.length, var->green.length, var->blue.length, | |
419 | var->transp.length); | |
420 | ||
421 | pr_debug("RGBT offset = %d:%d:%d:%d\n", | |
422 | var->red.offset, var->green.offset, var->blue.offset, | |
423 | var->transp.offset); | |
424 | ||
425 | return 0; | |
426 | } | |
427 | ||
428 | /* | |
429 | * imxfb_set_par(): | |
430 | * Set the user defined part of the display for the specified console | |
431 | */ | |
432 | static int imxfb_set_par(struct fb_info *info) | |
433 | { | |
434 | struct imxfb_info *fbi = info->par; | |
435 | struct fb_var_screeninfo *var = &info->var; | |
436 | ||
1512222b | 437 | if (var->bits_per_pixel == 16 || var->bits_per_pixel == 32) |
7c2f891c SH |
438 | info->fix.visual = FB_VISUAL_TRUECOLOR; |
439 | else if (!fbi->cmap_static) | |
440 | info->fix.visual = FB_VISUAL_PSEUDOCOLOR; | |
441 | else { | |
442 | /* | |
443 | * Some people have weird ideas about wanting static | |
444 | * pseudocolor maps. I suspect their user space | |
445 | * applications are broken. | |
446 | */ | |
447 | info->fix.visual = FB_VISUAL_STATIC_PSEUDOCOLOR; | |
448 | } | |
449 | ||
66c8719b | 450 | info->fix.line_length = var->xres_virtual * var->bits_per_pixel / 8; |
7c2f891c SH |
451 | fbi->palette_size = var->bits_per_pixel == 8 ? 256 : 16; |
452 | ||
453 | imxfb_activate_var(var, info); | |
454 | ||
455 | return 0; | |
456 | } | |
457 | ||
81ef8061 | 458 | #ifdef PWMR_BACKLIGHT_AVAILABLE |
7a2bb23c EB |
459 | static int imxfb_bl_get_brightness(struct backlight_device *bl) |
460 | { | |
461 | struct imxfb_info *fbi = bl_get_data(bl); | |
462 | ||
463 | return readl(fbi->regs + LCDC_PWMR) & 0xFF; | |
464 | } | |
465 | ||
466 | static int imxfb_bl_update_status(struct backlight_device *bl) | |
467 | { | |
468 | struct imxfb_info *fbi = bl_get_data(bl); | |
469 | int brightness = bl->props.brightness; | |
470 | ||
471 | if (bl->props.power != FB_BLANK_UNBLANK) | |
472 | brightness = 0; | |
473 | if (bl->props.fb_blank != FB_BLANK_UNBLANK) | |
474 | brightness = 0; | |
475 | ||
476 | fbi->pwmr = (fbi->pwmr & ~0xFF) | brightness; | |
477 | ||
478 | if (bl->props.fb_blank != FB_BLANK_UNBLANK) | |
479 | clk_enable(fbi->clk); | |
480 | writel(fbi->pwmr, fbi->regs + LCDC_PWMR); | |
481 | if (bl->props.fb_blank != FB_BLANK_UNBLANK) | |
482 | clk_disable(fbi->clk); | |
483 | ||
484 | return 0; | |
485 | } | |
486 | ||
487 | static const struct backlight_ops imxfb_lcdc_bl_ops = { | |
488 | .update_status = imxfb_bl_update_status, | |
489 | .get_brightness = imxfb_bl_get_brightness, | |
490 | }; | |
491 | ||
492 | static void imxfb_init_backlight(struct imxfb_info *fbi) | |
493 | { | |
494 | struct backlight_properties props; | |
495 | struct backlight_device *bl; | |
496 | ||
497 | if (fbi->bl) | |
498 | return; | |
499 | ||
500 | memset(&props, 0, sizeof(struct backlight_properties)); | |
501 | props.max_brightness = 0xff; | |
bb7ca747 | 502 | props.type = BACKLIGHT_RAW; |
7a2bb23c EB |
503 | writel(fbi->pwmr, fbi->regs + LCDC_PWMR); |
504 | ||
505 | bl = backlight_device_register("imxfb-bl", &fbi->pdev->dev, fbi, | |
506 | &imxfb_lcdc_bl_ops, &props); | |
507 | if (IS_ERR(bl)) { | |
508 | dev_err(&fbi->pdev->dev, "error %ld on backlight register\n", | |
509 | PTR_ERR(bl)); | |
510 | return; | |
511 | } | |
512 | ||
513 | fbi->bl = bl; | |
514 | bl->props.power = FB_BLANK_UNBLANK; | |
515 | bl->props.fb_blank = FB_BLANK_UNBLANK; | |
516 | bl->props.brightness = imxfb_bl_get_brightness(bl); | |
517 | } | |
518 | ||
519 | static void imxfb_exit_backlight(struct imxfb_info *fbi) | |
520 | { | |
521 | if (fbi->bl) | |
522 | backlight_device_unregister(fbi->bl); | |
523 | } | |
81ef8061 | 524 | #endif |
7a2bb23c | 525 | |
7c2f891c SH |
526 | static void imxfb_enable_controller(struct imxfb_info *fbi) |
527 | { | |
528 | pr_debug("Enabling LCD controller\n"); | |
529 | ||
72330b0e | 530 | writel(fbi->screen_dma, fbi->regs + LCDC_SSA); |
7c2f891c | 531 | |
72330b0e JB |
532 | /* panning offset 0 (0 pixel offset) */ |
533 | writel(0x00000000, fbi->regs + LCDC_POS); | |
7c2f891c SH |
534 | |
535 | /* disable hardware cursor */ | |
72330b0e JB |
536 | writel(readl(fbi->regs + LCDC_CPOS) & ~(CPOS_CC0 | CPOS_CC1), |
537 | fbi->regs + LCDC_CPOS); | |
7c2f891c | 538 | |
72330b0e | 539 | writel(RMCR_LCDC_EN, fbi->regs + LCDC_RMCR); |
7c2f891c | 540 | |
f909ef64 SH |
541 | clk_enable(fbi->clk); |
542 | ||
66c8719b | 543 | if (fbi->backlight_power) |
7c2f891c | 544 | fbi->backlight_power(1); |
66c8719b | 545 | if (fbi->lcd_power) |
7c2f891c SH |
546 | fbi->lcd_power(1); |
547 | } | |
548 | ||
549 | static void imxfb_disable_controller(struct imxfb_info *fbi) | |
550 | { | |
551 | pr_debug("Disabling LCD controller\n"); | |
552 | ||
66c8719b | 553 | if (fbi->backlight_power) |
7c2f891c | 554 | fbi->backlight_power(0); |
66c8719b | 555 | if (fbi->lcd_power) |
7c2f891c SH |
556 | fbi->lcd_power(0); |
557 | ||
f909ef64 SH |
558 | clk_disable(fbi->clk); |
559 | ||
72330b0e | 560 | writel(0, fbi->regs + LCDC_RMCR); |
7c2f891c SH |
561 | } |
562 | ||
563 | static int imxfb_blank(int blank, struct fb_info *info) | |
564 | { | |
565 | struct imxfb_info *fbi = info->par; | |
566 | ||
567 | pr_debug("imxfb_blank: blank=%d\n", blank); | |
568 | ||
569 | switch (blank) { | |
570 | case FB_BLANK_POWERDOWN: | |
571 | case FB_BLANK_VSYNC_SUSPEND: | |
572 | case FB_BLANK_HSYNC_SUSPEND: | |
573 | case FB_BLANK_NORMAL: | |
574 | imxfb_disable_controller(fbi); | |
575 | break; | |
576 | ||
577 | case FB_BLANK_UNBLANK: | |
578 | imxfb_enable_controller(fbi); | |
579 | break; | |
580 | } | |
581 | return 0; | |
582 | } | |
583 | ||
584 | static struct fb_ops imxfb_ops = { | |
585 | .owner = THIS_MODULE, | |
586 | .fb_check_var = imxfb_check_var, | |
587 | .fb_set_par = imxfb_set_par, | |
588 | .fb_setcolreg = imxfb_setcolreg, | |
589 | .fb_fillrect = cfb_fillrect, | |
590 | .fb_copyarea = cfb_copyarea, | |
591 | .fb_imageblit = cfb_imageblit, | |
592 | .fb_blank = imxfb_blank, | |
7c2f891c SH |
593 | }; |
594 | ||
595 | /* | |
596 | * imxfb_activate_var(): | |
597 | * Configures LCD Controller based on entries in var parameter. Settings are | |
598 | * only written to the controller if changes were made. | |
599 | */ | |
600 | static int imxfb_activate_var(struct fb_var_screeninfo *var, struct fb_info *info) | |
601 | { | |
602 | struct imxfb_info *fbi = info->par; | |
f909ef64 | 603 | |
7c2f891c SH |
604 | pr_debug("var: xres=%d hslen=%d lm=%d rm=%d\n", |
605 | var->xres, var->hsync_len, | |
606 | var->left_margin, var->right_margin); | |
607 | pr_debug("var: yres=%d vslen=%d um=%d bm=%d\n", | |
608 | var->yres, var->vsync_len, | |
609 | var->upper_margin, var->lower_margin); | |
610 | ||
611 | #if DEBUG_VAR | |
612 | if (var->xres < 16 || var->xres > 1024) | |
613 | printk(KERN_ERR "%s: invalid xres %d\n", | |
614 | info->fix.id, var->xres); | |
615 | if (var->hsync_len < 1 || var->hsync_len > 64) | |
616 | printk(KERN_ERR "%s: invalid hsync_len %d\n", | |
617 | info->fix.id, var->hsync_len); | |
618 | if (var->left_margin > 255) | |
619 | printk(KERN_ERR "%s: invalid left_margin %d\n", | |
620 | info->fix.id, var->left_margin); | |
621 | if (var->right_margin > 255) | |
622 | printk(KERN_ERR "%s: invalid right_margin %d\n", | |
623 | info->fix.id, var->right_margin); | |
60328917 | 624 | if (var->yres < 1 || var->yres > YMAX_MASK) |
7c2f891c SH |
625 | printk(KERN_ERR "%s: invalid yres %d\n", |
626 | info->fix.id, var->yres); | |
627 | if (var->vsync_len > 100) | |
628 | printk(KERN_ERR "%s: invalid vsync_len %d\n", | |
629 | info->fix.id, var->vsync_len); | |
630 | if (var->upper_margin > 63) | |
631 | printk(KERN_ERR "%s: invalid upper_margin %d\n", | |
632 | info->fix.id, var->upper_margin); | |
633 | if (var->lower_margin > 255) | |
634 | printk(KERN_ERR "%s: invalid lower_margin %d\n", | |
635 | info->fix.id, var->lower_margin); | |
636 | #endif | |
637 | ||
343684ff SH |
638 | /* physical screen start address */ |
639 | writel(VPW_VPW(var->xres * var->bits_per_pixel / 8 / 4), | |
640 | fbi->regs + LCDC_VPW); | |
641 | ||
7e8549bc SH |
642 | writel(HCR_H_WIDTH(var->hsync_len - 1) | |
643 | HCR_H_WAIT_1(var->right_margin - 1) | | |
644 | HCR_H_WAIT_2(var->left_margin - 3), | |
72330b0e | 645 | fbi->regs + LCDC_HCR); |
7c2f891c | 646 | |
72330b0e | 647 | writel(VCR_V_WIDTH(var->vsync_len) | |
d6ed5755 SH |
648 | VCR_V_WAIT_1(var->lower_margin) | |
649 | VCR_V_WAIT_2(var->upper_margin), | |
72330b0e | 650 | fbi->regs + LCDC_VCR); |
7c2f891c | 651 | |
72330b0e JB |
652 | writel(SIZE_XMAX(var->xres) | SIZE_YMAX(var->yres), |
653 | fbi->regs + LCDC_SIZE); | |
f909ef64 | 654 | |
343684ff | 655 | writel(fbi->pcr, fbi->regs + LCDC_PCR); |
81ef8061 EB |
656 | #ifndef PWMR_BACKLIGHT_AVAILABLE |
657 | writel(fbi->pwmr, fbi->regs + LCDC_PWMR); | |
658 | #endif | |
72330b0e JB |
659 | writel(fbi->lscr1, fbi->regs + LCDC_LSCR1); |
660 | writel(fbi->dmacr, fbi->regs + LCDC_DMACR); | |
7c2f891c SH |
661 | |
662 | return 0; | |
663 | } | |
664 | ||
7c2f891c SH |
665 | #ifdef CONFIG_PM |
666 | /* | |
667 | * Power management hooks. Note that we won't be called from IRQ context, | |
668 | * unlike the blank functions above, so we may sleep. | |
669 | */ | |
3ae5eaec | 670 | static int imxfb_suspend(struct platform_device *dev, pm_message_t state) |
7c2f891c | 671 | { |
1ec56203 UKK |
672 | struct fb_info *info = platform_get_drvdata(dev); |
673 | struct imxfb_info *fbi = info->par; | |
66c8719b SH |
674 | |
675 | pr_debug("%s\n", __func__); | |
7c2f891c | 676 | |
9480e307 | 677 | imxfb_disable_controller(fbi); |
7c2f891c SH |
678 | return 0; |
679 | } | |
680 | ||
3ae5eaec | 681 | static int imxfb_resume(struct platform_device *dev) |
7c2f891c | 682 | { |
1ec56203 UKK |
683 | struct fb_info *info = platform_get_drvdata(dev); |
684 | struct imxfb_info *fbi = info->par; | |
66c8719b SH |
685 | |
686 | pr_debug("%s\n", __func__); | |
7c2f891c | 687 | |
9480e307 | 688 | imxfb_enable_controller(fbi); |
7c2f891c SH |
689 | return 0; |
690 | } | |
691 | #else | |
692 | #define imxfb_suspend NULL | |
693 | #define imxfb_resume NULL | |
694 | #endif | |
695 | ||
72330b0e | 696 | static int __init imxfb_init_fbinfo(struct platform_device *pdev) |
7c2f891c | 697 | { |
27889273 | 698 | struct imx_fb_platform_data *pdata = pdev->dev.platform_data; |
72330b0e | 699 | struct fb_info *info = dev_get_drvdata(&pdev->dev); |
7c2f891c | 700 | struct imxfb_info *fbi = info->par; |
343684ff SH |
701 | struct imx_fb_videomode *m; |
702 | int i; | |
7c2f891c | 703 | |
5ae12170 | 704 | pr_debug("%s\n",__func__); |
7c2f891c | 705 | |
66c8719b | 706 | info->pseudo_palette = kmalloc(sizeof(u32) * 16, GFP_KERNEL); |
7c2f891c SH |
707 | if (!info->pseudo_palette) |
708 | return -ENOMEM; | |
709 | ||
710 | memset(fbi, 0, sizeof(struct imxfb_info)); | |
7c2f891c SH |
711 | |
712 | strlcpy(info->fix.id, IMX_NAME, sizeof(info->fix.id)); | |
713 | ||
66c8719b | 714 | info->fix.type = FB_TYPE_PACKED_PIXELS; |
7c2f891c SH |
715 | info->fix.type_aux = 0; |
716 | info->fix.xpanstep = 0; | |
717 | info->fix.ypanstep = 0; | |
718 | info->fix.ywrapstep = 0; | |
66c8719b | 719 | info->fix.accel = FB_ACCEL_NONE; |
7c2f891c SH |
720 | |
721 | info->var.nonstd = 0; | |
722 | info->var.activate = FB_ACTIVATE_NOW; | |
723 | info->var.height = -1; | |
724 | info->var.width = -1; | |
725 | info->var.accel_flags = 0; | |
66c8719b | 726 | info->var.vmode = FB_VMODE_NONINTERLACED; |
7c2f891c SH |
727 | |
728 | info->fbops = &imxfb_ops; | |
66c8719b SH |
729 | info->flags = FBINFO_FLAG_DEFAULT | |
730 | FBINFO_READS_FAST; | |
27889273 SH |
731 | info->var.grayscale = pdata->cmap_greyscale; |
732 | fbi->cmap_inverse = pdata->cmap_inverse; | |
733 | fbi->cmap_static = pdata->cmap_static; | |
27889273 SH |
734 | fbi->lscr1 = pdata->lscr1; |
735 | fbi->dmacr = pdata->dmacr; | |
736 | fbi->pwmr = pdata->pwmr; | |
737 | fbi->lcd_power = pdata->lcd_power; | |
738 | fbi->backlight_power = pdata->backlight_power; | |
343684ff SH |
739 | |
740 | for (i = 0, m = &pdata->mode[0]; i < pdata->num_modes; i++, m++) | |
741 | info->fix.smem_len = max_t(size_t, info->fix.smem_len, | |
742 | m->mode.xres * m->mode.yres * m->bpp / 8); | |
7c2f891c SH |
743 | |
744 | return 0; | |
745 | } | |
746 | ||
3ae5eaec | 747 | static int __init imxfb_probe(struct platform_device *pdev) |
7c2f891c | 748 | { |
7c2f891c SH |
749 | struct imxfb_info *fbi; |
750 | struct fb_info *info; | |
27889273 | 751 | struct imx_fb_platform_data *pdata; |
7c2f891c | 752 | struct resource *res; |
343684ff | 753 | int ret, i; |
7c2f891c | 754 | |
d6b51502 | 755 | dev_info(&pdev->dev, "i.MX Framebuffer driver\n"); |
7c2f891c SH |
756 | |
757 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
66c8719b | 758 | if (!res) |
7c2f891c SH |
759 | return -ENODEV; |
760 | ||
27889273 SH |
761 | pdata = pdev->dev.platform_data; |
762 | if (!pdata) { | |
f99c8929 | 763 | dev_err(&pdev->dev,"No platform_data available\n"); |
7c2f891c SH |
764 | return -ENOMEM; |
765 | } | |
766 | ||
3ae5eaec | 767 | info = framebuffer_alloc(sizeof(struct imxfb_info), &pdev->dev); |
66c8719b | 768 | if (!info) |
7c2f891c SH |
769 | return -ENOMEM; |
770 | ||
771 | fbi = info->par; | |
772 | ||
343684ff SH |
773 | if (!fb_mode) |
774 | fb_mode = pdata->mode[0].mode.name; | |
775 | ||
3ae5eaec | 776 | platform_set_drvdata(pdev, info); |
7c2f891c | 777 | |
72330b0e | 778 | ret = imxfb_init_fbinfo(pdev); |
66c8719b | 779 | if (ret < 0) |
7c2f891c SH |
780 | goto failed_init; |
781 | ||
72330b0e JB |
782 | res = request_mem_region(res->start, resource_size(res), |
783 | DRIVER_NAME); | |
7c2f891c SH |
784 | if (!res) { |
785 | ret = -EBUSY; | |
72330b0e JB |
786 | goto failed_req; |
787 | } | |
788 | ||
f909ef64 SH |
789 | fbi->clk = clk_get(&pdev->dev, NULL); |
790 | if (IS_ERR(fbi->clk)) { | |
a419aef8 | 791 | ret = PTR_ERR(fbi->clk); |
f909ef64 SH |
792 | dev_err(&pdev->dev, "unable to get clock: %d\n", ret); |
793 | goto failed_getclock; | |
794 | } | |
795 | ||
72330b0e JB |
796 | fbi->regs = ioremap(res->start, resource_size(res)); |
797 | if (fbi->regs == NULL) { | |
d6b51502 | 798 | dev_err(&pdev->dev, "Cannot map frame buffer registers\n"); |
72330b0e | 799 | goto failed_ioremap; |
7c2f891c SH |
800 | } |
801 | ||
27889273 | 802 | if (!pdata->fixed_screen_cpu) { |
72330b0e JB |
803 | fbi->map_size = PAGE_ALIGN(info->fix.smem_len); |
804 | fbi->map_cpu = dma_alloc_writecombine(&pdev->dev, | |
805 | fbi->map_size, &fbi->map_dma, GFP_KERNEL); | |
806 | ||
807 | if (!fbi->map_cpu) { | |
f99c8929 | 808 | dev_err(&pdev->dev, "Failed to allocate video RAM: %d\n", ret); |
7c2f891c SH |
809 | ret = -ENOMEM; |
810 | goto failed_map; | |
811 | } | |
72330b0e JB |
812 | |
813 | info->screen_base = fbi->map_cpu; | |
814 | fbi->screen_cpu = fbi->map_cpu; | |
815 | fbi->screen_dma = fbi->map_dma; | |
816 | info->fix.smem_start = fbi->screen_dma; | |
7c2f891c SH |
817 | } else { |
818 | /* Fixed framebuffer mapping enables location of the screen in eSRAM */ | |
27889273 SH |
819 | fbi->map_cpu = pdata->fixed_screen_cpu; |
820 | fbi->map_dma = pdata->fixed_screen_dma; | |
7c2f891c SH |
821 | info->screen_base = fbi->map_cpu; |
822 | fbi->screen_cpu = fbi->map_cpu; | |
823 | fbi->screen_dma = fbi->map_dma; | |
824 | info->fix.smem_start = fbi->screen_dma; | |
825 | } | |
826 | ||
c0b90a31 SH |
827 | if (pdata->init) { |
828 | ret = pdata->init(fbi->pdev); | |
829 | if (ret) | |
830 | goto failed_platform_init; | |
831 | } | |
832 | ||
343684ff SH |
833 | fbi->mode = pdata->mode; |
834 | fbi->num_modes = pdata->num_modes; | |
835 | ||
836 | INIT_LIST_HEAD(&info->modelist); | |
837 | for (i = 0; i < pdata->num_modes; i++) | |
838 | fb_add_videomode(&pdata->mode[i].mode, &info->modelist); | |
839 | ||
7c2f891c SH |
840 | /* |
841 | * This makes sure that our colour bitfield | |
842 | * descriptors are correctly initialised. | |
843 | */ | |
844 | imxfb_check_var(&info->var, info); | |
845 | ||
66c8719b | 846 | ret = fb_alloc_cmap(&info->cmap, 1 << info->var.bits_per_pixel, 0); |
7c2f891c SH |
847 | if (ret < 0) |
848 | goto failed_cmap; | |
849 | ||
7c2f891c SH |
850 | imxfb_set_par(info); |
851 | ret = register_framebuffer(info); | |
852 | if (ret < 0) { | |
f99c8929 | 853 | dev_err(&pdev->dev, "failed to register framebuffer\n"); |
7c2f891c SH |
854 | goto failed_register; |
855 | } | |
856 | ||
857 | imxfb_enable_controller(fbi); | |
7a2bb23c | 858 | fbi->pdev = pdev; |
81ef8061 | 859 | #ifdef PWMR_BACKLIGHT_AVAILABLE |
7a2bb23c | 860 | imxfb_init_backlight(fbi); |
81ef8061 | 861 | #endif |
7c2f891c SH |
862 | |
863 | return 0; | |
864 | ||
865 | failed_register: | |
866 | fb_dealloc_cmap(&info->cmap); | |
867 | failed_cmap: | |
c0b90a31 SH |
868 | if (pdata->exit) |
869 | pdata->exit(fbi->pdev); | |
870 | failed_platform_init: | |
27889273 | 871 | if (!pdata->fixed_screen_cpu) |
3ae5eaec | 872 | dma_free_writecombine(&pdev->dev,fbi->map_size,fbi->map_cpu, |
72330b0e | 873 | fbi->map_dma); |
7c2f891c | 874 | failed_map: |
f909ef64 SH |
875 | clk_put(fbi->clk); |
876 | failed_getclock: | |
72330b0e JB |
877 | iounmap(fbi->regs); |
878 | failed_ioremap: | |
d6b51502 | 879 | release_mem_region(res->start, resource_size(res)); |
72330b0e JB |
880 | failed_req: |
881 | kfree(info->pseudo_palette); | |
7c2f891c | 882 | failed_init: |
3ae5eaec | 883 | platform_set_drvdata(pdev, NULL); |
7c2f891c SH |
884 | framebuffer_release(info); |
885 | return ret; | |
886 | } | |
887 | ||
72330b0e | 888 | static int __devexit imxfb_remove(struct platform_device *pdev) |
7c2f891c | 889 | { |
c0b90a31 | 890 | struct imx_fb_platform_data *pdata; |
3ae5eaec | 891 | struct fb_info *info = platform_get_drvdata(pdev); |
772a9e63 | 892 | struct imxfb_info *fbi = info->par; |
7c2f891c SH |
893 | struct resource *res; |
894 | ||
895 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
896 | ||
772a9e63 | 897 | imxfb_disable_controller(fbi); |
7c2f891c | 898 | |
81ef8061 | 899 | #ifdef PWMR_BACKLIGHT_AVAILABLE |
7a2bb23c | 900 | imxfb_exit_backlight(fbi); |
81ef8061 | 901 | #endif |
7c2f891c SH |
902 | unregister_framebuffer(info); |
903 | ||
c0b90a31 SH |
904 | pdata = pdev->dev.platform_data; |
905 | if (pdata->exit) | |
906 | pdata->exit(fbi->pdev); | |
907 | ||
7c2f891c SH |
908 | fb_dealloc_cmap(&info->cmap); |
909 | kfree(info->pseudo_palette); | |
910 | framebuffer_release(info); | |
911 | ||
72330b0e | 912 | iounmap(fbi->regs); |
d6b51502 | 913 | release_mem_region(res->start, resource_size(res)); |
f909ef64 SH |
914 | clk_disable(fbi->clk); |
915 | clk_put(fbi->clk); | |
916 | ||
3ae5eaec | 917 | platform_set_drvdata(pdev, NULL); |
7c2f891c SH |
918 | |
919 | return 0; | |
920 | } | |
921 | ||
3ae5eaec | 922 | void imxfb_shutdown(struct platform_device * dev) |
7c2f891c | 923 | { |
3ae5eaec | 924 | struct fb_info *info = platform_get_drvdata(dev); |
772a9e63 SH |
925 | struct imxfb_info *fbi = info->par; |
926 | imxfb_disable_controller(fbi); | |
7c2f891c SH |
927 | } |
928 | ||
3ae5eaec | 929 | static struct platform_driver imxfb_driver = { |
7c2f891c SH |
930 | .suspend = imxfb_suspend, |
931 | .resume = imxfb_resume, | |
72330b0e | 932 | .remove = __devexit_p(imxfb_remove), |
7c2f891c | 933 | .shutdown = imxfb_shutdown, |
3ae5eaec | 934 | .driver = { |
72330b0e | 935 | .name = DRIVER_NAME, |
3ae5eaec | 936 | }, |
7c2f891c SH |
937 | }; |
938 | ||
343684ff SH |
939 | static int imxfb_setup(void) |
940 | { | |
941 | #ifndef MODULE | |
942 | char *opt, *options = NULL; | |
943 | ||
944 | if (fb_get_options("imxfb", &options)) | |
945 | return -ENODEV; | |
946 | ||
947 | if (!options || !*options) | |
948 | return 0; | |
949 | ||
950 | while ((opt = strsep(&options, ",")) != NULL) { | |
951 | if (!*opt) | |
952 | continue; | |
953 | else | |
954 | fb_mode = opt; | |
955 | } | |
956 | #endif | |
957 | return 0; | |
958 | } | |
959 | ||
7c2f891c SH |
960 | int __init imxfb_init(void) |
961 | { | |
343684ff SH |
962 | int ret = imxfb_setup(); |
963 | ||
964 | if (ret < 0) | |
965 | return ret; | |
966 | ||
72330b0e | 967 | return platform_driver_probe(&imxfb_driver, imxfb_probe); |
7c2f891c SH |
968 | } |
969 | ||
970 | static void __exit imxfb_cleanup(void) | |
971 | { | |
3ae5eaec | 972 | platform_driver_unregister(&imxfb_driver); |
7c2f891c SH |
973 | } |
974 | ||
975 | module_init(imxfb_init); | |
976 | module_exit(imxfb_cleanup); | |
977 | ||
e3d5fb71 | 978 | MODULE_DESCRIPTION("Freescale i.MX framebuffer driver"); |
7c2f891c SH |
979 | MODULE_AUTHOR("Sascha Hauer, Pengutronix"); |
980 | MODULE_LICENSE("GPL"); |