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74ba9207 | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
525ad373 GR |
2 | /* |
3 | * fschmd.c | |
569ff102 | 4 | * |
c69ab2b7 | 5 | * Copyright (C) 2007 - 2009 Hans de Goede <[email protected]> |
569ff102 HG |
6 | */ |
7 | ||
8 | /* | |
9 | * Merged Fujitsu Siemens hwmon driver, supporting the Poseidon, Hermes, | |
de15f093 | 10 | * Scylla, Heracles, Heimdall, Hades and Syleus chips |
569ff102 HG |
11 | * |
12 | * Based on the original 2.4 fscscy, 2.6 fscpos, 2.6 fscher and 2.6 | |
13 | * (candidate) fschmd drivers: | |
14 | * Copyright (C) 2006 Thilo Cestonaro | |
15 | * <[email protected]> | |
16 | * Copyright (C) 2004, 2005 Stefan Ott <[email protected]> | |
17 | * Copyright (C) 2003, 2004 Reinhard Nissl <[email protected]> | |
18 | * Copyright (c) 2001 Martin Knoblauch <[email protected], [email protected]> | |
19 | * Copyright (C) 2000 Hermann Jung <[email protected]> | |
20 | */ | |
21 | ||
22 | #include <linux/module.h> | |
23 | #include <linux/init.h> | |
24 | #include <linux/slab.h> | |
25 | #include <linux/jiffies.h> | |
26 | #include <linux/i2c.h> | |
27 | #include <linux/hwmon.h> | |
28 | #include <linux/hwmon-sysfs.h> | |
29 | #include <linux/err.h> | |
30 | #include <linux/mutex.h> | |
31 | #include <linux/sysfs.h> | |
7845cd79 | 32 | #include <linux/dmi.h> |
97950c3d HG |
33 | #include <linux/fs.h> |
34 | #include <linux/watchdog.h> | |
35 | #include <linux/miscdevice.h> | |
36 | #include <linux/uaccess.h> | |
37 | #include <linux/kref.h> | |
569ff102 HG |
38 | |
39 | /* Addresses to scan */ | |
25e9c86d | 40 | static const unsigned short normal_i2c[] = { 0x73, I2C_CLIENT_END }; |
569ff102 HG |
41 | |
42 | /* Insmod parameters */ | |
86a1e189 WVS |
43 | static bool nowayout = WATCHDOG_NOWAYOUT; |
44 | module_param(nowayout, bool, 0); | |
97950c3d HG |
45 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" |
46 | __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); | |
e5e9f44c JD |
47 | |
48 | enum chips { fscpos, fscher, fscscy, fschrc, fschmd, fschds, fscsyl }; | |
569ff102 HG |
49 | |
50 | /* | |
51 | * The FSCHMD registers and other defines | |
52 | */ | |
53 | ||
54 | /* chip identification */ | |
55 | #define FSCHMD_REG_IDENT_0 0x00 | |
56 | #define FSCHMD_REG_IDENT_1 0x01 | |
57 | #define FSCHMD_REG_IDENT_2 0x02 | |
58 | #define FSCHMD_REG_REVISION 0x03 | |
59 | ||
60 | /* global control and status */ | |
61 | #define FSCHMD_REG_EVENT_STATE 0x04 | |
62 | #define FSCHMD_REG_CONTROL 0x05 | |
63 | ||
453e308d | 64 | #define FSCHMD_CONTROL_ALERT_LED 0x01 |
569ff102 | 65 | |
97950c3d | 66 | /* watchdog */ |
525ad373 GR |
67 | static const u8 FSCHMD_REG_WDOG_CONTROL[7] = { |
68 | 0x21, 0x21, 0x21, 0x21, 0x21, 0x28, 0x28 }; | |
69 | static const u8 FSCHMD_REG_WDOG_STATE[7] = { | |
70 | 0x23, 0x23, 0x23, 0x23, 0x23, 0x29, 0x29 }; | |
71 | static const u8 FSCHMD_REG_WDOG_PRESET[7] = { | |
72 | 0x28, 0x28, 0x28, 0x28, 0x28, 0x2a, 0x2a }; | |
569ff102 | 73 | |
97950c3d HG |
74 | #define FSCHMD_WDOG_CONTROL_TRIGGER 0x10 |
75 | #define FSCHMD_WDOG_CONTROL_STARTED 0x10 /* the same as trigger */ | |
76 | #define FSCHMD_WDOG_CONTROL_STOP 0x20 | |
77 | #define FSCHMD_WDOG_CONTROL_RESOLUTION 0x40 | |
78 | ||
79 | #define FSCHMD_WDOG_STATE_CARDRESET 0x02 | |
80 | ||
569ff102 | 81 | /* voltages, weird order is to keep the same order as the old drivers */ |
de15f093 | 82 | static const u8 FSCHMD_REG_VOLT[7][6] = { |
c69ab2b7 HG |
83 | { 0x45, 0x42, 0x48 }, /* pos */ |
84 | { 0x45, 0x42, 0x48 }, /* her */ | |
85 | { 0x45, 0x42, 0x48 }, /* scy */ | |
86 | { 0x45, 0x42, 0x48 }, /* hrc */ | |
87 | { 0x45, 0x42, 0x48 }, /* hmd */ | |
de15f093 | 88 | { 0x21, 0x20, 0x22 }, /* hds */ |
c69ab2b7 HG |
89 | { 0x21, 0x20, 0x22, 0x23, 0x24, 0x25 }, /* syl */ |
90 | }; | |
91 | ||
de15f093 | 92 | static const int FSCHMD_NO_VOLT_SENSORS[7] = { 3, 3, 3, 3, 3, 3, 6 }; |
569ff102 | 93 | |
525ad373 | 94 | /* |
2b2acdc8 | 95 | * minimum pwm at which the fan is driven (pwm can be increased depending on |
525ad373 GR |
96 | * the temp. Notice that for the scy some fans share there minimum speed. |
97 | * Also notice that with the scy the sensor order is different than with the | |
98 | * other chips, this order was in the 2.4 driver and kept for consistency. | |
99 | */ | |
de15f093 | 100 | static const u8 FSCHMD_REG_FAN_MIN[7][7] = { |
569ff102 HG |
101 | { 0x55, 0x65 }, /* pos */ |
102 | { 0x55, 0x65, 0xb5 }, /* her */ | |
103 | { 0x65, 0x65, 0x55, 0xa5, 0x55, 0xa5 }, /* scy */ | |
104 | { 0x55, 0x65, 0xa5, 0xb5 }, /* hrc */ | |
105 | { 0x55, 0x65, 0xa5, 0xb5, 0xc5 }, /* hmd */ | |
de15f093 | 106 | { 0x55, 0x65, 0xa5, 0xb5, 0xc5 }, /* hds */ |
c69ab2b7 | 107 | { 0x54, 0x64, 0x74, 0x84, 0x94, 0xa4, 0xb4 }, /* syl */ |
569ff102 HG |
108 | }; |
109 | ||
110 | /* actual fan speed */ | |
de15f093 | 111 | static const u8 FSCHMD_REG_FAN_ACT[7][7] = { |
569ff102 HG |
112 | { 0x0e, 0x6b, 0xab }, /* pos */ |
113 | { 0x0e, 0x6b, 0xbb }, /* her */ | |
114 | { 0x6b, 0x6c, 0x0e, 0xab, 0x5c, 0xbb }, /* scy */ | |
115 | { 0x0e, 0x6b, 0xab, 0xbb }, /* hrc */ | |
116 | { 0x5b, 0x6b, 0xab, 0xbb, 0xcb }, /* hmd */ | |
de15f093 | 117 | { 0x5b, 0x6b, 0xab, 0xbb, 0xcb }, /* hds */ |
c69ab2b7 | 118 | { 0x57, 0x67, 0x77, 0x87, 0x97, 0xa7, 0xb7 }, /* syl */ |
569ff102 HG |
119 | }; |
120 | ||
121 | /* fan status registers */ | |
de15f093 | 122 | static const u8 FSCHMD_REG_FAN_STATE[7][7] = { |
569ff102 HG |
123 | { 0x0d, 0x62, 0xa2 }, /* pos */ |
124 | { 0x0d, 0x62, 0xb2 }, /* her */ | |
125 | { 0x62, 0x61, 0x0d, 0xa2, 0x52, 0xb2 }, /* scy */ | |
126 | { 0x0d, 0x62, 0xa2, 0xb2 }, /* hrc */ | |
127 | { 0x52, 0x62, 0xa2, 0xb2, 0xc2 }, /* hmd */ | |
de15f093 | 128 | { 0x52, 0x62, 0xa2, 0xb2, 0xc2 }, /* hds */ |
c69ab2b7 | 129 | { 0x50, 0x60, 0x70, 0x80, 0x90, 0xa0, 0xb0 }, /* syl */ |
569ff102 HG |
130 | }; |
131 | ||
132 | /* fan ripple / divider registers */ | |
de15f093 | 133 | static const u8 FSCHMD_REG_FAN_RIPPLE[7][7] = { |
569ff102 HG |
134 | { 0x0f, 0x6f, 0xaf }, /* pos */ |
135 | { 0x0f, 0x6f, 0xbf }, /* her */ | |
136 | { 0x6f, 0x6f, 0x0f, 0xaf, 0x0f, 0xbf }, /* scy */ | |
137 | { 0x0f, 0x6f, 0xaf, 0xbf }, /* hrc */ | |
138 | { 0x5f, 0x6f, 0xaf, 0xbf, 0xcf }, /* hmd */ | |
de15f093 | 139 | { 0x5f, 0x6f, 0xaf, 0xbf, 0xcf }, /* hds */ |
c69ab2b7 | 140 | { 0x56, 0x66, 0x76, 0x86, 0x96, 0xa6, 0xb6 }, /* syl */ |
569ff102 HG |
141 | }; |
142 | ||
de15f093 | 143 | static const int FSCHMD_NO_FAN_SENSORS[7] = { 3, 3, 6, 4, 5, 5, 7 }; |
569ff102 HG |
144 | |
145 | /* Fan status register bitmasks */ | |
453e308d | 146 | #define FSCHMD_FAN_ALARM 0x04 /* called fault by FSC! */ |
c69ab2b7 HG |
147 | #define FSCHMD_FAN_NOT_PRESENT 0x08 |
148 | #define FSCHMD_FAN_DISABLED 0x80 | |
569ff102 HG |
149 | |
150 | ||
151 | /* actual temperature registers */ | |
de15f093 | 152 | static const u8 FSCHMD_REG_TEMP_ACT[7][11] = { |
569ff102 HG |
153 | { 0x64, 0x32, 0x35 }, /* pos */ |
154 | { 0x64, 0x32, 0x35 }, /* her */ | |
155 | { 0x64, 0xD0, 0x32, 0x35 }, /* scy */ | |
156 | { 0x64, 0x32, 0x35 }, /* hrc */ | |
157 | { 0x70, 0x80, 0x90, 0xd0, 0xe0 }, /* hmd */ | |
de15f093 | 158 | { 0x70, 0x80, 0x90, 0xd0, 0xe0 }, /* hds */ |
c69ab2b7 HG |
159 | { 0x58, 0x68, 0x78, 0x88, 0x98, 0xa8, /* syl */ |
160 | 0xb8, 0xc8, 0xd8, 0xe8, 0xf8 }, | |
569ff102 HG |
161 | }; |
162 | ||
163 | /* temperature state registers */ | |
de15f093 | 164 | static const u8 FSCHMD_REG_TEMP_STATE[7][11] = { |
569ff102 HG |
165 | { 0x71, 0x81, 0x91 }, /* pos */ |
166 | { 0x71, 0x81, 0x91 }, /* her */ | |
167 | { 0x71, 0xd1, 0x81, 0x91 }, /* scy */ | |
168 | { 0x71, 0x81, 0x91 }, /* hrc */ | |
7dcf9a31 | 169 | { 0x71, 0x81, 0x91, 0xd1, 0xe1 }, /* hmd */ |
de15f093 | 170 | { 0x71, 0x81, 0x91, 0xd1, 0xe1 }, /* hds */ |
c69ab2b7 HG |
171 | { 0x59, 0x69, 0x79, 0x89, 0x99, 0xa9, /* syl */ |
172 | 0xb9, 0xc9, 0xd9, 0xe9, 0xf9 }, | |
569ff102 HG |
173 | }; |
174 | ||
525ad373 GR |
175 | /* |
176 | * temperature high limit registers, FSC does not document these. Proven to be | |
177 | * there with field testing on the fscher and fschrc, already supported / used | |
178 | * in the fscscy 2.4 driver. FSC has confirmed that the fschmd has registers | |
179 | * at these addresses, but doesn't want to confirm they are the same as with | |
180 | * the fscher?? | |
181 | */ | |
de15f093 | 182 | static const u8 FSCHMD_REG_TEMP_LIMIT[7][11] = { |
569ff102 HG |
183 | { 0, 0, 0 }, /* pos */ |
184 | { 0x76, 0x86, 0x96 }, /* her */ | |
185 | { 0x76, 0xd6, 0x86, 0x96 }, /* scy */ | |
186 | { 0x76, 0x86, 0x96 }, /* hrc */ | |
7dcf9a31 | 187 | { 0x76, 0x86, 0x96, 0xd6, 0xe6 }, /* hmd */ |
de15f093 | 188 | { 0x76, 0x86, 0x96, 0xd6, 0xe6 }, /* hds */ |
c69ab2b7 HG |
189 | { 0x5a, 0x6a, 0x7a, 0x8a, 0x9a, 0xaa, /* syl */ |
190 | 0xba, 0xca, 0xda, 0xea, 0xfa }, | |
569ff102 HG |
191 | }; |
192 | ||
525ad373 GR |
193 | /* |
194 | * These were found through experimenting with an fscher, currently they are | |
195 | * not used, but we keep them around for future reference. | |
196 | * On the fscsyl AUTOP1 lives at 0x#c (so 0x5c for fan1, 0x6c for fan2, etc), | |
197 | * AUTOP2 lives at 0x#e, and 0x#1 is a bitmask defining which temps influence | |
198 | * the fan speed. | |
199 | * static const u8 FSCHER_REG_TEMP_AUTOP1[] = { 0x73, 0x83, 0x93 }; | |
200 | * static const u8 FSCHER_REG_TEMP_AUTOP2[] = { 0x75, 0x85, 0x95 }; | |
201 | */ | |
569ff102 | 202 | |
de15f093 | 203 | static const int FSCHMD_NO_TEMP_SENSORS[7] = { 3, 3, 4, 3, 5, 5, 11 }; |
569ff102 HG |
204 | |
205 | /* temp status register bitmasks */ | |
453e308d HG |
206 | #define FSCHMD_TEMP_WORKING 0x01 |
207 | #define FSCHMD_TEMP_ALERT 0x02 | |
c69ab2b7 | 208 | #define FSCHMD_TEMP_DISABLED 0x80 |
569ff102 HG |
209 | /* there only really is an alarm if the sensor is working and alert == 1 */ |
210 | #define FSCHMD_TEMP_ALARM_MASK \ | |
453e308d | 211 | (FSCHMD_TEMP_WORKING | FSCHMD_TEMP_ALERT) |
569ff102 HG |
212 | |
213 | /* | |
214 | * Functions declarations | |
215 | */ | |
216 | ||
40ac1994 JD |
217 | static int fschmd_probe(struct i2c_client *client, |
218 | const struct i2c_device_id *id); | |
310ec792 | 219 | static int fschmd_detect(struct i2c_client *client, |
40ac1994 JD |
220 | struct i2c_board_info *info); |
221 | static int fschmd_remove(struct i2c_client *client); | |
569ff102 HG |
222 | static struct fschmd_data *fschmd_update_device(struct device *dev); |
223 | ||
224 | /* | |
225 | * Driver data (common to all clients) | |
226 | */ | |
227 | ||
40ac1994 JD |
228 | static const struct i2c_device_id fschmd_id[] = { |
229 | { "fscpos", fscpos }, | |
230 | { "fscher", fscher }, | |
231 | { "fscscy", fscscy }, | |
232 | { "fschrc", fschrc }, | |
233 | { "fschmd", fschmd }, | |
de15f093 | 234 | { "fschds", fschds }, |
c69ab2b7 | 235 | { "fscsyl", fscsyl }, |
40ac1994 JD |
236 | { } |
237 | }; | |
238 | MODULE_DEVICE_TABLE(i2c, fschmd_id); | |
239 | ||
569ff102 | 240 | static struct i2c_driver fschmd_driver = { |
40ac1994 | 241 | .class = I2C_CLASS_HWMON, |
569ff102 | 242 | .driver = { |
453e308d | 243 | .name = "fschmd", |
569ff102 | 244 | }, |
40ac1994 JD |
245 | .probe = fschmd_probe, |
246 | .remove = fschmd_remove, | |
247 | .id_table = fschmd_id, | |
248 | .detect = fschmd_detect, | |
c3813d6a | 249 | .address_list = normal_i2c, |
569ff102 HG |
250 | }; |
251 | ||
252 | /* | |
253 | * Client data (each client gets its own) | |
254 | */ | |
255 | ||
256 | struct fschmd_data { | |
97950c3d | 257 | struct i2c_client *client; |
569ff102 HG |
258 | struct device *hwmon_dev; |
259 | struct mutex update_lock; | |
97950c3d HG |
260 | struct mutex watchdog_lock; |
261 | struct list_head list; /* member of the watchdog_data_list */ | |
262 | struct kref kref; | |
263 | struct miscdevice watchdog_miscdev; | |
dc71afe5 | 264 | enum chips kind; |
97950c3d HG |
265 | unsigned long watchdog_is_open; |
266 | char watchdog_expect_close; | |
267 | char watchdog_name[10]; /* must be unique to avoid sysfs conflict */ | |
569ff102 HG |
268 | char valid; /* zero until following fields are valid */ |
269 | unsigned long last_updated; /* in jiffies */ | |
270 | ||
271 | /* register values */ | |
97950c3d | 272 | u8 revision; /* chip revision */ |
569ff102 | 273 | u8 global_control; /* global control register */ |
97950c3d HG |
274 | u8 watchdog_control; /* watchdog control register */ |
275 | u8 watchdog_state; /* watchdog status register */ | |
276 | u8 watchdog_preset; /* watchdog counter preset on trigger val */ | |
c69ab2b7 HG |
277 | u8 volt[6]; /* voltage */ |
278 | u8 temp_act[11]; /* temperature */ | |
279 | u8 temp_status[11]; /* status of sensor */ | |
280 | u8 temp_max[11]; /* high temp limit, notice: undocumented! */ | |
281 | u8 fan_act[7]; /* fans revolutions per second */ | |
282 | u8 fan_status[7]; /* fan status */ | |
283 | u8 fan_min[7]; /* fan min value for rps */ | |
284 | u8 fan_ripple[7]; /* divider for rps */ | |
569ff102 HG |
285 | }; |
286 | ||
525ad373 GR |
287 | /* |
288 | * Global variables to hold information read from special DMI tables, which are | |
289 | * available on FSC machines with an fscher or later chip. There is no need to | |
290 | * protect these with a lock as they are only modified from our attach function | |
291 | * which always gets called with the i2c-core lock held and never accessed | |
292 | * before the attach function is done with them. | |
293 | */ | |
c69ab2b7 HG |
294 | static int dmi_mult[6] = { 490, 200, 100, 100, 200, 100 }; |
295 | static int dmi_offset[6] = { 0, 0, 0, 0, 0, 0 }; | |
7845cd79 HG |
296 | static int dmi_vref = -1; |
297 | ||
525ad373 GR |
298 | /* |
299 | * Somewhat ugly :( global data pointer list with all fschmd devices, so that | |
300 | * we can find our device data as when using misc_register there is no other | |
301 | * method to get to ones device data from the open fop. | |
302 | */ | |
97950c3d HG |
303 | static LIST_HEAD(watchdog_data_list); |
304 | /* Note this lock not only protect list access, but also data.kref access */ | |
305 | static DEFINE_MUTEX(watchdog_data_mutex); | |
306 | ||
525ad373 GR |
307 | /* |
308 | * Release our data struct when we're detached from the i2c client *and* all | |
309 | * references to our watchdog device are released | |
310 | */ | |
97950c3d HG |
311 | static void fschmd_release_resources(struct kref *ref) |
312 | { | |
313 | struct fschmd_data *data = container_of(ref, struct fschmd_data, kref); | |
314 | kfree(data); | |
315 | } | |
7845cd79 | 316 | |
569ff102 HG |
317 | /* |
318 | * Sysfs attr show / store functions | |
319 | */ | |
320 | ||
22ed7883 GR |
321 | static ssize_t in_value_show(struct device *dev, |
322 | struct device_attribute *devattr, char *buf) | |
569ff102 HG |
323 | { |
324 | const int max_reading[3] = { 14200, 6600, 3300 }; | |
325 | int index = to_sensor_dev_attr(devattr)->index; | |
326 | struct fschmd_data *data = fschmd_update_device(dev); | |
327 | ||
dc71afe5 | 328 | if (data->kind == fscher || data->kind >= fschrc) |
7845cd79 HG |
329 | return sprintf(buf, "%d\n", (data->volt[index] * dmi_vref * |
330 | dmi_mult[index]) / 255 + dmi_offset[index]); | |
331 | else | |
332 | return sprintf(buf, "%d\n", (data->volt[index] * | |
333 | max_reading[index] + 128) / 255); | |
569ff102 HG |
334 | } |
335 | ||
336 | ||
337 | #define TEMP_FROM_REG(val) (((val) - 128) * 1000) | |
338 | ||
22ed7883 GR |
339 | static ssize_t temp_value_show(struct device *dev, |
340 | struct device_attribute *devattr, char *buf) | |
569ff102 HG |
341 | { |
342 | int index = to_sensor_dev_attr(devattr)->index; | |
343 | struct fschmd_data *data = fschmd_update_device(dev); | |
344 | ||
345 | return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp_act[index])); | |
346 | } | |
347 | ||
22ed7883 GR |
348 | static ssize_t temp_max_show(struct device *dev, |
349 | struct device_attribute *devattr, char *buf) | |
569ff102 HG |
350 | { |
351 | int index = to_sensor_dev_attr(devattr)->index; | |
352 | struct fschmd_data *data = fschmd_update_device(dev); | |
353 | ||
354 | return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp_max[index])); | |
355 | } | |
356 | ||
22ed7883 GR |
357 | static ssize_t temp_max_store(struct device *dev, |
358 | struct device_attribute *devattr, | |
359 | const char *buf, size_t count) | |
569ff102 HG |
360 | { |
361 | int index = to_sensor_dev_attr(devattr)->index; | |
362 | struct fschmd_data *data = dev_get_drvdata(dev); | |
525ad373 GR |
363 | long v; |
364 | int err; | |
365 | ||
366 | err = kstrtol(buf, 10, &v); | |
367 | if (err) | |
368 | return err; | |
569ff102 | 369 | |
2a844c14 | 370 | v = clamp_val(v / 1000, -128, 127) + 128; |
569ff102 HG |
371 | |
372 | mutex_lock(&data->update_lock); | |
40ac1994 | 373 | i2c_smbus_write_byte_data(to_i2c_client(dev), |
569ff102 HG |
374 | FSCHMD_REG_TEMP_LIMIT[data->kind][index], v); |
375 | data->temp_max[index] = v; | |
376 | mutex_unlock(&data->update_lock); | |
377 | ||
378 | return count; | |
379 | } | |
380 | ||
22ed7883 GR |
381 | static ssize_t temp_fault_show(struct device *dev, |
382 | struct device_attribute *devattr, char *buf) | |
569ff102 HG |
383 | { |
384 | int index = to_sensor_dev_attr(devattr)->index; | |
385 | struct fschmd_data *data = fschmd_update_device(dev); | |
386 | ||
387 | /* bit 0 set means sensor working ok, so no fault! */ | |
453e308d | 388 | if (data->temp_status[index] & FSCHMD_TEMP_WORKING) |
569ff102 HG |
389 | return sprintf(buf, "0\n"); |
390 | else | |
391 | return sprintf(buf, "1\n"); | |
392 | } | |
393 | ||
22ed7883 GR |
394 | static ssize_t temp_alarm_show(struct device *dev, |
395 | struct device_attribute *devattr, char *buf) | |
569ff102 HG |
396 | { |
397 | int index = to_sensor_dev_attr(devattr)->index; | |
398 | struct fschmd_data *data = fschmd_update_device(dev); | |
399 | ||
400 | if ((data->temp_status[index] & FSCHMD_TEMP_ALARM_MASK) == | |
401 | FSCHMD_TEMP_ALARM_MASK) | |
402 | return sprintf(buf, "1\n"); | |
403 | else | |
404 | return sprintf(buf, "0\n"); | |
405 | } | |
406 | ||
407 | ||
408 | #define RPM_FROM_REG(val) ((val) * 60) | |
409 | ||
22ed7883 GR |
410 | static ssize_t fan_value_show(struct device *dev, |
411 | struct device_attribute *devattr, char *buf) | |
569ff102 HG |
412 | { |
413 | int index = to_sensor_dev_attr(devattr)->index; | |
414 | struct fschmd_data *data = fschmd_update_device(dev); | |
415 | ||
416 | return sprintf(buf, "%u\n", RPM_FROM_REG(data->fan_act[index])); | |
417 | } | |
418 | ||
22ed7883 GR |
419 | static ssize_t fan_div_show(struct device *dev, |
420 | struct device_attribute *devattr, char *buf) | |
569ff102 HG |
421 | { |
422 | int index = to_sensor_dev_attr(devattr)->index; | |
423 | struct fschmd_data *data = fschmd_update_device(dev); | |
424 | ||
425 | /* bits 2..7 reserved => mask with 3 */ | |
426 | return sprintf(buf, "%d\n", 1 << (data->fan_ripple[index] & 3)); | |
427 | } | |
428 | ||
22ed7883 GR |
429 | static ssize_t fan_div_store(struct device *dev, |
430 | struct device_attribute *devattr, | |
431 | const char *buf, size_t count) | |
569ff102 HG |
432 | { |
433 | u8 reg; | |
434 | int index = to_sensor_dev_attr(devattr)->index; | |
435 | struct fschmd_data *data = dev_get_drvdata(dev); | |
436 | /* supported values: 2, 4, 8 */ | |
525ad373 GR |
437 | unsigned long v; |
438 | int err; | |
439 | ||
440 | err = kstrtoul(buf, 10, &v); | |
441 | if (err) | |
442 | return err; | |
569ff102 HG |
443 | |
444 | switch (v) { | |
525ad373 GR |
445 | case 2: |
446 | v = 1; | |
447 | break; | |
448 | case 4: | |
449 | v = 2; | |
450 | break; | |
451 | case 8: | |
452 | v = 3; | |
453 | break; | |
569ff102 | 454 | default: |
b55f3757 GR |
455 | dev_err(dev, |
456 | "fan_div value %lu not supported. Choose one of 2, 4 or 8!\n", | |
457 | v); | |
569ff102 HG |
458 | return -EINVAL; |
459 | } | |
460 | ||
461 | mutex_lock(&data->update_lock); | |
462 | ||
40ac1994 | 463 | reg = i2c_smbus_read_byte_data(to_i2c_client(dev), |
569ff102 HG |
464 | FSCHMD_REG_FAN_RIPPLE[data->kind][index]); |
465 | ||
466 | /* bits 2..7 reserved => mask with 0x03 */ | |
467 | reg &= ~0x03; | |
468 | reg |= v; | |
469 | ||
40ac1994 | 470 | i2c_smbus_write_byte_data(to_i2c_client(dev), |
569ff102 HG |
471 | FSCHMD_REG_FAN_RIPPLE[data->kind][index], reg); |
472 | ||
473 | data->fan_ripple[index] = reg; | |
474 | ||
475 | mutex_unlock(&data->update_lock); | |
476 | ||
477 | return count; | |
478 | } | |
479 | ||
22ed7883 GR |
480 | static ssize_t fan_alarm_show(struct device *dev, |
481 | struct device_attribute *devattr, char *buf) | |
569ff102 HG |
482 | { |
483 | int index = to_sensor_dev_attr(devattr)->index; | |
484 | struct fschmd_data *data = fschmd_update_device(dev); | |
485 | ||
453e308d | 486 | if (data->fan_status[index] & FSCHMD_FAN_ALARM) |
569ff102 HG |
487 | return sprintf(buf, "1\n"); |
488 | else | |
489 | return sprintf(buf, "0\n"); | |
490 | } | |
491 | ||
22ed7883 GR |
492 | static ssize_t fan_fault_show(struct device *dev, |
493 | struct device_attribute *devattr, char *buf) | |
569ff102 HG |
494 | { |
495 | int index = to_sensor_dev_attr(devattr)->index; | |
496 | struct fschmd_data *data = fschmd_update_device(dev); | |
497 | ||
453e308d | 498 | if (data->fan_status[index] & FSCHMD_FAN_NOT_PRESENT) |
569ff102 HG |
499 | return sprintf(buf, "1\n"); |
500 | else | |
501 | return sprintf(buf, "0\n"); | |
502 | } | |
503 | ||
504 | ||
22ed7883 GR |
505 | static ssize_t pwm_auto_point1_pwm_show(struct device *dev, |
506 | struct device_attribute *devattr, | |
507 | char *buf) | |
569ff102 HG |
508 | { |
509 | int index = to_sensor_dev_attr(devattr)->index; | |
c69ab2b7 HG |
510 | struct fschmd_data *data = fschmd_update_device(dev); |
511 | int val = data->fan_min[index]; | |
569ff102 | 512 | |
c69ab2b7 | 513 | /* 0 = allow turning off (except on the syl), 1-255 = 50-100% */ |
dc71afe5 | 514 | if (val || data->kind == fscsyl) |
569ff102 HG |
515 | val = val / 2 + 128; |
516 | ||
517 | return sprintf(buf, "%d\n", val); | |
518 | } | |
519 | ||
22ed7883 GR |
520 | static ssize_t pwm_auto_point1_pwm_store(struct device *dev, |
521 | struct device_attribute *devattr, | |
522 | const char *buf, size_t count) | |
569ff102 HG |
523 | { |
524 | int index = to_sensor_dev_attr(devattr)->index; | |
525 | struct fschmd_data *data = dev_get_drvdata(dev); | |
525ad373 GR |
526 | unsigned long v; |
527 | int err; | |
528 | ||
529 | err = kstrtoul(buf, 10, &v); | |
530 | if (err) | |
531 | return err; | |
569ff102 | 532 | |
c69ab2b7 | 533 | /* reg: 0 = allow turning off (except on the syl), 1-255 = 50-100% */ |
dc71afe5 | 534 | if (v || data->kind == fscsyl) { |
2a844c14 | 535 | v = clamp_val(v, 128, 255); |
569ff102 HG |
536 | v = (v - 128) * 2 + 1; |
537 | } | |
538 | ||
539 | mutex_lock(&data->update_lock); | |
540 | ||
40ac1994 | 541 | i2c_smbus_write_byte_data(to_i2c_client(dev), |
569ff102 HG |
542 | FSCHMD_REG_FAN_MIN[data->kind][index], v); |
543 | data->fan_min[index] = v; | |
544 | ||
545 | mutex_unlock(&data->update_lock); | |
546 | ||
547 | return count; | |
548 | } | |
549 | ||
550 | ||
525ad373 GR |
551 | /* |
552 | * The FSC hwmon family has the ability to force an attached alert led to flash | |
553 | * from software, we export this as an alert_led sysfs attr | |
554 | */ | |
e34e885b | 555 | static ssize_t alert_led_show(struct device *dev, |
569ff102 HG |
556 | struct device_attribute *devattr, char *buf) |
557 | { | |
558 | struct fschmd_data *data = fschmd_update_device(dev); | |
559 | ||
453e308d | 560 | if (data->global_control & FSCHMD_CONTROL_ALERT_LED) |
569ff102 HG |
561 | return sprintf(buf, "1\n"); |
562 | else | |
563 | return sprintf(buf, "0\n"); | |
564 | } | |
565 | ||
e34e885b | 566 | static ssize_t alert_led_store(struct device *dev, |
569ff102 HG |
567 | struct device_attribute *devattr, const char *buf, size_t count) |
568 | { | |
569 | u8 reg; | |
570 | struct fschmd_data *data = dev_get_drvdata(dev); | |
525ad373 GR |
571 | unsigned long v; |
572 | int err; | |
573 | ||
574 | err = kstrtoul(buf, 10, &v); | |
575 | if (err) | |
576 | return err; | |
569ff102 HG |
577 | |
578 | mutex_lock(&data->update_lock); | |
579 | ||
40ac1994 | 580 | reg = i2c_smbus_read_byte_data(to_i2c_client(dev), FSCHMD_REG_CONTROL); |
569ff102 HG |
581 | |
582 | if (v) | |
453e308d | 583 | reg |= FSCHMD_CONTROL_ALERT_LED; |
569ff102 | 584 | else |
453e308d | 585 | reg &= ~FSCHMD_CONTROL_ALERT_LED; |
569ff102 | 586 | |
40ac1994 | 587 | i2c_smbus_write_byte_data(to_i2c_client(dev), FSCHMD_REG_CONTROL, reg); |
569ff102 HG |
588 | |
589 | data->global_control = reg; | |
590 | ||
591 | mutex_unlock(&data->update_lock); | |
592 | ||
593 | return count; | |
594 | } | |
595 | ||
e34e885b | 596 | static DEVICE_ATTR_RW(alert_led); |
c69ab2b7 | 597 | |
569ff102 | 598 | static struct sensor_device_attribute fschmd_attr[] = { |
22ed7883 GR |
599 | SENSOR_ATTR_RO(in0_input, in_value, 0), |
600 | SENSOR_ATTR_RO(in1_input, in_value, 1), | |
601 | SENSOR_ATTR_RO(in2_input, in_value, 2), | |
602 | SENSOR_ATTR_RO(in3_input, in_value, 3), | |
603 | SENSOR_ATTR_RO(in4_input, in_value, 4), | |
604 | SENSOR_ATTR_RO(in5_input, in_value, 5), | |
569ff102 HG |
605 | }; |
606 | ||
607 | static struct sensor_device_attribute fschmd_temp_attr[] = { | |
22ed7883 GR |
608 | SENSOR_ATTR_RO(temp1_input, temp_value, 0), |
609 | SENSOR_ATTR_RW(temp1_max, temp_max, 0), | |
610 | SENSOR_ATTR_RO(temp1_fault, temp_fault, 0), | |
611 | SENSOR_ATTR_RO(temp1_alarm, temp_alarm, 0), | |
612 | SENSOR_ATTR_RO(temp2_input, temp_value, 1), | |
613 | SENSOR_ATTR_RW(temp2_max, temp_max, 1), | |
614 | SENSOR_ATTR_RO(temp2_fault, temp_fault, 1), | |
615 | SENSOR_ATTR_RO(temp2_alarm, temp_alarm, 1), | |
616 | SENSOR_ATTR_RO(temp3_input, temp_value, 2), | |
617 | SENSOR_ATTR_RW(temp3_max, temp_max, 2), | |
618 | SENSOR_ATTR_RO(temp3_fault, temp_fault, 2), | |
619 | SENSOR_ATTR_RO(temp3_alarm, temp_alarm, 2), | |
620 | SENSOR_ATTR_RO(temp4_input, temp_value, 3), | |
621 | SENSOR_ATTR_RW(temp4_max, temp_max, 3), | |
622 | SENSOR_ATTR_RO(temp4_fault, temp_fault, 3), | |
623 | SENSOR_ATTR_RO(temp4_alarm, temp_alarm, 3), | |
624 | SENSOR_ATTR_RO(temp5_input, temp_value, 4), | |
625 | SENSOR_ATTR_RW(temp5_max, temp_max, 4), | |
626 | SENSOR_ATTR_RO(temp5_fault, temp_fault, 4), | |
627 | SENSOR_ATTR_RO(temp5_alarm, temp_alarm, 4), | |
628 | SENSOR_ATTR_RO(temp6_input, temp_value, 5), | |
629 | SENSOR_ATTR_RW(temp6_max, temp_max, 5), | |
630 | SENSOR_ATTR_RO(temp6_fault, temp_fault, 5), | |
631 | SENSOR_ATTR_RO(temp6_alarm, temp_alarm, 5), | |
632 | SENSOR_ATTR_RO(temp7_input, temp_value, 6), | |
633 | SENSOR_ATTR_RW(temp7_max, temp_max, 6), | |
634 | SENSOR_ATTR_RO(temp7_fault, temp_fault, 6), | |
635 | SENSOR_ATTR_RO(temp7_alarm, temp_alarm, 6), | |
636 | SENSOR_ATTR_RO(temp8_input, temp_value, 7), | |
637 | SENSOR_ATTR_RW(temp8_max, temp_max, 7), | |
638 | SENSOR_ATTR_RO(temp8_fault, temp_fault, 7), | |
639 | SENSOR_ATTR_RO(temp8_alarm, temp_alarm, 7), | |
640 | SENSOR_ATTR_RO(temp9_input, temp_value, 8), | |
641 | SENSOR_ATTR_RW(temp9_max, temp_max, 8), | |
642 | SENSOR_ATTR_RO(temp9_fault, temp_fault, 8), | |
643 | SENSOR_ATTR_RO(temp9_alarm, temp_alarm, 8), | |
644 | SENSOR_ATTR_RO(temp10_input, temp_value, 9), | |
645 | SENSOR_ATTR_RW(temp10_max, temp_max, 9), | |
646 | SENSOR_ATTR_RO(temp10_fault, temp_fault, 9), | |
647 | SENSOR_ATTR_RO(temp10_alarm, temp_alarm, 9), | |
648 | SENSOR_ATTR_RO(temp11_input, temp_value, 10), | |
649 | SENSOR_ATTR_RW(temp11_max, temp_max, 10), | |
650 | SENSOR_ATTR_RO(temp11_fault, temp_fault, 10), | |
651 | SENSOR_ATTR_RO(temp11_alarm, temp_alarm, 10), | |
569ff102 HG |
652 | }; |
653 | ||
654 | static struct sensor_device_attribute fschmd_fan_attr[] = { | |
22ed7883 GR |
655 | SENSOR_ATTR_RO(fan1_input, fan_value, 0), |
656 | SENSOR_ATTR_RW(fan1_div, fan_div, 0), | |
657 | SENSOR_ATTR_RO(fan1_alarm, fan_alarm, 0), | |
658 | SENSOR_ATTR_RO(fan1_fault, fan_fault, 0), | |
659 | SENSOR_ATTR_RW(pwm1_auto_point1_pwm, pwm_auto_point1_pwm, 0), | |
660 | SENSOR_ATTR_RO(fan2_input, fan_value, 1), | |
661 | SENSOR_ATTR_RW(fan2_div, fan_div, 1), | |
662 | SENSOR_ATTR_RO(fan2_alarm, fan_alarm, 1), | |
663 | SENSOR_ATTR_RO(fan2_fault, fan_fault, 1), | |
664 | SENSOR_ATTR_RW(pwm2_auto_point1_pwm, pwm_auto_point1_pwm, 1), | |
665 | SENSOR_ATTR_RO(fan3_input, fan_value, 2), | |
666 | SENSOR_ATTR_RW(fan3_div, fan_div, 2), | |
667 | SENSOR_ATTR_RO(fan3_alarm, fan_alarm, 2), | |
668 | SENSOR_ATTR_RO(fan3_fault, fan_fault, 2), | |
669 | SENSOR_ATTR_RW(pwm3_auto_point1_pwm, pwm_auto_point1_pwm, 2), | |
670 | SENSOR_ATTR_RO(fan4_input, fan_value, 3), | |
671 | SENSOR_ATTR_RW(fan4_div, fan_div, 3), | |
672 | SENSOR_ATTR_RO(fan4_alarm, fan_alarm, 3), | |
673 | SENSOR_ATTR_RO(fan4_fault, fan_fault, 3), | |
674 | SENSOR_ATTR_RW(pwm4_auto_point1_pwm, pwm_auto_point1_pwm, 3), | |
675 | SENSOR_ATTR_RO(fan5_input, fan_value, 4), | |
676 | SENSOR_ATTR_RW(fan5_div, fan_div, 4), | |
677 | SENSOR_ATTR_RO(fan5_alarm, fan_alarm, 4), | |
678 | SENSOR_ATTR_RO(fan5_fault, fan_fault, 4), | |
679 | SENSOR_ATTR_RW(pwm5_auto_point1_pwm, pwm_auto_point1_pwm, 4), | |
680 | SENSOR_ATTR_RO(fan6_input, fan_value, 5), | |
681 | SENSOR_ATTR_RW(fan6_div, fan_div, 5), | |
682 | SENSOR_ATTR_RO(fan6_alarm, fan_alarm, 5), | |
683 | SENSOR_ATTR_RO(fan6_fault, fan_fault, 5), | |
684 | SENSOR_ATTR_RW(pwm6_auto_point1_pwm, pwm_auto_point1_pwm, 5), | |
685 | SENSOR_ATTR_RO(fan7_input, fan_value, 6), | |
686 | SENSOR_ATTR_RW(fan7_div, fan_div, 6), | |
687 | SENSOR_ATTR_RO(fan7_alarm, fan_alarm, 6), | |
688 | SENSOR_ATTR_RO(fan7_fault, fan_fault, 6), | |
689 | SENSOR_ATTR_RW(pwm7_auto_point1_pwm, pwm_auto_point1_pwm, 6), | |
569ff102 HG |
690 | }; |
691 | ||
692 | ||
693 | /* | |
97950c3d HG |
694 | * Watchdog routines |
695 | */ | |
696 | ||
697 | static int watchdog_set_timeout(struct fschmd_data *data, int timeout) | |
698 | { | |
699 | int ret, resolution; | |
700 | int kind = data->kind + 1; /* 0-x array index -> 1-x module param */ | |
701 | ||
702 | /* 2 second or 60 second resolution? */ | |
703 | if (timeout <= 510 || kind == fscpos || kind == fscscy) | |
704 | resolution = 2; | |
705 | else | |
706 | resolution = 60; | |
707 | ||
708 | if (timeout < resolution || timeout > (resolution * 255)) | |
709 | return -EINVAL; | |
710 | ||
711 | mutex_lock(&data->watchdog_lock); | |
712 | if (!data->client) { | |
713 | ret = -ENODEV; | |
714 | goto leave; | |
715 | } | |
716 | ||
717 | if (resolution == 2) | |
718 | data->watchdog_control &= ~FSCHMD_WDOG_CONTROL_RESOLUTION; | |
719 | else | |
720 | data->watchdog_control |= FSCHMD_WDOG_CONTROL_RESOLUTION; | |
721 | ||
722 | data->watchdog_preset = DIV_ROUND_UP(timeout, resolution); | |
723 | ||
724 | /* Write new timeout value */ | |
c69ab2b7 HG |
725 | i2c_smbus_write_byte_data(data->client, |
726 | FSCHMD_REG_WDOG_PRESET[data->kind], data->watchdog_preset); | |
97950c3d | 727 | /* Write new control register, do not trigger! */ |
c69ab2b7 HG |
728 | i2c_smbus_write_byte_data(data->client, |
729 | FSCHMD_REG_WDOG_CONTROL[data->kind], | |
97950c3d HG |
730 | data->watchdog_control & ~FSCHMD_WDOG_CONTROL_TRIGGER); |
731 | ||
732 | ret = data->watchdog_preset * resolution; | |
733 | ||
734 | leave: | |
735 | mutex_unlock(&data->watchdog_lock); | |
736 | return ret; | |
737 | } | |
738 | ||
739 | static int watchdog_get_timeout(struct fschmd_data *data) | |
740 | { | |
741 | int timeout; | |
742 | ||
743 | mutex_lock(&data->watchdog_lock); | |
744 | if (data->watchdog_control & FSCHMD_WDOG_CONTROL_RESOLUTION) | |
745 | timeout = data->watchdog_preset * 60; | |
746 | else | |
747 | timeout = data->watchdog_preset * 2; | |
748 | mutex_unlock(&data->watchdog_lock); | |
749 | ||
750 | return timeout; | |
751 | } | |
752 | ||
753 | static int watchdog_trigger(struct fschmd_data *data) | |
754 | { | |
755 | int ret = 0; | |
756 | ||
757 | mutex_lock(&data->watchdog_lock); | |
758 | if (!data->client) { | |
759 | ret = -ENODEV; | |
760 | goto leave; | |
761 | } | |
762 | ||
763 | data->watchdog_control |= FSCHMD_WDOG_CONTROL_TRIGGER; | |
c69ab2b7 HG |
764 | i2c_smbus_write_byte_data(data->client, |
765 | FSCHMD_REG_WDOG_CONTROL[data->kind], | |
766 | data->watchdog_control); | |
97950c3d HG |
767 | leave: |
768 | mutex_unlock(&data->watchdog_lock); | |
769 | return ret; | |
770 | } | |
771 | ||
772 | static int watchdog_stop(struct fschmd_data *data) | |
773 | { | |
774 | int ret = 0; | |
775 | ||
776 | mutex_lock(&data->watchdog_lock); | |
777 | if (!data->client) { | |
778 | ret = -ENODEV; | |
779 | goto leave; | |
780 | } | |
781 | ||
782 | data->watchdog_control &= ~FSCHMD_WDOG_CONTROL_STARTED; | |
525ad373 GR |
783 | /* |
784 | * Don't store the stop flag in our watchdog control register copy, as | |
785 | * its a write only bit (read always returns 0) | |
786 | */ | |
c69ab2b7 HG |
787 | i2c_smbus_write_byte_data(data->client, |
788 | FSCHMD_REG_WDOG_CONTROL[data->kind], | |
97950c3d HG |
789 | data->watchdog_control | FSCHMD_WDOG_CONTROL_STOP); |
790 | leave: | |
791 | mutex_unlock(&data->watchdog_lock); | |
792 | return ret; | |
793 | } | |
794 | ||
795 | static int watchdog_open(struct inode *inode, struct file *filp) | |
796 | { | |
797 | struct fschmd_data *pos, *data = NULL; | |
c453615f | 798 | int watchdog_is_open; |
97950c3d | 799 | |
525ad373 GR |
800 | /* |
801 | * We get called from drivers/char/misc.c with misc_mtx hold, and we | |
802 | * call misc_register() from fschmd_probe() with watchdog_data_mutex | |
803 | * hold, as misc_register() takes the misc_mtx lock, this is a possible | |
804 | * deadlock, so we use mutex_trylock here. | |
805 | */ | |
97950c3d HG |
806 | if (!mutex_trylock(&watchdog_data_mutex)) |
807 | return -ERESTARTSYS; | |
808 | list_for_each_entry(pos, &watchdog_data_list, list) { | |
809 | if (pos->watchdog_miscdev.minor == iminor(inode)) { | |
810 | data = pos; | |
811 | break; | |
812 | } | |
813 | } | |
814 | /* Note we can never not have found data, so we don't check for this */ | |
c453615f HG |
815 | watchdog_is_open = test_and_set_bit(0, &data->watchdog_is_open); |
816 | if (!watchdog_is_open) | |
817 | kref_get(&data->kref); | |
97950c3d HG |
818 | mutex_unlock(&watchdog_data_mutex); |
819 | ||
c453615f | 820 | if (watchdog_is_open) |
97950c3d HG |
821 | return -EBUSY; |
822 | ||
823 | /* Start the watchdog */ | |
824 | watchdog_trigger(data); | |
825 | filp->private_data = data; | |
826 | ||
c5bf68fe | 827 | return stream_open(inode, filp); |
97950c3d HG |
828 | } |
829 | ||
830 | static int watchdog_release(struct inode *inode, struct file *filp) | |
831 | { | |
832 | struct fschmd_data *data = filp->private_data; | |
833 | ||
834 | if (data->watchdog_expect_close) { | |
835 | watchdog_stop(data); | |
836 | data->watchdog_expect_close = 0; | |
837 | } else { | |
838 | watchdog_trigger(data); | |
839 | dev_crit(&data->client->dev, | |
840 | "unexpected close, not stopping watchdog!\n"); | |
841 | } | |
842 | ||
843 | clear_bit(0, &data->watchdog_is_open); | |
844 | ||
845 | mutex_lock(&watchdog_data_mutex); | |
846 | kref_put(&data->kref, fschmd_release_resources); | |
847 | mutex_unlock(&watchdog_data_mutex); | |
848 | ||
849 | return 0; | |
850 | } | |
851 | ||
852 | static ssize_t watchdog_write(struct file *filp, const char __user *buf, | |
853 | size_t count, loff_t *offset) | |
854 | { | |
c7702c31 | 855 | int ret; |
97950c3d HG |
856 | struct fschmd_data *data = filp->private_data; |
857 | ||
858 | if (count) { | |
859 | if (!nowayout) { | |
860 | size_t i; | |
861 | ||
862 | /* Clear it in case it was set with a previous write */ | |
863 | data->watchdog_expect_close = 0; | |
864 | ||
865 | for (i = 0; i != count; i++) { | |
866 | char c; | |
867 | if (get_user(c, buf + i)) | |
868 | return -EFAULT; | |
869 | if (c == 'V') | |
870 | data->watchdog_expect_close = 1; | |
871 | } | |
872 | } | |
873 | ret = watchdog_trigger(data); | |
874 | if (ret < 0) | |
875 | return ret; | |
876 | } | |
877 | return count; | |
878 | } | |
879 | ||
525ad373 GR |
880 | static long watchdog_ioctl(struct file *filp, unsigned int cmd, |
881 | unsigned long arg) | |
97950c3d | 882 | { |
1b7243e8 | 883 | struct watchdog_info ident = { |
97950c3d HG |
884 | .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT | |
885 | WDIOF_CARDRESET, | |
886 | .identity = "FSC watchdog" | |
887 | }; | |
888 | int i, ret = 0; | |
889 | struct fschmd_data *data = filp->private_data; | |
890 | ||
891 | switch (cmd) { | |
892 | case WDIOC_GETSUPPORT: | |
893 | ident.firmware_version = data->revision; | |
894 | if (!nowayout) | |
895 | ident.options |= WDIOF_MAGICCLOSE; | |
896 | if (copy_to_user((void __user *)arg, &ident, sizeof(ident))) | |
897 | ret = -EFAULT; | |
898 | break; | |
899 | ||
900 | case WDIOC_GETSTATUS: | |
901 | ret = put_user(0, (int __user *)arg); | |
902 | break; | |
903 | ||
904 | case WDIOC_GETBOOTSTATUS: | |
905 | if (data->watchdog_state & FSCHMD_WDOG_STATE_CARDRESET) | |
906 | ret = put_user(WDIOF_CARDRESET, (int __user *)arg); | |
907 | else | |
908 | ret = put_user(0, (int __user *)arg); | |
909 | break; | |
910 | ||
911 | case WDIOC_KEEPALIVE: | |
912 | ret = watchdog_trigger(data); | |
913 | break; | |
914 | ||
915 | case WDIOC_GETTIMEOUT: | |
916 | i = watchdog_get_timeout(data); | |
917 | ret = put_user(i, (int __user *)arg); | |
918 | break; | |
919 | ||
920 | case WDIOC_SETTIMEOUT: | |
921 | if (get_user(i, (int __user *)arg)) { | |
922 | ret = -EFAULT; | |
923 | break; | |
924 | } | |
925 | ret = watchdog_set_timeout(data, i); | |
926 | if (ret > 0) | |
927 | ret = put_user(ret, (int __user *)arg); | |
928 | break; | |
929 | ||
930 | case WDIOC_SETOPTIONS: | |
931 | if (get_user(i, (int __user *)arg)) { | |
932 | ret = -EFAULT; | |
933 | break; | |
934 | } | |
935 | ||
936 | if (i & WDIOS_DISABLECARD) | |
937 | ret = watchdog_stop(data); | |
938 | else if (i & WDIOS_ENABLECARD) | |
939 | ret = watchdog_trigger(data); | |
940 | else | |
941 | ret = -EINVAL; | |
942 | ||
943 | break; | |
944 | default: | |
945 | ret = -ENOTTY; | |
946 | } | |
97950c3d HG |
947 | return ret; |
948 | } | |
949 | ||
828c0950 | 950 | static const struct file_operations watchdog_fops = { |
97950c3d HG |
951 | .owner = THIS_MODULE, |
952 | .llseek = no_llseek, | |
953 | .open = watchdog_open, | |
954 | .release = watchdog_release, | |
955 | .write = watchdog_write, | |
55929332 | 956 | .unlocked_ioctl = watchdog_ioctl, |
b6dfb247 | 957 | .compat_ioctl = compat_ptr_ioctl, |
97950c3d HG |
958 | }; |
959 | ||
960 | ||
961 | /* | |
962 | * Detect, register, unregister and update device functions | |
569ff102 HG |
963 | */ |
964 | ||
525ad373 GR |
965 | /* |
966 | * DMI decode routine to read voltage scaling factors from special DMI tables, | |
967 | * which are available on FSC machines with an fscher or later chip. | |
968 | */ | |
e7a19c56 | 969 | static void fschmd_dmi_decode(const struct dmi_header *header, void *dummy) |
7845cd79 HG |
970 | { |
971 | int i, mult[3] = { 0 }, offset[3] = { 0 }, vref = 0, found = 0; | |
972 | ||
525ad373 GR |
973 | /* |
974 | * dmi code ugliness, we get passed the address of the contents of | |
975 | * a complete DMI record, but in the form of a dmi_header pointer, in | |
976 | * reality this address holds header->length bytes of which the header | |
977 | * are the first 4 bytes | |
978 | */ | |
7845cd79 HG |
979 | u8 *dmi_data = (u8 *)header; |
980 | ||
981 | /* We are looking for OEM-specific type 185 */ | |
982 | if (header->type != 185) | |
983 | return; | |
984 | ||
525ad373 GR |
985 | /* |
986 | * we are looking for what Siemens calls "subtype" 19, the subtype | |
987 | * is stored in byte 5 of the dmi block | |
988 | */ | |
7845cd79 HG |
989 | if (header->length < 5 || dmi_data[4] != 19) |
990 | return; | |
991 | ||
525ad373 GR |
992 | /* |
993 | * After the subtype comes 1 unknown byte and then blocks of 5 bytes, | |
994 | * consisting of what Siemens calls an "Entity" number, followed by | |
995 | * 2 16-bit words in LSB first order | |
996 | */ | |
7845cd79 HG |
997 | for (i = 6; (i + 4) < header->length; i += 5) { |
998 | /* entity 1 - 3: voltage multiplier and offset */ | |
999 | if (dmi_data[i] >= 1 && dmi_data[i] <= 3) { | |
1000 | /* Our in sensors order and the DMI order differ */ | |
1001 | const int shuffle[3] = { 1, 0, 2 }; | |
1002 | int in = shuffle[dmi_data[i] - 1]; | |
1003 | ||
1004 | /* Check for twice the same entity */ | |
1005 | if (found & (1 << in)) | |
1006 | return; | |
1007 | ||
1008 | mult[in] = dmi_data[i + 1] | (dmi_data[i + 2] << 8); | |
1009 | offset[in] = dmi_data[i + 3] | (dmi_data[i + 4] << 8); | |
1010 | ||
1011 | found |= 1 << in; | |
1012 | } | |
1013 | ||
1014 | /* entity 7: reference voltage */ | |
1015 | if (dmi_data[i] == 7) { | |
1016 | /* Check for twice the same entity */ | |
1017 | if (found & 0x08) | |
1018 | return; | |
1019 | ||
1020 | vref = dmi_data[i + 1] | (dmi_data[i + 2] << 8); | |
1021 | ||
1022 | found |= 0x08; | |
1023 | } | |
1024 | } | |
1025 | ||
1026 | if (found == 0x0F) { | |
1027 | for (i = 0; i < 3; i++) { | |
1028 | dmi_mult[i] = mult[i] * 10; | |
1029 | dmi_offset[i] = offset[i] * 10; | |
1030 | } | |
525ad373 GR |
1031 | /* |
1032 | * According to the docs there should be separate dmi entries | |
1033 | * for the mult's and offsets of in3-5 of the syl, but on | |
1034 | * my test machine these are not present | |
1035 | */ | |
c69ab2b7 HG |
1036 | dmi_mult[3] = dmi_mult[2]; |
1037 | dmi_mult[4] = dmi_mult[1]; | |
1038 | dmi_mult[5] = dmi_mult[2]; | |
1039 | dmi_offset[3] = dmi_offset[2]; | |
1040 | dmi_offset[4] = dmi_offset[1]; | |
1041 | dmi_offset[5] = dmi_offset[2]; | |
7845cd79 HG |
1042 | dmi_vref = vref; |
1043 | } | |
1044 | } | |
1045 | ||
310ec792 | 1046 | static int fschmd_detect(struct i2c_client *client, |
40ac1994 | 1047 | struct i2c_board_info *info) |
569ff102 | 1048 | { |
52df6440 | 1049 | enum chips kind; |
40ac1994 | 1050 | struct i2c_adapter *adapter = client->adapter; |
52df6440 | 1051 | char id[4]; |
569ff102 HG |
1052 | |
1053 | if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) | |
40ac1994 | 1054 | return -ENODEV; |
569ff102 HG |
1055 | |
1056 | /* Detect & Identify the chip */ | |
52df6440 JD |
1057 | id[0] = i2c_smbus_read_byte_data(client, FSCHMD_REG_IDENT_0); |
1058 | id[1] = i2c_smbus_read_byte_data(client, FSCHMD_REG_IDENT_1); | |
1059 | id[2] = i2c_smbus_read_byte_data(client, FSCHMD_REG_IDENT_2); | |
1060 | id[3] = '\0'; | |
1061 | ||
1062 | if (!strcmp(id, "PEG")) | |
1063 | kind = fscpos; | |
1064 | else if (!strcmp(id, "HER")) | |
1065 | kind = fscher; | |
1066 | else if (!strcmp(id, "SCY")) | |
1067 | kind = fscscy; | |
1068 | else if (!strcmp(id, "HRC")) | |
1069 | kind = fschrc; | |
1070 | else if (!strcmp(id, "HMD")) | |
1071 | kind = fschmd; | |
1072 | else if (!strcmp(id, "HDS")) | |
1073 | kind = fschds; | |
1074 | else if (!strcmp(id, "SYL")) | |
1075 | kind = fscsyl; | |
1076 | else | |
1077 | return -ENODEV; | |
569ff102 | 1078 | |
dc71afe5 | 1079 | strlcpy(info->type, fschmd_id[kind].name, I2C_NAME_SIZE); |
40ac1994 JD |
1080 | |
1081 | return 0; | |
1082 | } | |
1083 | ||
1084 | static int fschmd_probe(struct i2c_client *client, | |
1085 | const struct i2c_device_id *id) | |
1086 | { | |
1087 | struct fschmd_data *data; | |
de15f093 HG |
1088 | const char * const names[7] = { "Poseidon", "Hermes", "Scylla", |
1089 | "Heracles", "Heimdall", "Hades", "Syleus" }; | |
97950c3d | 1090 | const int watchdog_minors[] = { WATCHDOG_MINOR, 212, 213, 214, 215 }; |
40ac1994 JD |
1091 | int i, err; |
1092 | enum chips kind = id->driver_data; | |
1093 | ||
1094 | data = kzalloc(sizeof(struct fschmd_data), GFP_KERNEL); | |
1095 | if (!data) | |
1096 | return -ENOMEM; | |
1097 | ||
1098 | i2c_set_clientdata(client, data); | |
1099 | mutex_init(&data->update_lock); | |
97950c3d HG |
1100 | mutex_init(&data->watchdog_lock); |
1101 | INIT_LIST_HEAD(&data->list); | |
1102 | kref_init(&data->kref); | |
525ad373 GR |
1103 | /* |
1104 | * Store client pointer in our data struct for watchdog usage | |
1105 | * (where the client is found through a data ptr instead of the | |
1106 | * otherway around) | |
1107 | */ | |
97950c3d | 1108 | data->client = client; |
dc71afe5 | 1109 | data->kind = kind; |
40ac1994 | 1110 | |
569ff102 | 1111 | if (kind == fscpos) { |
525ad373 GR |
1112 | /* |
1113 | * The Poseidon has hardwired temp limits, fill these | |
1114 | * in for the alarm resetting code | |
1115 | */ | |
569ff102 HG |
1116 | data->temp_max[0] = 70 + 128; |
1117 | data->temp_max[1] = 50 + 128; | |
1118 | data->temp_max[2] = 50 + 128; | |
1119 | } | |
1120 | ||
7845cd79 | 1121 | /* Read the special DMI table for fscher and newer chips */ |
453e308d | 1122 | if ((kind == fscher || kind >= fschrc) && dmi_vref == -1) { |
e7a19c56 | 1123 | dmi_walk(fschmd_dmi_decode, NULL); |
7845cd79 | 1124 | if (dmi_vref == -1) { |
453e308d HG |
1125 | dev_warn(&client->dev, |
1126 | "Couldn't get voltage scaling factors from " | |
7845cd79 HG |
1127 | "BIOS DMI table, using builtin defaults\n"); |
1128 | dmi_vref = 33; | |
1129 | } | |
1130 | } | |
1131 | ||
97950c3d HG |
1132 | /* Read in some never changing registers */ |
1133 | data->revision = i2c_smbus_read_byte_data(client, FSCHMD_REG_REVISION); | |
1134 | data->global_control = i2c_smbus_read_byte_data(client, | |
1135 | FSCHMD_REG_CONTROL); | |
1136 | data->watchdog_control = i2c_smbus_read_byte_data(client, | |
c69ab2b7 | 1137 | FSCHMD_REG_WDOG_CONTROL[data->kind]); |
97950c3d | 1138 | data->watchdog_state = i2c_smbus_read_byte_data(client, |
c69ab2b7 | 1139 | FSCHMD_REG_WDOG_STATE[data->kind]); |
97950c3d | 1140 | data->watchdog_preset = i2c_smbus_read_byte_data(client, |
c69ab2b7 | 1141 | FSCHMD_REG_WDOG_PRESET[data->kind]); |
97950c3d | 1142 | |
c69ab2b7 HG |
1143 | err = device_create_file(&client->dev, &dev_attr_alert_led); |
1144 | if (err) | |
1145 | goto exit_detach; | |
569ff102 | 1146 | |
c69ab2b7 | 1147 | for (i = 0; i < FSCHMD_NO_VOLT_SENSORS[data->kind]; i++) { |
569ff102 HG |
1148 | err = device_create_file(&client->dev, |
1149 | &fschmd_attr[i].dev_attr); | |
1150 | if (err) | |
1151 | goto exit_detach; | |
1152 | } | |
1153 | ||
1154 | for (i = 0; i < (FSCHMD_NO_TEMP_SENSORS[data->kind] * 4); i++) { | |
1155 | /* Poseidon doesn't have TEMP_LIMIT registers */ | |
1156 | if (kind == fscpos && fschmd_temp_attr[i].dev_attr.show == | |
22ed7883 | 1157 | temp_max_show) |
569ff102 HG |
1158 | continue; |
1159 | ||
c69ab2b7 HG |
1160 | if (kind == fscsyl) { |
1161 | if (i % 4 == 0) | |
1162 | data->temp_status[i / 4] = | |
1163 | i2c_smbus_read_byte_data(client, | |
1164 | FSCHMD_REG_TEMP_STATE | |
1165 | [data->kind][i / 4]); | |
1166 | if (data->temp_status[i / 4] & FSCHMD_TEMP_DISABLED) | |
1167 | continue; | |
1168 | } | |
1169 | ||
569ff102 HG |
1170 | err = device_create_file(&client->dev, |
1171 | &fschmd_temp_attr[i].dev_attr); | |
1172 | if (err) | |
1173 | goto exit_detach; | |
1174 | } | |
1175 | ||
1176 | for (i = 0; i < (FSCHMD_NO_FAN_SENSORS[data->kind] * 5); i++) { | |
1177 | /* Poseidon doesn't have a FAN_MIN register for its 3rd fan */ | |
1178 | if (kind == fscpos && | |
1179 | !strcmp(fschmd_fan_attr[i].dev_attr.attr.name, | |
1180 | "pwm3_auto_point1_pwm")) | |
1181 | continue; | |
1182 | ||
c69ab2b7 HG |
1183 | if (kind == fscsyl) { |
1184 | if (i % 5 == 0) | |
1185 | data->fan_status[i / 5] = | |
1186 | i2c_smbus_read_byte_data(client, | |
1187 | FSCHMD_REG_FAN_STATE | |
1188 | [data->kind][i / 5]); | |
1189 | if (data->fan_status[i / 5] & FSCHMD_FAN_DISABLED) | |
1190 | continue; | |
1191 | } | |
1192 | ||
569ff102 HG |
1193 | err = device_create_file(&client->dev, |
1194 | &fschmd_fan_attr[i].dev_attr); | |
1195 | if (err) | |
1196 | goto exit_detach; | |
1197 | } | |
1198 | ||
1199 | data->hwmon_dev = hwmon_device_register(&client->dev); | |
1200 | if (IS_ERR(data->hwmon_dev)) { | |
1201 | err = PTR_ERR(data->hwmon_dev); | |
1202 | data->hwmon_dev = NULL; | |
1203 | goto exit_detach; | |
1204 | } | |
1205 | ||
525ad373 GR |
1206 | /* |
1207 | * We take the data_mutex lock early so that watchdog_open() cannot | |
1208 | * run when misc_register() has completed, but we've not yet added | |
1209 | * our data to the watchdog_data_list (and set the default timeout) | |
1210 | */ | |
97950c3d HG |
1211 | mutex_lock(&watchdog_data_mutex); |
1212 | for (i = 0; i < ARRAY_SIZE(watchdog_minors); i++) { | |
1213 | /* Register our watchdog part */ | |
1214 | snprintf(data->watchdog_name, sizeof(data->watchdog_name), | |
1215 | "watchdog%c", (i == 0) ? '\0' : ('0' + i)); | |
1216 | data->watchdog_miscdev.name = data->watchdog_name; | |
1217 | data->watchdog_miscdev.fops = &watchdog_fops; | |
1218 | data->watchdog_miscdev.minor = watchdog_minors[i]; | |
1219 | err = misc_register(&data->watchdog_miscdev); | |
1220 | if (err == -EBUSY) | |
1221 | continue; | |
1222 | if (err) { | |
1223 | data->watchdog_miscdev.minor = 0; | |
1224 | dev_err(&client->dev, | |
1225 | "Registering watchdog chardev: %d\n", err); | |
1226 | break; | |
1227 | } | |
1228 | ||
1229 | list_add(&data->list, &watchdog_data_list); | |
1230 | watchdog_set_timeout(data, 60); | |
1231 | dev_info(&client->dev, | |
1232 | "Registered watchdog chardev major 10, minor: %d\n", | |
1233 | watchdog_minors[i]); | |
1234 | break; | |
1235 | } | |
1236 | if (i == ARRAY_SIZE(watchdog_minors)) { | |
1237 | data->watchdog_miscdev.minor = 0; | |
b55f3757 GR |
1238 | dev_warn(&client->dev, |
1239 | "Couldn't register watchdog chardev (due to no free minor)\n"); | |
97950c3d HG |
1240 | } |
1241 | mutex_unlock(&watchdog_data_mutex); | |
1242 | ||
453e308d | 1243 | dev_info(&client->dev, "Detected FSC %s chip, revision: %d\n", |
97950c3d | 1244 | names[data->kind], (int) data->revision); |
569ff102 HG |
1245 | |
1246 | return 0; | |
1247 | ||
1248 | exit_detach: | |
40ac1994 | 1249 | fschmd_remove(client); /* will also free data for us */ |
569ff102 HG |
1250 | return err; |
1251 | } | |
1252 | ||
40ac1994 | 1253 | static int fschmd_remove(struct i2c_client *client) |
569ff102 HG |
1254 | { |
1255 | struct fschmd_data *data = i2c_get_clientdata(client); | |
40ac1994 | 1256 | int i; |
569ff102 | 1257 | |
97950c3d HG |
1258 | /* Unregister the watchdog (if registered) */ |
1259 | if (data->watchdog_miscdev.minor) { | |
1260 | misc_deregister(&data->watchdog_miscdev); | |
1261 | if (data->watchdog_is_open) { | |
1262 | dev_warn(&client->dev, | |
1263 | "i2c client detached with watchdog open! " | |
1264 | "Stopping watchdog.\n"); | |
1265 | watchdog_stop(data); | |
1266 | } | |
1267 | mutex_lock(&watchdog_data_mutex); | |
1268 | list_del(&data->list); | |
1269 | mutex_unlock(&watchdog_data_mutex); | |
1270 | /* Tell the watchdog code the client is gone */ | |
1271 | mutex_lock(&data->watchdog_lock); | |
1272 | data->client = NULL; | |
1273 | mutex_unlock(&data->watchdog_lock); | |
1274 | } | |
1275 | ||
525ad373 GR |
1276 | /* |
1277 | * Check if registered in case we're called from fschmd_detect | |
1278 | * to cleanup after an error | |
1279 | */ | |
569ff102 HG |
1280 | if (data->hwmon_dev) |
1281 | hwmon_device_unregister(data->hwmon_dev); | |
1282 | ||
c69ab2b7 HG |
1283 | device_remove_file(&client->dev, &dev_attr_alert_led); |
1284 | for (i = 0; i < (FSCHMD_NO_VOLT_SENSORS[data->kind]); i++) | |
569ff102 HG |
1285 | device_remove_file(&client->dev, &fschmd_attr[i].dev_attr); |
1286 | for (i = 0; i < (FSCHMD_NO_TEMP_SENSORS[data->kind] * 4); i++) | |
1287 | device_remove_file(&client->dev, | |
1288 | &fschmd_temp_attr[i].dev_attr); | |
1289 | for (i = 0; i < (FSCHMD_NO_FAN_SENSORS[data->kind] * 5); i++) | |
1290 | device_remove_file(&client->dev, | |
1291 | &fschmd_fan_attr[i].dev_attr); | |
1292 | ||
97950c3d HG |
1293 | mutex_lock(&watchdog_data_mutex); |
1294 | kref_put(&data->kref, fschmd_release_resources); | |
1295 | mutex_unlock(&watchdog_data_mutex); | |
1296 | ||
569ff102 HG |
1297 | return 0; |
1298 | } | |
1299 | ||
1300 | static struct fschmd_data *fschmd_update_device(struct device *dev) | |
1301 | { | |
1302 | struct i2c_client *client = to_i2c_client(dev); | |
1303 | struct fschmd_data *data = i2c_get_clientdata(client); | |
1304 | int i; | |
1305 | ||
1306 | mutex_lock(&data->update_lock); | |
1307 | ||
1308 | if (time_after(jiffies, data->last_updated + 2 * HZ) || !data->valid) { | |
1309 | ||
1310 | for (i = 0; i < FSCHMD_NO_TEMP_SENSORS[data->kind]; i++) { | |
1311 | data->temp_act[i] = i2c_smbus_read_byte_data(client, | |
1312 | FSCHMD_REG_TEMP_ACT[data->kind][i]); | |
1313 | data->temp_status[i] = i2c_smbus_read_byte_data(client, | |
1314 | FSCHMD_REG_TEMP_STATE[data->kind][i]); | |
1315 | ||
1316 | /* The fscpos doesn't have TEMP_LIMIT registers */ | |
1317 | if (FSCHMD_REG_TEMP_LIMIT[data->kind][i]) | |
1318 | data->temp_max[i] = i2c_smbus_read_byte_data( | |
1319 | client, | |
1320 | FSCHMD_REG_TEMP_LIMIT[data->kind][i]); | |
1321 | ||
525ad373 GR |
1322 | /* |
1323 | * reset alarm if the alarm condition is gone, | |
1324 | * the chip doesn't do this itself | |
1325 | */ | |
569ff102 HG |
1326 | if ((data->temp_status[i] & FSCHMD_TEMP_ALARM_MASK) == |
1327 | FSCHMD_TEMP_ALARM_MASK && | |
1328 | data->temp_act[i] < data->temp_max[i]) | |
1329 | i2c_smbus_write_byte_data(client, | |
1330 | FSCHMD_REG_TEMP_STATE[data->kind][i], | |
c69ab2b7 | 1331 | data->temp_status[i]); |
569ff102 HG |
1332 | } |
1333 | ||
1334 | for (i = 0; i < FSCHMD_NO_FAN_SENSORS[data->kind]; i++) { | |
1335 | data->fan_act[i] = i2c_smbus_read_byte_data(client, | |
1336 | FSCHMD_REG_FAN_ACT[data->kind][i]); | |
1337 | data->fan_status[i] = i2c_smbus_read_byte_data(client, | |
1338 | FSCHMD_REG_FAN_STATE[data->kind][i]); | |
1339 | data->fan_ripple[i] = i2c_smbus_read_byte_data(client, | |
1340 | FSCHMD_REG_FAN_RIPPLE[data->kind][i]); | |
1341 | ||
1342 | /* The fscpos third fan doesn't have a fan_min */ | |
1343 | if (FSCHMD_REG_FAN_MIN[data->kind][i]) | |
1344 | data->fan_min[i] = i2c_smbus_read_byte_data( | |
1345 | client, | |
1346 | FSCHMD_REG_FAN_MIN[data->kind][i]); | |
1347 | ||
1348 | /* reset fan status if speed is back to > 0 */ | |
453e308d | 1349 | if ((data->fan_status[i] & FSCHMD_FAN_ALARM) && |
569ff102 HG |
1350 | data->fan_act[i]) |
1351 | i2c_smbus_write_byte_data(client, | |
1352 | FSCHMD_REG_FAN_STATE[data->kind][i], | |
c69ab2b7 | 1353 | data->fan_status[i]); |
569ff102 HG |
1354 | } |
1355 | ||
c69ab2b7 | 1356 | for (i = 0; i < FSCHMD_NO_VOLT_SENSORS[data->kind]; i++) |
569ff102 | 1357 | data->volt[i] = i2c_smbus_read_byte_data(client, |
c69ab2b7 | 1358 | FSCHMD_REG_VOLT[data->kind][i]); |
569ff102 | 1359 | |
569ff102 HG |
1360 | data->last_updated = jiffies; |
1361 | data->valid = 1; | |
1362 | } | |
1363 | ||
1364 | mutex_unlock(&data->update_lock); | |
1365 | ||
1366 | return data; | |
1367 | } | |
1368 | ||
f0967eea | 1369 | module_i2c_driver(fschmd_driver); |
569ff102 | 1370 | |
453e308d | 1371 | MODULE_AUTHOR("Hans de Goede <[email protected]>"); |
de15f093 HG |
1372 | MODULE_DESCRIPTION("FSC Poseidon, Hermes, Scylla, Heracles, Heimdall, Hades " |
1373 | "and Syleus driver"); | |
569ff102 | 1374 | MODULE_LICENSE("GPL"); |