[linux.git] / include / linux / mv643xx_eth.h

/*
 * MV-643XX ethernet platform device data definition file.
 */

#ifndef __LINUX_MV643XX_ETH_H
#define __LINUX_MV643XX_ETH_H

#include <linux/mbus.h>

#define MV643XX_ETH_SHARED_NAME		"mv643xx_eth"
#define MV643XX_ETH_NAME		"mv643xx_eth_port"
#define MV643XX_ETH_SHARED_REGS		0x2000
#define MV643XX_ETH_SHARED_REGS_SIZE	0x2000
#define MV643XX_ETH_BAR_4		0x2220
#define MV643XX_ETH_SIZE_REG_4		0x2224
#define MV643XX_ETH_BASE_ADDR_ENABLE_REG	0x2290

struct mv643xx_eth_shared_platform_data {
	struct mbus_dram_target_info	*dram;
	struct platform_device	*shared_smi;
	unsigned int		t_clk;
};

#define MV643XX_ETH_PHY_ADDR_DEFAULT	0
#define MV643XX_ETH_PHY_ADDR(x)		(0x80 | (x))
#define MV643XX_ETH_PHY_NONE		0xff

struct mv643xx_eth_platform_data {
	/*
	 * Pointer back to our parent instance, and our port number.
	 */
	struct platform_device	*shared;
	int			port_number;

	/*
	 * Whether a PHY is present, and if yes, at which address.
	 */
	int			phy_addr;

	/*
	 * Use this MAC address if it is valid, overriding the
	 * address that is already in the hardware.
	 */
	u8			mac_addr[6];

	/*
	 * If speed is 0, autonegotiation is enabled.
	 *   Valid values for speed: 0, SPEED_10, SPEED_100, SPEED_1000.
	 *   Valid values for duplex: DUPLEX_HALF, DUPLEX_FULL.
	 */
	int			speed;
	int			duplex;

	/*
	 * How many RX/TX queues to use.
	 */
	int			rx_queue_count;
	int			tx_queue_count;

	/*
	 * Override default RX/TX queue sizes if nonzero.
	 */
	int			rx_queue_size;
	int			tx_queue_size;

	/*
	 * Use on-chip SRAM for RX/TX descriptors if size is nonzero
	 * and sufficient to contain all descriptors for the requested
	 * ring sizes.
	 */
	unsigned long		rx_sram_addr;
	int			rx_sram_size;
	unsigned long		tx_sram_addr;
	int			tx_sram_size;
};


#endif
Commit	Line	Data
c4a6a2ab LB	1	/*
	2	* MV-643XX ethernet platform device data definition file.
	3	*/
fa3959f4	4
c4a6a2ab LB	5	#ifndef __LINUX_MV643XX_ETH_H
	6	#define __LINUX_MV643XX_ETH_H
	7
f2ce825d LB	8	#include <linux/mbus.h>
f2ce825d LB	9
240e4419 LB	10	#define MV643XX_ETH_SHARED_NAME "mv643xx_eth"
240e4419 LB	11	#define MV643XX_ETH_NAME "mv643xx_eth_port"
c4a6a2ab LB	12	#define MV643XX_ETH_SHARED_REGS 0x2000
c4a6a2ab LB	13	#define MV643XX_ETH_SHARED_REGS_SIZE 0x2000
3077d78a DF	14	#define MV643XX_ETH_BAR_4 0x2220
	15	#define MV643XX_ETH_SIZE_REG_4 0x2224
	16	#define MV643XX_ETH_BASE_ADDR_ENABLE_REG 0x2290
c4a6a2ab	17
f2ce825d LB	18	struct mv643xx_eth_shared_platform_data {
f2ce825d LB	19	struct mbus_dram_target_info *dram;
fc0eb9f2	20	struct platform_device *shared_smi;
fc32b0e2	21	unsigned int t_clk;
f2ce825d LB	22	};
f2ce825d LB	23
ac840605 LB	24	#define MV643XX_ETH_PHY_ADDR_DEFAULT 0
	25	#define MV643XX_ETH_PHY_ADDR(x) (0x80 \| (x))
	26	#define MV643XX_ETH_PHY_NONE 0xff
	27
c4a6a2ab	28	struct mv643xx_eth_platform_data {
fc32b0e2 LB	29	/*
	30	* Pointer back to our parent instance, and our port number.
	31	*/
fa3959f4	32	struct platform_device *shared;
fc32b0e2	33	int port_number;
fa3959f4	34
fc32b0e2 LB	35	/*
	36	* Whether a PHY is present, and if yes, at which address.
	37	*/
fc32b0e2	38	int phy_addr;
ce4e2e45	39
fc32b0e2 LB	40	/*
	41	* Use this MAC address if it is valid, overriding the
	42	* address that is already in the hardware.
	43	*/
	44	u8 mac_addr[6];
	45
	46	/*
	47	* If speed is 0, autonegotiation is enabled.
	48	* Valid values for speed: 0, SPEED_10, SPEED_100, SPEED_1000.
	49	* Valid values for duplex: DUPLEX_HALF, DUPLEX_FULL.
	50	*/
	51	int speed;
	52	int duplex;
	53
64da80a2	54	/*
f7981c1c	55	* How many RX/TX queues to use.
64da80a2	56	*/
f7981c1c LB	57	int rx_queue_count;
f7981c1c LB	58	int tx_queue_count;
64da80a2	59
fc32b0e2 LB	60	/*
	61	* Override default RX/TX queue sizes if nonzero.
	62	*/
	63	int rx_queue_size;
	64	int tx_queue_size;
	65
	66	/*
	67	* Use on-chip SRAM for RX/TX descriptors if size is nonzero
	68	* and sufficient to contain all descriptors for the requested
	69	* ring sizes.
	70	*/
	71	unsigned long rx_sram_addr;
	72	int rx_sram_size;
	73	unsigned long tx_sram_addr;
	74	int tx_sram_size;
c4a6a2ab LB	75	};
c4a6a2ab LB	76
fc32b0e2 LB	77
fc32b0e2 LB	78	#endif