]>
Commit | Line | Data |
---|---|---|
64d2dc38 LL |
1 | Software emulation of deprecated SWP instruction (CONFIG_SWP_EMULATE) |
2 | --------------------------------------------------------------------- | |
3 | ||
4 | ARMv6 architecture deprecates use of the SWP/SWPB instructions, and recommeds | |
5 | moving to the load-locked/store-conditional instructions LDREX and STREX. | |
6 | ||
7 | ARMv7 multiprocessing extensions introduce the ability to disable these | |
8 | instructions, triggering an undefined instruction exception when executed. | |
9 | Trapped instructions are emulated using an LDREX/STREX or LDREXB/STREXB | |
10 | sequence. If a memory access fault (an abort) occurs, a segmentation fault is | |
11 | signalled to the triggering process. | |
12 | ||
13 | /proc/cpu/swp_emulation holds some statistics/information, including the PID of | |
14 | the last process to trigger the emulation to be invocated. For example: | |
15 | --- | |
16 | Emulated SWP: 12 | |
17 | Emulated SWPB: 0 | |
18 | Aborted SWP{B}: 1 | |
19 | Last process: 314 | |
20 | --- | |
21 | ||
22 | NOTE: when accessing uncached shared regions, LDREX/STREX rely on an external | |
23 | transaction monitoring block called a global monitor to maintain update | |
24 | atomicity. If your system does not implement a global monitor, this option can | |
25 | cause programs that perform SWP operations to uncached memory to deadlock, as | |
26 | the STREX operation will always fail. | |
27 |