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Commit | Line | Data |
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2744e8af LW |
1 | /* |
2 | * Core driver for the pin control subsystem | |
3 | * | |
befe5bdf | 4 | * Copyright (C) 2011-2012 ST-Ericsson SA |
2744e8af LW |
5 | * Written on behalf of Linaro for ST-Ericsson |
6 | * Based on bits of regulator core, gpio core and clk core | |
7 | * | |
8 | * Author: Linus Walleij <[email protected]> | |
9 | * | |
b2b3e66e SW |
10 | * Copyright (C) 2012 NVIDIA CORPORATION. All rights reserved. |
11 | * | |
2744e8af LW |
12 | * License terms: GNU General Public License (GPL) version 2 |
13 | */ | |
14 | #define pr_fmt(fmt) "pinctrl core: " fmt | |
15 | ||
16 | #include <linux/kernel.h> | |
a5a697cd | 17 | #include <linux/export.h> |
2744e8af LW |
18 | #include <linux/init.h> |
19 | #include <linux/device.h> | |
20 | #include <linux/slab.h> | |
2744e8af LW |
21 | #include <linux/err.h> |
22 | #include <linux/list.h> | |
2744e8af LW |
23 | #include <linux/sysfs.h> |
24 | #include <linux/debugfs.h> | |
25 | #include <linux/seq_file.h> | |
6d4ca1fb | 26 | #include <linux/pinctrl/consumer.h> |
2744e8af LW |
27 | #include <linux/pinctrl/pinctrl.h> |
28 | #include <linux/pinctrl/machine.h> | |
29 | #include "core.h" | |
57291ce2 | 30 | #include "devicetree.h" |
2744e8af | 31 | #include "pinmux.h" |
ae6b4d85 | 32 | #include "pinconf.h" |
2744e8af | 33 | |
b2b3e66e SW |
34 | /** |
35 | * struct pinctrl_maps - a list item containing part of the mapping table | |
36 | * @node: mapping table list node | |
37 | * @maps: array of mapping table entries | |
38 | * @num_maps: the number of entries in @maps | |
39 | */ | |
40 | struct pinctrl_maps { | |
41 | struct list_head node; | |
42 | struct pinctrl_map const *maps; | |
43 | unsigned num_maps; | |
44 | }; | |
45 | ||
57b676f9 SW |
46 | /* Mutex taken by all entry points */ |
47 | DEFINE_MUTEX(pinctrl_mutex); | |
48 | ||
49 | /* Global list of pin control devices (struct pinctrl_dev) */ | |
57291ce2 | 50 | LIST_HEAD(pinctrldev_list); |
2744e8af | 51 | |
57b676f9 | 52 | /* List of pin controller handles (struct pinctrl) */ |
befe5bdf LW |
53 | static LIST_HEAD(pinctrl_list); |
54 | ||
57b676f9 | 55 | /* List of pinctrl maps (struct pinctrl_maps) */ |
b2b3e66e SW |
56 | static LIST_HEAD(pinctrl_maps); |
57 | ||
58 | #define for_each_maps(_maps_node_, _i_, _map_) \ | |
59 | list_for_each_entry(_maps_node_, &pinctrl_maps, node) \ | |
60 | for (_i_ = 0, _map_ = &_maps_node_->maps[_i_]; \ | |
61 | _i_ < _maps_node_->num_maps; \ | |
62 | i++, _map_ = &_maps_node_->maps[_i_]) | |
befe5bdf | 63 | |
2744e8af LW |
64 | const char *pinctrl_dev_get_name(struct pinctrl_dev *pctldev) |
65 | { | |
66 | /* We're not allowed to register devices without name */ | |
67 | return pctldev->desc->name; | |
68 | } | |
69 | EXPORT_SYMBOL_GPL(pinctrl_dev_get_name); | |
70 | ||
71 | void *pinctrl_dev_get_drvdata(struct pinctrl_dev *pctldev) | |
72 | { | |
73 | return pctldev->driver_data; | |
74 | } | |
75 | EXPORT_SYMBOL_GPL(pinctrl_dev_get_drvdata); | |
76 | ||
77 | /** | |
9dfac4fd LW |
78 | * get_pinctrl_dev_from_devname() - look up pin controller device |
79 | * @devname: the name of a device instance, as returned by dev_name() | |
2744e8af LW |
80 | * |
81 | * Looks up a pin control device matching a certain device name or pure device | |
82 | * pointer, the pure device pointer will take precedence. | |
83 | */ | |
9dfac4fd | 84 | struct pinctrl_dev *get_pinctrl_dev_from_devname(const char *devname) |
2744e8af LW |
85 | { |
86 | struct pinctrl_dev *pctldev = NULL; | |
87 | bool found = false; | |
88 | ||
9dfac4fd LW |
89 | if (!devname) |
90 | return NULL; | |
91 | ||
2744e8af | 92 | list_for_each_entry(pctldev, &pinctrldev_list, node) { |
9dfac4fd | 93 | if (!strcmp(dev_name(pctldev->dev), devname)) { |
2744e8af LW |
94 | /* Matched on device name */ |
95 | found = true; | |
96 | break; | |
97 | } | |
98 | } | |
2744e8af LW |
99 | |
100 | return found ? pctldev : NULL; | |
101 | } | |
102 | ||
ae6b4d85 LW |
103 | /** |
104 | * pin_get_from_name() - look up a pin number from a name | |
105 | * @pctldev: the pin control device to lookup the pin on | |
106 | * @name: the name of the pin to look up | |
107 | */ | |
108 | int pin_get_from_name(struct pinctrl_dev *pctldev, const char *name) | |
109 | { | |
706e8520 | 110 | unsigned i, pin; |
ae6b4d85 | 111 | |
706e8520 CP |
112 | /* The pin number can be retrived from the pin controller descriptor */ |
113 | for (i = 0; i < pctldev->desc->npins; i++) { | |
ae6b4d85 LW |
114 | struct pin_desc *desc; |
115 | ||
706e8520 | 116 | pin = pctldev->desc->pins[i].number; |
ae6b4d85 LW |
117 | desc = pin_desc_get(pctldev, pin); |
118 | /* Pin space may be sparse */ | |
119 | if (desc == NULL) | |
120 | continue; | |
121 | if (desc->name && !strcmp(name, desc->name)) | |
122 | return pin; | |
123 | } | |
124 | ||
125 | return -EINVAL; | |
126 | } | |
127 | ||
2744e8af LW |
128 | /** |
129 | * pin_is_valid() - check if pin exists on controller | |
130 | * @pctldev: the pin control device to check the pin on | |
131 | * @pin: pin to check, use the local pin controller index number | |
132 | * | |
133 | * This tells us whether a certain pin exist on a certain pin controller or | |
134 | * not. Pin lists may be sparse, so some pins may not exist. | |
135 | */ | |
136 | bool pin_is_valid(struct pinctrl_dev *pctldev, int pin) | |
137 | { | |
138 | struct pin_desc *pindesc; | |
139 | ||
140 | if (pin < 0) | |
141 | return false; | |
142 | ||
57b676f9 | 143 | mutex_lock(&pinctrl_mutex); |
2744e8af | 144 | pindesc = pin_desc_get(pctldev, pin); |
57b676f9 | 145 | mutex_unlock(&pinctrl_mutex); |
2744e8af | 146 | |
57b676f9 | 147 | return pindesc != NULL; |
2744e8af LW |
148 | } |
149 | EXPORT_SYMBOL_GPL(pin_is_valid); | |
150 | ||
151 | /* Deletes a range of pin descriptors */ | |
152 | static void pinctrl_free_pindescs(struct pinctrl_dev *pctldev, | |
153 | const struct pinctrl_pin_desc *pins, | |
154 | unsigned num_pins) | |
155 | { | |
156 | int i; | |
157 | ||
2744e8af LW |
158 | for (i = 0; i < num_pins; i++) { |
159 | struct pin_desc *pindesc; | |
160 | ||
161 | pindesc = radix_tree_lookup(&pctldev->pin_desc_tree, | |
162 | pins[i].number); | |
163 | if (pindesc != NULL) { | |
164 | radix_tree_delete(&pctldev->pin_desc_tree, | |
165 | pins[i].number); | |
ca53c5f1 LW |
166 | if (pindesc->dynamic_name) |
167 | kfree(pindesc->name); | |
2744e8af LW |
168 | } |
169 | kfree(pindesc); | |
170 | } | |
2744e8af LW |
171 | } |
172 | ||
173 | static int pinctrl_register_one_pin(struct pinctrl_dev *pctldev, | |
174 | unsigned number, const char *name) | |
175 | { | |
176 | struct pin_desc *pindesc; | |
177 | ||
178 | pindesc = pin_desc_get(pctldev, number); | |
179 | if (pindesc != NULL) { | |
180 | pr_err("pin %d already registered on %s\n", number, | |
181 | pctldev->desc->name); | |
182 | return -EINVAL; | |
183 | } | |
184 | ||
185 | pindesc = kzalloc(sizeof(*pindesc), GFP_KERNEL); | |
95dcd4ae SW |
186 | if (pindesc == NULL) { |
187 | dev_err(pctldev->dev, "failed to alloc struct pin_desc\n"); | |
2744e8af | 188 | return -ENOMEM; |
95dcd4ae | 189 | } |
ae6b4d85 | 190 | |
2744e8af LW |
191 | /* Set owner */ |
192 | pindesc->pctldev = pctldev; | |
193 | ||
9af1e44f | 194 | /* Copy basic pin info */ |
8dc6ae4d | 195 | if (name) { |
ca53c5f1 LW |
196 | pindesc->name = name; |
197 | } else { | |
198 | pindesc->name = kasprintf(GFP_KERNEL, "PIN%u", number); | |
199 | if (pindesc->name == NULL) | |
200 | return -ENOMEM; | |
201 | pindesc->dynamic_name = true; | |
202 | } | |
2744e8af | 203 | |
2744e8af | 204 | radix_tree_insert(&pctldev->pin_desc_tree, number, pindesc); |
2744e8af | 205 | pr_debug("registered pin %d (%s) on %s\n", |
ca53c5f1 | 206 | number, pindesc->name, pctldev->desc->name); |
2744e8af LW |
207 | return 0; |
208 | } | |
209 | ||
210 | static int pinctrl_register_pins(struct pinctrl_dev *pctldev, | |
211 | struct pinctrl_pin_desc const *pins, | |
212 | unsigned num_descs) | |
213 | { | |
214 | unsigned i; | |
215 | int ret = 0; | |
216 | ||
217 | for (i = 0; i < num_descs; i++) { | |
218 | ret = pinctrl_register_one_pin(pctldev, | |
219 | pins[i].number, pins[i].name); | |
220 | if (ret) | |
221 | return ret; | |
222 | } | |
223 | ||
224 | return 0; | |
225 | } | |
226 | ||
227 | /** | |
228 | * pinctrl_match_gpio_range() - check if a certain GPIO pin is in range | |
229 | * @pctldev: pin controller device to check | |
230 | * @gpio: gpio pin to check taken from the global GPIO pin space | |
231 | * | |
232 | * Tries to match a GPIO pin number to the ranges handled by a certain pin | |
233 | * controller, return the range or NULL | |
234 | */ | |
235 | static struct pinctrl_gpio_range * | |
236 | pinctrl_match_gpio_range(struct pinctrl_dev *pctldev, unsigned gpio) | |
237 | { | |
238 | struct pinctrl_gpio_range *range = NULL; | |
239 | ||
240 | /* Loop over the ranges */ | |
2744e8af LW |
241 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { |
242 | /* Check if we're in the valid range */ | |
243 | if (gpio >= range->base && | |
244 | gpio < range->base + range->npins) { | |
2744e8af LW |
245 | return range; |
246 | } | |
247 | } | |
2744e8af LW |
248 | |
249 | return NULL; | |
250 | } | |
251 | ||
252 | /** | |
253 | * pinctrl_get_device_gpio_range() - find device for GPIO range | |
254 | * @gpio: the pin to locate the pin controller for | |
255 | * @outdev: the pin control device if found | |
256 | * @outrange: the GPIO range if found | |
257 | * | |
258 | * Find the pin controller handling a certain GPIO pin from the pinspace of | |
259 | * the GPIO subsystem, return the device and the matching GPIO range. Returns | |
260 | * negative if the GPIO range could not be found in any device. | |
261 | */ | |
4ecce45d SW |
262 | static int pinctrl_get_device_gpio_range(unsigned gpio, |
263 | struct pinctrl_dev **outdev, | |
264 | struct pinctrl_gpio_range **outrange) | |
2744e8af LW |
265 | { |
266 | struct pinctrl_dev *pctldev = NULL; | |
267 | ||
268 | /* Loop over the pin controllers */ | |
2744e8af LW |
269 | list_for_each_entry(pctldev, &pinctrldev_list, node) { |
270 | struct pinctrl_gpio_range *range; | |
271 | ||
272 | range = pinctrl_match_gpio_range(pctldev, gpio); | |
273 | if (range != NULL) { | |
274 | *outdev = pctldev; | |
275 | *outrange = range; | |
2744e8af LW |
276 | return 0; |
277 | } | |
278 | } | |
2744e8af LW |
279 | |
280 | return -EINVAL; | |
281 | } | |
282 | ||
283 | /** | |
284 | * pinctrl_add_gpio_range() - register a GPIO range for a controller | |
285 | * @pctldev: pin controller device to add the range to | |
286 | * @range: the GPIO range to add | |
287 | * | |
288 | * This adds a range of GPIOs to be handled by a certain pin controller. Call | |
289 | * this to register handled ranges after registering your pin controller. | |
290 | */ | |
291 | void pinctrl_add_gpio_range(struct pinctrl_dev *pctldev, | |
292 | struct pinctrl_gpio_range *range) | |
293 | { | |
57b676f9 | 294 | mutex_lock(&pinctrl_mutex); |
8b9c139f | 295 | list_add_tail(&range->node, &pctldev->gpio_ranges); |
57b676f9 | 296 | mutex_unlock(&pinctrl_mutex); |
2744e8af | 297 | } |
4ecce45d | 298 | EXPORT_SYMBOL_GPL(pinctrl_add_gpio_range); |
2744e8af LW |
299 | |
300 | /** | |
301 | * pinctrl_remove_gpio_range() - remove a range of GPIOs fro a pin controller | |
302 | * @pctldev: pin controller device to remove the range from | |
303 | * @range: the GPIO range to remove | |
304 | */ | |
305 | void pinctrl_remove_gpio_range(struct pinctrl_dev *pctldev, | |
306 | struct pinctrl_gpio_range *range) | |
307 | { | |
57b676f9 | 308 | mutex_lock(&pinctrl_mutex); |
2744e8af | 309 | list_del(&range->node); |
57b676f9 | 310 | mutex_unlock(&pinctrl_mutex); |
2744e8af | 311 | } |
4ecce45d | 312 | EXPORT_SYMBOL_GPL(pinctrl_remove_gpio_range); |
2744e8af | 313 | |
7afde8ba LW |
314 | /** |
315 | * pinctrl_get_group_selector() - returns the group selector for a group | |
316 | * @pctldev: the pin controller handling the group | |
317 | * @pin_group: the pin group to look up | |
318 | */ | |
319 | int pinctrl_get_group_selector(struct pinctrl_dev *pctldev, | |
320 | const char *pin_group) | |
321 | { | |
322 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; | |
d1e90e9e | 323 | unsigned ngroups = pctlops->get_groups_count(pctldev); |
7afde8ba LW |
324 | unsigned group_selector = 0; |
325 | ||
d1e90e9e | 326 | while (group_selector < ngroups) { |
7afde8ba LW |
327 | const char *gname = pctlops->get_group_name(pctldev, |
328 | group_selector); | |
329 | if (!strcmp(gname, pin_group)) { | |
51cd24ee | 330 | dev_dbg(pctldev->dev, |
7afde8ba LW |
331 | "found group selector %u for %s\n", |
332 | group_selector, | |
333 | pin_group); | |
334 | return group_selector; | |
335 | } | |
336 | ||
337 | group_selector++; | |
338 | } | |
339 | ||
51cd24ee | 340 | dev_err(pctldev->dev, "does not have pin group %s\n", |
7afde8ba LW |
341 | pin_group); |
342 | ||
343 | return -EINVAL; | |
344 | } | |
345 | ||
befe5bdf LW |
346 | /** |
347 | * pinctrl_request_gpio() - request a single pin to be used in as GPIO | |
348 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
349 | * | |
350 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
351 | * as part of their gpio_request() semantics, platforms and individual drivers | |
352 | * shall *NOT* request GPIO pins to be muxed in. | |
353 | */ | |
354 | int pinctrl_request_gpio(unsigned gpio) | |
355 | { | |
356 | struct pinctrl_dev *pctldev; | |
357 | struct pinctrl_gpio_range *range; | |
358 | int ret; | |
359 | int pin; | |
360 | ||
57b676f9 SW |
361 | mutex_lock(&pinctrl_mutex); |
362 | ||
befe5bdf | 363 | ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range); |
57b676f9 SW |
364 | if (ret) { |
365 | mutex_unlock(&pinctrl_mutex); | |
befe5bdf | 366 | return -EINVAL; |
57b676f9 | 367 | } |
befe5bdf LW |
368 | |
369 | /* Convert to the pin controllers number space */ | |
370 | pin = gpio - range->base + range->pin_base; | |
371 | ||
57b676f9 SW |
372 | ret = pinmux_request_gpio(pctldev, range, pin, gpio); |
373 | ||
374 | mutex_unlock(&pinctrl_mutex); | |
375 | return ret; | |
befe5bdf LW |
376 | } |
377 | EXPORT_SYMBOL_GPL(pinctrl_request_gpio); | |
378 | ||
379 | /** | |
380 | * pinctrl_free_gpio() - free control on a single pin, currently used as GPIO | |
381 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
382 | * | |
383 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
384 | * as part of their gpio_free() semantics, platforms and individual drivers | |
385 | * shall *NOT* request GPIO pins to be muxed out. | |
386 | */ | |
387 | void pinctrl_free_gpio(unsigned gpio) | |
388 | { | |
389 | struct pinctrl_dev *pctldev; | |
390 | struct pinctrl_gpio_range *range; | |
391 | int ret; | |
392 | int pin; | |
393 | ||
57b676f9 SW |
394 | mutex_lock(&pinctrl_mutex); |
395 | ||
befe5bdf | 396 | ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range); |
57b676f9 SW |
397 | if (ret) { |
398 | mutex_unlock(&pinctrl_mutex); | |
befe5bdf | 399 | return; |
57b676f9 | 400 | } |
befe5bdf LW |
401 | |
402 | /* Convert to the pin controllers number space */ | |
403 | pin = gpio - range->base + range->pin_base; | |
404 | ||
57b676f9 SW |
405 | pinmux_free_gpio(pctldev, pin, range); |
406 | ||
407 | mutex_unlock(&pinctrl_mutex); | |
befe5bdf LW |
408 | } |
409 | EXPORT_SYMBOL_GPL(pinctrl_free_gpio); | |
410 | ||
411 | static int pinctrl_gpio_direction(unsigned gpio, bool input) | |
412 | { | |
413 | struct pinctrl_dev *pctldev; | |
414 | struct pinctrl_gpio_range *range; | |
415 | int ret; | |
416 | int pin; | |
417 | ||
418 | ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range); | |
419 | if (ret) | |
420 | return ret; | |
421 | ||
422 | /* Convert to the pin controllers number space */ | |
423 | pin = gpio - range->base + range->pin_base; | |
424 | ||
425 | return pinmux_gpio_direction(pctldev, range, pin, input); | |
426 | } | |
427 | ||
428 | /** | |
429 | * pinctrl_gpio_direction_input() - request a GPIO pin to go into input mode | |
430 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
431 | * | |
432 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
433 | * as part of their gpio_direction_input() semantics, platforms and individual | |
434 | * drivers shall *NOT* touch pin control GPIO calls. | |
435 | */ | |
436 | int pinctrl_gpio_direction_input(unsigned gpio) | |
437 | { | |
57b676f9 SW |
438 | int ret; |
439 | mutex_lock(&pinctrl_mutex); | |
440 | ret = pinctrl_gpio_direction(gpio, true); | |
441 | mutex_unlock(&pinctrl_mutex); | |
442 | return ret; | |
befe5bdf LW |
443 | } |
444 | EXPORT_SYMBOL_GPL(pinctrl_gpio_direction_input); | |
445 | ||
446 | /** | |
447 | * pinctrl_gpio_direction_output() - request a GPIO pin to go into output mode | |
448 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
449 | * | |
450 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
451 | * as part of their gpio_direction_output() semantics, platforms and individual | |
452 | * drivers shall *NOT* touch pin control GPIO calls. | |
453 | */ | |
454 | int pinctrl_gpio_direction_output(unsigned gpio) | |
455 | { | |
57b676f9 SW |
456 | int ret; |
457 | mutex_lock(&pinctrl_mutex); | |
458 | ret = pinctrl_gpio_direction(gpio, false); | |
459 | mutex_unlock(&pinctrl_mutex); | |
460 | return ret; | |
befe5bdf LW |
461 | } |
462 | EXPORT_SYMBOL_GPL(pinctrl_gpio_direction_output); | |
463 | ||
6e5e959d SW |
464 | static struct pinctrl_state *find_state(struct pinctrl *p, |
465 | const char *name) | |
befe5bdf | 466 | { |
6e5e959d SW |
467 | struct pinctrl_state *state; |
468 | ||
469 | list_for_each_entry(state, &p->states, node) | |
470 | if (!strcmp(state->name, name)) | |
471 | return state; | |
472 | ||
473 | return NULL; | |
474 | } | |
475 | ||
476 | static struct pinctrl_state *create_state(struct pinctrl *p, | |
477 | const char *name) | |
478 | { | |
479 | struct pinctrl_state *state; | |
480 | ||
481 | state = kzalloc(sizeof(*state), GFP_KERNEL); | |
482 | if (state == NULL) { | |
483 | dev_err(p->dev, | |
484 | "failed to alloc struct pinctrl_state\n"); | |
485 | return ERR_PTR(-ENOMEM); | |
486 | } | |
487 | ||
488 | state->name = name; | |
489 | INIT_LIST_HEAD(&state->settings); | |
490 | ||
491 | list_add_tail(&state->node, &p->states); | |
492 | ||
493 | return state; | |
494 | } | |
495 | ||
496 | static int add_setting(struct pinctrl *p, struct pinctrl_map const *map) | |
497 | { | |
498 | struct pinctrl_state *state; | |
7ecdb16f | 499 | struct pinctrl_setting *setting; |
6e5e959d | 500 | int ret; |
befe5bdf | 501 | |
6e5e959d SW |
502 | state = find_state(p, map->name); |
503 | if (!state) | |
504 | state = create_state(p, map->name); | |
505 | if (IS_ERR(state)) | |
506 | return PTR_ERR(state); | |
befe5bdf | 507 | |
1e2082b5 SW |
508 | if (map->type == PIN_MAP_TYPE_DUMMY_STATE) |
509 | return 0; | |
510 | ||
6e5e959d SW |
511 | setting = kzalloc(sizeof(*setting), GFP_KERNEL); |
512 | if (setting == NULL) { | |
513 | dev_err(p->dev, | |
514 | "failed to alloc struct pinctrl_setting\n"); | |
515 | return -ENOMEM; | |
516 | } | |
befe5bdf | 517 | |
1e2082b5 SW |
518 | setting->type = map->type; |
519 | ||
6e5e959d SW |
520 | setting->pctldev = get_pinctrl_dev_from_devname(map->ctrl_dev_name); |
521 | if (setting->pctldev == NULL) { | |
c05127c4 | 522 | dev_info(p->dev, "unknown pinctrl device %s in map entry, deferring probe", |
6e5e959d SW |
523 | map->ctrl_dev_name); |
524 | kfree(setting); | |
c05127c4 LW |
525 | /* |
526 | * OK let us guess that the driver is not there yet, and | |
527 | * let's defer obtaining this pinctrl handle to later... | |
528 | */ | |
529 | return -EPROBE_DEFER; | |
6e5e959d SW |
530 | } |
531 | ||
1e2082b5 SW |
532 | switch (map->type) { |
533 | case PIN_MAP_TYPE_MUX_GROUP: | |
534 | ret = pinmux_map_to_setting(map, setting); | |
535 | break; | |
536 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
537 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
538 | ret = pinconf_map_to_setting(map, setting); | |
539 | break; | |
540 | default: | |
541 | ret = -EINVAL; | |
542 | break; | |
543 | } | |
6e5e959d SW |
544 | if (ret < 0) { |
545 | kfree(setting); | |
546 | return ret; | |
547 | } | |
548 | ||
549 | list_add_tail(&setting->node, &state->settings); | |
550 | ||
551 | return 0; | |
552 | } | |
553 | ||
554 | static struct pinctrl *find_pinctrl(struct device *dev) | |
555 | { | |
556 | struct pinctrl *p; | |
557 | ||
1e2082b5 | 558 | list_for_each_entry(p, &pinctrl_list, node) |
6e5e959d SW |
559 | if (p->dev == dev) |
560 | return p; | |
561 | ||
562 | return NULL; | |
563 | } | |
564 | ||
565 | static void pinctrl_put_locked(struct pinctrl *p, bool inlist); | |
566 | ||
567 | static struct pinctrl *create_pinctrl(struct device *dev) | |
568 | { | |
569 | struct pinctrl *p; | |
570 | const char *devname; | |
571 | struct pinctrl_maps *maps_node; | |
572 | int i; | |
573 | struct pinctrl_map const *map; | |
574 | int ret; | |
befe5bdf LW |
575 | |
576 | /* | |
577 | * create the state cookie holder struct pinctrl for each | |
578 | * mapping, this is what consumers will get when requesting | |
579 | * a pin control handle with pinctrl_get() | |
580 | */ | |
02f5b989 | 581 | p = kzalloc(sizeof(*p), GFP_KERNEL); |
95dcd4ae SW |
582 | if (p == NULL) { |
583 | dev_err(dev, "failed to alloc struct pinctrl\n"); | |
befe5bdf | 584 | return ERR_PTR(-ENOMEM); |
95dcd4ae | 585 | } |
7ecdb16f | 586 | p->dev = dev; |
6e5e959d | 587 | INIT_LIST_HEAD(&p->states); |
57291ce2 SW |
588 | INIT_LIST_HEAD(&p->dt_maps); |
589 | ||
590 | ret = pinctrl_dt_to_map(p); | |
591 | if (ret < 0) { | |
592 | kfree(p); | |
593 | return ERR_PTR(ret); | |
594 | } | |
6e5e959d SW |
595 | |
596 | devname = dev_name(dev); | |
befe5bdf LW |
597 | |
598 | /* Iterate over the pin control maps to locate the right ones */ | |
b2b3e66e | 599 | for_each_maps(maps_node, i, map) { |
7ecdb16f SW |
600 | /* Map must be for this device */ |
601 | if (strcmp(map->dev_name, devname)) | |
602 | continue; | |
603 | ||
6e5e959d SW |
604 | ret = add_setting(p, map); |
605 | if (ret < 0) { | |
606 | pinctrl_put_locked(p, false); | |
607 | return ERR_PTR(ret); | |
7ecdb16f | 608 | } |
befe5bdf LW |
609 | } |
610 | ||
befe5bdf | 611 | /* Add the pinmux to the global list */ |
8b9c139f | 612 | list_add_tail(&p->node, &pinctrl_list); |
befe5bdf LW |
613 | |
614 | return p; | |
6e5e959d | 615 | } |
7ecdb16f | 616 | |
6e5e959d SW |
617 | static struct pinctrl *pinctrl_get_locked(struct device *dev) |
618 | { | |
619 | struct pinctrl *p; | |
7ecdb16f | 620 | |
6e5e959d SW |
621 | if (WARN_ON(!dev)) |
622 | return ERR_PTR(-EINVAL); | |
623 | ||
624 | p = find_pinctrl(dev); | |
625 | if (p != NULL) | |
626 | return ERR_PTR(-EBUSY); | |
7ecdb16f | 627 | |
6e5e959d SW |
628 | p = create_pinctrl(dev); |
629 | if (IS_ERR(p)) | |
630 | return p; | |
631 | ||
632 | return p; | |
befe5bdf | 633 | } |
b2b3e66e SW |
634 | |
635 | /** | |
6e5e959d SW |
636 | * pinctrl_get() - retrieves the pinctrl handle for a device |
637 | * @dev: the device to obtain the handle for | |
b2b3e66e | 638 | */ |
6e5e959d | 639 | struct pinctrl *pinctrl_get(struct device *dev) |
b2b3e66e SW |
640 | { |
641 | struct pinctrl *p; | |
642 | ||
57b676f9 | 643 | mutex_lock(&pinctrl_mutex); |
6e5e959d | 644 | p = pinctrl_get_locked(dev); |
57b676f9 | 645 | mutex_unlock(&pinctrl_mutex); |
b2b3e66e SW |
646 | |
647 | return p; | |
648 | } | |
befe5bdf LW |
649 | EXPORT_SYMBOL_GPL(pinctrl_get); |
650 | ||
6e5e959d | 651 | static void pinctrl_put_locked(struct pinctrl *p, bool inlist) |
befe5bdf | 652 | { |
6e5e959d SW |
653 | struct pinctrl_state *state, *n1; |
654 | struct pinctrl_setting *setting, *n2; | |
655 | ||
656 | list_for_each_entry_safe(state, n1, &p->states, node) { | |
657 | list_for_each_entry_safe(setting, n2, &state->settings, node) { | |
1e2082b5 SW |
658 | switch (setting->type) { |
659 | case PIN_MAP_TYPE_MUX_GROUP: | |
660 | if (state == p->state) | |
661 | pinmux_disable_setting(setting); | |
662 | pinmux_free_setting(setting); | |
663 | break; | |
664 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
665 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
666 | pinconf_free_setting(setting); | |
667 | break; | |
668 | default: | |
669 | break; | |
670 | } | |
6e5e959d SW |
671 | list_del(&setting->node); |
672 | kfree(setting); | |
673 | } | |
674 | list_del(&state->node); | |
675 | kfree(state); | |
7ecdb16f | 676 | } |
befe5bdf | 677 | |
57291ce2 SW |
678 | pinctrl_dt_free_maps(p); |
679 | ||
6e5e959d SW |
680 | if (inlist) |
681 | list_del(&p->node); | |
befe5bdf LW |
682 | kfree(p); |
683 | } | |
befe5bdf LW |
684 | |
685 | /** | |
6e5e959d SW |
686 | * pinctrl_put() - release a previously claimed pinctrl handle |
687 | * @p: the pinctrl handle to release | |
befe5bdf | 688 | */ |
57b676f9 SW |
689 | void pinctrl_put(struct pinctrl *p) |
690 | { | |
691 | mutex_lock(&pinctrl_mutex); | |
6e5e959d | 692 | pinctrl_put_locked(p, true); |
57b676f9 SW |
693 | mutex_unlock(&pinctrl_mutex); |
694 | } | |
695 | EXPORT_SYMBOL_GPL(pinctrl_put); | |
696 | ||
6e5e959d SW |
697 | static struct pinctrl_state *pinctrl_lookup_state_locked(struct pinctrl *p, |
698 | const char *name) | |
befe5bdf | 699 | { |
6e5e959d | 700 | struct pinctrl_state *state; |
befe5bdf | 701 | |
6e5e959d SW |
702 | state = find_state(p, name); |
703 | if (!state) | |
704 | return ERR_PTR(-ENODEV); | |
57b676f9 | 705 | |
6e5e959d | 706 | return state; |
befe5bdf | 707 | } |
befe5bdf LW |
708 | |
709 | /** | |
6e5e959d SW |
710 | * pinctrl_lookup_state() - retrieves a state handle from a pinctrl handle |
711 | * @p: the pinctrl handle to retrieve the state from | |
712 | * @name: the state name to retrieve | |
befe5bdf | 713 | */ |
6e5e959d | 714 | struct pinctrl_state *pinctrl_lookup_state(struct pinctrl *p, const char *name) |
57b676f9 | 715 | { |
6e5e959d SW |
716 | struct pinctrl_state *s; |
717 | ||
57b676f9 | 718 | mutex_lock(&pinctrl_mutex); |
6e5e959d | 719 | s = pinctrl_lookup_state_locked(p, name); |
57b676f9 | 720 | mutex_unlock(&pinctrl_mutex); |
6e5e959d SW |
721 | |
722 | return s; | |
57b676f9 | 723 | } |
6e5e959d | 724 | EXPORT_SYMBOL_GPL(pinctrl_lookup_state); |
57b676f9 | 725 | |
6e5e959d SW |
726 | static int pinctrl_select_state_locked(struct pinctrl *p, |
727 | struct pinctrl_state *state) | |
befe5bdf | 728 | { |
6e5e959d SW |
729 | struct pinctrl_setting *setting, *setting2; |
730 | int ret; | |
7ecdb16f | 731 | |
6e5e959d SW |
732 | if (p->state == state) |
733 | return 0; | |
befe5bdf | 734 | |
6e5e959d SW |
735 | if (p->state) { |
736 | /* | |
737 | * The set of groups with a mux configuration in the old state | |
738 | * may not be identical to the set of groups with a mux setting | |
739 | * in the new state. While this might be unusual, it's entirely | |
740 | * possible for the "user"-supplied mapping table to be written | |
741 | * that way. For each group that was configured in the old state | |
742 | * but not in the new state, this code puts that group into a | |
743 | * safe/disabled state. | |
744 | */ | |
745 | list_for_each_entry(setting, &p->state->settings, node) { | |
746 | bool found = false; | |
1e2082b5 SW |
747 | if (setting->type != PIN_MAP_TYPE_MUX_GROUP) |
748 | continue; | |
6e5e959d | 749 | list_for_each_entry(setting2, &state->settings, node) { |
1e2082b5 SW |
750 | if (setting2->type != PIN_MAP_TYPE_MUX_GROUP) |
751 | continue; | |
752 | if (setting2->data.mux.group == | |
753 | setting->data.mux.group) { | |
6e5e959d SW |
754 | found = true; |
755 | break; | |
756 | } | |
757 | } | |
758 | if (!found) | |
759 | pinmux_disable_setting(setting); | |
760 | } | |
761 | } | |
762 | ||
763 | p->state = state; | |
764 | ||
765 | /* Apply all the settings for the new state */ | |
766 | list_for_each_entry(setting, &state->settings, node) { | |
1e2082b5 SW |
767 | switch (setting->type) { |
768 | case PIN_MAP_TYPE_MUX_GROUP: | |
769 | ret = pinmux_enable_setting(setting); | |
770 | break; | |
771 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
772 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
773 | ret = pinconf_apply_setting(setting); | |
774 | break; | |
775 | default: | |
776 | ret = -EINVAL; | |
777 | break; | |
778 | } | |
6e5e959d SW |
779 | if (ret < 0) { |
780 | /* FIXME: Difficult to return to prev state */ | |
781 | return ret; | |
782 | } | |
befe5bdf | 783 | } |
6e5e959d SW |
784 | |
785 | return 0; | |
57b676f9 SW |
786 | } |
787 | ||
788 | /** | |
6e5e959d SW |
789 | * pinctrl_select() - select/activate/program a pinctrl state to HW |
790 | * @p: the pinctrl handle for the device that requests configuratio | |
791 | * @state: the state handle to select/activate/program | |
57b676f9 | 792 | */ |
6e5e959d | 793 | int pinctrl_select_state(struct pinctrl *p, struct pinctrl_state *state) |
57b676f9 | 794 | { |
6e5e959d SW |
795 | int ret; |
796 | ||
57b676f9 | 797 | mutex_lock(&pinctrl_mutex); |
6e5e959d | 798 | ret = pinctrl_select_state_locked(p, state); |
57b676f9 | 799 | mutex_unlock(&pinctrl_mutex); |
6e5e959d SW |
800 | |
801 | return ret; | |
befe5bdf | 802 | } |
6e5e959d | 803 | EXPORT_SYMBOL_GPL(pinctrl_select_state); |
befe5bdf | 804 | |
6d4ca1fb SW |
805 | static void devm_pinctrl_release(struct device *dev, void *res) |
806 | { | |
807 | pinctrl_put(*(struct pinctrl **)res); | |
808 | } | |
809 | ||
810 | /** | |
811 | * struct devm_pinctrl_get() - Resource managed pinctrl_get() | |
812 | * @dev: the device to obtain the handle for | |
813 | * | |
814 | * If there is a need to explicitly destroy the returned struct pinctrl, | |
815 | * devm_pinctrl_put() should be used, rather than plain pinctrl_put(). | |
816 | */ | |
817 | struct pinctrl *devm_pinctrl_get(struct device *dev) | |
818 | { | |
819 | struct pinctrl **ptr, *p; | |
820 | ||
821 | ptr = devres_alloc(devm_pinctrl_release, sizeof(*ptr), GFP_KERNEL); | |
822 | if (!ptr) | |
823 | return ERR_PTR(-ENOMEM); | |
824 | ||
825 | p = pinctrl_get(dev); | |
826 | if (!IS_ERR(p)) { | |
827 | *ptr = p; | |
828 | devres_add(dev, ptr); | |
829 | } else { | |
830 | devres_free(ptr); | |
831 | } | |
832 | ||
833 | return p; | |
834 | } | |
835 | EXPORT_SYMBOL_GPL(devm_pinctrl_get); | |
836 | ||
837 | static int devm_pinctrl_match(struct device *dev, void *res, void *data) | |
838 | { | |
839 | struct pinctrl **p = res; | |
840 | ||
841 | return *p == data; | |
842 | } | |
843 | ||
844 | /** | |
845 | * devm_pinctrl_put() - Resource managed pinctrl_put() | |
846 | * @p: the pinctrl handle to release | |
847 | * | |
848 | * Deallocate a struct pinctrl obtained via devm_pinctrl_get(). Normally | |
849 | * this function will not need to be called and the resource management | |
850 | * code will ensure that the resource is freed. | |
851 | */ | |
852 | void devm_pinctrl_put(struct pinctrl *p) | |
853 | { | |
854 | WARN_ON(devres_destroy(p->dev, devm_pinctrl_release, | |
855 | devm_pinctrl_match, p)); | |
856 | pinctrl_put(p); | |
857 | } | |
858 | EXPORT_SYMBOL_GPL(devm_pinctrl_put); | |
859 | ||
57291ce2 SW |
860 | int pinctrl_register_map(struct pinctrl_map const *maps, unsigned num_maps, |
861 | bool dup, bool locked) | |
befe5bdf | 862 | { |
1e2082b5 | 863 | int i, ret; |
b2b3e66e | 864 | struct pinctrl_maps *maps_node; |
befe5bdf LW |
865 | |
866 | pr_debug("add %d pinmux maps\n", num_maps); | |
867 | ||
868 | /* First sanity check the new mapping */ | |
869 | for (i = 0; i < num_maps; i++) { | |
1e2082b5 SW |
870 | if (!maps[i].dev_name) { |
871 | pr_err("failed to register map %s (%d): no device given\n", | |
872 | maps[i].name, i); | |
873 | return -EINVAL; | |
874 | } | |
875 | ||
befe5bdf LW |
876 | if (!maps[i].name) { |
877 | pr_err("failed to register map %d: no map name given\n", | |
95dcd4ae | 878 | i); |
befe5bdf LW |
879 | return -EINVAL; |
880 | } | |
881 | ||
1e2082b5 SW |
882 | if (maps[i].type != PIN_MAP_TYPE_DUMMY_STATE && |
883 | !maps[i].ctrl_dev_name) { | |
befe5bdf LW |
884 | pr_err("failed to register map %s (%d): no pin control device given\n", |
885 | maps[i].name, i); | |
886 | return -EINVAL; | |
887 | } | |
888 | ||
1e2082b5 SW |
889 | switch (maps[i].type) { |
890 | case PIN_MAP_TYPE_DUMMY_STATE: | |
891 | break; | |
892 | case PIN_MAP_TYPE_MUX_GROUP: | |
893 | ret = pinmux_validate_map(&maps[i], i); | |
894 | if (ret < 0) | |
895 | return 0; | |
896 | break; | |
897 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
898 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
899 | ret = pinconf_validate_map(&maps[i], i); | |
900 | if (ret < 0) | |
901 | return 0; | |
902 | break; | |
903 | default: | |
904 | pr_err("failed to register map %s (%d): invalid type given\n", | |
95dcd4ae | 905 | maps[i].name, i); |
1681f5ae SW |
906 | return -EINVAL; |
907 | } | |
befe5bdf LW |
908 | } |
909 | ||
b2b3e66e SW |
910 | maps_node = kzalloc(sizeof(*maps_node), GFP_KERNEL); |
911 | if (!maps_node) { | |
912 | pr_err("failed to alloc struct pinctrl_maps\n"); | |
913 | return -ENOMEM; | |
914 | } | |
befe5bdf | 915 | |
b2b3e66e | 916 | maps_node->num_maps = num_maps; |
57291ce2 SW |
917 | if (dup) { |
918 | maps_node->maps = kmemdup(maps, sizeof(*maps) * num_maps, | |
919 | GFP_KERNEL); | |
920 | if (!maps_node->maps) { | |
921 | pr_err("failed to duplicate mapping table\n"); | |
922 | kfree(maps_node); | |
923 | return -ENOMEM; | |
924 | } | |
925 | } else { | |
926 | maps_node->maps = maps; | |
befe5bdf LW |
927 | } |
928 | ||
57291ce2 SW |
929 | if (!locked) |
930 | mutex_lock(&pinctrl_mutex); | |
b2b3e66e | 931 | list_add_tail(&maps_node->node, &pinctrl_maps); |
57291ce2 SW |
932 | if (!locked) |
933 | mutex_unlock(&pinctrl_mutex); | |
b2b3e66e | 934 | |
befe5bdf LW |
935 | return 0; |
936 | } | |
937 | ||
57291ce2 SW |
938 | /** |
939 | * pinctrl_register_mappings() - register a set of pin controller mappings | |
940 | * @maps: the pincontrol mappings table to register. This should probably be | |
941 | * marked with __initdata so it can be discarded after boot. This | |
942 | * function will perform a shallow copy for the mapping entries. | |
943 | * @num_maps: the number of maps in the mapping table | |
944 | */ | |
945 | int pinctrl_register_mappings(struct pinctrl_map const *maps, | |
946 | unsigned num_maps) | |
947 | { | |
948 | return pinctrl_register_map(maps, num_maps, true, false); | |
949 | } | |
950 | ||
951 | void pinctrl_unregister_map(struct pinctrl_map const *map) | |
952 | { | |
953 | struct pinctrl_maps *maps_node; | |
954 | ||
955 | list_for_each_entry(maps_node, &pinctrl_maps, node) { | |
956 | if (maps_node->maps == map) { | |
957 | list_del(&maps_node->node); | |
958 | return; | |
959 | } | |
960 | } | |
961 | } | |
962 | ||
2744e8af LW |
963 | #ifdef CONFIG_DEBUG_FS |
964 | ||
965 | static int pinctrl_pins_show(struct seq_file *s, void *what) | |
966 | { | |
967 | struct pinctrl_dev *pctldev = s->private; | |
968 | const struct pinctrl_ops *ops = pctldev->desc->pctlops; | |
706e8520 | 969 | unsigned i, pin; |
2744e8af LW |
970 | |
971 | seq_printf(s, "registered pins: %d\n", pctldev->desc->npins); | |
2744e8af | 972 | |
57b676f9 SW |
973 | mutex_lock(&pinctrl_mutex); |
974 | ||
706e8520 CP |
975 | /* The pin number can be retrived from the pin controller descriptor */ |
976 | for (i = 0; i < pctldev->desc->npins; i++) { | |
2744e8af LW |
977 | struct pin_desc *desc; |
978 | ||
706e8520 | 979 | pin = pctldev->desc->pins[i].number; |
2744e8af LW |
980 | desc = pin_desc_get(pctldev, pin); |
981 | /* Pin space may be sparse */ | |
982 | if (desc == NULL) | |
983 | continue; | |
984 | ||
985 | seq_printf(s, "pin %d (%s) ", pin, | |
986 | desc->name ? desc->name : "unnamed"); | |
987 | ||
988 | /* Driver-specific info per pin */ | |
989 | if (ops->pin_dbg_show) | |
990 | ops->pin_dbg_show(pctldev, s, pin); | |
991 | ||
992 | seq_puts(s, "\n"); | |
993 | } | |
994 | ||
57b676f9 SW |
995 | mutex_unlock(&pinctrl_mutex); |
996 | ||
2744e8af LW |
997 | return 0; |
998 | } | |
999 | ||
1000 | static int pinctrl_groups_show(struct seq_file *s, void *what) | |
1001 | { | |
1002 | struct pinctrl_dev *pctldev = s->private; | |
1003 | const struct pinctrl_ops *ops = pctldev->desc->pctlops; | |
d1e90e9e | 1004 | unsigned ngroups, selector = 0; |
2744e8af | 1005 | |
d1e90e9e | 1006 | ngroups = ops->get_groups_count(pctldev); |
57b676f9 SW |
1007 | mutex_lock(&pinctrl_mutex); |
1008 | ||
2744e8af | 1009 | seq_puts(s, "registered pin groups:\n"); |
d1e90e9e | 1010 | while (selector < ngroups) { |
a5818a8b | 1011 | const unsigned *pins; |
2744e8af LW |
1012 | unsigned num_pins; |
1013 | const char *gname = ops->get_group_name(pctldev, selector); | |
1014 | int ret; | |
1015 | int i; | |
1016 | ||
1017 | ret = ops->get_group_pins(pctldev, selector, | |
1018 | &pins, &num_pins); | |
1019 | if (ret) | |
1020 | seq_printf(s, "%s [ERROR GETTING PINS]\n", | |
1021 | gname); | |
1022 | else { | |
1023 | seq_printf(s, "group: %s, pins = [ ", gname); | |
1024 | for (i = 0; i < num_pins; i++) | |
1025 | seq_printf(s, "%d ", pins[i]); | |
1026 | seq_puts(s, "]\n"); | |
1027 | } | |
1028 | selector++; | |
1029 | } | |
1030 | ||
57b676f9 | 1031 | mutex_unlock(&pinctrl_mutex); |
2744e8af LW |
1032 | |
1033 | return 0; | |
1034 | } | |
1035 | ||
1036 | static int pinctrl_gpioranges_show(struct seq_file *s, void *what) | |
1037 | { | |
1038 | struct pinctrl_dev *pctldev = s->private; | |
1039 | struct pinctrl_gpio_range *range = NULL; | |
1040 | ||
1041 | seq_puts(s, "GPIO ranges handled:\n"); | |
1042 | ||
57b676f9 SW |
1043 | mutex_lock(&pinctrl_mutex); |
1044 | ||
2744e8af | 1045 | /* Loop over the ranges */ |
2744e8af | 1046 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { |
75d6642a LW |
1047 | seq_printf(s, "%u: %s GPIOS [%u - %u] PINS [%u - %u]\n", |
1048 | range->id, range->name, | |
1049 | range->base, (range->base + range->npins - 1), | |
1050 | range->pin_base, | |
1051 | (range->pin_base + range->npins - 1)); | |
2744e8af | 1052 | } |
57b676f9 SW |
1053 | |
1054 | mutex_unlock(&pinctrl_mutex); | |
2744e8af LW |
1055 | |
1056 | return 0; | |
1057 | } | |
1058 | ||
1059 | static int pinctrl_devices_show(struct seq_file *s, void *what) | |
1060 | { | |
1061 | struct pinctrl_dev *pctldev; | |
1062 | ||
ae6b4d85 | 1063 | seq_puts(s, "name [pinmux] [pinconf]\n"); |
57b676f9 SW |
1064 | |
1065 | mutex_lock(&pinctrl_mutex); | |
1066 | ||
2744e8af LW |
1067 | list_for_each_entry(pctldev, &pinctrldev_list, node) { |
1068 | seq_printf(s, "%s ", pctldev->desc->name); | |
1069 | if (pctldev->desc->pmxops) | |
ae6b4d85 LW |
1070 | seq_puts(s, "yes "); |
1071 | else | |
1072 | seq_puts(s, "no "); | |
1073 | if (pctldev->desc->confops) | |
2744e8af LW |
1074 | seq_puts(s, "yes"); |
1075 | else | |
1076 | seq_puts(s, "no"); | |
1077 | seq_puts(s, "\n"); | |
1078 | } | |
57b676f9 SW |
1079 | |
1080 | mutex_unlock(&pinctrl_mutex); | |
2744e8af LW |
1081 | |
1082 | return 0; | |
1083 | } | |
1084 | ||
1e2082b5 SW |
1085 | static inline const char *map_type(enum pinctrl_map_type type) |
1086 | { | |
1087 | static const char * const names[] = { | |
1088 | "INVALID", | |
1089 | "DUMMY_STATE", | |
1090 | "MUX_GROUP", | |
1091 | "CONFIGS_PIN", | |
1092 | "CONFIGS_GROUP", | |
1093 | }; | |
1094 | ||
1095 | if (type >= ARRAY_SIZE(names)) | |
1096 | return "UNKNOWN"; | |
1097 | ||
1098 | return names[type]; | |
1099 | } | |
1100 | ||
3eedb437 SW |
1101 | static int pinctrl_maps_show(struct seq_file *s, void *what) |
1102 | { | |
1103 | struct pinctrl_maps *maps_node; | |
1104 | int i; | |
1105 | struct pinctrl_map const *map; | |
1106 | ||
1107 | seq_puts(s, "Pinctrl maps:\n"); | |
1108 | ||
57b676f9 SW |
1109 | mutex_lock(&pinctrl_mutex); |
1110 | ||
3eedb437 | 1111 | for_each_maps(maps_node, i, map) { |
1e2082b5 SW |
1112 | seq_printf(s, "device %s\nstate %s\ntype %s (%d)\n", |
1113 | map->dev_name, map->name, map_type(map->type), | |
1114 | map->type); | |
1115 | ||
1116 | if (map->type != PIN_MAP_TYPE_DUMMY_STATE) | |
1117 | seq_printf(s, "controlling device %s\n", | |
1118 | map->ctrl_dev_name); | |
1119 | ||
1120 | switch (map->type) { | |
1121 | case PIN_MAP_TYPE_MUX_GROUP: | |
1122 | pinmux_show_map(s, map); | |
1123 | break; | |
1124 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1125 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1126 | pinconf_show_map(s, map); | |
1127 | break; | |
1128 | default: | |
1129 | break; | |
1130 | } | |
1131 | ||
1132 | seq_printf(s, "\n"); | |
3eedb437 | 1133 | } |
57b676f9 SW |
1134 | |
1135 | mutex_unlock(&pinctrl_mutex); | |
3eedb437 SW |
1136 | |
1137 | return 0; | |
1138 | } | |
1139 | ||
befe5bdf LW |
1140 | static int pinctrl_show(struct seq_file *s, void *what) |
1141 | { | |
1142 | struct pinctrl *p; | |
6e5e959d | 1143 | struct pinctrl_state *state; |
7ecdb16f | 1144 | struct pinctrl_setting *setting; |
befe5bdf LW |
1145 | |
1146 | seq_puts(s, "Requested pin control handlers their pinmux maps:\n"); | |
57b676f9 SW |
1147 | |
1148 | mutex_lock(&pinctrl_mutex); | |
1149 | ||
befe5bdf | 1150 | list_for_each_entry(p, &pinctrl_list, node) { |
6e5e959d SW |
1151 | seq_printf(s, "device: %s current state: %s\n", |
1152 | dev_name(p->dev), | |
1153 | p->state ? p->state->name : "none"); | |
1154 | ||
1155 | list_for_each_entry(state, &p->states, node) { | |
1156 | seq_printf(s, " state: %s\n", state->name); | |
befe5bdf | 1157 | |
6e5e959d | 1158 | list_for_each_entry(setting, &state->settings, node) { |
1e2082b5 SW |
1159 | struct pinctrl_dev *pctldev = setting->pctldev; |
1160 | ||
1161 | seq_printf(s, " type: %s controller %s ", | |
1162 | map_type(setting->type), | |
1163 | pinctrl_dev_get_name(pctldev)); | |
1164 | ||
1165 | switch (setting->type) { | |
1166 | case PIN_MAP_TYPE_MUX_GROUP: | |
1167 | pinmux_show_setting(s, setting); | |
1168 | break; | |
1169 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1170 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1171 | pinconf_show_setting(s, setting); | |
1172 | break; | |
1173 | default: | |
1174 | break; | |
1175 | } | |
6e5e959d | 1176 | } |
befe5bdf | 1177 | } |
befe5bdf LW |
1178 | } |
1179 | ||
57b676f9 SW |
1180 | mutex_unlock(&pinctrl_mutex); |
1181 | ||
befe5bdf LW |
1182 | return 0; |
1183 | } | |
1184 | ||
2744e8af LW |
1185 | static int pinctrl_pins_open(struct inode *inode, struct file *file) |
1186 | { | |
1187 | return single_open(file, pinctrl_pins_show, inode->i_private); | |
1188 | } | |
1189 | ||
1190 | static int pinctrl_groups_open(struct inode *inode, struct file *file) | |
1191 | { | |
1192 | return single_open(file, pinctrl_groups_show, inode->i_private); | |
1193 | } | |
1194 | ||
1195 | static int pinctrl_gpioranges_open(struct inode *inode, struct file *file) | |
1196 | { | |
1197 | return single_open(file, pinctrl_gpioranges_show, inode->i_private); | |
1198 | } | |
1199 | ||
1200 | static int pinctrl_devices_open(struct inode *inode, struct file *file) | |
1201 | { | |
1202 | return single_open(file, pinctrl_devices_show, NULL); | |
1203 | } | |
1204 | ||
3eedb437 SW |
1205 | static int pinctrl_maps_open(struct inode *inode, struct file *file) |
1206 | { | |
1207 | return single_open(file, pinctrl_maps_show, NULL); | |
1208 | } | |
1209 | ||
befe5bdf LW |
1210 | static int pinctrl_open(struct inode *inode, struct file *file) |
1211 | { | |
1212 | return single_open(file, pinctrl_show, NULL); | |
1213 | } | |
1214 | ||
2744e8af LW |
1215 | static const struct file_operations pinctrl_pins_ops = { |
1216 | .open = pinctrl_pins_open, | |
1217 | .read = seq_read, | |
1218 | .llseek = seq_lseek, | |
1219 | .release = single_release, | |
1220 | }; | |
1221 | ||
1222 | static const struct file_operations pinctrl_groups_ops = { | |
1223 | .open = pinctrl_groups_open, | |
1224 | .read = seq_read, | |
1225 | .llseek = seq_lseek, | |
1226 | .release = single_release, | |
1227 | }; | |
1228 | ||
1229 | static const struct file_operations pinctrl_gpioranges_ops = { | |
1230 | .open = pinctrl_gpioranges_open, | |
1231 | .read = seq_read, | |
1232 | .llseek = seq_lseek, | |
1233 | .release = single_release, | |
1234 | }; | |
1235 | ||
3eedb437 SW |
1236 | static const struct file_operations pinctrl_devices_ops = { |
1237 | .open = pinctrl_devices_open, | |
befe5bdf LW |
1238 | .read = seq_read, |
1239 | .llseek = seq_lseek, | |
1240 | .release = single_release, | |
1241 | }; | |
1242 | ||
3eedb437 SW |
1243 | static const struct file_operations pinctrl_maps_ops = { |
1244 | .open = pinctrl_maps_open, | |
2744e8af LW |
1245 | .read = seq_read, |
1246 | .llseek = seq_lseek, | |
1247 | .release = single_release, | |
1248 | }; | |
1249 | ||
befe5bdf LW |
1250 | static const struct file_operations pinctrl_ops = { |
1251 | .open = pinctrl_open, | |
1252 | .read = seq_read, | |
1253 | .llseek = seq_lseek, | |
1254 | .release = single_release, | |
1255 | }; | |
1256 | ||
2744e8af LW |
1257 | static struct dentry *debugfs_root; |
1258 | ||
1259 | static void pinctrl_init_device_debugfs(struct pinctrl_dev *pctldev) | |
1260 | { | |
02157160 | 1261 | struct dentry *device_root; |
2744e8af | 1262 | |
51cd24ee | 1263 | device_root = debugfs_create_dir(dev_name(pctldev->dev), |
2744e8af | 1264 | debugfs_root); |
02157160 TL |
1265 | pctldev->device_root = device_root; |
1266 | ||
2744e8af LW |
1267 | if (IS_ERR(device_root) || !device_root) { |
1268 | pr_warn("failed to create debugfs directory for %s\n", | |
51cd24ee | 1269 | dev_name(pctldev->dev)); |
2744e8af LW |
1270 | return; |
1271 | } | |
1272 | debugfs_create_file("pins", S_IFREG | S_IRUGO, | |
1273 | device_root, pctldev, &pinctrl_pins_ops); | |
1274 | debugfs_create_file("pingroups", S_IFREG | S_IRUGO, | |
1275 | device_root, pctldev, &pinctrl_groups_ops); | |
1276 | debugfs_create_file("gpio-ranges", S_IFREG | S_IRUGO, | |
1277 | device_root, pctldev, &pinctrl_gpioranges_ops); | |
1278 | pinmux_init_device_debugfs(device_root, pctldev); | |
ae6b4d85 | 1279 | pinconf_init_device_debugfs(device_root, pctldev); |
2744e8af LW |
1280 | } |
1281 | ||
02157160 TL |
1282 | static void pinctrl_remove_device_debugfs(struct pinctrl_dev *pctldev) |
1283 | { | |
1284 | debugfs_remove_recursive(pctldev->device_root); | |
1285 | } | |
1286 | ||
2744e8af LW |
1287 | static void pinctrl_init_debugfs(void) |
1288 | { | |
1289 | debugfs_root = debugfs_create_dir("pinctrl", NULL); | |
1290 | if (IS_ERR(debugfs_root) || !debugfs_root) { | |
1291 | pr_warn("failed to create debugfs directory\n"); | |
1292 | debugfs_root = NULL; | |
1293 | return; | |
1294 | } | |
1295 | ||
1296 | debugfs_create_file("pinctrl-devices", S_IFREG | S_IRUGO, | |
1297 | debugfs_root, NULL, &pinctrl_devices_ops); | |
3eedb437 SW |
1298 | debugfs_create_file("pinctrl-maps", S_IFREG | S_IRUGO, |
1299 | debugfs_root, NULL, &pinctrl_maps_ops); | |
befe5bdf LW |
1300 | debugfs_create_file("pinctrl-handles", S_IFREG | S_IRUGO, |
1301 | debugfs_root, NULL, &pinctrl_ops); | |
2744e8af LW |
1302 | } |
1303 | ||
1304 | #else /* CONFIG_DEBUG_FS */ | |
1305 | ||
1306 | static void pinctrl_init_device_debugfs(struct pinctrl_dev *pctldev) | |
1307 | { | |
1308 | } | |
1309 | ||
1310 | static void pinctrl_init_debugfs(void) | |
1311 | { | |
1312 | } | |
1313 | ||
02157160 TL |
1314 | static void pinctrl_remove_device_debugfs(struct pinctrl_dev *pctldev) |
1315 | { | |
1316 | } | |
1317 | ||
2744e8af LW |
1318 | #endif |
1319 | ||
d26bc49f SW |
1320 | static int pinctrl_check_ops(struct pinctrl_dev *pctldev) |
1321 | { | |
1322 | const struct pinctrl_ops *ops = pctldev->desc->pctlops; | |
1323 | ||
1324 | if (!ops || | |
d1e90e9e | 1325 | !ops->get_groups_count || |
d26bc49f SW |
1326 | !ops->get_group_name || |
1327 | !ops->get_group_pins) | |
1328 | return -EINVAL; | |
1329 | ||
57291ce2 SW |
1330 | if (ops->dt_node_to_map && !ops->dt_free_map) |
1331 | return -EINVAL; | |
1332 | ||
d26bc49f SW |
1333 | return 0; |
1334 | } | |
1335 | ||
2744e8af LW |
1336 | /** |
1337 | * pinctrl_register() - register a pin controller device | |
1338 | * @pctldesc: descriptor for this pin controller | |
1339 | * @dev: parent device for this pin controller | |
1340 | * @driver_data: private pin controller data for this pin controller | |
1341 | */ | |
1342 | struct pinctrl_dev *pinctrl_register(struct pinctrl_desc *pctldesc, | |
1343 | struct device *dev, void *driver_data) | |
1344 | { | |
2744e8af LW |
1345 | struct pinctrl_dev *pctldev; |
1346 | int ret; | |
1347 | ||
1348 | if (pctldesc == NULL) | |
1349 | return NULL; | |
1350 | if (pctldesc->name == NULL) | |
1351 | return NULL; | |
1352 | ||
02f5b989 | 1353 | pctldev = kzalloc(sizeof(*pctldev), GFP_KERNEL); |
95dcd4ae SW |
1354 | if (pctldev == NULL) { |
1355 | dev_err(dev, "failed to alloc struct pinctrl_dev\n"); | |
b9130b77 | 1356 | return NULL; |
95dcd4ae | 1357 | } |
b9130b77 TL |
1358 | |
1359 | /* Initialize pin control device struct */ | |
1360 | pctldev->owner = pctldesc->owner; | |
1361 | pctldev->desc = pctldesc; | |
1362 | pctldev->driver_data = driver_data; | |
1363 | INIT_RADIX_TREE(&pctldev->pin_desc_tree, GFP_KERNEL); | |
b9130b77 | 1364 | INIT_LIST_HEAD(&pctldev->gpio_ranges); |
b9130b77 TL |
1365 | pctldev->dev = dev; |
1366 | ||
d26bc49f SW |
1367 | /* check core ops for sanity */ |
1368 | ret = pinctrl_check_ops(pctldev); | |
1369 | if (ret) { | |
1370 | pr_err("%s pinctrl ops lacks necessary functions\n", | |
1371 | pctldesc->name); | |
1372 | goto out_err; | |
1373 | } | |
1374 | ||
2744e8af LW |
1375 | /* If we're implementing pinmuxing, check the ops for sanity */ |
1376 | if (pctldesc->pmxops) { | |
b9130b77 | 1377 | ret = pinmux_check_ops(pctldev); |
2744e8af LW |
1378 | if (ret) { |
1379 | pr_err("%s pinmux ops lacks necessary functions\n", | |
1380 | pctldesc->name); | |
b9130b77 | 1381 | goto out_err; |
2744e8af LW |
1382 | } |
1383 | } | |
1384 | ||
ae6b4d85 LW |
1385 | /* If we're implementing pinconfig, check the ops for sanity */ |
1386 | if (pctldesc->confops) { | |
b9130b77 | 1387 | ret = pinconf_check_ops(pctldev); |
ae6b4d85 LW |
1388 | if (ret) { |
1389 | pr_err("%s pin config ops lacks necessary functions\n", | |
1390 | pctldesc->name); | |
b9130b77 | 1391 | goto out_err; |
ae6b4d85 LW |
1392 | } |
1393 | } | |
1394 | ||
2744e8af LW |
1395 | /* Register all the pins */ |
1396 | pr_debug("try to register %d pins on %s...\n", | |
1397 | pctldesc->npins, pctldesc->name); | |
1398 | ret = pinctrl_register_pins(pctldev, pctldesc->pins, pctldesc->npins); | |
1399 | if (ret) { | |
1400 | pr_err("error during pin registration\n"); | |
1401 | pinctrl_free_pindescs(pctldev, pctldesc->pins, | |
1402 | pctldesc->npins); | |
51cd24ee | 1403 | goto out_err; |
2744e8af LW |
1404 | } |
1405 | ||
57b676f9 SW |
1406 | mutex_lock(&pinctrl_mutex); |
1407 | ||
8b9c139f | 1408 | list_add_tail(&pctldev->node, &pinctrldev_list); |
57b676f9 | 1409 | |
6e5e959d SW |
1410 | pctldev->p = pinctrl_get_locked(pctldev->dev); |
1411 | if (!IS_ERR(pctldev->p)) { | |
1412 | struct pinctrl_state *s = | |
1413 | pinctrl_lookup_state_locked(pctldev->p, | |
1414 | PINCTRL_STATE_DEFAULT); | |
1415 | if (!IS_ERR(s)) | |
1416 | pinctrl_select_state_locked(pctldev->p, s); | |
1417 | } | |
57b676f9 SW |
1418 | |
1419 | mutex_unlock(&pinctrl_mutex); | |
1420 | ||
2304b473 SW |
1421 | pinctrl_init_device_debugfs(pctldev); |
1422 | ||
2744e8af LW |
1423 | return pctldev; |
1424 | ||
51cd24ee SW |
1425 | out_err: |
1426 | kfree(pctldev); | |
2744e8af LW |
1427 | return NULL; |
1428 | } | |
1429 | EXPORT_SYMBOL_GPL(pinctrl_register); | |
1430 | ||
1431 | /** | |
1432 | * pinctrl_unregister() - unregister pinmux | |
1433 | * @pctldev: pin controller to unregister | |
1434 | * | |
1435 | * Called by pinmux drivers to unregister a pinmux. | |
1436 | */ | |
1437 | void pinctrl_unregister(struct pinctrl_dev *pctldev) | |
1438 | { | |
1439 | if (pctldev == NULL) | |
1440 | return; | |
1441 | ||
02157160 | 1442 | pinctrl_remove_device_debugfs(pctldev); |
57b676f9 SW |
1443 | |
1444 | mutex_lock(&pinctrl_mutex); | |
1445 | ||
6e5e959d SW |
1446 | if (!IS_ERR(pctldev->p)) |
1447 | pinctrl_put_locked(pctldev->p, true); | |
57b676f9 | 1448 | |
2744e8af | 1449 | /* TODO: check that no pinmuxes are still active? */ |
2744e8af | 1450 | list_del(&pctldev->node); |
2744e8af LW |
1451 | /* Destroy descriptor tree */ |
1452 | pinctrl_free_pindescs(pctldev, pctldev->desc->pins, | |
1453 | pctldev->desc->npins); | |
51cd24ee | 1454 | kfree(pctldev); |
57b676f9 SW |
1455 | |
1456 | mutex_unlock(&pinctrl_mutex); | |
2744e8af LW |
1457 | } |
1458 | EXPORT_SYMBOL_GPL(pinctrl_unregister); | |
1459 | ||
1460 | static int __init pinctrl_init(void) | |
1461 | { | |
1462 | pr_info("initialized pinctrl subsystem\n"); | |
1463 | pinctrl_init_debugfs(); | |
1464 | return 0; | |
1465 | } | |
1466 | ||
1467 | /* init early since many drivers really need to initialized pinmux early */ | |
1468 | core_initcall(pinctrl_init); |