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Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * Routines for control of the CS8427 via i2c bus | |
3 | * IEC958 (S/PDIF) receiver & transmitter by Cirrus Logic | |
c1017a4c | 4 | * Copyright (c) by Jaroslav Kysela <[email protected]> |
1da177e4 LT |
5 | * |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; either version 2 of the License, or | |
10 | * (at your option) any later version. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, write to the Free Software | |
19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
20 | * | |
21 | */ | |
22 | ||
1da177e4 LT |
23 | #include <linux/slab.h> |
24 | #include <linux/delay.h> | |
25 | #include <linux/init.h> | |
401de818 | 26 | #include <linux/bitrev.h> |
da155d5b | 27 | #include <linux/module.h> |
48008b59 | 28 | #include <asm/unaligned.h> |
1da177e4 LT |
29 | #include <sound/core.h> |
30 | #include <sound/control.h> | |
31 | #include <sound/pcm.h> | |
32 | #include <sound/cs8427.h> | |
33 | #include <sound/asoundef.h> | |
34 | ||
97f02e05 | 35 | static void snd_cs8427_reset(struct snd_i2c_device *cs8427); |
1da177e4 | 36 | |
c1017a4c | 37 | MODULE_AUTHOR("Jaroslav Kysela <[email protected]>"); |
1da177e4 LT |
38 | MODULE_DESCRIPTION("IEC958 (S/PDIF) receiver & transmitter by Cirrus Logic"); |
39 | MODULE_LICENSE("GPL"); | |
40 | ||
41 | #define CS8427_ADDR (0x20>>1) /* fixed address */ | |
42 | ||
97f02e05 TI |
43 | struct cs8427_stream { |
44 | struct snd_pcm_substream *substream; | |
1da177e4 LT |
45 | char hw_status[24]; /* hardware status */ |
46 | char def_status[24]; /* default status */ | |
47 | char pcm_status[24]; /* PCM private status */ | |
48 | char hw_udata[32]; | |
97f02e05 TI |
49 | struct snd_kcontrol *pcm_ctl; |
50 | }; | |
1da177e4 | 51 | |
97f02e05 | 52 | struct cs8427 { |
1da177e4 LT |
53 | unsigned char regmap[0x14]; /* map of first 1 + 13 registers */ |
54 | unsigned int rate; | |
55 | unsigned int reset_timeout; | |
97f02e05 TI |
56 | struct cs8427_stream playback; |
57 | struct cs8427_stream capture; | |
58 | }; | |
1da177e4 | 59 | |
97f02e05 TI |
60 | int snd_cs8427_reg_write(struct snd_i2c_device *device, unsigned char reg, |
61 | unsigned char val) | |
1da177e4 LT |
62 | { |
63 | int err; | |
64 | unsigned char buf[2]; | |
65 | ||
66 | buf[0] = reg & 0x7f; | |
67 | buf[1] = val; | |
68 | if ((err = snd_i2c_sendbytes(device, buf, 2)) != 2) { | |
cc63935f TI |
69 | snd_printk(KERN_ERR "unable to send bytes 0x%02x:0x%02x " |
70 | "to CS8427 (%i)\n", buf[0], buf[1], err); | |
1da177e4 LT |
71 | return err < 0 ? err : -EIO; |
72 | } | |
73 | return 0; | |
74 | } | |
75 | ||
cc63935f TI |
76 | EXPORT_SYMBOL(snd_cs8427_reg_write); |
77 | ||
97f02e05 | 78 | static int snd_cs8427_reg_read(struct snd_i2c_device *device, unsigned char reg) |
1da177e4 LT |
79 | { |
80 | int err; | |
81 | unsigned char buf; | |
82 | ||
83 | if ((err = snd_i2c_sendbytes(device, ®, 1)) != 1) { | |
cc63935f TI |
84 | snd_printk(KERN_ERR "unable to send register 0x%x byte " |
85 | "to CS8427\n", reg); | |
1da177e4 LT |
86 | return err < 0 ? err : -EIO; |
87 | } | |
88 | if ((err = snd_i2c_readbytes(device, &buf, 1)) != 1) { | |
cc63935f TI |
89 | snd_printk(KERN_ERR "unable to read register 0x%x byte " |
90 | "from CS8427\n", reg); | |
1da177e4 LT |
91 | return err < 0 ? err : -EIO; |
92 | } | |
93 | return buf; | |
94 | } | |
95 | ||
97f02e05 | 96 | static int snd_cs8427_select_corudata(struct snd_i2c_device *device, int udata) |
1da177e4 | 97 | { |
97f02e05 | 98 | struct cs8427 *chip = device->private_data; |
1da177e4 LT |
99 | int err; |
100 | ||
101 | udata = udata ? CS8427_BSEL : 0; | |
102 | if (udata != (chip->regmap[CS8427_REG_CSDATABUF] & udata)) { | |
103 | chip->regmap[CS8427_REG_CSDATABUF] &= ~CS8427_BSEL; | |
104 | chip->regmap[CS8427_REG_CSDATABUF] |= udata; | |
97f02e05 TI |
105 | err = snd_cs8427_reg_write(device, CS8427_REG_CSDATABUF, |
106 | chip->regmap[CS8427_REG_CSDATABUF]); | |
1da177e4 LT |
107 | if (err < 0) |
108 | return err; | |
109 | } | |
110 | return 0; | |
111 | } | |
112 | ||
97f02e05 | 113 | static int snd_cs8427_send_corudata(struct snd_i2c_device *device, |
1da177e4 LT |
114 | int udata, |
115 | unsigned char *ndata, | |
116 | int count) | |
117 | { | |
97f02e05 | 118 | struct cs8427 *chip = device->private_data; |
cc63935f TI |
119 | char *hw_data = udata ? |
120 | chip->playback.hw_udata : chip->playback.hw_status; | |
1da177e4 LT |
121 | char data[32]; |
122 | int err, idx; | |
123 | ||
124 | if (!memcmp(hw_data, ndata, count)) | |
125 | return 0; | |
126 | if ((err = snd_cs8427_select_corudata(device, udata)) < 0) | |
127 | return err; | |
128 | memcpy(hw_data, ndata, count); | |
129 | if (udata) { | |
130 | memset(data, 0, sizeof(data)); | |
131 | if (memcmp(hw_data, data, count) == 0) { | |
132 | chip->regmap[CS8427_REG_UDATABUF] &= ~CS8427_UBMMASK; | |
cc63935f TI |
133 | chip->regmap[CS8427_REG_UDATABUF] |= CS8427_UBMZEROS | |
134 | CS8427_EFTUI; | |
135 | err = snd_cs8427_reg_write(device, CS8427_REG_UDATABUF, | |
136 | chip->regmap[CS8427_REG_UDATABUF]); | |
137 | return err < 0 ? err : 0; | |
1da177e4 LT |
138 | } |
139 | } | |
140 | data[0] = CS8427_REG_AUTOINC | CS8427_REG_CORU_DATABUF; | |
141 | for (idx = 0; idx < count; idx++) | |
401de818 | 142 | data[idx + 1] = bitrev8(ndata[idx]); |
1da177e4 LT |
143 | if (snd_i2c_sendbytes(device, data, count + 1) != count + 1) |
144 | return -EIO; | |
145 | return 1; | |
146 | } | |
147 | ||
97f02e05 | 148 | static void snd_cs8427_free(struct snd_i2c_device *device) |
1da177e4 LT |
149 | { |
150 | kfree(device->private_data); | |
151 | } | |
152 | ||
9229bc15 OZ |
153 | int snd_cs8427_init(struct snd_i2c_bus *bus, |
154 | struct snd_i2c_device *device) | |
1da177e4 LT |
155 | { |
156 | static unsigned char initvals1[] = { | |
157 | CS8427_REG_CONTROL1 | CS8427_REG_AUTOINC, | |
cc63935f TI |
158 | /* CS8427_REG_CONTROL1: RMCK to OMCK, valid PCM audio, disable mutes, |
159 | TCBL=output */ | |
1da177e4 | 160 | CS8427_SWCLK | CS8427_TCBLDIR, |
cc63935f TI |
161 | /* CS8427_REG_CONTROL2: hold last valid audio sample, RMCK=256*Fs, |
162 | normal stereo operation */ | |
1da177e4 | 163 | 0x00, |
cc63935f TI |
164 | /* CS8427_REG_DATAFLOW: output drivers normal operation, Tx<=serial, |
165 | Rx=>serial */ | |
1da177e4 | 166 | CS8427_TXDSERIAL | CS8427_SPDAES3RECEIVER, |
cc63935f TI |
167 | /* CS8427_REG_CLOCKSOURCE: Run off, CMCK=256*Fs, |
168 | output time base = OMCK, input time base = recovered input clock, | |
169 | recovered input clock source is ILRCK changed to AES3INPUT | |
170 | (workaround, see snd_cs8427_reset) */ | |
1da177e4 | 171 | CS8427_RXDILRCK, |
cc63935f TI |
172 | /* CS8427_REG_SERIALINPUT: Serial audio input port data format = I2S, |
173 | 24-bit, 64*Fsi */ | |
1da177e4 | 174 | CS8427_SIDEL | CS8427_SILRPOL, |
cc63935f TI |
175 | /* CS8427_REG_SERIALOUTPUT: Serial audio output port data format |
176 | = I2S, 24-bit, 64*Fsi */ | |
1da177e4 LT |
177 | CS8427_SODEL | CS8427_SOLRPOL, |
178 | }; | |
179 | static unsigned char initvals2[] = { | |
180 | CS8427_REG_RECVERRMASK | CS8427_REG_AUTOINC, | |
cc63935f TI |
181 | /* CS8427_REG_RECVERRMASK: unmask the input PLL clock, V, confidence, |
182 | biphase, parity status bits */ | |
183 | /* CS8427_UNLOCK | CS8427_V | CS8427_CONF | CS8427_BIP | CS8427_PAR,*/ | |
1da177e4 LT |
184 | 0xff, /* set everything */ |
185 | /* CS8427_REG_CSDATABUF: | |
186 | Registers 32-55 window to CS buffer | |
187 | Inhibit D->E transfers from overwriting first 5 bytes of CS data. | |
188 | Inhibit D->E transfers (all) of CS data. | |
189 | Allow E->F transfer of CS data. | |
190 | One byte mode; both A/B channels get same written CB data. | |
191 | A channel info is output to chip's EMPH* pin. */ | |
192 | CS8427_CBMR | CS8427_DETCI, | |
193 | /* CS8427_REG_UDATABUF: | |
194 | Use internal buffer to transmit User (U) data. | |
195 | Chip's U pin is an output. | |
196 | Transmit all O's for user data. | |
197 | Inhibit D->E transfers. | |
198 | Inhibit E->F transfers. */ | |
199 | CS8427_UD | CS8427_EFTUI | CS8427_DETUI, | |
200 | }; | |
9229bc15 | 201 | struct cs8427 *chip = device->private_data; |
1da177e4 | 202 | int err; |
1da177e4 LT |
203 | unsigned char buf[24]; |
204 | ||
1da177e4 | 205 | snd_i2c_lock(bus); |
cc63935f | 206 | err = snd_cs8427_reg_read(device, CS8427_REG_ID_AND_VER); |
4eb4550a TI |
207 | if (err != CS8427_VER8427A) { |
208 | /* give second chance */ | |
209 | snd_printk(KERN_WARNING "invalid CS8427 signature 0x%x: " | |
210 | "let me try again...\n", err); | |
211 | err = snd_cs8427_reg_read(device, CS8427_REG_ID_AND_VER); | |
212 | } | |
cc63935f | 213 | if (err != CS8427_VER8427A) { |
1da177e4 | 214 | snd_i2c_unlock(bus); |
97f02e05 TI |
215 | snd_printk(KERN_ERR "unable to find CS8427 signature " |
216 | "(expected 0x%x, read 0x%x),\n", | |
217 | CS8427_VER8427A, err); | |
218 | snd_printk(KERN_ERR " initialization is not completed\n"); | |
1da177e4 LT |
219 | return -EFAULT; |
220 | } | |
221 | /* turn off run bit while making changes to configuration */ | |
cc63935f TI |
222 | err = snd_cs8427_reg_write(device, CS8427_REG_CLOCKSOURCE, 0x00); |
223 | if (err < 0) | |
1da177e4 LT |
224 | goto __fail; |
225 | /* send initial values */ | |
226 | memcpy(chip->regmap + (initvals1[0] & 0x7f), initvals1 + 1, 6); | |
227 | if ((err = snd_i2c_sendbytes(device, initvals1, 7)) != 7) { | |
228 | err = err < 0 ? err : -EIO; | |
229 | goto __fail; | |
230 | } | |
231 | /* Turn off CS8427 interrupt stuff that is not used in hardware */ | |
232 | memset(buf, 0, 7); | |
233 | /* from address 9 to 15 */ | |
234 | buf[0] = 9; /* register */ | |
235 | if ((err = snd_i2c_sendbytes(device, buf, 7)) != 7) | |
236 | goto __fail; | |
237 | /* send transfer initialization sequence */ | |
238 | memcpy(chip->regmap + (initvals2[0] & 0x7f), initvals2 + 1, 3); | |
239 | if ((err = snd_i2c_sendbytes(device, initvals2, 4)) != 4) { | |
240 | err = err < 0 ? err : -EIO; | |
241 | goto __fail; | |
242 | } | |
243 | /* write default channel status bytes */ | |
48008b59 | 244 | put_unaligned_le32(SNDRV_PCM_DEFAULT_CON_SPDIF, buf); |
1da177e4 LT |
245 | memset(buf + 4, 0, 24 - 4); |
246 | if (snd_cs8427_send_corudata(device, 0, buf, 24) < 0) | |
247 | goto __fail; | |
248 | memcpy(chip->playback.def_status, buf, 24); | |
249 | memcpy(chip->playback.pcm_status, buf, 24); | |
250 | snd_i2c_unlock(bus); | |
251 | ||
252 | /* turn on run bit and rock'n'roll */ | |
9229bc15 OZ |
253 | snd_cs8427_reset(device); |
254 | ||
255 | return 0; | |
256 | ||
257 | __fail: | |
258 | snd_i2c_unlock(bus); | |
259 | ||
260 | return err; | |
261 | } | |
262 | EXPORT_SYMBOL(snd_cs8427_init); | |
263 | ||
264 | int snd_cs8427_create(struct snd_i2c_bus *bus, | |
265 | unsigned char addr, | |
266 | unsigned int reset_timeout, | |
267 | struct snd_i2c_device **r_cs8427) | |
268 | { | |
269 | int err; | |
270 | struct cs8427 *chip; | |
271 | struct snd_i2c_device *device; | |
272 | ||
273 | err = snd_i2c_device_create(bus, "CS8427", CS8427_ADDR | (addr & 7), | |
274 | &device); | |
275 | if (err < 0) | |
276 | return err; | |
277 | chip = device->private_data = kzalloc(sizeof(*chip), GFP_KERNEL); | |
278 | if (chip == NULL) { | |
279 | snd_i2c_device_free(device); | |
280 | return -ENOMEM; | |
281 | } | |
282 | device->private_free = snd_cs8427_free; | |
283 | ||
1da177e4 LT |
284 | if (reset_timeout < 1) |
285 | reset_timeout = 1; | |
286 | chip->reset_timeout = reset_timeout; | |
9229bc15 OZ |
287 | |
288 | err = snd_cs8427_init(bus, device); | |
289 | if (err) | |
290 | goto __fail; | |
1da177e4 LT |
291 | |
292 | #if 0 // it's nice for read tests | |
293 | { | |
294 | char buf[128]; | |
295 | int xx; | |
296 | buf[0] = 0x81; | |
297 | snd_i2c_sendbytes(device, buf, 1); | |
298 | snd_i2c_readbytes(device, buf, 127); | |
299 | for (xx = 0; xx < 127; xx++) | |
99b359ba | 300 | printk(KERN_DEBUG "reg[0x%x] = 0x%x\n", xx+1, buf[xx]); |
1da177e4 LT |
301 | } |
302 | #endif | |
303 | ||
304 | if (r_cs8427) | |
305 | *r_cs8427 = device; | |
306 | return 0; | |
307 | ||
308 | __fail: | |
1da177e4 LT |
309 | snd_i2c_device_free(device); |
310 | return err < 0 ? err : -EIO; | |
311 | } | |
312 | ||
cc63935f TI |
313 | EXPORT_SYMBOL(snd_cs8427_create); |
314 | ||
1da177e4 LT |
315 | /* |
316 | * Reset the chip using run bit, also lock PLL using ILRCK and | |
317 | * put back AES3INPUT. This workaround is described in latest | |
318 | * CS8427 datasheet, otherwise TXDSERIAL will not work. | |
319 | */ | |
97f02e05 | 320 | static void snd_cs8427_reset(struct snd_i2c_device *cs8427) |
1da177e4 | 321 | { |
97f02e05 | 322 | struct cs8427 *chip; |
1da177e4 | 323 | unsigned long end_time; |
e957ebf1 | 324 | int data, aes3input = 0; |
1da177e4 | 325 | |
5e246b85 TI |
326 | if (snd_BUG_ON(!cs8427)) |
327 | return; | |
1da177e4 LT |
328 | chip = cs8427->private_data; |
329 | snd_i2c_lock(cs8427->bus); | |
cc63935f TI |
330 | if ((chip->regmap[CS8427_REG_CLOCKSOURCE] & CS8427_RXDAES3INPUT) == |
331 | CS8427_RXDAES3INPUT) /* AES3 bit is set */ | |
e957ebf1 | 332 | aes3input = 1; |
1da177e4 | 333 | chip->regmap[CS8427_REG_CLOCKSOURCE] &= ~(CS8427_RUN | CS8427_RXDMASK); |
97f02e05 TI |
334 | snd_cs8427_reg_write(cs8427, CS8427_REG_CLOCKSOURCE, |
335 | chip->regmap[CS8427_REG_CLOCKSOURCE]); | |
1da177e4 LT |
336 | udelay(200); |
337 | chip->regmap[CS8427_REG_CLOCKSOURCE] |= CS8427_RUN | CS8427_RXDILRCK; | |
97f02e05 TI |
338 | snd_cs8427_reg_write(cs8427, CS8427_REG_CLOCKSOURCE, |
339 | chip->regmap[CS8427_REG_CLOCKSOURCE]); | |
1da177e4 LT |
340 | udelay(200); |
341 | snd_i2c_unlock(cs8427->bus); | |
342 | end_time = jiffies + chip->reset_timeout; | |
343 | while (time_after_eq(end_time, jiffies)) { | |
344 | snd_i2c_lock(cs8427->bus); | |
345 | data = snd_cs8427_reg_read(cs8427, CS8427_REG_RECVERRORS); | |
346 | snd_i2c_unlock(cs8427->bus); | |
347 | if (!(data & CS8427_UNLOCK)) | |
348 | break; | |
8433a509 | 349 | schedule_timeout_uninterruptible(1); |
1da177e4 LT |
350 | } |
351 | snd_i2c_lock(cs8427->bus); | |
352 | chip->regmap[CS8427_REG_CLOCKSOURCE] &= ~CS8427_RXDMASK; | |
e957ebf1 JK |
353 | if (aes3input) |
354 | chip->regmap[CS8427_REG_CLOCKSOURCE] |= CS8427_RXDAES3INPUT; | |
97f02e05 TI |
355 | snd_cs8427_reg_write(cs8427, CS8427_REG_CLOCKSOURCE, |
356 | chip->regmap[CS8427_REG_CLOCKSOURCE]); | |
1da177e4 LT |
357 | snd_i2c_unlock(cs8427->bus); |
358 | } | |
359 | ||
97f02e05 TI |
360 | static int snd_cs8427_in_status_info(struct snd_kcontrol *kcontrol, |
361 | struct snd_ctl_elem_info *uinfo) | |
1da177e4 LT |
362 | { |
363 | uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; | |
364 | uinfo->count = 1; | |
365 | uinfo->value.integer.min = 0; | |
366 | uinfo->value.integer.max = 255; | |
367 | return 0; | |
368 | } | |
369 | ||
97f02e05 TI |
370 | static int snd_cs8427_in_status_get(struct snd_kcontrol *kcontrol, |
371 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 372 | { |
97f02e05 | 373 | struct snd_i2c_device *device = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
374 | int data; |
375 | ||
376 | snd_i2c_lock(device->bus); | |
377 | data = snd_cs8427_reg_read(device, kcontrol->private_value); | |
378 | snd_i2c_unlock(device->bus); | |
379 | if (data < 0) | |
380 | return data; | |
381 | ucontrol->value.integer.value[0] = data; | |
382 | return 0; | |
383 | } | |
384 | ||
97f02e05 TI |
385 | static int snd_cs8427_qsubcode_info(struct snd_kcontrol *kcontrol, |
386 | struct snd_ctl_elem_info *uinfo) | |
1da177e4 LT |
387 | { |
388 | uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES; | |
389 | uinfo->count = 10; | |
390 | return 0; | |
391 | } | |
392 | ||
97f02e05 TI |
393 | static int snd_cs8427_qsubcode_get(struct snd_kcontrol *kcontrol, |
394 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 395 | { |
97f02e05 | 396 | struct snd_i2c_device *device = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
397 | unsigned char reg = CS8427_REG_QSUBCODE; |
398 | int err; | |
399 | ||
400 | snd_i2c_lock(device->bus); | |
401 | if ((err = snd_i2c_sendbytes(device, ®, 1)) != 1) { | |
cc63935f TI |
402 | snd_printk(KERN_ERR "unable to send register 0x%x byte " |
403 | "to CS8427\n", reg); | |
1da177e4 LT |
404 | snd_i2c_unlock(device->bus); |
405 | return err < 0 ? err : -EIO; | |
406 | } | |
cc63935f TI |
407 | err = snd_i2c_readbytes(device, ucontrol->value.bytes.data, 10); |
408 | if (err != 10) { | |
409 | snd_printk(KERN_ERR "unable to read Q-subcode bytes " | |
410 | "from CS8427\n"); | |
1da177e4 LT |
411 | snd_i2c_unlock(device->bus); |
412 | return err < 0 ? err : -EIO; | |
413 | } | |
414 | snd_i2c_unlock(device->bus); | |
415 | return 0; | |
416 | } | |
417 | ||
cc63935f TI |
418 | static int snd_cs8427_spdif_info(struct snd_kcontrol *kcontrol, |
419 | struct snd_ctl_elem_info *uinfo) | |
1da177e4 LT |
420 | { |
421 | uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; | |
422 | uinfo->count = 1; | |
423 | return 0; | |
424 | } | |
425 | ||
97f02e05 TI |
426 | static int snd_cs8427_spdif_get(struct snd_kcontrol *kcontrol, |
427 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 428 | { |
97f02e05 TI |
429 | struct snd_i2c_device *device = snd_kcontrol_chip(kcontrol); |
430 | struct cs8427 *chip = device->private_data; | |
1da177e4 LT |
431 | |
432 | snd_i2c_lock(device->bus); | |
433 | memcpy(ucontrol->value.iec958.status, chip->playback.def_status, 24); | |
434 | snd_i2c_unlock(device->bus); | |
435 | return 0; | |
436 | } | |
437 | ||
97f02e05 TI |
438 | static int snd_cs8427_spdif_put(struct snd_kcontrol *kcontrol, |
439 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 440 | { |
97f02e05 TI |
441 | struct snd_i2c_device *device = snd_kcontrol_chip(kcontrol); |
442 | struct cs8427 *chip = device->private_data; | |
443 | unsigned char *status = kcontrol->private_value ? | |
444 | chip->playback.pcm_status : chip->playback.def_status; | |
445 | struct snd_pcm_runtime *runtime = chip->playback.substream ? | |
446 | chip->playback.substream->runtime : NULL; | |
1da177e4 LT |
447 | int err, change; |
448 | ||
449 | snd_i2c_lock(device->bus); | |
450 | change = memcmp(ucontrol->value.iec958.status, status, 24) != 0; | |
451 | memcpy(status, ucontrol->value.iec958.status, 24); | |
cc63935f TI |
452 | if (change && (kcontrol->private_value ? |
453 | runtime != NULL : runtime == NULL)) { | |
1da177e4 LT |
454 | err = snd_cs8427_send_corudata(device, 0, status, 24); |
455 | if (err < 0) | |
456 | change = err; | |
457 | } | |
458 | snd_i2c_unlock(device->bus); | |
459 | return change; | |
460 | } | |
461 | ||
97f02e05 TI |
462 | static int snd_cs8427_spdif_mask_info(struct snd_kcontrol *kcontrol, |
463 | struct snd_ctl_elem_info *uinfo) | |
1da177e4 LT |
464 | { |
465 | uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; | |
466 | uinfo->count = 1; | |
467 | return 0; | |
468 | } | |
469 | ||
97f02e05 TI |
470 | static int snd_cs8427_spdif_mask_get(struct snd_kcontrol *kcontrol, |
471 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 LT |
472 | { |
473 | memset(ucontrol->value.iec958.status, 0xff, 24); | |
474 | return 0; | |
475 | } | |
476 | ||
97f02e05 | 477 | static struct snd_kcontrol_new snd_cs8427_iec958_controls[] = { |
1da177e4 LT |
478 | { |
479 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, | |
480 | .info = snd_cs8427_in_status_info, | |
481 | .name = "IEC958 CS8427 Input Status", | |
cc63935f TI |
482 | .access = (SNDRV_CTL_ELEM_ACCESS_READ | |
483 | SNDRV_CTL_ELEM_ACCESS_VOLATILE), | |
1da177e4 LT |
484 | .get = snd_cs8427_in_status_get, |
485 | .private_value = 15, | |
486 | }, | |
487 | { | |
488 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, | |
489 | .info = snd_cs8427_in_status_info, | |
490 | .name = "IEC958 CS8427 Error Status", | |
cc63935f TI |
491 | .access = (SNDRV_CTL_ELEM_ACCESS_READ | |
492 | SNDRV_CTL_ELEM_ACCESS_VOLATILE), | |
1da177e4 LT |
493 | .get = snd_cs8427_in_status_get, |
494 | .private_value = 16, | |
495 | }, | |
496 | { | |
497 | .access = SNDRV_CTL_ELEM_ACCESS_READ, | |
498 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, | |
499 | .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,MASK), | |
500 | .info = snd_cs8427_spdif_mask_info, | |
501 | .get = snd_cs8427_spdif_mask_get, | |
502 | }, | |
503 | { | |
504 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, | |
505 | .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT), | |
506 | .info = snd_cs8427_spdif_info, | |
507 | .get = snd_cs8427_spdif_get, | |
508 | .put = snd_cs8427_spdif_put, | |
509 | .private_value = 0 | |
510 | }, | |
511 | { | |
cc63935f TI |
512 | .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE | |
513 | SNDRV_CTL_ELEM_ACCESS_INACTIVE), | |
1da177e4 LT |
514 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, |
515 | .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM), | |
516 | .info = snd_cs8427_spdif_info, | |
517 | .get = snd_cs8427_spdif_get, | |
518 | .put = snd_cs8427_spdif_put, | |
519 | .private_value = 1 | |
520 | }, | |
521 | { | |
522 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, | |
523 | .info = snd_cs8427_qsubcode_info, | |
524 | .name = "IEC958 Q-subcode Capture Default", | |
cc63935f TI |
525 | .access = (SNDRV_CTL_ELEM_ACCESS_READ | |
526 | SNDRV_CTL_ELEM_ACCESS_VOLATILE), | |
1da177e4 LT |
527 | .get = snd_cs8427_qsubcode_get |
528 | }}; | |
529 | ||
97f02e05 TI |
530 | int snd_cs8427_iec958_build(struct snd_i2c_device *cs8427, |
531 | struct snd_pcm_substream *play_substream, | |
532 | struct snd_pcm_substream *cap_substream) | |
1da177e4 | 533 | { |
97f02e05 TI |
534 | struct cs8427 *chip = cs8427->private_data; |
535 | struct snd_kcontrol *kctl; | |
1da177e4 LT |
536 | unsigned int idx; |
537 | int err; | |
538 | ||
5e246b85 TI |
539 | if (snd_BUG_ON(!play_substream || !cap_substream)) |
540 | return -EINVAL; | |
1da177e4 LT |
541 | for (idx = 0; idx < ARRAY_SIZE(snd_cs8427_iec958_controls); idx++) { |
542 | kctl = snd_ctl_new1(&snd_cs8427_iec958_controls[idx], cs8427); | |
543 | if (kctl == NULL) | |
544 | return -ENOMEM; | |
545 | kctl->id.device = play_substream->pcm->device; | |
546 | kctl->id.subdevice = play_substream->number; | |
547 | err = snd_ctl_add(cs8427->bus->card, kctl); | |
548 | if (err < 0) | |
549 | return err; | |
cc63935f TI |
550 | if (! strcmp(kctl->id.name, |
551 | SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM))) | |
1da177e4 LT |
552 | chip->playback.pcm_ctl = kctl; |
553 | } | |
554 | ||
555 | chip->playback.substream = play_substream; | |
556 | chip->capture.substream = cap_substream; | |
5e246b85 TI |
557 | if (snd_BUG_ON(!chip->playback.pcm_ctl)) |
558 | return -EIO; | |
1da177e4 LT |
559 | return 0; |
560 | } | |
561 | ||
cc63935f TI |
562 | EXPORT_SYMBOL(snd_cs8427_iec958_build); |
563 | ||
97f02e05 | 564 | int snd_cs8427_iec958_active(struct snd_i2c_device *cs8427, int active) |
1da177e4 | 565 | { |
97f02e05 | 566 | struct cs8427 *chip; |
1da177e4 | 567 | |
5e246b85 TI |
568 | if (snd_BUG_ON(!cs8427)) |
569 | return -ENXIO; | |
1da177e4 LT |
570 | chip = cs8427->private_data; |
571 | if (active) | |
cc63935f TI |
572 | memcpy(chip->playback.pcm_status, |
573 | chip->playback.def_status, 24); | |
1da177e4 | 574 | chip->playback.pcm_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE; |
cc63935f TI |
575 | snd_ctl_notify(cs8427->bus->card, |
576 | SNDRV_CTL_EVENT_MASK_VALUE | SNDRV_CTL_EVENT_MASK_INFO, | |
577 | &chip->playback.pcm_ctl->id); | |
1da177e4 LT |
578 | return 0; |
579 | } | |
580 | ||
cc63935f TI |
581 | EXPORT_SYMBOL(snd_cs8427_iec958_active); |
582 | ||
97f02e05 | 583 | int snd_cs8427_iec958_pcm(struct snd_i2c_device *cs8427, unsigned int rate) |
1da177e4 | 584 | { |
97f02e05 | 585 | struct cs8427 *chip; |
1da177e4 LT |
586 | char *status; |
587 | int err, reset; | |
588 | ||
5e246b85 TI |
589 | if (snd_BUG_ON(!cs8427)) |
590 | return -ENXIO; | |
1da177e4 LT |
591 | chip = cs8427->private_data; |
592 | status = chip->playback.pcm_status; | |
593 | snd_i2c_lock(cs8427->bus); | |
594 | if (status[0] & IEC958_AES0_PROFESSIONAL) { | |
595 | status[0] &= ~IEC958_AES0_PRO_FS; | |
596 | switch (rate) { | |
597 | case 32000: status[0] |= IEC958_AES0_PRO_FS_32000; break; | |
598 | case 44100: status[0] |= IEC958_AES0_PRO_FS_44100; break; | |
599 | case 48000: status[0] |= IEC958_AES0_PRO_FS_48000; break; | |
600 | default: status[0] |= IEC958_AES0_PRO_FS_NOTID; break; | |
601 | } | |
602 | } else { | |
603 | status[3] &= ~IEC958_AES3_CON_FS; | |
604 | switch (rate) { | |
605 | case 32000: status[3] |= IEC958_AES3_CON_FS_32000; break; | |
606 | case 44100: status[3] |= IEC958_AES3_CON_FS_44100; break; | |
607 | case 48000: status[3] |= IEC958_AES3_CON_FS_48000; break; | |
608 | } | |
609 | } | |
610 | err = snd_cs8427_send_corudata(cs8427, 0, status, 24); | |
611 | if (err > 0) | |
612 | snd_ctl_notify(cs8427->bus->card, | |
613 | SNDRV_CTL_EVENT_MASK_VALUE, | |
614 | &chip->playback.pcm_ctl->id); | |
615 | reset = chip->rate != rate; | |
616 | chip->rate = rate; | |
617 | snd_i2c_unlock(cs8427->bus); | |
618 | if (reset) | |
619 | snd_cs8427_reset(cs8427); | |
620 | return err < 0 ? err : 0; | |
621 | } | |
622 | ||
cc63935f TI |
623 | EXPORT_SYMBOL(snd_cs8427_iec958_pcm); |
624 | ||
1da177e4 LT |
625 | static int __init alsa_cs8427_module_init(void) |
626 | { | |
627 | return 0; | |
628 | } | |
629 | ||
630 | static void __exit alsa_cs8427_module_exit(void) | |
631 | { | |
632 | } | |
633 | ||
634 | module_init(alsa_cs8427_module_init) | |
635 | module_exit(alsa_cs8427_module_exit) |