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ibmveth: Automatically enable larger rx buffer pools for larger mtu
[linux.git] / drivers / net / via-velocity.c
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1da177e4
LT		 1/*
2 * This code is derived from the VIA reference driver (copyright message
3 * below) provided to Red Hat by VIA Networking Technologies, Inc. for
4 * addition to the Linux kernel.
5 *
6 * The code has been merged into one source file, cleaned up to follow
7 * Linux coding style, ported to the Linux 2.6 kernel tree and cleaned
8 * for 64bit hardware platforms.
9 *
10 * TODO
11 * Big-endian support
12 * rx_copybreak/alignment
13 * Scatter gather
14 * More testing
15 *
16 * The changes are (c) Copyright 2004, Red Hat Inc. <[email protected]>
17 * Additional fixes and clean up: Francois Romieu
18 *
19 * This source has not been verified for use in safety critical systems.
20 *
21 * Please direct queries about the revamped driver to the linux-kernel
22 * list not VIA.
23 *
24 * Original code:
25 *
26 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
27 * All rights reserved.
28 *
29 * This software may be redistributed and/or modified under
30 * the terms of the GNU General Public License as published by the Free
31 * Software Foundation; either version 2 of the License, or
32 * any later version.
33 *
34 * This program is distributed in the hope that it will be useful, but
35 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
36 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
37 * for more details.
38 *
39 * Author: Chuang Liang-Shing, AJ Jiang
40 *
41 * Date: Jan 24, 2003
42 *
43 * MODULE_LICENSE("GPL");
44 *
45 */
46
47
48#include <linux/module.h>
49#include <linux/types.h>
1da177e4
LT		 50#include <linux/init.h>
51#include <linux/mm.h>
52#include <linux/errno.h>
53#include <linux/ioport.h>
54#include <linux/pci.h>
55#include <linux/kernel.h>
56#include <linux/netdevice.h>
57#include <linux/etherdevice.h>
58#include <linux/skbuff.h>
59#include <linux/delay.h>
60#include <linux/timer.h>
61#include <linux/slab.h>
62#include <linux/interrupt.h>
1da177e4
LT		 63#include <linux/string.h>
64#include <linux/wait.h>
65#include <asm/io.h>
66#include <linux/if.h>
1da177e4
LT		 67#include <asm/uaccess.h>
68#include <linux/proc_fs.h>
69#include <linux/inetdevice.h>
70#include <linux/reboot.h>
71#include <linux/ethtool.h>
72#include <linux/mii.h>
73#include <linux/in.h>
74#include <linux/if_arp.h>
75#include <linux/ip.h>
76#include <linux/tcp.h>
77#include <linux/udp.h>
78#include <linux/crc-ccitt.h>
79#include <linux/crc32.h>
80
81#include "via-velocity.h"
82
83
84static int velocity_nics = 0;
85static int msglevel = MSG_LEVEL_INFO;
86
87
88static int velocity_mii_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);
7282d491 89static const struct ethtool_ops velocity_ethtool_ops;
1da177e4
LT		 90
91/*
92 Define module options
93*/
94
95MODULE_AUTHOR("VIA Networking Technologies, Inc.");
96MODULE_LICENSE("GPL");
97MODULE_DESCRIPTION("VIA Networking Velocity Family Gigabit Ethernet Adapter Driver");
98
99#define VELOCITY_PARAM(N,D) \
100 static int N[MAX_UNITS]=OPTION_DEFAULT;\
101 module_param_array(N, int, NULL, 0); \
102 MODULE_PARM_DESC(N, D);
103
104#define RX_DESC_MIN 64
105#define RX_DESC_MAX 255
106#define RX_DESC_DEF 64
107VELOCITY_PARAM(RxDescriptors, "Number of receive descriptors");
108
109#define TX_DESC_MIN 16
110#define TX_DESC_MAX 256
111#define TX_DESC_DEF 64
112VELOCITY_PARAM(TxDescriptors, "Number of transmit descriptors");
113
114#define VLAN_ID_MIN 0
115#define VLAN_ID_MAX 4095
116#define VLAN_ID_DEF 0
117/* VID_setting[] is used for setting the VID of NIC.
118 0: default VID.
119 1-4094: other VIDs.
120*/
121VELOCITY_PARAM(VID_setting, "802.1Q VLAN ID");
122
123#define RX_THRESH_MIN 0
124#define RX_THRESH_MAX 3
125#define RX_THRESH_DEF 0
126/* rx_thresh[] is used for controlling the receive fifo threshold.
127 0: indicate the rxfifo threshold is 128 bytes.
128 1: indicate the rxfifo threshold is 512 bytes.
129 2: indicate the rxfifo threshold is 1024 bytes.
130 3: indicate the rxfifo threshold is store & forward.
131*/
132VELOCITY_PARAM(rx_thresh, "Receive fifo threshold");
133
134#define DMA_LENGTH_MIN 0
135#define DMA_LENGTH_MAX 7
136#define DMA_LENGTH_DEF 0
137
138/* DMA_length[] is used for controlling the DMA length
139 0: 8 DWORDs
140 1: 16 DWORDs
141 2: 32 DWORDs
142 3: 64 DWORDs
143 4: 128 DWORDs
144 5: 256 DWORDs
145 6: SF(flush till emply)
146 7: SF(flush till emply)
147*/
148VELOCITY_PARAM(DMA_length, "DMA length");
149
150#define TAGGING_DEF 0
151/* enable_tagging[] is used for enabling 802.1Q VID tagging.
152 0: disable VID seeting(default).
153 1: enable VID setting.
154*/
155VELOCITY_PARAM(enable_tagging, "Enable 802.1Q tagging");
156
157#define IP_ALIG_DEF 0
158/* IP_byte_align[] is used for IP header DWORD byte aligned
159 0: indicate the IP header won't be DWORD byte aligned.(Default) .
160 1: indicate the IP header will be DWORD byte aligned.
161 In some enviroment, the IP header should be DWORD byte aligned,
162 or the packet will be droped when we receive it. (eg: IPVS)
163*/
164VELOCITY_PARAM(IP_byte_align, "Enable IP header dword aligned");
165
166#define TX_CSUM_DEF 1
167/* txcsum_offload[] is used for setting the checksum offload ability of NIC.
168 (We only support RX checksum offload now)
169 0: disable csum_offload[checksum offload
170 1: enable checksum offload. (Default)
171*/
172VELOCITY_PARAM(txcsum_offload, "Enable transmit packet checksum offload");
173
174#define FLOW_CNTL_DEF 1
175#define FLOW_CNTL_MIN 1
176#define FLOW_CNTL_MAX 5
177
178/* flow_control[] is used for setting the flow control ability of NIC.
179 1: hardware deafult - AUTO (default). Use Hardware default value in ANAR.
180 2: enable TX flow control.
181 3: enable RX flow control.
182 4: enable RX/TX flow control.
183 5: disable
184*/
185VELOCITY_PARAM(flow_control, "Enable flow control ability");
186
187#define MED_LNK_DEF 0
188#define MED_LNK_MIN 0
189#define MED_LNK_MAX 4
190/* speed_duplex[] is used for setting the speed and duplex mode of NIC.
191 0: indicate autonegotiation for both speed and duplex mode
192 1: indicate 100Mbps half duplex mode
193 2: indicate 100Mbps full duplex mode
194 3: indicate 10Mbps half duplex mode
195 4: indicate 10Mbps full duplex mode
196
197 Note:
198 if EEPROM have been set to the force mode, this option is ignored
199 by driver.
200*/
201VELOCITY_PARAM(speed_duplex, "Setting the speed and duplex mode");
202
203#define VAL_PKT_LEN_DEF 0
204/* ValPktLen[] is used for setting the checksum offload ability of NIC.
205 0: Receive frame with invalid layer 2 length (Default)
206 1: Drop frame with invalid layer 2 length
207*/
208VELOCITY_PARAM(ValPktLen, "Receiving or Drop invalid 802.3 frame");
209
210#define WOL_OPT_DEF 0
211#define WOL_OPT_MIN 0
212#define WOL_OPT_MAX 7
213/* wol_opts[] is used for controlling wake on lan behavior.
214 0: Wake up if recevied a magic packet. (Default)
215 1: Wake up if link status is on/off.
216 2: Wake up if recevied an arp packet.
217 4: Wake up if recevied any unicast packet.
218 Those value can be sumed up to support more than one option.
219*/
220VELOCITY_PARAM(wol_opts, "Wake On Lan options");
221
222#define INT_WORKS_DEF 20
223#define INT_WORKS_MIN 10
224#define INT_WORKS_MAX 64
225
226VELOCITY_PARAM(int_works, "Number of packets per interrupt services");
227
228static int rx_copybreak = 200;
229module_param(rx_copybreak, int, 0644);
230MODULE_PARM_DESC(rx_copybreak, "Copy breakpoint for copy-only-tiny-frames");
231
cabb7667
JG		 232static void velocity_init_info(struct pci_dev *pdev, struct velocity_info *vptr,
233 const struct velocity_info_tbl *info);
1da177e4
LT		 234static int velocity_get_pci_info(struct velocity_info *, struct pci_dev *pdev);
235static void velocity_print_info(struct velocity_info *vptr);
236static int velocity_open(struct net_device *dev);
237static int velocity_change_mtu(struct net_device *dev, int mtu);
238static int velocity_xmit(struct sk_buff *skb, struct net_device *dev);
7d12e780 239static int velocity_intr(int irq, void *dev_instance);
1da177e4
LT		 240static void velocity_set_multi(struct net_device *dev);
241static struct net_device_stats *velocity_get_stats(struct net_device *dev);
242static int velocity_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
243static int velocity_close(struct net_device *dev);
244static int velocity_receive_frame(struct velocity_info *, int idx);
245static int velocity_alloc_rx_buf(struct velocity_info *, int idx);
246static void velocity_free_rd_ring(struct velocity_info *vptr);
247static void velocity_free_tx_buf(struct velocity_info *vptr, struct velocity_td_info *);
248static int velocity_soft_reset(struct velocity_info *vptr);
249static void mii_init(struct velocity_info *vptr, u32 mii_status);
8a22dddb 250static u32 velocity_get_link(struct net_device *dev);
1da177e4
LT		 251static u32 velocity_get_opt_media_mode(struct velocity_info *vptr);
252static void velocity_print_link_status(struct velocity_info *vptr);
253static void safe_disable_mii_autopoll(struct mac_regs __iomem * regs);
254static void velocity_shutdown(struct velocity_info *vptr);
255static void enable_flow_control_ability(struct velocity_info *vptr);
256static void enable_mii_autopoll(struct mac_regs __iomem * regs);
257static int velocity_mii_read(struct mac_regs __iomem *, u8 byIdx, u16 * pdata);
258static int velocity_mii_write(struct mac_regs __iomem *, u8 byMiiAddr, u16 data);
259static u32 mii_check_media_mode(struct mac_regs __iomem * regs);
260static u32 check_connection_type(struct mac_regs __iomem * regs);
261static int velocity_set_media_mode(struct velocity_info *vptr, u32 mii_status);
262
263#ifdef CONFIG_PM
264
265static int velocity_suspend(struct pci_dev *pdev, pm_message_t state);
266static int velocity_resume(struct pci_dev *pdev);
267
ce9f7fe3
RD		 268static DEFINE_SPINLOCK(velocity_dev_list_lock);
269static LIST_HEAD(velocity_dev_list);
270
271#endif
272
273#if defined(CONFIG_PM) && defined(CONFIG_INET)
274
1da177e4
LT		 275static int velocity_netdev_event(struct notifier_block *nb, unsigned long notification, void *ptr);
276
277static struct notifier_block velocity_inetaddr_notifier = {
278 .notifier_call = velocity_netdev_event,
279};
280
1da177e4
LT		 281static void velocity_register_notifier(void)
282{
283 register_inetaddr_notifier(&velocity_inetaddr_notifier);
284}
285
286static void velocity_unregister_notifier(void)
287{
288 unregister_inetaddr_notifier(&velocity_inetaddr_notifier);
289}
290
ce9f7fe3 291#else
1da177e4
LT		 292
293#define velocity_register_notifier() do {} while (0)
294#define velocity_unregister_notifier() do {} while (0)
295
ce9f7fe3 296#endif
1da177e4
LT		 297
298/*
299 * Internal board variants. At the moment we have only one
300 */
301
cabb7667
JG		 302static const struct velocity_info_tbl chip_info_table[] __devinitdata = {
303 {CHIP_TYPE_VT6110, "VIA Networking Velocity Family Gigabit Ethernet Adapter", 1, 0x00FFFFFFUL},
304 { }
1da177e4
LT		 305};
306
307/*
308 * Describe the PCI device identifiers that we support in this
309 * device driver. Used for hotplug autoloading.
310 */
311
e54f4893
JG		 312static const struct pci_device_id velocity_id_table[] __devinitdata = {
313 { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_612X) },
314 { }
1da177e4
LT		 315};
316
317MODULE_DEVICE_TABLE(pci, velocity_id_table);
318
319/**
320 * get_chip_name - identifier to name
321 * @id: chip identifier
322 *
323 * Given a chip identifier return a suitable description. Returns
324 * a pointer a static string valid while the driver is loaded.
325 */
326
327static char __devinit *get_chip_name(enum chip_type chip_id)
328{
329 int i;
330 for (i = 0; chip_info_table[i].name != NULL; i++)
331 if (chip_info_table[i].chip_id == chip_id)
332 break;
333 return chip_info_table[i].name;
334}
335
336/**
337 * velocity_remove1 - device unplug
338 * @pdev: PCI device being removed
339 *
340 * Device unload callback. Called on an unplug or on module
341 * unload for each active device that is present. Disconnects
342 * the device from the network layer and frees all the resources
343 */
344
345static void __devexit velocity_remove1(struct pci_dev *pdev)
346{
347 struct net_device *dev = pci_get_drvdata(pdev);
8ab6f3f7 348 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 349
350#ifdef CONFIG_PM
351 unsigned long flags;
352
353 spin_lock_irqsave(&velocity_dev_list_lock, flags);
354 if (!list_empty(&velocity_dev_list))
355 list_del(&vptr->list);
356 spin_unlock_irqrestore(&velocity_dev_list_lock, flags);
357#endif
358 unregister_netdev(dev);
359 iounmap(vptr->mac_regs);
360 pci_release_regions(pdev);
361 pci_disable_device(pdev);
362 pci_set_drvdata(pdev, NULL);
363 free_netdev(dev);
364
365 velocity_nics--;
366}
367
368/**
369 * velocity_set_int_opt - parser for integer options
370 * @opt: pointer to option value
371 * @val: value the user requested (or -1 for default)
372 * @min: lowest value allowed
373 * @max: highest value allowed
374 * @def: default value
375 * @name: property name
376 * @dev: device name
377 *
378 * Set an integer property in the module options. This function does
379 * all the verification and checking as well as reporting so that
380 * we don't duplicate code for each option.
381 */
382
383static void __devinit velocity_set_int_opt(int *opt, int val, int min, int max, int def, char *name, char *devname)
384{
385 if (val == -1)
386 *opt = def;
387 else if (val < min || val > max) {
388 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: the value of parameter %s is invalid, the valid range is (%d-%d)\n",
389 devname, name, min, max);
390 *opt = def;
391 } else {
392 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_INFO "%s: set value of parameter %s to %d\n",
393 devname, name, val);
394 *opt = val;
395 }
396}
397
398/**
399 * velocity_set_bool_opt - parser for boolean options
400 * @opt: pointer to option value
401 * @val: value the user requested (or -1 for default)
402 * @def: default value (yes/no)
403 * @flag: numeric value to set for true.
404 * @name: property name
405 * @dev: device name
406 *
407 * Set a boolean property in the module options. This function does
408 * all the verification and checking as well as reporting so that
409 * we don't duplicate code for each option.
410 */
411
412static void __devinit velocity_set_bool_opt(u32 * opt, int val, int def, u32 flag, char *name, char *devname)
413{
414 (*opt) &= (~flag);
415 if (val == -1)
416 *opt |= (def ? flag : 0);
417 else if (val < 0 || val > 1) {
6aa20a22 418 printk(KERN_NOTICE "%s: the value of parameter %s is invalid, the valid range is (0-1)\n",
1da177e4
LT		 419 devname, name);
420 *opt |= (def ? flag : 0);
421 } else {
6aa20a22 422 printk(KERN_INFO "%s: set parameter %s to %s\n",
1da177e4
LT		 423 devname, name, val ? "TRUE" : "FALSE");
424 *opt |= (val ? flag : 0);
425 }
426}
427
428/**
429 * velocity_get_options - set options on device
430 * @opts: option structure for the device
431 * @index: index of option to use in module options array
432 * @devname: device name
433 *
434 * Turn the module and command options into a single structure
435 * for the current device
436 */
437
438static void __devinit velocity_get_options(struct velocity_opt *opts, int index, char *devname)
439{
440
441 velocity_set_int_opt(&opts->rx_thresh, rx_thresh[index], RX_THRESH_MIN, RX_THRESH_MAX, RX_THRESH_DEF, "rx_thresh", devname);
442 velocity_set_int_opt(&opts->DMA_length, DMA_length[index], DMA_LENGTH_MIN, DMA_LENGTH_MAX, DMA_LENGTH_DEF, "DMA_length", devname);
443 velocity_set_int_opt(&opts->numrx, RxDescriptors[index], RX_DESC_MIN, RX_DESC_MAX, RX_DESC_DEF, "RxDescriptors", devname);
444 velocity_set_int_opt(&opts->numtx, TxDescriptors[index], TX_DESC_MIN, TX_DESC_MAX, TX_DESC_DEF, "TxDescriptors", devname);
445 velocity_set_int_opt(&opts->vid, VID_setting[index], VLAN_ID_MIN, VLAN_ID_MAX, VLAN_ID_DEF, "VID_setting", devname);
446 velocity_set_bool_opt(&opts->flags, enable_tagging[index], TAGGING_DEF, VELOCITY_FLAGS_TAGGING, "enable_tagging", devname);
447 velocity_set_bool_opt(&opts->flags, txcsum_offload[index], TX_CSUM_DEF, VELOCITY_FLAGS_TX_CSUM, "txcsum_offload", devname);
448 velocity_set_int_opt(&opts->flow_cntl, flow_control[index], FLOW_CNTL_MIN, FLOW_CNTL_MAX, FLOW_CNTL_DEF, "flow_control", devname);
449 velocity_set_bool_opt(&opts->flags, IP_byte_align[index], IP_ALIG_DEF, VELOCITY_FLAGS_IP_ALIGN, "IP_byte_align", devname);
450 velocity_set_bool_opt(&opts->flags, ValPktLen[index], VAL_PKT_LEN_DEF, VELOCITY_FLAGS_VAL_PKT_LEN, "ValPktLen", devname);
451 velocity_set_int_opt((int *) &opts->spd_dpx, speed_duplex[index], MED_LNK_MIN, MED_LNK_MAX, MED_LNK_DEF, "Media link mode", devname);
452 velocity_set_int_opt((int *) &opts->wol_opts, wol_opts[index], WOL_OPT_MIN, WOL_OPT_MAX, WOL_OPT_DEF, "Wake On Lan options", devname);
453 velocity_set_int_opt((int *) &opts->int_works, int_works[index], INT_WORKS_MIN, INT_WORKS_MAX, INT_WORKS_DEF, "Interrupt service works", devname);
454 opts->numrx = (opts->numrx & ~3);
455}
456
457/**
458 * velocity_init_cam_filter - initialise CAM
459 * @vptr: velocity to program
460 *
461 * Initialize the content addressable memory used for filters. Load
462 * appropriately according to the presence of VLAN
463 */
464
465static void velocity_init_cam_filter(struct velocity_info *vptr)
466{
467 struct mac_regs __iomem * regs = vptr->mac_regs;
468
469 /* Turn on MCFG_PQEN, turn off MCFG_RTGOPT */
470 WORD_REG_BITS_SET(MCFG_PQEN, MCFG_RTGOPT, &regs->MCFG);
471 WORD_REG_BITS_ON(MCFG_VIDFR, &regs->MCFG);
472
473 /* Disable all CAMs */
474 memset(vptr->vCAMmask, 0, sizeof(u8) * 8);
475 memset(vptr->mCAMmask, 0, sizeof(u8) * 8);
476 mac_set_cam_mask(regs, vptr->vCAMmask, VELOCITY_VLAN_ID_CAM);
477 mac_set_cam_mask(regs, vptr->mCAMmask, VELOCITY_MULTICAST_CAM);
478
479 /* Enable first VCAM */
480 if (vptr->flags & VELOCITY_FLAGS_TAGGING) {
481 /* If Tagging option is enabled and VLAN ID is not zero, then
482 turn on MCFG_RTGOPT also */
483 if (vptr->options.vid != 0)
484 WORD_REG_BITS_ON(MCFG_RTGOPT, &regs->MCFG);
485
486 mac_set_cam(regs, 0, (u8 *) & (vptr->options.vid), VELOCITY_VLAN_ID_CAM);
487 vptr->vCAMmask[0] |= 1;
488 mac_set_cam_mask(regs, vptr->vCAMmask, VELOCITY_VLAN_ID_CAM);
489 } else {
490 u16 temp = 0;
491 mac_set_cam(regs, 0, (u8 *) &temp, VELOCITY_VLAN_ID_CAM);
492 temp = 1;
493 mac_set_cam_mask(regs, (u8 *) &temp, VELOCITY_VLAN_ID_CAM);
494 }
495}
496
497/**
498 * velocity_rx_reset - handle a receive reset
499 * @vptr: velocity we are resetting
500 *
501 * Reset the ownership and status for the receive ring side.
502 * Hand all the receive queue to the NIC.
503 */
504
505static void velocity_rx_reset(struct velocity_info *vptr)
506{
507
508 struct mac_regs __iomem * regs = vptr->mac_regs;
509 int i;
510
511 vptr->rd_dirty = vptr->rd_filled = vptr->rd_curr = 0;
512
513 /*
514 * Init state, all RD entries belong to the NIC
515 */
516 for (i = 0; i < vptr->options.numrx; ++i)
517 vptr->rd_ring[i].rdesc0.owner = OWNED_BY_NIC;
518
519 writew(vptr->options.numrx, &regs->RBRDU);
520 writel(vptr->rd_pool_dma, &regs->RDBaseLo);
521 writew(0, &regs->RDIdx);
522 writew(vptr->options.numrx - 1, &regs->RDCSize);
523}
524
525/**
526 * velocity_init_registers - initialise MAC registers
527 * @vptr: velocity to init
528 * @type: type of initialisation (hot or cold)
529 *
530 * Initialise the MAC on a reset or on first set up on the
531 * hardware.
532 */
533
6aa20a22 534static void velocity_init_registers(struct velocity_info *vptr,
1da177e4
LT		 535 enum velocity_init_type type)
536{
537 struct mac_regs __iomem * regs = vptr->mac_regs;
538 int i, mii_status;
539
540 mac_wol_reset(regs);
541
542 switch (type) {
543 case VELOCITY_INIT_RESET:
544 case VELOCITY_INIT_WOL:
545
546 netif_stop_queue(vptr->dev);
547
548 /*
549 * Reset RX to prevent RX pointer not on the 4X location
550 */
551 velocity_rx_reset(vptr);
552 mac_rx_queue_run(regs);
553 mac_rx_queue_wake(regs);
554
555 mii_status = velocity_get_opt_media_mode(vptr);
556 if (velocity_set_media_mode(vptr, mii_status) != VELOCITY_LINK_CHANGE) {
557 velocity_print_link_status(vptr);
558 if (!(vptr->mii_status & VELOCITY_LINK_FAIL))
559 netif_wake_queue(vptr->dev);
560 }
561
562 enable_flow_control_ability(vptr);
563
564 mac_clear_isr(regs);
565 writel(CR0_STOP, &regs->CR0Clr);
6aa20a22 566 writel((CR0_DPOLL | CR0_TXON | CR0_RXON | CR0_STRT),
1da177e4
LT		 567 &regs->CR0Set);
568
569 break;
570
571 case VELOCITY_INIT_COLD:
572 default:
573 /*
574 * Do reset
575 */
576 velocity_soft_reset(vptr);
577 mdelay(5);
578
579 mac_eeprom_reload(regs);
580 for (i = 0; i < 6; i++) {
581 writeb(vptr->dev->dev_addr[i], &(regs->PAR[i]));
582 }
583 /*
584 * clear Pre_ACPI bit.
585 */
586 BYTE_REG_BITS_OFF(CFGA_PACPI, &(regs->CFGA));
587 mac_set_rx_thresh(regs, vptr->options.rx_thresh);
588 mac_set_dma_length(regs, vptr->options.DMA_length);
589
590 writeb(WOLCFG_SAM | WOLCFG_SAB, &regs->WOLCFGSet);
591 /*
592 * Back off algorithm use original IEEE standard
593 */
594 BYTE_REG_BITS_SET(CFGB_OFSET, (CFGB_CRANDOM | CFGB_CAP | CFGB_MBA | CFGB_BAKOPT), &regs->CFGB);
595
596 /*
597 * Init CAM filter
598 */
599 velocity_init_cam_filter(vptr);
600
601 /*
602 * Set packet filter: Receive directed and broadcast address
603 */
604 velocity_set_multi(vptr->dev);
605
606 /*
607 * Enable MII auto-polling
608 */
609 enable_mii_autopoll(regs);
610
611 vptr->int_mask = INT_MASK_DEF;
612
613 writel(cpu_to_le32(vptr->rd_pool_dma), &regs->RDBaseLo);
614 writew(vptr->options.numrx - 1, &regs->RDCSize);
615 mac_rx_queue_run(regs);
616 mac_rx_queue_wake(regs);
617
618 writew(vptr->options.numtx - 1, &regs->TDCSize);
619
620 for (i = 0; i < vptr->num_txq; i++) {
621 writel(cpu_to_le32(vptr->td_pool_dma[i]), &(regs->TDBaseLo[i]));
622 mac_tx_queue_run(regs, i);
623 }
624
625 init_flow_control_register(vptr);
626
627 writel(CR0_STOP, &regs->CR0Clr);
628 writel((CR0_DPOLL | CR0_TXON | CR0_RXON | CR0_STRT), &regs->CR0Set);
629
630 mii_status = velocity_get_opt_media_mode(vptr);
631 netif_stop_queue(vptr->dev);
632
633 mii_init(vptr, mii_status);
634
635 if (velocity_set_media_mode(vptr, mii_status) != VELOCITY_LINK_CHANGE) {
636 velocity_print_link_status(vptr);
637 if (!(vptr->mii_status & VELOCITY_LINK_FAIL))
638 netif_wake_queue(vptr->dev);
639 }
640
641 enable_flow_control_ability(vptr);
642 mac_hw_mibs_init(regs);
643 mac_write_int_mask(vptr->int_mask, regs);
644 mac_clear_isr(regs);
645
646 }
647}
648
649/**
650 * velocity_soft_reset - soft reset
651 * @vptr: velocity to reset
652 *
653 * Kick off a soft reset of the velocity adapter and then poll
654 * until the reset sequence has completed before returning.
655 */
656
657static int velocity_soft_reset(struct velocity_info *vptr)
658{
659 struct mac_regs __iomem * regs = vptr->mac_regs;
660 int i = 0;
661
662 writel(CR0_SFRST, &regs->CR0Set);
663
664 for (i = 0; i < W_MAX_TIMEOUT; i++) {
665 udelay(5);
666 if (!DWORD_REG_BITS_IS_ON(CR0_SFRST, &regs->CR0Set))
667 break;
668 }
669
670 if (i == W_MAX_TIMEOUT) {
671 writel(CR0_FORSRST, &regs->CR0Set);
672 /* FIXME: PCI POSTING */
673 /* delay 2ms */
674 mdelay(2);
675 }
676 return 0;
677}
678
679/**
680 * velocity_found1 - set up discovered velocity card
681 * @pdev: PCI device
682 * @ent: PCI device table entry that matched
683 *
684 * Configure a discovered adapter from scratch. Return a negative
685 * errno error code on failure paths.
686 */
687
688static int __devinit velocity_found1(struct pci_dev *pdev, const struct pci_device_id *ent)
689{
690 static int first = 1;
691 struct net_device *dev;
692 int i;
cabb7667 693 const struct velocity_info_tbl *info = &chip_info_table[ent->driver_data];
1da177e4
LT		 694 struct velocity_info *vptr;
695 struct mac_regs __iomem * regs;
696 int ret = -ENOMEM;
697
e54f4893
JG		 698 /* FIXME: this driver, like almost all other ethernet drivers,
699 * can support more than MAX_UNITS.
700 */
1da177e4 701 if (velocity_nics >= MAX_UNITS) {
6aa20a22 702 dev_notice(&pdev->dev, "already found %d NICs.\n",
e54f4893 703 velocity_nics);
1da177e4
LT		 704 return -ENODEV;
705 }
706
707 dev = alloc_etherdev(sizeof(struct velocity_info));
e54f4893 708 if (!dev) {
9b91cf9d 709 dev_err(&pdev->dev, "allocate net device failed.\n");
1da177e4
LT		 710 goto out;
711 }
6aa20a22 712
1da177e4 713 /* Chain it all together */
6aa20a22 714
1da177e4
LT		 715 SET_MODULE_OWNER(dev);
716 SET_NETDEV_DEV(dev, &pdev->dev);
8ab6f3f7 717 vptr = netdev_priv(dev);
1da177e4
LT		 718
719
720 if (first) {
6aa20a22 721 printk(KERN_INFO "%s Ver. %s\n",
1da177e4
LT		 722 VELOCITY_FULL_DRV_NAM, VELOCITY_VERSION);
723 printk(KERN_INFO "Copyright (c) 2002, 2003 VIA Networking Technologies, Inc.\n");
724 printk(KERN_INFO "Copyright (c) 2004 Red Hat Inc.\n");
725 first = 0;
726 }
727
728 velocity_init_info(pdev, vptr, info);
729
730 vptr->dev = dev;
731
732 dev->irq = pdev->irq;
733
734 ret = pci_enable_device(pdev);
6aa20a22 735 if (ret < 0)
1da177e4
LT		 736 goto err_free_dev;
737
738 ret = velocity_get_pci_info(vptr, pdev);
739 if (ret < 0) {
e54f4893 740 /* error message already printed */
1da177e4
LT		 741 goto err_disable;
742 }
743
744 ret = pci_request_regions(pdev, VELOCITY_NAME);
745 if (ret < 0) {
9b91cf9d 746 dev_err(&pdev->dev, "No PCI resources.\n");
1da177e4
LT		 747 goto err_disable;
748 }
749
cabb7667 750 regs = ioremap(vptr->memaddr, VELOCITY_IO_SIZE);
1da177e4
LT		 751 if (regs == NULL) {
752 ret = -EIO;
753 goto err_release_res;
754 }
755
756 vptr->mac_regs = regs;
757
758 mac_wol_reset(regs);
759
760 dev->base_addr = vptr->ioaddr;
761
762 for (i = 0; i < 6; i++)
763 dev->dev_addr[i] = readb(&regs->PAR[i]);
764
765
766 velocity_get_options(&vptr->options, velocity_nics, dev->name);
767
6aa20a22 768 /*
1da177e4
LT		 769 * Mask out the options cannot be set to the chip
770 */
6aa20a22 771
1da177e4
LT		 772 vptr->options.flags &= info->flags;
773
774 /*
775 * Enable the chip specified capbilities
776 */
6aa20a22 777
1da177e4
LT		 778 vptr->flags = vptr->options.flags | (info->flags & 0xFF000000UL);
779
780 vptr->wol_opts = vptr->options.wol_opts;
781 vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
782
783 vptr->phy_id = MII_GET_PHY_ID(vptr->mac_regs);
784
785 dev->irq = pdev->irq;
786 dev->open = velocity_open;
787 dev->hard_start_xmit = velocity_xmit;
788 dev->stop = velocity_close;
789 dev->get_stats = velocity_get_stats;
790 dev->set_multicast_list = velocity_set_multi;
791 dev->do_ioctl = velocity_ioctl;
792 dev->ethtool_ops = &velocity_ethtool_ops;
793 dev->change_mtu = velocity_change_mtu;
794#ifdef VELOCITY_ZERO_COPY_SUPPORT
795 dev->features |= NETIF_F_SG;
796#endif
797
798 if (vptr->flags & VELOCITY_FLAGS_TX_CSUM) {
9f3f46b5 799 dev->features |= NETIF_F_IP_CSUM;
1da177e4
LT		 800 }
801
802 ret = register_netdev(dev);
803 if (ret < 0)
804 goto err_iounmap;
805
8a22dddb
FR		 806 if (velocity_get_link(dev))
807 netif_carrier_off(dev);
808
1da177e4
LT		 809 velocity_print_info(vptr);
810 pci_set_drvdata(pdev, dev);
6aa20a22 811
1da177e4 812 /* and leave the chip powered down */
6aa20a22 813
1da177e4
LT		 814 pci_set_power_state(pdev, PCI_D3hot);
815#ifdef CONFIG_PM
816 {
817 unsigned long flags;
818
819 spin_lock_irqsave(&velocity_dev_list_lock, flags);
820 list_add(&vptr->list, &velocity_dev_list);
821 spin_unlock_irqrestore(&velocity_dev_list_lock, flags);
822 }
823#endif
824 velocity_nics++;
825out:
826 return ret;
827
828err_iounmap:
829 iounmap(regs);
830err_release_res:
831 pci_release_regions(pdev);
832err_disable:
833 pci_disable_device(pdev);
834err_free_dev:
835 free_netdev(dev);
836 goto out;
837}
838
839/**
840 * velocity_print_info - per driver data
841 * @vptr: velocity
842 *
843 * Print per driver data as the kernel driver finds Velocity
844 * hardware
845 */
846
847static void __devinit velocity_print_info(struct velocity_info *vptr)
848{
849 struct net_device *dev = vptr->dev;
850
851 printk(KERN_INFO "%s: %s\n", dev->name, get_chip_name(vptr->chip_id));
6aa20a22
JG		 852 printk(KERN_INFO "%s: Ethernet Address: %2.2X:%2.2X:%2.2X:%2.2X:%2.2X:%2.2X\n",
853 dev->name,
854 dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2],
1da177e4
LT		 855 dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]);
856}
857
858/**
859 * velocity_init_info - init private data
860 * @pdev: PCI device
861 * @vptr: Velocity info
862 * @info: Board type
863 *
864 * Set up the initial velocity_info struct for the device that has been
865 * discovered.
866 */
867
cabb7667
JG		 868static void __devinit velocity_init_info(struct pci_dev *pdev,
869 struct velocity_info *vptr,
870 const struct velocity_info_tbl *info)
1da177e4
LT		 871{
872 memset(vptr, 0, sizeof(struct velocity_info));
873
874 vptr->pdev = pdev;
875 vptr->chip_id = info->chip_id;
1da177e4
LT		 876 vptr->num_txq = info->txqueue;
877 vptr->multicast_limit = MCAM_SIZE;
878 spin_lock_init(&vptr->lock);
879 INIT_LIST_HEAD(&vptr->list);
880}
881
882/**
883 * velocity_get_pci_info - retrieve PCI info for device
884 * @vptr: velocity device
885 * @pdev: PCI device it matches
886 *
887 * Retrieve the PCI configuration space data that interests us from
888 * the kernel PCI layer
889 */
890
891static int __devinit velocity_get_pci_info(struct velocity_info *vptr, struct pci_dev *pdev)
892{
e54f4893 893 if (pci_read_config_byte(pdev, PCI_REVISION_ID, &vptr->rev_id) < 0)
1da177e4 894 return -EIO;
6aa20a22 895
1da177e4
LT		 896 pci_set_master(pdev);
897
898 vptr->ioaddr = pci_resource_start(pdev, 0);
899 vptr->memaddr = pci_resource_start(pdev, 1);
6aa20a22 900
e54f4893 901 if (!(pci_resource_flags(pdev, 0) & IORESOURCE_IO)) {
9b91cf9d 902 dev_err(&pdev->dev,
e54f4893 903 "region #0 is not an I/O resource, aborting.\n");
1da177e4
LT		 904 return -EINVAL;
905 }
906
e54f4893 907 if ((pci_resource_flags(pdev, 1) & IORESOURCE_IO)) {
9b91cf9d 908 dev_err(&pdev->dev,
e54f4893 909 "region #1 is an I/O resource, aborting.\n");
1da177e4
LT		 910 return -EINVAL;
911 }
912
cabb7667 913 if (pci_resource_len(pdev, 1) < VELOCITY_IO_SIZE) {
9b91cf9d 914 dev_err(&pdev->dev, "region #1 is too small.\n");
1da177e4
LT		 915 return -EINVAL;
916 }
917 vptr->pdev = pdev;
918
919 return 0;
920}
921
922/**
923 * velocity_init_rings - set up DMA rings
924 * @vptr: Velocity to set up
925 *
926 * Allocate PCI mapped DMA rings for the receive and transmit layer
927 * to use.
928 */
929
930static int velocity_init_rings(struct velocity_info *vptr)
931{
932 int i;
933 unsigned int psize;
934 unsigned int tsize;
935 dma_addr_t pool_dma;
936 u8 *pool;
937
938 /*
6aa20a22 939 * Allocate all RD/TD rings a single pool
1da177e4 940 */
6aa20a22
JG		 941
942 psize = vptr->options.numrx * sizeof(struct rx_desc) +
1da177e4
LT		 943 vptr->options.numtx * sizeof(struct tx_desc) * vptr->num_txq;
944
945 /*
946 * pci_alloc_consistent() fulfills the requirement for 64 bytes
947 * alignment
948 */
949 pool = pci_alloc_consistent(vptr->pdev, psize, &pool_dma);
950
951 if (pool == NULL) {
6aa20a22 952 printk(KERN_ERR "%s : DMA memory allocation failed.\n",
1da177e4
LT		 953 vptr->dev->name);
954 return -ENOMEM;
955 }
956
957 memset(pool, 0, psize);
958
959 vptr->rd_ring = (struct rx_desc *) pool;
960
961 vptr->rd_pool_dma = pool_dma;
962
963 tsize = vptr->options.numtx * PKT_BUF_SZ * vptr->num_txq;
6aa20a22 964 vptr->tx_bufs = pci_alloc_consistent(vptr->pdev, tsize,
1da177e4
LT		 965 &vptr->tx_bufs_dma);
966
967 if (vptr->tx_bufs == NULL) {
6aa20a22 968 printk(KERN_ERR "%s: DMA memory allocation failed.\n",
1da177e4
LT		 969 vptr->dev->name);
970 pci_free_consistent(vptr->pdev, psize, pool, pool_dma);
971 return -ENOMEM;
972 }
973
974 memset(vptr->tx_bufs, 0, vptr->options.numtx * PKT_BUF_SZ * vptr->num_txq);
975
976 i = vptr->options.numrx * sizeof(struct rx_desc);
977 pool += i;
978 pool_dma += i;
979 for (i = 0; i < vptr->num_txq; i++) {
980 int offset = vptr->options.numtx * sizeof(struct tx_desc);
981
982 vptr->td_pool_dma[i] = pool_dma;
983 vptr->td_rings[i] = (struct tx_desc *) pool;
984 pool += offset;
985 pool_dma += offset;
986 }
987 return 0;
988}
989
990/**
991 * velocity_free_rings - free PCI ring pointers
992 * @vptr: Velocity to free from
993 *
994 * Clean up the PCI ring buffers allocated to this velocity.
995 */
996
997static void velocity_free_rings(struct velocity_info *vptr)
998{
999 int size;
1000
6aa20a22 1001 size = vptr->options.numrx * sizeof(struct rx_desc) +
1da177e4
LT		 1002 vptr->options.numtx * sizeof(struct tx_desc) * vptr->num_txq;
1003
1004 pci_free_consistent(vptr->pdev, size, vptr->rd_ring, vptr->rd_pool_dma);
1005
1006 size = vptr->options.numtx * PKT_BUF_SZ * vptr->num_txq;
1007
1008 pci_free_consistent(vptr->pdev, size, vptr->tx_bufs, vptr->tx_bufs_dma);
1009}
1010
1011static inline void velocity_give_many_rx_descs(struct velocity_info *vptr)
1012{
1013 struct mac_regs __iomem *regs = vptr->mac_regs;
1014 int avail, dirty, unusable;
1015
1016 /*
1017 * RD number must be equal to 4X per hardware spec
1018 * (programming guide rev 1.20, p.13)
1019 */
1020 if (vptr->rd_filled < 4)
1021 return;
1022
1023 wmb();
1024
1025 unusable = vptr->rd_filled & 0x0003;
1026 dirty = vptr->rd_dirty - unusable;
1027 for (avail = vptr->rd_filled & 0xfffc; avail; avail--) {
1028 dirty = (dirty > 0) ? dirty - 1 : vptr->options.numrx - 1;
1029 vptr->rd_ring[dirty].rdesc0.owner = OWNED_BY_NIC;
1030 }
1031
1032 writew(vptr->rd_filled & 0xfffc, &regs->RBRDU);
1033 vptr->rd_filled = unusable;
1034}
1035
1036static int velocity_rx_refill(struct velocity_info *vptr)
1037{
1038 int dirty = vptr->rd_dirty, done = 0, ret = 0;
1039
1040 do {
1041 struct rx_desc *rd = vptr->rd_ring + dirty;
1042
1043 /* Fine for an all zero Rx desc at init time as well */
1044 if (rd->rdesc0.owner == OWNED_BY_NIC)
1045 break;
1046
1047 if (!vptr->rd_info[dirty].skb) {
1048 ret = velocity_alloc_rx_buf(vptr, dirty);
1049 if (ret < 0)
1050 break;
1051 }
1052 done++;
6aa20a22 1053 dirty = (dirty < vptr->options.numrx - 1) ? dirty + 1 : 0;
1da177e4
LT		 1054 } while (dirty != vptr->rd_curr);
1055
1056 if (done) {
1057 vptr->rd_dirty = dirty;
1058 vptr->rd_filled += done;
1059 velocity_give_many_rx_descs(vptr);
1060 }
1061
1062 return ret;
1063}
1064
1065/**
1066 * velocity_init_rd_ring - set up receive ring
1067 * @vptr: velocity to configure
1068 *
1069 * Allocate and set up the receive buffers for each ring slot and
1070 * assign them to the network adapter.
1071 */
1072
1073static int velocity_init_rd_ring(struct velocity_info *vptr)
1074{
1075 int ret = -ENOMEM;
6aa20a22 1076 unsigned int rsize = sizeof(struct velocity_rd_info) *
1da177e4
LT		 1077 vptr->options.numrx;
1078
1079 vptr->rd_info = kmalloc(rsize, GFP_KERNEL);
1080 if(vptr->rd_info == NULL)
1081 goto out;
1082 memset(vptr->rd_info, 0, rsize);
1083
1084 vptr->rd_filled = vptr->rd_dirty = vptr->rd_curr = 0;
1085
1086 ret = velocity_rx_refill(vptr);
1087 if (ret < 0) {
1088 VELOCITY_PRT(MSG_LEVEL_ERR, KERN_ERR
1089 "%s: failed to allocate RX buffer.\n", vptr->dev->name);
1090 velocity_free_rd_ring(vptr);
1091 }
1092out:
1093 return ret;
1094}
1095
1096/**
1097 * velocity_free_rd_ring - free receive ring
1098 * @vptr: velocity to clean up
1099 *
1100 * Free the receive buffers for each ring slot and any
1101 * attached socket buffers that need to go away.
1102 */
1103
1104static void velocity_free_rd_ring(struct velocity_info *vptr)
1105{
1106 int i;
1107
1108 if (vptr->rd_info == NULL)
1109 return;
1110
1111 for (i = 0; i < vptr->options.numrx; i++) {
1112 struct velocity_rd_info *rd_info = &(vptr->rd_info[i]);
b3c3e7d7
FR		 1113 struct rx_desc *rd = vptr->rd_ring + i;
1114
1115 memset(rd, 0, sizeof(*rd));
1da177e4
LT		 1116
1117 if (!rd_info->skb)
1118 continue;
1119 pci_unmap_single(vptr->pdev, rd_info->skb_dma, vptr->rx_buf_sz,
1120 PCI_DMA_FROMDEVICE);
1121 rd_info->skb_dma = (dma_addr_t) NULL;
1122
1123 dev_kfree_skb(rd_info->skb);
1124 rd_info->skb = NULL;
1125 }
1126
1127 kfree(vptr->rd_info);
1128 vptr->rd_info = NULL;
1129}
1130
1131/**
1132 * velocity_init_td_ring - set up transmit ring
1133 * @vptr: velocity
1134 *
1135 * Set up the transmit ring and chain the ring pointers together.
1136 * Returns zero on success or a negative posix errno code for
1137 * failure.
1138 */
6aa20a22 1139
1da177e4
LT		 1140static int velocity_init_td_ring(struct velocity_info *vptr)
1141{
1142 int i, j;
1143 dma_addr_t curr;
1144 struct tx_desc *td;
1145 struct velocity_td_info *td_info;
6aa20a22 1146 unsigned int tsize = sizeof(struct velocity_td_info) *
1da177e4
LT		 1147 vptr->options.numtx;
1148
1149 /* Init the TD ring entries */
1150 for (j = 0; j < vptr->num_txq; j++) {
1151 curr = vptr->td_pool_dma[j];
1152
1153 vptr->td_infos[j] = kmalloc(tsize, GFP_KERNEL);
1154 if(vptr->td_infos[j] == NULL)
1155 {
1156 while(--j >= 0)
1157 kfree(vptr->td_infos[j]);
1158 return -ENOMEM;
1159 }
1160 memset(vptr->td_infos[j], 0, tsize);
1161
1162 for (i = 0; i < vptr->options.numtx; i++, curr += sizeof(struct tx_desc)) {
1163 td = &(vptr->td_rings[j][i]);
1164 td_info = &(vptr->td_infos[j][i]);
1165 td_info->buf = vptr->tx_bufs +
1166 (j * vptr->options.numtx + i) * PKT_BUF_SZ;
1167 td_info->buf_dma = vptr->tx_bufs_dma +
1168 (j * vptr->options.numtx + i) * PKT_BUF_SZ;
1169 }
1170 vptr->td_tail[j] = vptr->td_curr[j] = vptr->td_used[j] = 0;
1171 }
1172 return 0;
1173}
1174
1175/*
1176 * FIXME: could we merge this with velocity_free_tx_buf ?
1177 */
1178
1179static void velocity_free_td_ring_entry(struct velocity_info *vptr,
1180 int q, int n)
1181{
1182 struct velocity_td_info * td_info = &(vptr->td_infos[q][n]);
1183 int i;
6aa20a22 1184
1da177e4
LT		 1185 if (td_info == NULL)
1186 return;
6aa20a22 1187
1da177e4
LT		 1188 if (td_info->skb) {
1189 for (i = 0; i < td_info->nskb_dma; i++)
1190 {
1191 if (td_info->skb_dma[i]) {
6aa20a22 1192 pci_unmap_single(vptr->pdev, td_info->skb_dma[i],
1da177e4
LT		 1193 td_info->skb->len, PCI_DMA_TODEVICE);
1194 td_info->skb_dma[i] = (dma_addr_t) NULL;
1195 }
1196 }
1197 dev_kfree_skb(td_info->skb);
1198 td_info->skb = NULL;
1199 }
1200}
1201
1202/**
1203 * velocity_free_td_ring - free td ring
1204 * @vptr: velocity
1205 *
1206 * Free up the transmit ring for this particular velocity adapter.
1207 * We free the ring contents but not the ring itself.
1208 */
6aa20a22 1209
1da177e4
LT		 1210static void velocity_free_td_ring(struct velocity_info *vptr)
1211{
1212 int i, j;
1213
1214 for (j = 0; j < vptr->num_txq; j++) {
1215 if (vptr->td_infos[j] == NULL)
1216 continue;
1217 for (i = 0; i < vptr->options.numtx; i++) {
1218 velocity_free_td_ring_entry(vptr, j, i);
1219
1220 }
b4558ea9
JJ		 1221 kfree(vptr->td_infos[j]);
1222 vptr->td_infos[j] = NULL;
1da177e4
LT		 1223 }
1224}
1225
1226/**
1227 * velocity_rx_srv - service RX interrupt
1228 * @vptr: velocity
1229 * @status: adapter status (unused)
1230 *
1231 * Walk the receive ring of the velocity adapter and remove
1232 * any received packets from the receive queue. Hand the ring
1233 * slots back to the adapter for reuse.
1234 */
6aa20a22 1235
1da177e4
LT		 1236static int velocity_rx_srv(struct velocity_info *vptr, int status)
1237{
1238 struct net_device_stats *stats = &vptr->stats;
1239 int rd_curr = vptr->rd_curr;
1240 int works = 0;
1241
1242 do {
1243 struct rx_desc *rd = vptr->rd_ring + rd_curr;
1244
1245 if (!vptr->rd_info[rd_curr].skb)
1246 break;
1247
1248 if (rd->rdesc0.owner == OWNED_BY_NIC)
1249 break;
1250
1251 rmb();
1252
1253 /*
1254 * Don't drop CE or RL error frame although RXOK is off
1255 */
1256 if ((rd->rdesc0.RSR & RSR_RXOK) || (!(rd->rdesc0.RSR & RSR_RXOK) && (rd->rdesc0.RSR & (RSR_CE | RSR_RL)))) {
1257 if (velocity_receive_frame(vptr, rd_curr) < 0)
1258 stats->rx_dropped++;
1259 } else {
1260 if (rd->rdesc0.RSR & RSR_CRC)
1261 stats->rx_crc_errors++;
1262 if (rd->rdesc0.RSR & RSR_FAE)
1263 stats->rx_frame_errors++;
1264
1265 stats->rx_dropped++;
1266 }
1267
1268 rd->inten = 1;
1269
1270 vptr->dev->last_rx = jiffies;
1271
1272 rd_curr++;
1273 if (rd_curr >= vptr->options.numrx)
1274 rd_curr = 0;
1275 } while (++works <= 15);
1276
1277 vptr->rd_curr = rd_curr;
1278
1279 if (works > 0 && velocity_rx_refill(vptr) < 0) {
1280 VELOCITY_PRT(MSG_LEVEL_ERR, KERN_ERR
1281 "%s: rx buf allocation failure\n", vptr->dev->name);
1282 }
1283
1284 VAR_USED(stats);
1285 return works;
1286}
1287
1288/**
1289 * velocity_rx_csum - checksum process
1290 * @rd: receive packet descriptor
1291 * @skb: network layer packet buffer
1292 *
1293 * Process the status bits for the received packet and determine
1294 * if the checksum was computed and verified by the hardware
1295 */
6aa20a22 1296
1da177e4
LT		 1297static inline void velocity_rx_csum(struct rx_desc *rd, struct sk_buff *skb)
1298{
1299 skb->ip_summed = CHECKSUM_NONE;
1300
1301 if (rd->rdesc1.CSM & CSM_IPKT) {
1302 if (rd->rdesc1.CSM & CSM_IPOK) {
6aa20a22 1303 if ((rd->rdesc1.CSM & CSM_TCPKT) ||
1da177e4
LT		 1304 (rd->rdesc1.CSM & CSM_UDPKT)) {
1305 if (!(rd->rdesc1.CSM & CSM_TUPOK)) {
1306 return;
1307 }
1308 }
1309 skb->ip_summed = CHECKSUM_UNNECESSARY;
1310 }
1311 }
1312}
1313
1314/**
1315 * velocity_rx_copy - in place Rx copy for small packets
1316 * @rx_skb: network layer packet buffer candidate
1317 * @pkt_size: received data size
1318 * @rd: receive packet descriptor
1319 * @dev: network device
1320 *
1321 * Replace the current skb that is scheduled for Rx processing by a
1322 * shorter, immediatly allocated skb, if the received packet is small
1323 * enough. This function returns a negative value if the received
1324 * packet is too big or if memory is exhausted.
1325 */
1326static inline int velocity_rx_copy(struct sk_buff **rx_skb, int pkt_size,
1327 struct velocity_info *vptr)
1328{
1329 int ret = -1;
1330
1331 if (pkt_size < rx_copybreak) {
1332 struct sk_buff *new_skb;
1333
1334 new_skb = dev_alloc_skb(pkt_size + 2);
1335 if (new_skb) {
1336 new_skb->dev = vptr->dev;
1337 new_skb->ip_summed = rx_skb[0]->ip_summed;
1338
1339 if (vptr->flags & VELOCITY_FLAGS_IP_ALIGN)
1340 skb_reserve(new_skb, 2);
1341
d626f62b
ACM		 1342 skb_copy_from_linear_data(rx_skb[0], new_skb->data,
1343 pkt_size);
1da177e4
LT		 1344 *rx_skb = new_skb;
1345 ret = 0;
1346 }
6aa20a22 1347
1da177e4
LT		 1348 }
1349 return ret;
1350}
1351
1352/**
1353 * velocity_iph_realign - IP header alignment
1354 * @vptr: velocity we are handling
1355 * @skb: network layer packet buffer
1356 * @pkt_size: received data size
1357 *
1358 * Align IP header on a 2 bytes boundary. This behavior can be
1359 * configured by the user.
1360 */
1361static inline void velocity_iph_realign(struct velocity_info *vptr,
1362 struct sk_buff *skb, int pkt_size)
1363{
1364 /* FIXME - memmove ? */
1365 if (vptr->flags & VELOCITY_FLAGS_IP_ALIGN) {
1366 int i;
1367
1368 for (i = pkt_size; i >= 0; i--)
1369 *(skb->data + i + 2) = *(skb->data + i);
1370 skb_reserve(skb, 2);
1371 }
1372}
1373
1374/**
1375 * velocity_receive_frame - received packet processor
1376 * @vptr: velocity we are handling
1377 * @idx: ring index
6aa20a22 1378 *
1da177e4
LT		 1379 * A packet has arrived. We process the packet and if appropriate
1380 * pass the frame up the network stack
1381 */
6aa20a22 1382
1da177e4
LT		 1383static int velocity_receive_frame(struct velocity_info *vptr, int idx)
1384{
1385 void (*pci_action)(struct pci_dev *, dma_addr_t, size_t, int);
1386 struct net_device_stats *stats = &vptr->stats;
1387 struct velocity_rd_info *rd_info = &(vptr->rd_info[idx]);
1388 struct rx_desc *rd = &(vptr->rd_ring[idx]);
1389 int pkt_len = rd->rdesc0.len;
1390 struct sk_buff *skb;
1391
1392 if (rd->rdesc0.RSR & (RSR_STP | RSR_EDP)) {
1393 VELOCITY_PRT(MSG_LEVEL_VERBOSE, KERN_ERR " %s : the received frame span multple RDs.\n", vptr->dev->name);
1394 stats->rx_length_errors++;
1395 return -EINVAL;
1396 }
1397
1398 if (rd->rdesc0.RSR & RSR_MAR)
1399 vptr->stats.multicast++;
1400
1401 skb = rd_info->skb;
1da177e4
LT		 1402
1403 pci_dma_sync_single_for_cpu(vptr->pdev, rd_info->skb_dma,
1404 vptr->rx_buf_sz, PCI_DMA_FROMDEVICE);
1405
1406 /*
1407 * Drop frame not meeting IEEE 802.3
1408 */
6aa20a22 1409
1da177e4
LT		 1410 if (vptr->flags & VELOCITY_FLAGS_VAL_PKT_LEN) {
1411 if (rd->rdesc0.RSR & RSR_RL) {
1412 stats->rx_length_errors++;
1413 return -EINVAL;
1414 }
1415 }
1416
1417 pci_action = pci_dma_sync_single_for_device;
1418
1419 velocity_rx_csum(rd, skb);
1420
1421 if (velocity_rx_copy(&skb, pkt_len, vptr) < 0) {
1422 velocity_iph_realign(vptr, skb, pkt_len);
1423 pci_action = pci_unmap_single;
1424 rd_info->skb = NULL;
1425 }
1426
1427 pci_action(vptr->pdev, rd_info->skb_dma, vptr->rx_buf_sz,
1428 PCI_DMA_FROMDEVICE);
1429
1430 skb_put(skb, pkt_len - 4);
4c13eb66 1431 skb->protocol = eth_type_trans(skb, vptr->dev);
1da177e4
LT		 1432
1433 stats->rx_bytes += pkt_len;
1434 netif_rx(skb);
1435
1436 return 0;
1437}
1438
1439/**
1440 * velocity_alloc_rx_buf - allocate aligned receive buffer
1441 * @vptr: velocity
1442 * @idx: ring index
1443 *
1444 * Allocate a new full sized buffer for the reception of a frame and
1445 * map it into PCI space for the hardware to use. The hardware
1446 * requires *64* byte alignment of the buffer which makes life
1447 * less fun than would be ideal.
1448 */
6aa20a22 1449
1da177e4
LT		 1450static int velocity_alloc_rx_buf(struct velocity_info *vptr, int idx)
1451{
1452 struct rx_desc *rd = &(vptr->rd_ring[idx]);
1453 struct velocity_rd_info *rd_info = &(vptr->rd_info[idx]);
1454
1455 rd_info->skb = dev_alloc_skb(vptr->rx_buf_sz + 64);
1456 if (rd_info->skb == NULL)
1457 return -ENOMEM;
1458
1459 /*
1460 * Do the gymnastics to get the buffer head for data at
1461 * 64byte alignment.
1462 */
689be439 1463 skb_reserve(rd_info->skb, (unsigned long) rd_info->skb->data & 63);
1da177e4 1464 rd_info->skb->dev = vptr->dev;
689be439 1465 rd_info->skb_dma = pci_map_single(vptr->pdev, rd_info->skb->data, vptr->rx_buf_sz, PCI_DMA_FROMDEVICE);
6aa20a22 1466
1da177e4
LT		 1467 /*
1468 * Fill in the descriptor to match
6aa20a22
JG		 1469 */
1470
1da177e4
LT		 1471 *((u32 *) & (rd->rdesc0)) = 0;
1472 rd->len = cpu_to_le32(vptr->rx_buf_sz);
1473 rd->inten = 1;
1474 rd->pa_low = cpu_to_le32(rd_info->skb_dma);
1475 rd->pa_high = 0;
1476 return 0;
1477}
1478
1479/**
1480 * tx_srv - transmit interrupt service
1481 * @vptr; Velocity
1482 * @status:
1483 *
1484 * Scan the queues looking for transmitted packets that
1485 * we can complete and clean up. Update any statistics as
1486 * neccessary/
1487 */
6aa20a22 1488
1da177e4
LT		 1489static int velocity_tx_srv(struct velocity_info *vptr, u32 status)
1490{
1491 struct tx_desc *td;
1492 int qnum;
1493 int full = 0;
1494 int idx;
1495 int works = 0;
1496 struct velocity_td_info *tdinfo;
1497 struct net_device_stats *stats = &vptr->stats;
1498
1499 for (qnum = 0; qnum < vptr->num_txq; qnum++) {
6aa20a22 1500 for (idx = vptr->td_tail[qnum]; vptr->td_used[qnum] > 0;
1da177e4
LT		 1501 idx = (idx + 1) % vptr->options.numtx) {
1502
1503 /*
1504 * Get Tx Descriptor
1505 */
1506 td = &(vptr->td_rings[qnum][idx]);
1507 tdinfo = &(vptr->td_infos[qnum][idx]);
1508
1509 if (td->tdesc0.owner == OWNED_BY_NIC)
1510 break;
1511
1512 if ((works++ > 15))
1513 break;
1514
1515 if (td->tdesc0.TSR & TSR0_TERR) {
1516 stats->tx_errors++;
1517 stats->tx_dropped++;
1518 if (td->tdesc0.TSR & TSR0_CDH)
1519 stats->tx_heartbeat_errors++;
1520 if (td->tdesc0.TSR & TSR0_CRS)
1521 stats->tx_carrier_errors++;
1522 if (td->tdesc0.TSR & TSR0_ABT)
1523 stats->tx_aborted_errors++;
1524 if (td->tdesc0.TSR & TSR0_OWC)
1525 stats->tx_window_errors++;
1526 } else {
1527 stats->tx_packets++;
1528 stats->tx_bytes += tdinfo->skb->len;
1529 }
1530 velocity_free_tx_buf(vptr, tdinfo);
1531 vptr->td_used[qnum]--;
1532 }
1533 vptr->td_tail[qnum] = idx;
1534
1535 if (AVAIL_TD(vptr, qnum) < 1) {
1536 full = 1;
1537 }
1538 }
1539 /*
1540 * Look to see if we should kick the transmit network
1541 * layer for more work.
1542 */
1543 if (netif_queue_stopped(vptr->dev) && (full == 0)
1544 && (!(vptr->mii_status & VELOCITY_LINK_FAIL))) {
1545 netif_wake_queue(vptr->dev);
1546 }
1547 return works;
1548}
1549
1550/**
1551 * velocity_print_link_status - link status reporting
1552 * @vptr: velocity to report on
1553 *
1554 * Turn the link status of the velocity card into a kernel log
1555 * description of the new link state, detailing speed and duplex
1556 * status
1557 */
1558
1559static void velocity_print_link_status(struct velocity_info *vptr)
1560{
1561
1562 if (vptr->mii_status & VELOCITY_LINK_FAIL) {
1563 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: failed to detect cable link\n", vptr->dev->name);
1564 } else if (vptr->options.spd_dpx == SPD_DPX_AUTO) {
1565 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: Link autonegation", vptr->dev->name);
1566
1567 if (vptr->mii_status & VELOCITY_SPEED_1000)
1568 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 1000M bps");
1569 else if (vptr->mii_status & VELOCITY_SPEED_100)
1570 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 100M bps");
1571 else
1572 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 10M bps");
1573
1574 if (vptr->mii_status & VELOCITY_DUPLEX_FULL)
1575 VELOCITY_PRT(MSG_LEVEL_INFO, " full duplex\n");
1576 else
1577 VELOCITY_PRT(MSG_LEVEL_INFO, " half duplex\n");
1578 } else {
1579 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: Link forced", vptr->dev->name);
1580 switch (vptr->options.spd_dpx) {
1581 case SPD_DPX_100_HALF:
1582 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 100M bps half duplex\n");
1583 break;
1584 case SPD_DPX_100_FULL:
1585 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 100M bps full duplex\n");
1586 break;
1587 case SPD_DPX_10_HALF:
1588 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 10M bps half duplex\n");
1589 break;
1590 case SPD_DPX_10_FULL:
1591 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 10M bps full duplex\n");
1592 break;
1593 default:
1594 break;
1595 }
1596 }
1597}
1598
1599/**
1600 * velocity_error - handle error from controller
1601 * @vptr: velocity
1602 * @status: card status
1603 *
1604 * Process an error report from the hardware and attempt to recover
6aa20a22 1605 * the card itself. At the moment we cannot recover from some
1da177e4
LT		 1606 * theoretically impossible errors but this could be fixed using
1607 * the pci_device_failed logic to bounce the hardware
1608 *
1609 */
6aa20a22 1610
1da177e4
LT		 1611static void velocity_error(struct velocity_info *vptr, int status)
1612{
1613
1614 if (status & ISR_TXSTLI) {
1615 struct mac_regs __iomem * regs = vptr->mac_regs;
1616
1617 printk(KERN_ERR "TD structure errror TDindex=%hx\n", readw(&regs->TDIdx[0]));
1618 BYTE_REG_BITS_ON(TXESR_TDSTR, &regs->TXESR);
1619 writew(TRDCSR_RUN, &regs->TDCSRClr);
1620 netif_stop_queue(vptr->dev);
6aa20a22 1621
1da177e4
LT		 1622 /* FIXME: port over the pci_device_failed code and use it
1623 here */
1624 }
1625
1626 if (status & ISR_SRCI) {
1627 struct mac_regs __iomem * regs = vptr->mac_regs;
1628 int linked;
1629
1630 if (vptr->options.spd_dpx == SPD_DPX_AUTO) {
1631 vptr->mii_status = check_connection_type(regs);
1632
1633 /*
6aa20a22 1634 * If it is a 3119, disable frame bursting in
1da177e4
LT		 1635 * halfduplex mode and enable it in fullduplex
1636 * mode
1637 */
1638 if (vptr->rev_id < REV_ID_VT3216_A0) {
1639 if (vptr->mii_status | VELOCITY_DUPLEX_FULL)
1640 BYTE_REG_BITS_ON(TCR_TB2BDIS, &regs->TCR);
1641 else
1642 BYTE_REG_BITS_OFF(TCR_TB2BDIS, &regs->TCR);
1643 }
1644 /*
1645 * Only enable CD heart beat counter in 10HD mode
1646 */
1647 if (!(vptr->mii_status & VELOCITY_DUPLEX_FULL) && (vptr->mii_status & VELOCITY_SPEED_10)) {
1648 BYTE_REG_BITS_OFF(TESTCFG_HBDIS, &regs->TESTCFG);
1649 } else {
1650 BYTE_REG_BITS_ON(TESTCFG_HBDIS, &regs->TESTCFG);
1651 }
1652 }
1653 /*
1654 * Get link status from PHYSR0
1655 */
1656 linked = readb(&regs->PHYSR0) & PHYSR0_LINKGD;
1657
1658 if (linked) {
1659 vptr->mii_status &= ~VELOCITY_LINK_FAIL;
8a22dddb 1660 netif_carrier_on(vptr->dev);
1da177e4
LT		 1661 } else {
1662 vptr->mii_status |= VELOCITY_LINK_FAIL;
8a22dddb 1663 netif_carrier_off(vptr->dev);
1da177e4
LT		 1664 }
1665
1666 velocity_print_link_status(vptr);
1667 enable_flow_control_ability(vptr);
1668
1669 /*
6aa20a22 1670 * Re-enable auto-polling because SRCI will disable
1da177e4
LT		 1671 * auto-polling
1672 */
6aa20a22 1673
1da177e4
LT		 1674 enable_mii_autopoll(regs);
1675
1676 if (vptr->mii_status & VELOCITY_LINK_FAIL)
1677 netif_stop_queue(vptr->dev);
1678 else
1679 netif_wake_queue(vptr->dev);
1680
1681 };
1682 if (status & ISR_MIBFI)
1683 velocity_update_hw_mibs(vptr);
1684 if (status & ISR_LSTEI)
1685 mac_rx_queue_wake(vptr->mac_regs);
1686}
1687
1688/**
1689 * velocity_free_tx_buf - free transmit buffer
1690 * @vptr: velocity
1691 * @tdinfo: buffer
1692 *
1693 * Release an transmit buffer. If the buffer was preallocated then
1694 * recycle it, if not then unmap the buffer.
1695 */
6aa20a22 1696
1da177e4
LT		 1697static void velocity_free_tx_buf(struct velocity_info *vptr, struct velocity_td_info *tdinfo)
1698{
1699 struct sk_buff *skb = tdinfo->skb;
1700 int i;
1701
1702 /*
1703 * Don't unmap the pre-allocated tx_bufs
1704 */
1705 if (tdinfo->skb_dma && (tdinfo->skb_dma[0] != tdinfo->buf_dma)) {
1706
1707 for (i = 0; i < tdinfo->nskb_dma; i++) {
1708#ifdef VELOCITY_ZERO_COPY_SUPPORT
1709 pci_unmap_single(vptr->pdev, tdinfo->skb_dma[i], td->tdesc1.len, PCI_DMA_TODEVICE);
1710#else
1711 pci_unmap_single(vptr->pdev, tdinfo->skb_dma[i], skb->len, PCI_DMA_TODEVICE);
1712#endif
1713 tdinfo->skb_dma[i] = 0;
1714 }
1715 }
1716 dev_kfree_skb_irq(skb);
1717 tdinfo->skb = NULL;
1718}
1719
1720/**
1721 * velocity_open - interface activation callback
1722 * @dev: network layer device to open
1723 *
1724 * Called when the network layer brings the interface up. Returns
1725 * a negative posix error code on failure, or zero on success.
1726 *
1727 * All the ring allocation and set up is done on open for this
1728 * adapter to minimise memory usage when inactive
1729 */
6aa20a22 1730
1da177e4
LT		 1731static int velocity_open(struct net_device *dev)
1732{
8ab6f3f7 1733 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 1734 int ret;
1735
1736 vptr->rx_buf_sz = (dev->mtu <= 1504 ? PKT_BUF_SZ : dev->mtu + 32);
1737
1738 ret = velocity_init_rings(vptr);
1739 if (ret < 0)
1740 goto out;
1741
1742 ret = velocity_init_rd_ring(vptr);
1743 if (ret < 0)
1744 goto err_free_desc_rings;
1745
1746 ret = velocity_init_td_ring(vptr);
1747 if (ret < 0)
1748 goto err_free_rd_ring;
6aa20a22
JG		 1749
1750 /* Ensure chip is running */
1da177e4 1751 pci_set_power_state(vptr->pdev, PCI_D0);
6aa20a22 1752
1da177e4
LT		 1753 velocity_init_registers(vptr, VELOCITY_INIT_COLD);
1754
1fb9df5d 1755 ret = request_irq(vptr->pdev->irq, &velocity_intr, IRQF_SHARED,
1da177e4
LT		 1756 dev->name, dev);
1757 if (ret < 0) {
1758 /* Power down the chip */
1759 pci_set_power_state(vptr->pdev, PCI_D3hot);
1760 goto err_free_td_ring;
1761 }
1762
1763 mac_enable_int(vptr->mac_regs);
1764 netif_start_queue(dev);
1765 vptr->flags |= VELOCITY_FLAGS_OPENED;
1766out:
1767 return ret;
1768
1769err_free_td_ring:
1770 velocity_free_td_ring(vptr);
1771err_free_rd_ring:
1772 velocity_free_rd_ring(vptr);
1773err_free_desc_rings:
1774 velocity_free_rings(vptr);
1775 goto out;
1776}
1777
6aa20a22 1778/**
1da177e4
LT		 1779 * velocity_change_mtu - MTU change callback
1780 * @dev: network device
1781 * @new_mtu: desired MTU
1782 *
1783 * Handle requests from the networking layer for MTU change on
1784 * this interface. It gets called on a change by the network layer.
1785 * Return zero for success or negative posix error code.
1786 */
6aa20a22 1787
1da177e4
LT		 1788static int velocity_change_mtu(struct net_device *dev, int new_mtu)
1789{
8ab6f3f7 1790 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 1791 unsigned long flags;
1792 int oldmtu = dev->mtu;
1793 int ret = 0;
1794
1795 if ((new_mtu < VELOCITY_MIN_MTU) || new_mtu > (VELOCITY_MAX_MTU)) {
6aa20a22 1796 VELOCITY_PRT(MSG_LEVEL_ERR, KERN_NOTICE "%s: Invalid MTU.\n",
1da177e4
LT		 1797 vptr->dev->name);
1798 return -EINVAL;
1799 }
1800
1801 if (new_mtu != oldmtu) {
1802 spin_lock_irqsave(&vptr->lock, flags);
1803
1804 netif_stop_queue(dev);
1805 velocity_shutdown(vptr);
1806
1807 velocity_free_td_ring(vptr);
1808 velocity_free_rd_ring(vptr);
1809
1810 dev->mtu = new_mtu;
1811 if (new_mtu > 8192)
1812 vptr->rx_buf_sz = 9 * 1024;
1813 else if (new_mtu > 4096)
1814 vptr->rx_buf_sz = 8192;
1815 else
1816 vptr->rx_buf_sz = 4 * 1024;
1817
1818 ret = velocity_init_rd_ring(vptr);
1819 if (ret < 0)
1820 goto out_unlock;
1821
1822 ret = velocity_init_td_ring(vptr);
1823 if (ret < 0)
1824 goto out_unlock;
1825
1826 velocity_init_registers(vptr, VELOCITY_INIT_COLD);
1827
1828 mac_enable_int(vptr->mac_regs);
1829 netif_start_queue(dev);
1830out_unlock:
1831 spin_unlock_irqrestore(&vptr->lock, flags);
1832 }
1833
1834 return ret;
1835}
1836
1837/**
1838 * velocity_shutdown - shut down the chip
1839 * @vptr: velocity to deactivate
1840 *
1841 * Shuts down the internal operations of the velocity and
1842 * disables interrupts, autopolling, transmit and receive
1843 */
6aa20a22 1844
1da177e4
LT		 1845static void velocity_shutdown(struct velocity_info *vptr)
1846{
1847 struct mac_regs __iomem * regs = vptr->mac_regs;
1848 mac_disable_int(regs);
1849 writel(CR0_STOP, &regs->CR0Set);
1850 writew(0xFFFF, &regs->TDCSRClr);
1851 writeb(0xFF, &regs->RDCSRClr);
1852 safe_disable_mii_autopoll(regs);
1853 mac_clear_isr(regs);
1854}
1855
1856/**
1857 * velocity_close - close adapter callback
1858 * @dev: network device
1859 *
1860 * Callback from the network layer when the velocity is being
1861 * deactivated by the network layer
1862 */
1863
1864static int velocity_close(struct net_device *dev)
1865{
8ab6f3f7 1866 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 1867
1868 netif_stop_queue(dev);
1869 velocity_shutdown(vptr);
1870
1871 if (vptr->flags & VELOCITY_FLAGS_WOL_ENABLED)
1872 velocity_get_ip(vptr);
1873 if (dev->irq != 0)
1874 free_irq(dev->irq, dev);
6aa20a22 1875
1da177e4
LT		 1876 /* Power down the chip */
1877 pci_set_power_state(vptr->pdev, PCI_D3hot);
6aa20a22 1878
1da177e4
LT		 1879 /* Free the resources */
1880 velocity_free_td_ring(vptr);
1881 velocity_free_rd_ring(vptr);
1882 velocity_free_rings(vptr);
1883
1884 vptr->flags &= (~VELOCITY_FLAGS_OPENED);
1885 return 0;
1886}
1887
1888/**
1889 * velocity_xmit - transmit packet callback
1890 * @skb: buffer to transmit
1891 * @dev: network device
1892 *
1893 * Called by the networ layer to request a packet is queued to
1894 * the velocity. Returns zero on success.
1895 */
6aa20a22 1896
1da177e4
LT		 1897static int velocity_xmit(struct sk_buff *skb, struct net_device *dev)
1898{
8ab6f3f7 1899 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 1900 int qnum = 0;
1901 struct tx_desc *td_ptr;
1902 struct velocity_td_info *tdinfo;
1903 unsigned long flags;
1904 int index;
1905
1906 int pktlen = skb->len;
1907
364c6bad
HX		 1908#ifdef VELOCITY_ZERO_COPY_SUPPORT
1909 if (skb_shinfo(skb)->nr_frags > 6 && __skb_linearize(skb)) {
1910 kfree_skb(skb);
1911 return 0;
1912 }
1913#endif
1914
1da177e4
LT		 1915 spin_lock_irqsave(&vptr->lock, flags);
1916
1917 index = vptr->td_curr[qnum];
1918 td_ptr = &(vptr->td_rings[qnum][index]);
1919 tdinfo = &(vptr->td_infos[qnum][index]);
1920
1921 td_ptr->tdesc1.TCPLS = TCPLS_NORMAL;
1922 td_ptr->tdesc1.TCR = TCR0_TIC;
1923 td_ptr->td_buf[0].queue = 0;
1924
1925 /*
6aa20a22 1926 * Pad short frames.
1da177e4
LT		 1927 */
1928 if (pktlen < ETH_ZLEN) {
1929 /* Cannot occur until ZC support */
1da177e4 1930 pktlen = ETH_ZLEN;
d626f62b 1931 skb_copy_from_linear_data(skb, tdinfo->buf, skb->len);
1da177e4
LT		 1932 memset(tdinfo->buf + skb->len, 0, ETH_ZLEN - skb->len);
1933 tdinfo->skb = skb;
1934 tdinfo->skb_dma[0] = tdinfo->buf_dma;
1935 td_ptr->tdesc0.pktsize = pktlen;
1936 td_ptr->td_buf[0].pa_low = cpu_to_le32(tdinfo->skb_dma[0]);
1937 td_ptr->td_buf[0].pa_high = 0;
1938 td_ptr->td_buf[0].bufsize = td_ptr->tdesc0.pktsize;
1939 tdinfo->nskb_dma = 1;
1940 td_ptr->tdesc1.CMDZ = 2;
1941 } else
1942#ifdef VELOCITY_ZERO_COPY_SUPPORT
1943 if (skb_shinfo(skb)->nr_frags > 0) {
1944 int nfrags = skb_shinfo(skb)->nr_frags;
1945 tdinfo->skb = skb;
1946 if (nfrags > 6) {
d626f62b 1947 skb_copy_from_linear_data(skb, tdinfo->buf, skb->len);
1da177e4 1948 tdinfo->skb_dma[0] = tdinfo->buf_dma;
6aa20a22 1949 td_ptr->tdesc0.pktsize =
1da177e4
LT		 1950 td_ptr->td_buf[0].pa_low = cpu_to_le32(tdinfo->skb_dma[0]);
1951 td_ptr->td_buf[0].pa_high = 0;
1952 td_ptr->td_buf[0].bufsize = td_ptr->tdesc0.pktsize;
1953 tdinfo->nskb_dma = 1;
1954 td_ptr->tdesc1.CMDZ = 2;
1955 } else {
1956 int i = 0;
1957 tdinfo->nskb_dma = 0;
1958 tdinfo->skb_dma[i] = pci_map_single(vptr->pdev, skb->data, skb->len - skb->data_len, PCI_DMA_TODEVICE);
1959
1960 td_ptr->tdesc0.pktsize = pktlen;
1961
1962 /* FIXME: support 48bit DMA later */
1963 td_ptr->td_buf[i].pa_low = cpu_to_le32(tdinfo->skb_dma);
1964 td_ptr->td_buf[i].pa_high = 0;
1965 td_ptr->td_buf[i].bufsize = skb->len->skb->data_len;
1966
1967 for (i = 0; i < nfrags; i++) {
1968 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
1969 void *addr = ((void *) page_address(frag->page + frag->page_offset));
1970
1971 tdinfo->skb_dma[i + 1] = pci_map_single(vptr->pdev, addr, frag->size, PCI_DMA_TODEVICE);
1972
1973 td_ptr->td_buf[i + 1].pa_low = cpu_to_le32(tdinfo->skb_dma[i + 1]);
1974 td_ptr->td_buf[i + 1].pa_high = 0;
1975 td_ptr->td_buf[i + 1].bufsize = frag->size;
1976 }
1977 tdinfo->nskb_dma = i - 1;
1978 td_ptr->tdesc1.CMDZ = i;
1979 }
1980
1981 } else
1982#endif
1983 {
1984 /*
1985 * Map the linear network buffer into PCI space and
1986 * add it to the transmit ring.
1987 */
1988 tdinfo->skb = skb;
1989 tdinfo->skb_dma[0] = pci_map_single(vptr->pdev, skb->data, pktlen, PCI_DMA_TODEVICE);
1990 td_ptr->tdesc0.pktsize = pktlen;
1991 td_ptr->td_buf[0].pa_low = cpu_to_le32(tdinfo->skb_dma[0]);
1992 td_ptr->td_buf[0].pa_high = 0;
1993 td_ptr->td_buf[0].bufsize = td_ptr->tdesc0.pktsize;
1994 tdinfo->nskb_dma = 1;
1995 td_ptr->tdesc1.CMDZ = 2;
1996 }
1997
1998 if (vptr->flags & VELOCITY_FLAGS_TAGGING) {
1999 td_ptr->tdesc1.pqinf.VID = (vptr->options.vid & 0xfff);
2000 td_ptr->tdesc1.pqinf.priority = 0;
2001 td_ptr->tdesc1.pqinf.CFI = 0;
2002 td_ptr->tdesc1.TCR |= TCR0_VETAG;
2003 }
2004
2005 /*
2006 * Handle hardware checksum
2007 */
2008 if ((vptr->flags & VELOCITY_FLAGS_TX_CSUM)
84fa7933 2009 && (skb->ip_summed == CHECKSUM_PARTIAL)) {
eddc9ec5 2010 const struct iphdr *ip = ip_hdr(skb);
1da177e4
LT		 2011 if (ip->protocol == IPPROTO_TCP)
2012 td_ptr->tdesc1.TCR |= TCR0_TCPCK;
2013 else if (ip->protocol == IPPROTO_UDP)
2014 td_ptr->tdesc1.TCR |= (TCR0_UDPCK);
2015 td_ptr->tdesc1.TCR |= TCR0_IPCK;
2016 }
2017 {
2018
2019 int prev = index - 1;
2020
2021 if (prev < 0)
2022 prev = vptr->options.numtx - 1;
2023 td_ptr->tdesc0.owner = OWNED_BY_NIC;
2024 vptr->td_used[qnum]++;
2025 vptr->td_curr[qnum] = (index + 1) % vptr->options.numtx;
2026
2027 if (AVAIL_TD(vptr, qnum) < 1)
2028 netif_stop_queue(dev);
2029
2030 td_ptr = &(vptr->td_rings[qnum][prev]);
2031 td_ptr->td_buf[0].queue = 1;
2032 mac_tx_queue_wake(vptr->mac_regs, qnum);
2033 }
2034 dev->trans_start = jiffies;
2035 spin_unlock_irqrestore(&vptr->lock, flags);
2036 return 0;
2037}
2038
2039/**
2040 * velocity_intr - interrupt callback
2041 * @irq: interrupt number
2042 * @dev_instance: interrupting device
1da177e4
LT		 2043 *
2044 * Called whenever an interrupt is generated by the velocity
2045 * adapter IRQ line. We may not be the source of the interrupt
2046 * and need to identify initially if we are, and if not exit as
2047 * efficiently as possible.
2048 */
6aa20a22 2049
7d12e780 2050static int velocity_intr(int irq, void *dev_instance)
1da177e4
LT		 2051{
2052 struct net_device *dev = dev_instance;
8ab6f3f7 2053 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 2054 u32 isr_status;
2055 int max_count = 0;
2056
2057
2058 spin_lock(&vptr->lock);
2059 isr_status = mac_read_isr(vptr->mac_regs);
2060
2061 /* Not us ? */
2062 if (isr_status == 0) {
2063 spin_unlock(&vptr->lock);
2064 return IRQ_NONE;
2065 }
2066
2067 mac_disable_int(vptr->mac_regs);
2068
2069 /*
2070 * Keep processing the ISR until we have completed
2071 * processing and the isr_status becomes zero
2072 */
6aa20a22 2073
1da177e4
LT		 2074 while (isr_status != 0) {
2075 mac_write_isr(vptr->mac_regs, isr_status);
2076 if (isr_status & (~(ISR_PRXI | ISR_PPRXI | ISR_PTXI | ISR_PPTXI)))
2077 velocity_error(vptr, isr_status);
2078 if (isr_status & (ISR_PRXI | ISR_PPRXI))
2079 max_count += velocity_rx_srv(vptr, isr_status);
2080 if (isr_status & (ISR_PTXI | ISR_PPTXI))
2081 max_count += velocity_tx_srv(vptr, isr_status);
2082 isr_status = mac_read_isr(vptr->mac_regs);
2083 if (max_count > vptr->options.int_works)
2084 {
6aa20a22 2085 printk(KERN_WARNING "%s: excessive work at interrupt.\n",
1da177e4
LT		 2086 dev->name);
2087 max_count = 0;
2088 }
2089 }
2090 spin_unlock(&vptr->lock);
2091 mac_enable_int(vptr->mac_regs);
2092 return IRQ_HANDLED;
2093
2094}
2095
2096
2097/**
2098 * velocity_set_multi - filter list change callback
2099 * @dev: network device
2100 *
2101 * Called by the network layer when the filter lists need to change
2102 * for a velocity adapter. Reload the CAMs with the new address
2103 * filter ruleset.
2104 */
6aa20a22 2105
1da177e4
LT		 2106static void velocity_set_multi(struct net_device *dev)
2107{
8ab6f3f7 2108 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 2109 struct mac_regs __iomem * regs = vptr->mac_regs;
2110 u8 rx_mode;
2111 int i;
2112 struct dev_mc_list *mclist;
2113
2114 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
1da177e4
LT		 2115 writel(0xffffffff, &regs->MARCAM[0]);
2116 writel(0xffffffff, &regs->MARCAM[4]);
2117 rx_mode = (RCR_AM | RCR_AB | RCR_PROM);
2118 } else if ((dev->mc_count > vptr->multicast_limit)
2119 || (dev->flags & IFF_ALLMULTI)) {
2120 writel(0xffffffff, &regs->MARCAM[0]);
2121 writel(0xffffffff, &regs->MARCAM[4]);
2122 rx_mode = (RCR_AM | RCR_AB);
2123 } else {
2124 int offset = MCAM_SIZE - vptr->multicast_limit;
2125 mac_get_cam_mask(regs, vptr->mCAMmask, VELOCITY_MULTICAST_CAM);
2126
2127 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count; i++, mclist = mclist->next) {
2128 mac_set_cam(regs, i + offset, mclist->dmi_addr, VELOCITY_MULTICAST_CAM);
2129 vptr->mCAMmask[(offset + i) / 8] |= 1 << ((offset + i) & 7);
2130 }
2131
2132 mac_set_cam_mask(regs, vptr->mCAMmask, VELOCITY_MULTICAST_CAM);
2133 rx_mode = (RCR_AM | RCR_AB);
2134 }
2135 if (dev->mtu > 1500)
2136 rx_mode |= RCR_AL;
2137
2138 BYTE_REG_BITS_ON(rx_mode, &regs->RCR);
2139
2140}
2141
2142/**
2143 * velocity_get_status - statistics callback
2144 * @dev: network device
2145 *
2146 * Callback from the network layer to allow driver statistics
2147 * to be resynchronized with hardware collected state. In the
2148 * case of the velocity we need to pull the MIB counters from
2149 * the hardware into the counters before letting the network
2150 * layer display them.
2151 */
6aa20a22 2152
1da177e4
LT		 2153static struct net_device_stats *velocity_get_stats(struct net_device *dev)
2154{
8ab6f3f7 2155 struct velocity_info *vptr = netdev_priv(dev);
6aa20a22 2156
1da177e4
LT		 2157 /* If the hardware is down, don't touch MII */
2158 if(!netif_running(dev))
2159 return &vptr->stats;
2160
2161 spin_lock_irq(&vptr->lock);
2162 velocity_update_hw_mibs(vptr);
2163 spin_unlock_irq(&vptr->lock);
2164
2165 vptr->stats.rx_packets = vptr->mib_counter[HW_MIB_ifRxAllPkts];
2166 vptr->stats.rx_errors = vptr->mib_counter[HW_MIB_ifRxErrorPkts];
2167 vptr->stats.rx_length_errors = vptr->mib_counter[HW_MIB_ifInRangeLengthErrors];
2168
2169// unsigned long rx_dropped; /* no space in linux buffers */
2170 vptr->stats.collisions = vptr->mib_counter[HW_MIB_ifTxEtherCollisions];
2171 /* detailed rx_errors: */
2172// unsigned long rx_length_errors;
2173// unsigned long rx_over_errors; /* receiver ring buff overflow */
2174 vptr->stats.rx_crc_errors = vptr->mib_counter[HW_MIB_ifRxPktCRCE];
2175// unsigned long rx_frame_errors; /* recv'd frame alignment error */
2176// unsigned long rx_fifo_errors; /* recv'r fifo overrun */
2177// unsigned long rx_missed_errors; /* receiver missed packet */
2178
2179 /* detailed tx_errors */
2180// unsigned long tx_fifo_errors;
2181
2182 return &vptr->stats;
2183}
2184
2185
2186/**
2187 * velocity_ioctl - ioctl entry point
2188 * @dev: network device
2189 * @rq: interface request ioctl
2190 * @cmd: command code
2191 *
2192 * Called when the user issues an ioctl request to the network
2193 * device in question. The velocity interface supports MII.
2194 */
6aa20a22 2195
1da177e4
LT		 2196static int velocity_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2197{
8ab6f3f7 2198 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 2199 int ret;
2200
2201 /* If we are asked for information and the device is power
2202 saving then we need to bring the device back up to talk to it */
6aa20a22 2203
1da177e4
LT		 2204 if (!netif_running(dev))
2205 pci_set_power_state(vptr->pdev, PCI_D0);
6aa20a22 2206
1da177e4
LT		 2207 switch (cmd) {
2208 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
2209 case SIOCGMIIREG: /* Read MII PHY register. */
2210 case SIOCSMIIREG: /* Write to MII PHY register. */
2211 ret = velocity_mii_ioctl(dev, rq, cmd);
2212 break;
2213
2214 default:
2215 ret = -EOPNOTSUPP;
2216 }
2217 if (!netif_running(dev))
2218 pci_set_power_state(vptr->pdev, PCI_D3hot);
6aa20a22
JG		 2219
2220
1da177e4
LT		 2221 return ret;
2222}
2223
2224/*
2225 * Definition for our device driver. The PCI layer interface
2226 * uses this to handle all our card discover and plugging
2227 */
6aa20a22 2228
1da177e4
LT		 2229static struct pci_driver velocity_driver = {
2230 .name = VELOCITY_NAME,
2231 .id_table = velocity_id_table,
2232 .probe = velocity_found1,
2233 .remove = __devexit_p(velocity_remove1),
2234#ifdef CONFIG_PM
2235 .suspend = velocity_suspend,
2236 .resume = velocity_resume,
2237#endif
2238};
2239
2240/**
2241 * velocity_init_module - load time function
2242 *
2243 * Called when the velocity module is loaded. The PCI driver
2244 * is registered with the PCI layer, and in turn will call
2245 * the probe functions for each velocity adapter installed
2246 * in the system.
2247 */
6aa20a22 2248
1da177e4
LT		 2249static int __init velocity_init_module(void)
2250{
2251 int ret;
2252
2253 velocity_register_notifier();
29917620 2254 ret = pci_register_driver(&velocity_driver);
1da177e4
LT		 2255 if (ret < 0)
2256 velocity_unregister_notifier();
2257 return ret;
2258}
2259
2260/**
2261 * velocity_cleanup - module unload
2262 *
2263 * When the velocity hardware is unloaded this function is called.
6aa20a22 2264 * It will clean up the notifiers and the unregister the PCI
1da177e4
LT		 2265 * driver interface for this hardware. This in turn cleans up
2266 * all discovered interfaces before returning from the function
2267 */
6aa20a22 2268
1da177e4
LT		 2269static void __exit velocity_cleanup_module(void)
2270{
2271 velocity_unregister_notifier();
2272 pci_unregister_driver(&velocity_driver);
2273}
2274
2275module_init(velocity_init_module);
2276module_exit(velocity_cleanup_module);
2277
2278
2279/*
2280 * MII access , media link mode setting functions
2281 */
6aa20a22
JG		 2282
2283
1da177e4
LT		 2284/**
2285 * mii_init - set up MII
2286 * @vptr: velocity adapter
2287 * @mii_status: links tatus
2288 *
2289 * Set up the PHY for the current link state.
2290 */
6aa20a22 2291
1da177e4
LT		 2292static void mii_init(struct velocity_info *vptr, u32 mii_status)
2293{
2294 u16 BMCR;
2295
2296 switch (PHYID_GET_PHY_ID(vptr->phy_id)) {
2297 case PHYID_CICADA_CS8201:
2298 /*
2299 * Reset to hardware default
2300 */
2301 MII_REG_BITS_OFF((ANAR_ASMDIR | ANAR_PAUSE), MII_REG_ANAR, vptr->mac_regs);
2302 /*
2303 * Turn on ECHODIS bit in NWay-forced full mode and turn it
6aa20a22 2304 * off it in NWay-forced half mode for NWay-forced v.s.
1da177e4
LT		 2305 * legacy-forced issue.
2306 */
2307 if (vptr->mii_status & VELOCITY_DUPLEX_FULL)
2308 MII_REG_BITS_ON(TCSR_ECHODIS, MII_REG_TCSR, vptr->mac_regs);
2309 else
2310 MII_REG_BITS_OFF(TCSR_ECHODIS, MII_REG_TCSR, vptr->mac_regs);
2311 /*
2312 * Turn on Link/Activity LED enable bit for CIS8201
2313 */
2314 MII_REG_BITS_ON(PLED_LALBE, MII_REG_PLED, vptr->mac_regs);
2315 break;
2316 case PHYID_VT3216_32BIT:
2317 case PHYID_VT3216_64BIT:
2318 /*
2319 * Reset to hardware default
2320 */
2321 MII_REG_BITS_ON((ANAR_ASMDIR | ANAR_PAUSE), MII_REG_ANAR, vptr->mac_regs);
2322 /*
2323 * Turn on ECHODIS bit in NWay-forced full mode and turn it
6aa20a22 2324 * off it in NWay-forced half mode for NWay-forced v.s.
1da177e4
LT		 2325 * legacy-forced issue
2326 */
2327 if (vptr->mii_status & VELOCITY_DUPLEX_FULL)
2328 MII_REG_BITS_ON(TCSR_ECHODIS, MII_REG_TCSR, vptr->mac_regs);
2329 else
2330 MII_REG_BITS_OFF(TCSR_ECHODIS, MII_REG_TCSR, vptr->mac_regs);
2331 break;
2332
2333 case PHYID_MARVELL_1000:
2334 case PHYID_MARVELL_1000S:
2335 /*
6aa20a22 2336 * Assert CRS on Transmit
1da177e4
LT		 2337 */
2338 MII_REG_BITS_ON(PSCR_ACRSTX, MII_REG_PSCR, vptr->mac_regs);
2339 /*
6aa20a22 2340 * Reset to hardware default
1da177e4
LT		 2341 */
2342 MII_REG_BITS_ON((ANAR_ASMDIR | ANAR_PAUSE), MII_REG_ANAR, vptr->mac_regs);
2343 break;
2344 default:
2345 ;
2346 }
2347 velocity_mii_read(vptr->mac_regs, MII_REG_BMCR, &BMCR);
2348 if (BMCR & BMCR_ISO) {
2349 BMCR &= ~BMCR_ISO;
2350 velocity_mii_write(vptr->mac_regs, MII_REG_BMCR, BMCR);
2351 }
2352}
2353
2354/**
2355 * safe_disable_mii_autopoll - autopoll off
2356 * @regs: velocity registers
2357 *
2358 * Turn off the autopoll and wait for it to disable on the chip
2359 */
6aa20a22 2360
1da177e4
LT		 2361static void safe_disable_mii_autopoll(struct mac_regs __iomem * regs)
2362{
2363 u16 ww;
2364
2365 /* turn off MAUTO */
2366 writeb(0, &regs->MIICR);
2367 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
2368 udelay(1);
2369 if (BYTE_REG_BITS_IS_ON(MIISR_MIDLE, &regs->MIISR))
2370 break;
2371 }
2372}
2373
2374/**
2375 * enable_mii_autopoll - turn on autopolling
2376 * @regs: velocity registers
2377 *
2378 * Enable the MII link status autopoll feature on the Velocity
2379 * hardware. Wait for it to enable.
2380 */
2381
2382static void enable_mii_autopoll(struct mac_regs __iomem * regs)
2383{
2384 int ii;
2385
2386 writeb(0, &(regs->MIICR));
2387 writeb(MIIADR_SWMPL, &regs->MIIADR);
2388
2389 for (ii = 0; ii < W_MAX_TIMEOUT; ii++) {
2390 udelay(1);
2391 if (BYTE_REG_BITS_IS_ON(MIISR_MIDLE, &regs->MIISR))
2392 break;
2393 }
2394
2395 writeb(MIICR_MAUTO, &regs->MIICR);
2396
2397 for (ii = 0; ii < W_MAX_TIMEOUT; ii++) {
2398 udelay(1);
2399 if (!BYTE_REG_BITS_IS_ON(MIISR_MIDLE, &regs->MIISR))
2400 break;
2401 }
2402
2403}
2404
2405/**
2406 * velocity_mii_read - read MII data
2407 * @regs: velocity registers
2408 * @index: MII register index
2409 * @data: buffer for received data
2410 *
2411 * Perform a single read of an MII 16bit register. Returns zero
2412 * on success or -ETIMEDOUT if the PHY did not respond.
2413 */
6aa20a22 2414
1da177e4
LT		 2415static int velocity_mii_read(struct mac_regs __iomem *regs, u8 index, u16 *data)
2416{
2417 u16 ww;
2418
2419 /*
2420 * Disable MIICR_MAUTO, so that mii addr can be set normally
2421 */
2422 safe_disable_mii_autopoll(regs);
2423
2424 writeb(index, &regs->MIIADR);
2425
2426 BYTE_REG_BITS_ON(MIICR_RCMD, &regs->MIICR);
2427
2428 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
2429 if (!(readb(&regs->MIICR) & MIICR_RCMD))
2430 break;
2431 }
2432
2433 *data = readw(&regs->MIIDATA);
2434
2435 enable_mii_autopoll(regs);
2436 if (ww == W_MAX_TIMEOUT)
2437 return -ETIMEDOUT;
2438 return 0;
2439}
2440
2441/**
2442 * velocity_mii_write - write MII data
2443 * @regs: velocity registers
2444 * @index: MII register index
2445 * @data: 16bit data for the MII register
2446 *
2447 * Perform a single write to an MII 16bit register. Returns zero
2448 * on success or -ETIMEDOUT if the PHY did not respond.
2449 */
6aa20a22 2450
1da177e4
LT		 2451static int velocity_mii_write(struct mac_regs __iomem *regs, u8 mii_addr, u16 data)
2452{
2453 u16 ww;
2454
2455 /*
2456 * Disable MIICR_MAUTO, so that mii addr can be set normally
2457 */
2458 safe_disable_mii_autopoll(regs);
2459
2460 /* MII reg offset */
2461 writeb(mii_addr, &regs->MIIADR);
2462 /* set MII data */
2463 writew(data, &regs->MIIDATA);
2464
2465 /* turn on MIICR_WCMD */
2466 BYTE_REG_BITS_ON(MIICR_WCMD, &regs->MIICR);
2467
2468 /* W_MAX_TIMEOUT is the timeout period */
2469 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
2470 udelay(5);
2471 if (!(readb(&regs->MIICR) & MIICR_WCMD))
2472 break;
2473 }
2474 enable_mii_autopoll(regs);
2475
2476 if (ww == W_MAX_TIMEOUT)
2477 return -ETIMEDOUT;
2478 return 0;
2479}
2480
2481/**
2482 * velocity_get_opt_media_mode - get media selection
2483 * @vptr: velocity adapter
2484 *
2485 * Get the media mode stored in EEPROM or module options and load
2486 * mii_status accordingly. The requested link state information
2487 * is also returned.
2488 */
6aa20a22 2489
1da177e4
LT		 2490static u32 velocity_get_opt_media_mode(struct velocity_info *vptr)
2491{
2492 u32 status = 0;
2493
2494 switch (vptr->options.spd_dpx) {
2495 case SPD_DPX_AUTO:
2496 status = VELOCITY_AUTONEG_ENABLE;
2497 break;
2498 case SPD_DPX_100_FULL:
2499 status = VELOCITY_SPEED_100 | VELOCITY_DUPLEX_FULL;
2500 break;
2501 case SPD_DPX_10_FULL:
2502 status = VELOCITY_SPEED_10 | VELOCITY_DUPLEX_FULL;
2503 break;
2504 case SPD_DPX_100_HALF:
2505 status = VELOCITY_SPEED_100;
2506 break;
2507 case SPD_DPX_10_HALF:
2508 status = VELOCITY_SPEED_10;
2509 break;
2510 }
2511 vptr->mii_status = status;
2512 return status;
2513}
2514
2515/**
2516 * mii_set_auto_on - autonegotiate on
2517 * @vptr: velocity
2518 *
2519 * Enable autonegotation on this interface
2520 */
6aa20a22 2521
1da177e4
LT		 2522static void mii_set_auto_on(struct velocity_info *vptr)
2523{
2524 if (MII_REG_BITS_IS_ON(BMCR_AUTO, MII_REG_BMCR, vptr->mac_regs))
2525 MII_REG_BITS_ON(BMCR_REAUTO, MII_REG_BMCR, vptr->mac_regs);
2526 else
2527 MII_REG_BITS_ON(BMCR_AUTO, MII_REG_BMCR, vptr->mac_regs);
2528}
2529
2530
2531/*
2532static void mii_set_auto_off(struct velocity_info * vptr)
2533{
2534 MII_REG_BITS_OFF(BMCR_AUTO, MII_REG_BMCR, vptr->mac_regs);
2535}
2536*/
2537
2538/**
2539 * set_mii_flow_control - flow control setup
2540 * @vptr: velocity interface
2541 *
2542 * Set up the flow control on this interface according to
2543 * the supplied user/eeprom options.
2544 */
6aa20a22 2545
1da177e4
LT		 2546static void set_mii_flow_control(struct velocity_info *vptr)
2547{
2548 /*Enable or Disable PAUSE in ANAR */
2549 switch (vptr->options.flow_cntl) {
2550 case FLOW_CNTL_TX:
2551 MII_REG_BITS_OFF(ANAR_PAUSE, MII_REG_ANAR, vptr->mac_regs);
2552 MII_REG_BITS_ON(ANAR_ASMDIR, MII_REG_ANAR, vptr->mac_regs);
2553 break;
2554
2555 case FLOW_CNTL_RX:
2556 MII_REG_BITS_ON(ANAR_PAUSE, MII_REG_ANAR, vptr->mac_regs);
2557 MII_REG_BITS_ON(ANAR_ASMDIR, MII_REG_ANAR, vptr->mac_regs);
2558 break;
2559
2560 case FLOW_CNTL_TX_RX:
2561 MII_REG_BITS_ON(ANAR_PAUSE, MII_REG_ANAR, vptr->mac_regs);
2562 MII_REG_BITS_ON(ANAR_ASMDIR, MII_REG_ANAR, vptr->mac_regs);
2563 break;
2564
2565 case FLOW_CNTL_DISABLE:
2566 MII_REG_BITS_OFF(ANAR_PAUSE, MII_REG_ANAR, vptr->mac_regs);
2567 MII_REG_BITS_OFF(ANAR_ASMDIR, MII_REG_ANAR, vptr->mac_regs);
2568 break;
2569 default:
2570 break;
2571 }
2572}
2573
2574/**
2575 * velocity_set_media_mode - set media mode
2576 * @mii_status: old MII link state
2577 *
2578 * Check the media link state and configure the flow control
2579 * PHY and also velocity hardware setup accordingly. In particular
2580 * we need to set up CD polling and frame bursting.
2581 */
6aa20a22 2582
1da177e4
LT		 2583static int velocity_set_media_mode(struct velocity_info *vptr, u32 mii_status)
2584{
2585 u32 curr_status;
2586 struct mac_regs __iomem * regs = vptr->mac_regs;
2587
2588 vptr->mii_status = mii_check_media_mode(vptr->mac_regs);
2589 curr_status = vptr->mii_status & (~VELOCITY_LINK_FAIL);
2590
2591 /* Set mii link status */
2592 set_mii_flow_control(vptr);
2593
2594 /*
2595 Check if new status is consisent with current status
2596 if (((mii_status & curr_status) & VELOCITY_AUTONEG_ENABLE)
2597 || (mii_status==curr_status)) {
2598 vptr->mii_status=mii_check_media_mode(vptr->mac_regs);
2599 vptr->mii_status=check_connection_type(vptr->mac_regs);
2600 VELOCITY_PRT(MSG_LEVEL_INFO, "Velocity link no change\n");
2601 return 0;
2602 }
2603 */
2604
2605 if (PHYID_GET_PHY_ID(vptr->phy_id) == PHYID_CICADA_CS8201) {
2606 MII_REG_BITS_ON(AUXCR_MDPPS, MII_REG_AUXCR, vptr->mac_regs);
2607 }
2608
2609 /*
2610 * If connection type is AUTO
2611 */
2612 if (mii_status & VELOCITY_AUTONEG_ENABLE) {
2613 VELOCITY_PRT(MSG_LEVEL_INFO, "Velocity is AUTO mode\n");
2614 /* clear force MAC mode bit */
2615 BYTE_REG_BITS_OFF(CHIPGCR_FCMODE, &regs->CHIPGCR);
2616 /* set duplex mode of MAC according to duplex mode of MII */
2617 MII_REG_BITS_ON(ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10, MII_REG_ANAR, vptr->mac_regs);
2618 MII_REG_BITS_ON(G1000CR_1000FD | G1000CR_1000, MII_REG_G1000CR, vptr->mac_regs);
2619 MII_REG_BITS_ON(BMCR_SPEED1G, MII_REG_BMCR, vptr->mac_regs);
2620
2621 /* enable AUTO-NEGO mode */
2622 mii_set_auto_on(vptr);
2623 } else {
2624 u16 ANAR;
2625 u8 CHIPGCR;
2626
2627 /*
2628 * 1. if it's 3119, disable frame bursting in halfduplex mode
2629 * and enable it in fullduplex mode
2630 * 2. set correct MII/GMII and half/full duplex mode in CHIPGCR
2631 * 3. only enable CD heart beat counter in 10HD mode
2632 */
2633
2634 /* set force MAC mode bit */
2635 BYTE_REG_BITS_ON(CHIPGCR_FCMODE, &regs->CHIPGCR);
2636
2637 CHIPGCR = readb(&regs->CHIPGCR);
2638 CHIPGCR &= ~CHIPGCR_FCGMII;
2639
2640 if (mii_status & VELOCITY_DUPLEX_FULL) {
2641 CHIPGCR |= CHIPGCR_FCFDX;
2642 writeb(CHIPGCR, &regs->CHIPGCR);
2643 VELOCITY_PRT(MSG_LEVEL_INFO, "set Velocity to forced full mode\n");
2644 if (vptr->rev_id < REV_ID_VT3216_A0)
2645 BYTE_REG_BITS_OFF(TCR_TB2BDIS, &regs->TCR);
2646 } else {
2647 CHIPGCR &= ~CHIPGCR_FCFDX;
2648 VELOCITY_PRT(MSG_LEVEL_INFO, "set Velocity to forced half mode\n");
2649 writeb(CHIPGCR, &regs->CHIPGCR);
2650 if (vptr->rev_id < REV_ID_VT3216_A0)
2651 BYTE_REG_BITS_ON(TCR_TB2BDIS, &regs->TCR);
2652 }
2653
2654 MII_REG_BITS_OFF(G1000CR_1000FD | G1000CR_1000, MII_REG_G1000CR, vptr->mac_regs);
2655
2656 if (!(mii_status & VELOCITY_DUPLEX_FULL) && (mii_status & VELOCITY_SPEED_10)) {
2657 BYTE_REG_BITS_OFF(TESTCFG_HBDIS, &regs->TESTCFG);
2658 } else {
2659 BYTE_REG_BITS_ON(TESTCFG_HBDIS, &regs->TESTCFG);
2660 }
2661 /* MII_REG_BITS_OFF(BMCR_SPEED1G, MII_REG_BMCR, vptr->mac_regs); */
2662 velocity_mii_read(vptr->mac_regs, MII_REG_ANAR, &ANAR);
2663 ANAR &= (~(ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10));
2664 if (mii_status & VELOCITY_SPEED_100) {
2665 if (mii_status & VELOCITY_DUPLEX_FULL)
2666 ANAR |= ANAR_TXFD;
2667 else
2668 ANAR |= ANAR_TX;
2669 } else {
2670 if (mii_status & VELOCITY_DUPLEX_FULL)
2671 ANAR |= ANAR_10FD;
2672 else
2673 ANAR |= ANAR_10;
2674 }
2675 velocity_mii_write(vptr->mac_regs, MII_REG_ANAR, ANAR);
2676 /* enable AUTO-NEGO mode */
2677 mii_set_auto_on(vptr);
2678 /* MII_REG_BITS_ON(BMCR_AUTO, MII_REG_BMCR, vptr->mac_regs); */
2679 }
2680 /* vptr->mii_status=mii_check_media_mode(vptr->mac_regs); */
2681 /* vptr->mii_status=check_connection_type(vptr->mac_regs); */
2682 return VELOCITY_LINK_CHANGE;
2683}
2684
2685/**
2686 * mii_check_media_mode - check media state
2687 * @regs: velocity registers
2688 *
2689 * Check the current MII status and determine the link status
2690 * accordingly
2691 */
6aa20a22 2692
1da177e4
LT		 2693static u32 mii_check_media_mode(struct mac_regs __iomem * regs)
2694{
2695 u32 status = 0;
2696 u16 ANAR;
2697
2698 if (!MII_REG_BITS_IS_ON(BMSR_LNK, MII_REG_BMSR, regs))
2699 status |= VELOCITY_LINK_FAIL;
2700
2701 if (MII_REG_BITS_IS_ON(G1000CR_1000FD, MII_REG_G1000CR, regs))
2702 status |= VELOCITY_SPEED_1000 | VELOCITY_DUPLEX_FULL;
2703 else if (MII_REG_BITS_IS_ON(G1000CR_1000, MII_REG_G1000CR, regs))
2704 status |= (VELOCITY_SPEED_1000);
2705 else {
2706 velocity_mii_read(regs, MII_REG_ANAR, &ANAR);
2707 if (ANAR & ANAR_TXFD)
2708 status |= (VELOCITY_SPEED_100 | VELOCITY_DUPLEX_FULL);
2709 else if (ANAR & ANAR_TX)
2710 status |= VELOCITY_SPEED_100;
2711 else if (ANAR & ANAR_10FD)
2712 status |= (VELOCITY_SPEED_10 | VELOCITY_DUPLEX_FULL);
2713 else
2714 status |= (VELOCITY_SPEED_10);
2715 }
2716
2717 if (MII_REG_BITS_IS_ON(BMCR_AUTO, MII_REG_BMCR, regs)) {
2718 velocity_mii_read(regs, MII_REG_ANAR, &ANAR);
2719 if ((ANAR & (ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10))
2720 == (ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10)) {
2721 if (MII_REG_BITS_IS_ON(G1000CR_1000 | G1000CR_1000FD, MII_REG_G1000CR, regs))
2722 status |= VELOCITY_AUTONEG_ENABLE;
2723 }
2724 }
2725
2726 return status;
2727}
2728
2729static u32 check_connection_type(struct mac_regs __iomem * regs)
2730{
2731 u32 status = 0;
2732 u8 PHYSR0;
2733 u16 ANAR;
2734 PHYSR0 = readb(&regs->PHYSR0);
2735
2736 /*
2737 if (!(PHYSR0 & PHYSR0_LINKGD))
2738 status|=VELOCITY_LINK_FAIL;
2739 */
2740
2741 if (PHYSR0 & PHYSR0_FDPX)
2742 status |= VELOCITY_DUPLEX_FULL;
2743
2744 if (PHYSR0 & PHYSR0_SPDG)
2745 status |= VELOCITY_SPEED_1000;
59b693fb 2746 else if (PHYSR0 & PHYSR0_SPD10)
1da177e4
LT		 2747 status |= VELOCITY_SPEED_10;
2748 else
2749 status |= VELOCITY_SPEED_100;
2750
2751 if (MII_REG_BITS_IS_ON(BMCR_AUTO, MII_REG_BMCR, regs)) {
2752 velocity_mii_read(regs, MII_REG_ANAR, &ANAR);
2753 if ((ANAR & (ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10))
2754 == (ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10)) {
2755 if (MII_REG_BITS_IS_ON(G1000CR_1000 | G1000CR_1000FD, MII_REG_G1000CR, regs))
2756 status |= VELOCITY_AUTONEG_ENABLE;
2757 }
2758 }
2759
2760 return status;
2761}
2762
2763/**
2764 * enable_flow_control_ability - flow control
2765 * @vptr: veloity to configure
2766 *
2767 * Set up flow control according to the flow control options
2768 * determined by the eeprom/configuration.
2769 */
2770
2771static void enable_flow_control_ability(struct velocity_info *vptr)
2772{
2773
2774 struct mac_regs __iomem * regs = vptr->mac_regs;
2775
2776 switch (vptr->options.flow_cntl) {
2777
2778 case FLOW_CNTL_DEFAULT:
2779 if (BYTE_REG_BITS_IS_ON(PHYSR0_RXFLC, &regs->PHYSR0))
2780 writel(CR0_FDXRFCEN, &regs->CR0Set);
2781 else
2782 writel(CR0_FDXRFCEN, &regs->CR0Clr);
2783
2784 if (BYTE_REG_BITS_IS_ON(PHYSR0_TXFLC, &regs->PHYSR0))
2785 writel(CR0_FDXTFCEN, &regs->CR0Set);
2786 else
2787 writel(CR0_FDXTFCEN, &regs->CR0Clr);
2788 break;
2789
2790 case FLOW_CNTL_TX:
2791 writel(CR0_FDXTFCEN, &regs->CR0Set);
2792 writel(CR0_FDXRFCEN, &regs->CR0Clr);
2793 break;
2794
2795 case FLOW_CNTL_RX:
2796 writel(CR0_FDXRFCEN, &regs->CR0Set);
2797 writel(CR0_FDXTFCEN, &regs->CR0Clr);
2798 break;
2799
2800 case FLOW_CNTL_TX_RX:
2801 writel(CR0_FDXTFCEN, &regs->CR0Set);
2802 writel(CR0_FDXRFCEN, &regs->CR0Set);
2803 break;
2804
2805 case FLOW_CNTL_DISABLE:
2806 writel(CR0_FDXRFCEN, &regs->CR0Clr);
2807 writel(CR0_FDXTFCEN, &regs->CR0Clr);
2808 break;
2809
2810 default:
2811 break;
2812 }
2813
2814}
2815
2816
2817/**
2818 * velocity_ethtool_up - pre hook for ethtool
2819 * @dev: network device
2820 *
2821 * Called before an ethtool operation. We need to make sure the
2822 * chip is out of D3 state before we poke at it.
2823 */
6aa20a22 2824
1da177e4
LT		 2825static int velocity_ethtool_up(struct net_device *dev)
2826{
8ab6f3f7 2827 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 2828 if (!netif_running(dev))
2829 pci_set_power_state(vptr->pdev, PCI_D0);
2830 return 0;
6aa20a22 2831}
1da177e4
LT		 2832
2833/**
2834 * velocity_ethtool_down - post hook for ethtool
2835 * @dev: network device
2836 *
2837 * Called after an ethtool operation. Restore the chip back to D3
2838 * state if it isn't running.
2839 */
6aa20a22 2840
1da177e4
LT		 2841static void velocity_ethtool_down(struct net_device *dev)
2842{
8ab6f3f7 2843 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 2844 if (!netif_running(dev))
2845 pci_set_power_state(vptr->pdev, PCI_D3hot);
2846}
2847
2848static int velocity_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
2849{
8ab6f3f7 2850 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 2851 struct mac_regs __iomem * regs = vptr->mac_regs;
2852 u32 status;
2853 status = check_connection_type(vptr->mac_regs);
2854
59b693fb
JC		 2855 cmd->supported = SUPPORTED_TP |
2856 SUPPORTED_Autoneg |
2857 SUPPORTED_10baseT_Half |
2858 SUPPORTED_10baseT_Full |
2859 SUPPORTED_100baseT_Half |
2860 SUPPORTED_100baseT_Full |
2861 SUPPORTED_1000baseT_Half |
2862 SUPPORTED_1000baseT_Full;
2863 if (status & VELOCITY_SPEED_1000)
2864 cmd->speed = SPEED_1000;
2865 else if (status & VELOCITY_SPEED_100)
1da177e4
LT		 2866 cmd->speed = SPEED_100;
2867 else
2868 cmd->speed = SPEED_10;
2869 cmd->autoneg = (status & VELOCITY_AUTONEG_ENABLE) ? AUTONEG_ENABLE : AUTONEG_DISABLE;
2870 cmd->port = PORT_TP;
2871 cmd->transceiver = XCVR_INTERNAL;
2872 cmd->phy_address = readb(&regs->MIIADR) & 0x1F;
2873
2874 if (status & VELOCITY_DUPLEX_FULL)
2875 cmd->duplex = DUPLEX_FULL;
2876 else
2877 cmd->duplex = DUPLEX_HALF;
6aa20a22 2878
1da177e4
LT		 2879 return 0;
2880}
2881
2882static int velocity_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
2883{
8ab6f3f7 2884 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 2885 u32 curr_status;
2886 u32 new_status = 0;
2887 int ret = 0;
6aa20a22 2888
1da177e4
LT		 2889 curr_status = check_connection_type(vptr->mac_regs);
2890 curr_status &= (~VELOCITY_LINK_FAIL);
2891
2892 new_status |= ((cmd->autoneg) ? VELOCITY_AUTONEG_ENABLE : 0);
2893 new_status |= ((cmd->speed == SPEED_100) ? VELOCITY_SPEED_100 : 0);
2894 new_status |= ((cmd->speed == SPEED_10) ? VELOCITY_SPEED_10 : 0);
2895 new_status |= ((cmd->duplex == DUPLEX_FULL) ? VELOCITY_DUPLEX_FULL : 0);
2896
2897 if ((new_status & VELOCITY_AUTONEG_ENABLE) && (new_status != (curr_status | VELOCITY_AUTONEG_ENABLE)))
2898 ret = -EINVAL;
2899 else
2900 velocity_set_media_mode(vptr, new_status);
2901
2902 return ret;
2903}
2904
2905static u32 velocity_get_link(struct net_device *dev)
2906{
8ab6f3f7 2907 struct velocity_info *vptr = netdev_priv(dev);
1da177e4 2908 struct mac_regs __iomem * regs = vptr->mac_regs;
59b693fb 2909 return BYTE_REG_BITS_IS_ON(PHYSR0_LINKGD, &regs->PHYSR0) ? 1 : 0;
1da177e4
LT		 2910}
2911
2912static void velocity_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
2913{
8ab6f3f7 2914 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 2915 strcpy(info->driver, VELOCITY_NAME);
2916 strcpy(info->version, VELOCITY_VERSION);
2917 strcpy(info->bus_info, pci_name(vptr->pdev));
2918}
2919
2920static void velocity_ethtool_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
2921{
8ab6f3f7 2922 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 2923 wol->supported = WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_ARP;
2924 wol->wolopts |= WAKE_MAGIC;
2925 /*
2926 if (vptr->wol_opts & VELOCITY_WOL_PHY)
2927 wol.wolopts|=WAKE_PHY;
2928 */
2929 if (vptr->wol_opts & VELOCITY_WOL_UCAST)
2930 wol->wolopts |= WAKE_UCAST;
2931 if (vptr->wol_opts & VELOCITY_WOL_ARP)
2932 wol->wolopts |= WAKE_ARP;
2933 memcpy(&wol->sopass, vptr->wol_passwd, 6);
2934}
2935
2936static int velocity_ethtool_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
2937{
8ab6f3f7 2938 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 2939
2940 if (!(wol->wolopts & (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_ARP)))
2941 return -EFAULT;
2942 vptr->wol_opts = VELOCITY_WOL_MAGIC;
2943
2944 /*
2945 if (wol.wolopts & WAKE_PHY) {
2946 vptr->wol_opts|=VELOCITY_WOL_PHY;
2947 vptr->flags |=VELOCITY_FLAGS_WOL_ENABLED;
2948 }
2949 */
2950
2951 if (wol->wolopts & WAKE_MAGIC) {
2952 vptr->wol_opts |= VELOCITY_WOL_MAGIC;
2953 vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
2954 }
2955 if (wol->wolopts & WAKE_UCAST) {
2956 vptr->wol_opts |= VELOCITY_WOL_UCAST;
2957 vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
2958 }
2959 if (wol->wolopts & WAKE_ARP) {
2960 vptr->wol_opts |= VELOCITY_WOL_ARP;
2961 vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
2962 }
2963 memcpy(vptr->wol_passwd, wol->sopass, 6);
2964 return 0;
2965}
2966
2967static u32 velocity_get_msglevel(struct net_device *dev)
2968{
2969 return msglevel;
2970}
2971
2972static void velocity_set_msglevel(struct net_device *dev, u32 value)
2973{
2974 msglevel = value;
2975}
2976
7282d491 2977static const struct ethtool_ops velocity_ethtool_ops = {
1da177e4
LT		 2978 .get_settings = velocity_get_settings,
2979 .set_settings = velocity_set_settings,
2980 .get_drvinfo = velocity_get_drvinfo,
2981 .get_wol = velocity_ethtool_get_wol,
2982 .set_wol = velocity_ethtool_set_wol,
2983 .get_msglevel = velocity_get_msglevel,
2984 .set_msglevel = velocity_set_msglevel,
2985 .get_link = velocity_get_link,
2986 .begin = velocity_ethtool_up,
2987 .complete = velocity_ethtool_down
2988};
2989
2990/**
2991 * velocity_mii_ioctl - MII ioctl handler
2992 * @dev: network device
2993 * @ifr: the ifreq block for the ioctl
2994 * @cmd: the command
2995 *
2996 * Process MII requests made via ioctl from the network layer. These
2997 * are used by tools like kudzu to interrogate the link state of the
2998 * hardware
2999 */
6aa20a22 3000
1da177e4
LT		 3001static int velocity_mii_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
3002{
8ab6f3f7 3003 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 3004 struct mac_regs __iomem * regs = vptr->mac_regs;
3005 unsigned long flags;
3006 struct mii_ioctl_data *miidata = if_mii(ifr);
3007 int err;
6aa20a22 3008
1da177e4
LT		 3009 switch (cmd) {
3010 case SIOCGMIIPHY:
3011 miidata->phy_id = readb(&regs->MIIADR) & 0x1f;
3012 break;
3013 case SIOCGMIIREG:
3014 if (!capable(CAP_NET_ADMIN))
3015 return -EPERM;
3016 if(velocity_mii_read(vptr->mac_regs, miidata->reg_num & 0x1f, &(miidata->val_out)) < 0)
3017 return -ETIMEDOUT;
3018 break;
3019 case SIOCSMIIREG:
3020 if (!capable(CAP_NET_ADMIN))
3021 return -EPERM;
3022 spin_lock_irqsave(&vptr->lock, flags);
3023 err = velocity_mii_write(vptr->mac_regs, miidata->reg_num & 0x1f, miidata->val_in);
3024 spin_unlock_irqrestore(&vptr->lock, flags);
3025 check_connection_type(vptr->mac_regs);
3026 if(err)
3027 return err;
3028 break;
3029 default:
3030 return -EOPNOTSUPP;
3031 }
3032 return 0;
3033}
3034
3035#ifdef CONFIG_PM
3036
3037/**
3038 * velocity_save_context - save registers
6aa20a22 3039 * @vptr: velocity
1da177e4
LT		 3040 * @context: buffer for stored context
3041 *
3042 * Retrieve the current configuration from the velocity hardware
3043 * and stash it in the context structure, for use by the context
3044 * restore functions. This allows us to save things we need across
3045 * power down states
3046 */
6aa20a22 3047
1da177e4
LT		 3048static void velocity_save_context(struct velocity_info *vptr, struct velocity_context * context)
3049{
3050 struct mac_regs __iomem * regs = vptr->mac_regs;
3051 u16 i;
3052 u8 __iomem *ptr = (u8 __iomem *)regs;
3053
3054 for (i = MAC_REG_PAR; i < MAC_REG_CR0_CLR; i += 4)
3055 *((u32 *) (context->mac_reg + i)) = readl(ptr + i);
3056
3057 for (i = MAC_REG_MAR; i < MAC_REG_TDCSR_CLR; i += 4)
3058 *((u32 *) (context->mac_reg + i)) = readl(ptr + i);
3059
3060 for (i = MAC_REG_RDBASE_LO; i < MAC_REG_FIFO_TEST0; i += 4)
3061 *((u32 *) (context->mac_reg + i)) = readl(ptr + i);
3062
3063}
3064
3065/**
3066 * velocity_restore_context - restore registers
6aa20a22 3067 * @vptr: velocity
1da177e4
LT		 3068 * @context: buffer for stored context
3069 *
6aa20a22 3070 * Reload the register configuration from the velocity context
1da177e4
LT		 3071 * created by velocity_save_context.
3072 */
6aa20a22 3073
1da177e4
LT		 3074static void velocity_restore_context(struct velocity_info *vptr, struct velocity_context *context)
3075{
3076 struct mac_regs __iomem * regs = vptr->mac_regs;
3077 int i;
3078 u8 __iomem *ptr = (u8 __iomem *)regs;
3079
3080 for (i = MAC_REG_PAR; i < MAC_REG_CR0_SET; i += 4) {
3081 writel(*((u32 *) (context->mac_reg + i)), ptr + i);
3082 }
3083
3084 /* Just skip cr0 */
3085 for (i = MAC_REG_CR1_SET; i < MAC_REG_CR0_CLR; i++) {
3086 /* Clear */
3087 writeb(~(*((u8 *) (context->mac_reg + i))), ptr + i + 4);
3088 /* Set */
3089 writeb(*((u8 *) (context->mac_reg + i)), ptr + i);
3090 }
3091
3092 for (i = MAC_REG_MAR; i < MAC_REG_IMR; i += 4) {
3093 writel(*((u32 *) (context->mac_reg + i)), ptr + i);
3094 }
3095
3096 for (i = MAC_REG_RDBASE_LO; i < MAC_REG_FIFO_TEST0; i += 4) {
3097 writel(*((u32 *) (context->mac_reg + i)), ptr + i);
3098 }
3099
3100 for (i = MAC_REG_TDCSR_SET; i <= MAC_REG_RDCSR_SET; i++) {
3101 writeb(*((u8 *) (context->mac_reg + i)), ptr + i);
3102 }
3103
3104}
3105
3106/**
3107 * wol_calc_crc - WOL CRC
3108 * @pattern: data pattern
3109 * @mask_pattern: mask
3110 *
3111 * Compute the wake on lan crc hashes for the packet header
3112 * we are interested in.
3113 */
3114
3115static u16 wol_calc_crc(int size, u8 * pattern, u8 *mask_pattern)
3116{
3117 u16 crc = 0xFFFF;
3118 u8 mask;
3119 int i, j;
3120
3121 for (i = 0; i < size; i++) {
3122 mask = mask_pattern[i];
3123
3124 /* Skip this loop if the mask equals to zero */
3125 if (mask == 0x00)
3126 continue;
3127
3128 for (j = 0; j < 8; j++) {
3129 if ((mask & 0x01) == 0) {
3130 mask >>= 1;
3131 continue;
3132 }
3133 mask >>= 1;
3134 crc = crc_ccitt(crc, &(pattern[i * 8 + j]), 1);
3135 }
3136 }
3137 /* Finally, invert the result once to get the correct data */
3138 crc = ~crc;
906d66df 3139 return bitrev32(crc) >> 16;
1da177e4
LT		 3140}
3141
3142/**
3143 * velocity_set_wol - set up for wake on lan
3144 * @vptr: velocity to set WOL status on
3145 *
3146 * Set a card up for wake on lan either by unicast or by
3147 * ARP packet.
3148 *
3149 * FIXME: check static buffer is safe here
3150 */
3151
3152static int velocity_set_wol(struct velocity_info *vptr)
3153{
3154 struct mac_regs __iomem * regs = vptr->mac_regs;
3155 static u8 buf[256];
3156 int i;
3157
3158 static u32 mask_pattern[2][4] = {
3159 {0x00203000, 0x000003C0, 0x00000000, 0x0000000}, /* ARP */
3160 {0xfffff000, 0xffffffff, 0xffffffff, 0x000ffff} /* Magic Packet */
3161 };
3162
3163 writew(0xFFFF, &regs->WOLCRClr);
3164 writeb(WOLCFG_SAB | WOLCFG_SAM, &regs->WOLCFGSet);
3165 writew(WOLCR_MAGIC_EN, &regs->WOLCRSet);
3166
3167 /*
3168 if (vptr->wol_opts & VELOCITY_WOL_PHY)
3169 writew((WOLCR_LINKON_EN|WOLCR_LINKOFF_EN), &regs->WOLCRSet);
3170 */
3171
3172 if (vptr->wol_opts & VELOCITY_WOL_UCAST) {
3173 writew(WOLCR_UNICAST_EN, &regs->WOLCRSet);
3174 }
3175
3176 if (vptr->wol_opts & VELOCITY_WOL_ARP) {
3177 struct arp_packet *arp = (struct arp_packet *) buf;
3178 u16 crc;
3179 memset(buf, 0, sizeof(struct arp_packet) + 7);
3180
3181 for (i = 0; i < 4; i++)
3182 writel(mask_pattern[0][i], &regs->ByteMask[0][i]);
3183
3184 arp->type = htons(ETH_P_ARP);
3185 arp->ar_op = htons(1);
3186
3187 memcpy(arp->ar_tip, vptr->ip_addr, 4);
3188
3189 crc = wol_calc_crc((sizeof(struct arp_packet) + 7) / 8, buf,
3190 (u8 *) & mask_pattern[0][0]);
3191
3192 writew(crc, &regs->PatternCRC[0]);
3193 writew(WOLCR_ARP_EN, &regs->WOLCRSet);
3194 }
3195
3196 BYTE_REG_BITS_ON(PWCFG_WOLTYPE, &regs->PWCFGSet);
3197 BYTE_REG_BITS_ON(PWCFG_LEGACY_WOLEN, &regs->PWCFGSet);
3198
3199 writew(0x0FFF, &regs->WOLSRClr);
3200
3201 if (vptr->mii_status & VELOCITY_AUTONEG_ENABLE) {
3202 if (PHYID_GET_PHY_ID(vptr->phy_id) == PHYID_CICADA_CS8201)
3203 MII_REG_BITS_ON(AUXCR_MDPPS, MII_REG_AUXCR, vptr->mac_regs);
3204
3205 MII_REG_BITS_OFF(G1000CR_1000FD | G1000CR_1000, MII_REG_G1000CR, vptr->mac_regs);
3206 }
3207
3208 if (vptr->mii_status & VELOCITY_SPEED_1000)
3209 MII_REG_BITS_ON(BMCR_REAUTO, MII_REG_BMCR, vptr->mac_regs);
3210
3211 BYTE_REG_BITS_ON(CHIPGCR_FCMODE, &regs->CHIPGCR);
3212
3213 {
3214 u8 GCR;
3215 GCR = readb(&regs->CHIPGCR);
3216 GCR = (GCR & ~CHIPGCR_FCGMII) | CHIPGCR_FCFDX;
3217 writeb(GCR, &regs->CHIPGCR);
3218 }
3219
3220 BYTE_REG_BITS_OFF(ISR_PWEI, &regs->ISR);
3221 /* Turn on SWPTAG just before entering power mode */
3222 BYTE_REG_BITS_ON(STICKHW_SWPTAG, &regs->STICKHW);
3223 /* Go to bed ..... */
3224 BYTE_REG_BITS_ON((STICKHW_DS1 | STICKHW_DS0), &regs->STICKHW);
3225
3226 return 0;
3227}
3228
3229static int velocity_suspend(struct pci_dev *pdev, pm_message_t state)
3230{
3231 struct net_device *dev = pci_get_drvdata(pdev);
3232 struct velocity_info *vptr = netdev_priv(dev);
3233 unsigned long flags;
3234
3235 if(!netif_running(vptr->dev))
3236 return 0;
3237
3238 netif_device_detach(vptr->dev);
3239
3240 spin_lock_irqsave(&vptr->lock, flags);
3241 pci_save_state(pdev);
3242#ifdef ETHTOOL_GWOL
3243 if (vptr->flags & VELOCITY_FLAGS_WOL_ENABLED) {
3244 velocity_get_ip(vptr);
3245 velocity_save_context(vptr, &vptr->context);
3246 velocity_shutdown(vptr);
3247 velocity_set_wol(vptr);
3248 pci_enable_wake(pdev, 3, 1);
3249 pci_set_power_state(pdev, PCI_D3hot);
3250 } else {
3251 velocity_save_context(vptr, &vptr->context);
3252 velocity_shutdown(vptr);
3253 pci_disable_device(pdev);
3254 pci_set_power_state(pdev, pci_choose_state(pdev, state));
3255 }
3256#else
3257 pci_set_power_state(pdev, pci_choose_state(pdev, state));
3258#endif
3259 spin_unlock_irqrestore(&vptr->lock, flags);
3260 return 0;
3261}
3262
3263static int velocity_resume(struct pci_dev *pdev)
3264{
3265 struct net_device *dev = pci_get_drvdata(pdev);
3266 struct velocity_info *vptr = netdev_priv(dev);
3267 unsigned long flags;
3268 int i;
3269
3270 if(!netif_running(vptr->dev))
3271 return 0;
3272
3273 pci_set_power_state(pdev, PCI_D0);
3274 pci_enable_wake(pdev, 0, 0);
3275 pci_restore_state(pdev);
3276
3277 mac_wol_reset(vptr->mac_regs);
3278
3279 spin_lock_irqsave(&vptr->lock, flags);
3280 velocity_restore_context(vptr, &vptr->context);
3281 velocity_init_registers(vptr, VELOCITY_INIT_WOL);
3282 mac_disable_int(vptr->mac_regs);
3283
3284 velocity_tx_srv(vptr, 0);
3285
3286 for (i = 0; i < vptr->num_txq; i++) {
3287 if (vptr->td_used[i]) {
3288 mac_tx_queue_wake(vptr->mac_regs, i);
3289 }
3290 }
3291
3292 mac_enable_int(vptr->mac_regs);
3293 spin_unlock_irqrestore(&vptr->lock, flags);
3294 netif_device_attach(vptr->dev);
3295
3296 return 0;
3297}
3298
ce9f7fe3
RD		 3299#ifdef CONFIG_INET
3300
1da177e4
LT		 3301static int velocity_netdev_event(struct notifier_block *nb, unsigned long notification, void *ptr)
3302{
3303 struct in_ifaddr *ifa = (struct in_ifaddr *) ptr;
3304
3305 if (ifa) {
3306 struct net_device *dev = ifa->ifa_dev->dev;
3307 struct velocity_info *vptr;
3308 unsigned long flags;
3309
3310 spin_lock_irqsave(&velocity_dev_list_lock, flags);
3311 list_for_each_entry(vptr, &velocity_dev_list, list) {
3312 if (vptr->dev == dev) {
3313 velocity_get_ip(vptr);
3314 break;
3315 }
3316 }
3317 spin_unlock_irqrestore(&velocity_dev_list_lock, flags);
3318 }
3319 return NOTIFY_DONE;
3320}
ce9f7fe3
RD		 3321
3322#endif
1da177e4 3323#endif
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