[linux.git] / drivers / leds / leds-lp5523.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * lp5523.c - LP5523, LP55231 LED Driver
 *
 * Copyright (C) 2010 Nokia Corporation
 * Copyright (C) 2012 Texas Instruments
 *
 * Contact: Samu Onkalo <[email protected]>
 *          Milo(Woogyom) Kim <[email protected]>
 */

#include <linux/cleanup.h>
#include <linux/delay.h>
#include <linux/firmware.h>
#include <linux/i2c.h>
#include <linux/leds.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/of.h>
#include <linux/platform_data/leds-lp55xx.h>
#include <linux/slab.h>

#include "leds-lp55xx-common.h"

/* Memory is used like this:
 * 0x00 engine 1 program
 * 0x10 engine 2 program
 * 0x20 engine 3 program
 * 0x30 engine 1 muxing info
 * 0x40 engine 2 muxing info
 * 0x50 engine 3 muxing info
 */
#define LP5523_PAGES_PER_ENGINE		1
#define LP5523_MAX_LEDS			9

/* Registers */
#define LP5523_REG_ENABLE		0x00
#define LP5523_REG_OP_MODE		0x01
#define LP5523_REG_ENABLE_LEDS_MSB	0x04
#define LP5523_REG_ENABLE_LEDS_LSB	0x05
#define LP5523_REG_LED_CTRL_BASE	0x06
#define LP5523_REG_LED_PWM_BASE		0x16
#define LP5523_REG_LED_CURRENT_BASE	0x26
#define LP5523_REG_CONFIG		0x36

#define LP5523_REG_STATUS		0x3A
#define LP5523_ENGINE_BUSY		BIT(4)

#define LP5523_REG_RESET		0x3D
#define LP5523_REG_LED_TEST_CTRL	0x41
#define LP5523_REG_LED_TEST_ADC		0x42
#define LP5523_REG_MASTER_FADER_BASE	0x48
#define LP5523_REG_CH1_PROG_START	0x4C
#define LP5523_REG_CH2_PROG_START	0x4D
#define LP5523_REG_CH3_PROG_START	0x4E
#define LP5523_REG_PROG_PAGE_SEL	0x4F
#define LP5523_REG_PROG_MEM		0x50

/* Bit description in registers */
#define LP5523_ENABLE			0x40
#define LP5523_AUTO_INC			0x40
#define LP5523_PWR_SAVE			0x20
#define LP5523_PWM_PWR_SAVE		0x04
#define LP5523_CP_MODE_MASK		0x18
#define LP5523_CP_MODE_SHIFT		3
#define LP5523_AUTO_CLK			0x02
#define LP5523_DEFAULT_CONFIG \
	(LP5523_AUTO_INC | LP5523_PWR_SAVE | LP5523_AUTO_CLK | LP5523_PWM_PWR_SAVE)

#define LP5523_EN_LEDTEST		0x80
#define LP5523_LEDTEST_DONE		0x80
#define LP5523_RESET			0xFF
#define LP5523_ADC_SHORTCIRC_LIM	80
#define LP5523_EXT_CLK_USED		0x08
#define LP5523_ENG_STATUS_MASK		0x07

static int lp5523_init_program_engine(struct lp55xx_chip *chip);

static int lp5523_post_init_device(struct lp55xx_chip *chip)
{
	int ret;
	int val;

	ret = lp55xx_write(chip, LP5523_REG_ENABLE, LP5523_ENABLE);
	if (ret)
		return ret;

	/* Chip startup time is 500 us, 1 - 2 ms gives some margin */
	usleep_range(1000, 2000);

	val = LP5523_DEFAULT_CONFIG;
	val |= (chip->pdata->charge_pump_mode << LP5523_CP_MODE_SHIFT) & LP5523_CP_MODE_MASK;

	ret = lp55xx_write(chip, LP5523_REG_CONFIG, val);
	if (ret)
		return ret;

	/* turn on all leds */
	ret = lp55xx_write(chip, LP5523_REG_ENABLE_LEDS_MSB, 0x01);
	if (ret)
		return ret;

	ret = lp55xx_write(chip, LP5523_REG_ENABLE_LEDS_LSB, 0xff);
	if (ret)
		return ret;

	return lp5523_init_program_engine(chip);
}

static void lp5523_run_engine(struct lp55xx_chip *chip, bool start)
{
	/* stop engine */
	if (!start) {
		lp55xx_stop_engine(chip);
		lp55xx_turn_off_channels(chip);
		return;
	}

	lp55xx_run_engine_common(chip);
}

static int lp5523_init_program_engine(struct lp55xx_chip *chip)
{
	int i;
	int j;
	int ret;
	u8 status;
	/* one pattern per engine setting LED MUX start and stop addresses */
	static const u8 pattern[][LP55xx_BYTES_PER_PAGE] =  {
		{ 0x9c, 0x30, 0x9c, 0xb0, 0x9d, 0x80, 0xd8, 0x00, 0},
		{ 0x9c, 0x40, 0x9c, 0xc0, 0x9d, 0x80, 0xd8, 0x00, 0},
		{ 0x9c, 0x50, 0x9c, 0xd0, 0x9d, 0x80, 0xd8, 0x00, 0},
	};

	/* hardcode 32 bytes of memory for each engine from program memory */
	ret = lp55xx_write(chip, LP5523_REG_CH1_PROG_START, 0x00);
	if (ret)
		return ret;

	ret = lp55xx_write(chip, LP5523_REG_CH2_PROG_START, 0x10);
	if (ret)
		return ret;

	ret = lp55xx_write(chip, LP5523_REG_CH3_PROG_START, 0x20);
	if (ret)
		return ret;

	/* write LED MUX address space for each engine */
	for (i = LP55XX_ENGINE_1; i <= LP55XX_ENGINE_3; i++) {
		chip->engine_idx = i;
		lp55xx_load_engine(chip);

		for (j = 0; j < LP55xx_BYTES_PER_PAGE; j++) {
			ret = lp55xx_write(chip, LP5523_REG_PROG_MEM + j,
					pattern[i - 1][j]);
			if (ret)
				goto out;
		}
	}

	lp5523_run_engine(chip, true);

	/* Let the programs run for couple of ms and check the engine status */
	usleep_range(3000, 6000);
	ret = lp55xx_read(chip, LP5523_REG_STATUS, &status);
	if (ret)
		goto out;
	status &= LP5523_ENG_STATUS_MASK;

	if (status != LP5523_ENG_STATUS_MASK) {
		dev_err(&chip->cl->dev,
			"could not configure LED engine, status = 0x%.2x\n",
			status);
		ret = -1;
	}

out:
	lp55xx_stop_all_engine(chip);
	return ret;
}

static ssize_t lp5523_selftest(struct device *dev,
			       struct device_attribute *attr,
			       char *buf)
{
	struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev));
	struct lp55xx_chip *chip = led->chip;
	struct lp55xx_platform_data *pdata = chip->pdata;
	int ret, pos = 0;
	u8 status, adc, vdd, i;

	guard(mutex)(&chip->lock);

	ret = lp55xx_read(chip, LP5523_REG_STATUS, &status);
	if (ret < 0)
		return sysfs_emit(buf, "FAIL\n");

	/* Check that ext clock is really in use if requested */
	if (pdata->clock_mode == LP55XX_CLOCK_EXT) {
		if  ((status & LP5523_EXT_CLK_USED) == 0)
			return sysfs_emit(buf, "FAIL\n");
	}

	/* Measure VDD (i.e. VBAT) first (channel 16 corresponds to VDD) */
	lp55xx_write(chip, LP5523_REG_LED_TEST_CTRL, LP5523_EN_LEDTEST | 16);
	usleep_range(3000, 6000); /* ADC conversion time is typically 2.7 ms */
	ret = lp55xx_read(chip, LP5523_REG_STATUS, &status);
	if (ret < 0)
		return sysfs_emit(buf, "FAIL\n");

	if (!(status & LP5523_LEDTEST_DONE))
		usleep_range(3000, 6000); /* Was not ready. Wait little bit */

	ret = lp55xx_read(chip, LP5523_REG_LED_TEST_ADC, &vdd);
	if (ret < 0)
		return sysfs_emit(buf, "FAIL\n");

	vdd--;	/* There may be some fluctuation in measurement */

	for (i = 0; i < pdata->num_channels; i++) {
		/* Skip disabled channels */
		if (pdata->led_config[i].led_current == 0)
			continue;

		/* Set default current */
		lp55xx_write(chip, LP5523_REG_LED_CURRENT_BASE + led->chan_nr,
			pdata->led_config[i].led_current);

		lp55xx_write(chip, LP5523_REG_LED_PWM_BASE + led->chan_nr,
			     0xff);
		/* let current stabilize 2 - 4ms before measurements start */
		usleep_range(2000, 4000);
		lp55xx_write(chip, LP5523_REG_LED_TEST_CTRL,
			     LP5523_EN_LEDTEST | led->chan_nr);
		/* ADC conversion time is 2.7 ms typically */
		usleep_range(3000, 6000);
		ret = lp55xx_read(chip, LP5523_REG_STATUS, &status);
		if (ret < 0)
			return sysfs_emit(buf, "FAIL\n");

		if (!(status & LP5523_LEDTEST_DONE))
			usleep_range(3000, 6000); /* Was not ready. Wait. */

		ret = lp55xx_read(chip, LP5523_REG_LED_TEST_ADC, &adc);
		if (ret < 0)
			return sysfs_emit(buf, "FAIL\n");

		if (adc >= vdd || adc < LP5523_ADC_SHORTCIRC_LIM)
			pos += sysfs_emit_at(buf, pos, "LED %d FAIL\n",
					     led->chan_nr);

		lp55xx_write(chip, LP5523_REG_LED_PWM_BASE + led->chan_nr,
			     0x00);

		/* Restore current */
		lp55xx_write(chip, LP5523_REG_LED_CURRENT_BASE + led->chan_nr,
			     led->led_current);
		led++;
	}

	return pos == 0 ? sysfs_emit(buf, "OK\n") : pos;
}

LP55XX_DEV_ATTR_ENGINE_MODE(1);
LP55XX_DEV_ATTR_ENGINE_MODE(2);
LP55XX_DEV_ATTR_ENGINE_MODE(3);
LP55XX_DEV_ATTR_ENGINE_LEDS(1);
LP55XX_DEV_ATTR_ENGINE_LEDS(2);
LP55XX_DEV_ATTR_ENGINE_LEDS(3);
LP55XX_DEV_ATTR_ENGINE_LOAD(1);
LP55XX_DEV_ATTR_ENGINE_LOAD(2);
LP55XX_DEV_ATTR_ENGINE_LOAD(3);
static LP55XX_DEV_ATTR_RO(selftest, lp5523_selftest);
LP55XX_DEV_ATTR_MASTER_FADER(1);
LP55XX_DEV_ATTR_MASTER_FADER(2);
LP55XX_DEV_ATTR_MASTER_FADER(3);
static LP55XX_DEV_ATTR_RW(master_fader_leds, lp55xx_show_master_fader_leds,
			  lp55xx_store_master_fader_leds);

static struct attribute *lp5523_attributes[] = {
	&dev_attr_engine1_mode.attr,
	&dev_attr_engine2_mode.attr,
	&dev_attr_engine3_mode.attr,
	&dev_attr_engine1_load.attr,
	&dev_attr_engine2_load.attr,
	&dev_attr_engine3_load.attr,
	&dev_attr_engine1_leds.attr,
	&dev_attr_engine2_leds.attr,
	&dev_attr_engine3_leds.attr,
	&dev_attr_selftest.attr,
	&dev_attr_master_fader1.attr,
	&dev_attr_master_fader2.attr,
	&dev_attr_master_fader3.attr,
	&dev_attr_master_fader_leds.attr,
	NULL,
};

static const struct attribute_group lp5523_group = {
	.attrs = lp5523_attributes,
};

/* Chip specific configurations */
static struct lp55xx_device_config lp5523_cfg = {
	.reg_op_mode = {
		.addr = LP5523_REG_OP_MODE,
	},
	.reg_exec = {
		.addr = LP5523_REG_ENABLE,
	},
	.engine_busy = {
		.addr = LP5523_REG_STATUS,
		.mask  = LP5523_ENGINE_BUSY,
	},
	.reset = {
		.addr = LP5523_REG_RESET,
		.val  = LP5523_RESET,
	},
	.enable = {
		.addr = LP5523_REG_ENABLE,
		.val  = LP5523_ENABLE,
	},
	.prog_mem_base = {
		.addr = LP5523_REG_PROG_MEM,
	},
	.reg_led_pwm_base = {
		.addr = LP5523_REG_LED_PWM_BASE,
	},
	.reg_led_current_base = {
		.addr = LP5523_REG_LED_CURRENT_BASE,
	},
	.reg_master_fader_base = {
		.addr = LP5523_REG_MASTER_FADER_BASE,
	},
	.reg_led_ctrl_base = {
		.addr = LP5523_REG_LED_CTRL_BASE,
	},
	.pages_per_engine   = LP5523_PAGES_PER_ENGINE,
	.max_channel  = LP5523_MAX_LEDS,
	.post_init_device   = lp5523_post_init_device,
	.brightness_fn      = lp55xx_led_brightness,
	.multicolor_brightness_fn = lp55xx_multicolor_brightness,
	.set_led_current    = lp55xx_set_led_current,
	.firmware_cb        = lp55xx_firmware_loaded_cb,
	.run_engine         = lp5523_run_engine,
	.dev_attr_group     = &lp5523_group,
};

static const struct i2c_device_id lp5523_id[] = {
	{ "lp5523",  .driver_data = (kernel_ulong_t)&lp5523_cfg, },
	{ "lp55231", .driver_data = (kernel_ulong_t)&lp5523_cfg, },
	{ }
};

MODULE_DEVICE_TABLE(i2c, lp5523_id);

static const struct of_device_id of_lp5523_leds_match[] = {
	{ .compatible = "national,lp5523", .data = &lp5523_cfg, },
	{ .compatible = "ti,lp55231", .data = &lp5523_cfg, },
	{},
};

MODULE_DEVICE_TABLE(of, of_lp5523_leds_match);

static struct i2c_driver lp5523_driver = {
	.driver = {
		.name	= "lp5523x",
		.of_match_table = of_lp5523_leds_match,
	},
	.probe		= lp55xx_probe,
	.remove		= lp55xx_remove,
	.id_table	= lp5523_id,
};

module_i2c_driver(lp5523_driver);

MODULE_AUTHOR("Mathias Nyman <[email protected]>");
MODULE_AUTHOR("Milo Kim <[email protected]>");
MODULE_DESCRIPTION("LP5523 LED engine");
MODULE_LICENSE("GPL");
Commit	Line	Data
2b27bdcc	1	// SPDX-License-Identifier: GPL-2.0-only
0efba16c	2	/*
9ef8c877	3	* lp5523.c - LP5523, LP55231 LED Driver
0efba16c SO	4	*
0efba16c SO	5	* Copyright (C) 2010 Nokia Corporation
a2387cb9	6	* Copyright (C) 2012 Texas Instruments
0efba16c SO	7	*
0efba16c SO	8	* Contact: Samu Onkalo <[email protected]>
a2387cb9	9	* Milo(Woogyom) Kim <[email protected]>
0efba16c SO	10	*/
0efba16c SO	11
4137d94f	12	#include <linux/cleanup.h>
0efba16c	13	#include <linux/delay.h>
79bcc10b MWK	14	#include <linux/firmware.h>
79bcc10b MWK	15	#include <linux/i2c.h>
0efba16c	16	#include <linux/leds.h>
79bcc10b MWK	17	#include <linux/module.h>
79bcc10b MWK	18	#include <linux/mutex.h>
c68f46dd	19	#include <linux/of.h>
6a0c9a47	20	#include <linux/platform_data/leds-lp55xx.h>
79bcc10b	21	#include <linux/slab.h>
6a0c9a47 MWK	22
6a0c9a47 MWK	23	#include "leds-lp55xx-common.h"
0efba16c	24
bfb18d82	25	/* Memory is used like this:
7105e464 DM	26	* 0x00 engine 1 program
	27	* 0x10 engine 2 program
	28	* 0x20 engine 3 program
	29	* 0x30 engine 1 muxing info
	30	* 0x40 engine 2 muxing info
	31	* 0x50 engine 3 muxing info
	32	*/
409a9dc5	33	#define LP5523_PAGES_PER_ENGINE 1
12f022d2 MWK	34	#define LP5523_MAX_LEDS 9
	35
	36	/* Registers */
0efba16c SO	37	#define LP5523_REG_ENABLE 0x00
0efba16c SO	38	#define LP5523_REG_OP_MODE 0x01
0efba16c SO	39	#define LP5523_REG_ENABLE_LEDS_MSB 0x04
0efba16c SO	40	#define LP5523_REG_ENABLE_LEDS_LSB 0x05
52da81ea	41	#define LP5523_REG_LED_CTRL_BASE 0x06
0efba16c SO	42	#define LP5523_REG_LED_PWM_BASE 0x16
	43	#define LP5523_REG_LED_CURRENT_BASE 0x26
	44	#define LP5523_REG_CONFIG 0x36
a9b202b9	45
12f022d2	46	#define LP5523_REG_STATUS 0x3A
a9b202b9 CM	47	#define LP5523_ENGINE_BUSY BIT(4)
a9b202b9 CM	48
12f022d2	49	#define LP5523_REG_RESET 0x3D
0efba16c SO	50	#define LP5523_REG_LED_TEST_CTRL 0x41
0efba16c SO	51	#define LP5523_REG_LED_TEST_ADC 0x42
52da81ea	52	#define LP5523_REG_MASTER_FADER_BASE 0x48
22460438 MK	53	#define LP5523_REG_CH1_PROG_START 0x4C
	54	#define LP5523_REG_CH2_PROG_START 0x4D
	55	#define LP5523_REG_CH3_PROG_START 0x4E
12f022d2	56	#define LP5523_REG_PROG_PAGE_SEL 0x4F
0efba16c SO	57	#define LP5523_REG_PROG_MEM 0x50
0efba16c SO	58
12f022d2	59	/* Bit description in registers */
0efba16c SO	60	#define LP5523_ENABLE 0x40
	61	#define LP5523_AUTO_INC 0x40
	62	#define LP5523_PWR_SAVE 0x20
	63	#define LP5523_PWM_PWR_SAVE 0x04
54a7bef5 MZ	64	#define LP5523_CP_MODE_MASK 0x18
54a7bef5 MZ	65	#define LP5523_CP_MODE_SHIFT 3
0efba16c	66	#define LP5523_AUTO_CLK 0x02
54a7bef5 MZ	67	#define LP5523_DEFAULT_CONFIG \
54a7bef5 MZ	68	(LP5523_AUTO_INC \| LP5523_PWR_SAVE \| LP5523_AUTO_CLK \| LP5523_PWM_PWR_SAVE)
12f022d2	69
0efba16c SO	70	#define LP5523_EN_LEDTEST 0x80
0efba16c SO	71	#define LP5523_LEDTEST_DONE 0x80
48068d5d	72	#define LP5523_RESET 0xFF
0efba16c	73	#define LP5523_ADC_SHORTCIRC_LIM 80
0efba16c	74	#define LP5523_EXT_CLK_USED 0x08
22460438	75	#define LP5523_ENG_STATUS_MASK 0x07
0efba16c	76
22460438 MK	77	static int lp5523_init_program_engine(struct lp55xx_chip *chip);
22460438 MK	78
ffbdccdb	79	static int lp5523_post_init_device(struct lp55xx_chip *chip)
0efba16c	80	{
ffbdccdb	81	int ret;
54a7bef5	82	int val;
0efba16c	83
ffbdccdb	84	ret = lp55xx_write(chip, LP5523_REG_ENABLE, LP5523_ENABLE);
632418bf MWK	85	if (ret)
632418bf MWK	86	return ret;
0efba16c	87
2e4840ed SO	88	/* Chip startup time is 500 us, 1 - 2 ms gives some margin */
2e4840ed SO	89	usleep_range(1000, 2000);
0efba16c	90
54a7bef5 MZ	91	val = LP5523_DEFAULT_CONFIG;
	92	val \|= (chip->pdata->charge_pump_mode << LP5523_CP_MODE_SHIFT) & LP5523_CP_MODE_MASK;
	93
	94	ret = lp55xx_write(chip, LP5523_REG_CONFIG, val);
632418bf MWK	95	if (ret)
632418bf MWK	96	return ret;
0efba16c SO	97
0efba16c SO	98	/* turn on all leds */
ffbdccdb	99	ret = lp55xx_write(chip, LP5523_REG_ENABLE_LEDS_MSB, 0x01);
632418bf	100	if (ret)
1b21ec5a JH	101	return ret;
1b21ec5a JH	102
22460438 MK	103	ret = lp55xx_write(chip, LP5523_REG_ENABLE_LEDS_LSB, 0xff);
	104	if (ret)
	105	return ret;
	106
	107	return lp5523_init_program_engine(chip);
0efba16c SO	108	}
0efba16c SO	109
db6eaf83	110	static void lp5523_run_engine(struct lp55xx_chip *chip, bool start)
0efba16c	111	{
db6eaf83 MWK	112	/* stop engine */
db6eaf83 MWK	113	if (!start) {
43e91e5e	114	lp55xx_stop_engine(chip);
e35bc5d8	115	lp55xx_turn_off_channels(chip);
db6eaf83 MWK	116	return;
db6eaf83 MWK	117	}
0efba16c	118
42a9eaac	119	lp55xx_run_engine_common(chip);
0efba16c SO	120	}
0efba16c SO	121
22460438 MK	122	static int lp5523_init_program_engine(struct lp55xx_chip *chip)
	123	{
	124	int i;
	125	int j;
	126	int ret;
	127	u8 status;
	128	/* one pattern per engine setting LED MUX start and stop addresses */
b9d55087	129	static const u8 pattern[][LP55xx_BYTES_PER_PAGE] = {
22460438 MK	130	{ 0x9c, 0x30, 0x9c, 0xb0, 0x9d, 0x80, 0xd8, 0x00, 0},
	131	{ 0x9c, 0x40, 0x9c, 0xc0, 0x9d, 0x80, 0xd8, 0x00, 0},
	132	{ 0x9c, 0x50, 0x9c, 0xd0, 0x9d, 0x80, 0xd8, 0x00, 0},
	133	};
	134
	135	/* hardcode 32 bytes of memory for each engine from program memory */
	136	ret = lp55xx_write(chip, LP5523_REG_CH1_PROG_START, 0x00);
	137	if (ret)
	138	return ret;
	139
	140	ret = lp55xx_write(chip, LP5523_REG_CH2_PROG_START, 0x10);
	141	if (ret)
	142	return ret;
	143
	144	ret = lp55xx_write(chip, LP5523_REG_CH3_PROG_START, 0x20);
	145	if (ret)
	146	return ret;
	147
	148	/* write LED MUX address space for each engine */
	149	for (i = LP55XX_ENGINE_1; i <= LP55XX_ENGINE_3; i++) {
	150	chip->engine_idx = i;
409a9dc5	151	lp55xx_load_engine(chip);
22460438	152
b9d55087	153	for (j = 0; j < LP55xx_BYTES_PER_PAGE; j++) {
22460438 MK	154	ret = lp55xx_write(chip, LP5523_REG_PROG_MEM + j,
	155	pattern[i - 1][j]);
	156	if (ret)
	157	goto out;
	158	}
	159	}
	160
	161	lp5523_run_engine(chip, true);
	162
	163	/* Let the programs run for couple of ms and check the engine status */
	164	usleep_range(3000, 6000);
6647f7a0 PP	165	ret = lp55xx_read(chip, LP5523_REG_STATUS, &status);
	166	if (ret)
	167	goto out;
22460438 MK	168	status &= LP5523_ENG_STATUS_MASK;
	169
	170	if (status != LP5523_ENG_STATUS_MASK) {
	171	dev_err(&chip->cl->dev,
f2ea85d7	172	"could not configure LED engine, status = 0x%.2x\n",
22460438 MK	173	status);
	174	ret = -1;
	175	}
	176
	177	out:
a9b202b9	178	lp55xx_stop_all_engine(chip);
22460438 MK	179	return ret;
	180	}
	181
0efba16c SO	182	static ssize_t lp5523_selftest(struct device *dev,
	183	struct device_attribute *attr,
	184	char *buf)
	185	{
9ca3bd80 MWK	186	struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev));
	187	struct lp55xx_chip *chip = led->chip;
	188	struct lp55xx_platform_data *pdata = chip->pdata;
17c13c72 MZ	189	int ret, pos = 0;
17c13c72 MZ	190	u8 status, adc, vdd, i;
0efba16c	191
4137d94f	192	guard(mutex)(&chip->lock);
0efba16c	193
9ca3bd80	194	ret = lp55xx_read(chip, LP5523_REG_STATUS, &status);
0efba16c	195	if (ret < 0)
4137d94f	196	return sysfs_emit(buf, "FAIL\n");
0efba16c SO	197
0efba16c SO	198	/* Check that ext clock is really in use if requested */
9ca3bd80	199	if (pdata->clock_mode == LP55XX_CLOCK_EXT) {
0efba16c	200	if ((status & LP5523_EXT_CLK_USED) == 0)
4137d94f	201	return sysfs_emit(buf, "FAIL\n");
9ca3bd80	202	}
0efba16c SO	203
0efba16c SO	204	/* Measure VDD (i.e. VBAT) first (channel 16 corresponds to VDD) */
9ca3bd80	205	lp55xx_write(chip, LP5523_REG_LED_TEST_CTRL, LP5523_EN_LEDTEST \| 16);
2e4840ed	206	usleep_range(3000, 6000); /* ADC conversion time is typically 2.7 ms */
9ca3bd80	207	ret = lp55xx_read(chip, LP5523_REG_STATUS, &status);
1b21ec5a	208	if (ret < 0)
4137d94f	209	return sysfs_emit(buf, "FAIL\n");
1b21ec5a	210
0efba16c	211	if (!(status & LP5523_LEDTEST_DONE))
2e4840ed	212	usleep_range(3000, 6000); /* Was not ready. Wait little bit */
0efba16c	213
9ca3bd80	214	ret = lp55xx_read(chip, LP5523_REG_LED_TEST_ADC, &vdd);
1b21ec5a	215	if (ret < 0)
4137d94f	216	return sysfs_emit(buf, "FAIL\n");
1b21ec5a	217
0efba16c SO	218	vdd--; /* There may be some fluctuation in measurement */
0efba16c SO	219
17c13c72 MZ	220	for (i = 0; i < pdata->num_channels; i++) {
17c13c72 MZ	221	/* Skip disabled channels */
9ca3bd80	222	if (pdata->led_config[i].led_current == 0)
0efba16c SO	223	continue;
	224
	225	/* Set default current */
17c13c72	226	lp55xx_write(chip, LP5523_REG_LED_CURRENT_BASE + led->chan_nr,
9ca3bd80	227	pdata->led_config[i].led_current);
0efba16c	228
17c13c72 MZ	229	lp55xx_write(chip, LP5523_REG_LED_PWM_BASE + led->chan_nr,
17c13c72 MZ	230	0xff);
2e4840ed SO	231	/* let current stabilize 2 - 4ms before measurements start */
2e4840ed SO	232	usleep_range(2000, 4000);
9ca3bd80	233	lp55xx_write(chip, LP5523_REG_LED_TEST_CTRL,
17c13c72	234	LP5523_EN_LEDTEST \| led->chan_nr);
2e4840ed SO	235	/* ADC conversion time is 2.7 ms typically */
2e4840ed SO	236	usleep_range(3000, 6000);
9ca3bd80	237	ret = lp55xx_read(chip, LP5523_REG_STATUS, &status);
1b21ec5a	238	if (ret < 0)
4137d94f	239	return sysfs_emit(buf, "FAIL\n");
1b21ec5a	240
0efba16c	241	if (!(status & LP5523_LEDTEST_DONE))
17c13c72	242	usleep_range(3000, 6000); /* Was not ready. Wait. */
9ca3bd80 MWK	243
9ca3bd80 MWK	244	ret = lp55xx_read(chip, LP5523_REG_LED_TEST_ADC, &adc);
1b21ec5a	245	if (ret < 0)
4137d94f	246	return sysfs_emit(buf, "FAIL\n");
0efba16c SO	247
0efba16c SO	248	if (adc >= vdd \|\| adc < LP5523_ADC_SHORTCIRC_LIM)
8eac0379 CM	249	pos += sysfs_emit_at(buf, pos, "LED %d FAIL\n",
8eac0379 CM	250	led->chan_nr);
0efba16c	251
17c13c72 MZ	252	lp55xx_write(chip, LP5523_REG_LED_PWM_BASE + led->chan_nr,
17c13c72 MZ	253	0x00);
0efba16c SO	254
0efba16c SO	255	/* Restore current */
17c13c72 MZ	256	lp55xx_write(chip, LP5523_REG_LED_CURRENT_BASE + led->chan_nr,
17c13c72 MZ	257	led->led_current);
0efba16c SO	258	led++;
0efba16c SO	259	}
0efba16c	260
4137d94f	261	return pos == 0 ? sysfs_emit(buf, "OK\n") : pos;
0efba16c SO	262	}
0efba16c SO	263
082a4d3f CM	264	LP55XX_DEV_ATTR_ENGINE_MODE(1);
	265	LP55XX_DEV_ATTR_ENGINE_MODE(2);
	266	LP55XX_DEV_ATTR_ENGINE_MODE(3);
8913c2c1 CM	267	LP55XX_DEV_ATTR_ENGINE_LEDS(1);
	268	LP55XX_DEV_ATTR_ENGINE_LEDS(2);
	269	LP55XX_DEV_ATTR_ENGINE_LEDS(3);
082a4d3f CM	270	LP55XX_DEV_ATTR_ENGINE_LOAD(1);
	271	LP55XX_DEV_ATTR_ENGINE_LOAD(2);
	272	LP55XX_DEV_ATTR_ENGINE_LOAD(3);
45e611bf	273	static LP55XX_DEV_ATTR_RO(selftest, lp5523_selftest);
5a15b2ab CM	274	LP55XX_DEV_ATTR_MASTER_FADER(1);
	275	LP55XX_DEV_ATTR_MASTER_FADER(2);
	276	LP55XX_DEV_ATTR_MASTER_FADER(3);
	277	static LP55XX_DEV_ATTR_RW(master_fader_leds, lp55xx_show_master_fader_leds,
	278	lp55xx_store_master_fader_leds);
0efba16c SO	279
0efba16c SO	280	static struct attribute *lp5523_attributes[] = {
45e611bf MK	281	&dev_attr_engine1_mode.attr,
	282	&dev_attr_engine2_mode.attr,
	283	&dev_attr_engine3_mode.attr,
	284	&dev_attr_engine1_load.attr,
	285	&dev_attr_engine2_load.attr,
	286	&dev_attr_engine3_load.attr,
	287	&dev_attr_engine1_leds.attr,
	288	&dev_attr_engine2_leds.attr,
	289	&dev_attr_engine3_leds.attr,
0efba16c	290	&dev_attr_selftest.attr,
52da81ea TK	291	&dev_attr_master_fader1.attr,
	292	&dev_attr_master_fader2.attr,
	293	&dev_attr_master_fader3.attr,
	294	&dev_attr_master_fader_leds.attr,
f1625842	295	NULL,
0efba16c SO	296	};
	297
	298	static const struct attribute_group lp5523_group = {
	299	.attrs = lp5523_attributes,
	300	};
	301
48068d5d MWK	302	/* Chip specific configurations */
48068d5d MWK	303	static struct lp55xx_device_config lp5523_cfg = {
a9b202b9 CM	304	.reg_op_mode = {
	305	.addr = LP5523_REG_OP_MODE,
	306	},
42a9eaac CM	307	.reg_exec = {
	308	.addr = LP5523_REG_ENABLE,
	309	},
a9b202b9 CM	310	.engine_busy = {
	311	.addr = LP5523_REG_STATUS,
	312	.mask = LP5523_ENGINE_BUSY,
	313	},
48068d5d MWK	314	.reset = {
	315	.addr = LP5523_REG_RESET,
	316	.val = LP5523_RESET,
	317	},
e3a700d8 MWK	318	.enable = {
	319	.addr = LP5523_REG_ENABLE,
	320	.val = LP5523_ENABLE,
	321	},
31379a57 CM	322	.prog_mem_base = {
	323	.addr = LP5523_REG_PROG_MEM,
	324	},
c63580b2 CM	325	.reg_led_pwm_base = {
	326	.addr = LP5523_REG_LED_PWM_BASE,
	327	},
01e0290d CM	328	.reg_led_current_base = {
	329	.addr = LP5523_REG_LED_CURRENT_BASE,
	330	},
5a15b2ab CM	331	.reg_master_fader_base = {
	332	.addr = LP5523_REG_MASTER_FADER_BASE,
	333	},
	334	.reg_led_ctrl_base = {
	335	.addr = LP5523_REG_LED_CTRL_BASE,
	336	},
409a9dc5	337	.pages_per_engine = LP5523_PAGES_PER_ENGINE,
0e202346	338	.max_channel = LP5523_MAX_LEDS,
ffbdccdb	339	.post_init_device = lp5523_post_init_device,
c63580b2	340	.brightness_fn = lp55xx_led_brightness,
794826b2	341	.multicolor_brightness_fn = lp55xx_multicolor_brightness,
01e0290d	342	.set_led_current = lp55xx_set_led_current,
a3df1906	343	.firmware_cb = lp55xx_firmware_loaded_cb,
db6eaf83	344	.run_engine = lp5523_run_engine,
e73c0ce6	345	.dev_attr_group = &lp5523_group,
48068d5d MWK	346	};
48068d5d MWK	347
0efba16c	348	static const struct i2c_device_id lp5523_id[] = {
db30c289 CM	349	{ "lp5523", .driver_data = (kernel_ulong_t)&lp5523_cfg, },
db30c289 CM	350	{ "lp55231", .driver_data = (kernel_ulong_t)&lp5523_cfg, },
0efba16c SO	351	{ }
	352	};
	353
	354	MODULE_DEVICE_TABLE(i2c, lp5523_id);
	355
33c88b67	356	static const struct of_device_id of_lp5523_leds_match[] = {
db30c289 CM	357	{ .compatible = "national,lp5523", .data = &lp5523_cfg, },
db30c289 CM	358	{ .compatible = "ti,lp55231", .data = &lp5523_cfg, },
33c88b67 AL	359	{},
	360	};
	361
	362	MODULE_DEVICE_TABLE(of, of_lp5523_leds_match);
33c88b67	363
0efba16c SO	364	static struct i2c_driver lp5523_driver = {
0efba16c SO	365	.driver = {
27d7704e	366	.name = "lp5523x",
3d590af8	367	.of_match_table = of_lp5523_leds_match,
0efba16c	368	},
db30c289 CM	369	.probe = lp55xx_probe,
db30c289 CM	370	.remove = lp55xx_remove,
0efba16c SO	371	.id_table = lp5523_id,
	372	};
	373
09a0d183	374	module_i2c_driver(lp5523_driver);
0efba16c SO	375
0efba16c SO	376	MODULE_AUTHOR("Mathias Nyman <[email protected]>");
a2387cb9	377	MODULE_AUTHOR("Milo Kim <[email protected]>");
0efba16c SO	378	MODULE_DESCRIPTION("LP5523 LED engine");
0efba16c SO	379	MODULE_LICENSE("GPL");