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1da177e4 LT |
1 | /* |
2 | * linux/drivers/char/serial_core.h | |
3 | * | |
4 | * Copyright (C) 2000 Deep Blue Solutions Ltd. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, write to the Free Software | |
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
19 | */ | |
20 | #ifndef LINUX_SERIAL_CORE_H | |
21 | #define LINUX_SERIAL_CORE_H | |
22 | ||
23 | /* | |
24 | * The type definitions. These are from Ted Ts'o's serial.h | |
25 | */ | |
26 | #define PORT_UNKNOWN 0 | |
27 | #define PORT_8250 1 | |
28 | #define PORT_16450 2 | |
29 | #define PORT_16550 3 | |
30 | #define PORT_16550A 4 | |
31 | #define PORT_CIRRUS 5 | |
32 | #define PORT_16650 6 | |
33 | #define PORT_16650V2 7 | |
34 | #define PORT_16750 8 | |
35 | #define PORT_STARTECH 9 | |
36 | #define PORT_16C950 10 | |
37 | #define PORT_16654 11 | |
38 | #define PORT_16850 12 | |
39 | #define PORT_RSA 13 | |
40 | #define PORT_NS16550A 14 | |
41 | #define PORT_XSCALE 15 | |
913ade51 | 42 | #define PORT_MAX_8250 15 /* max port ID */ |
1da177e4 LT |
43 | |
44 | /* | |
45 | * ARM specific type numbers. These are not currently guaranteed | |
46 | * to be implemented, and will change in the future. These are | |
47 | * separate so any additions to the old serial.c that occur before | |
48 | * we are merged can be easily merged here. | |
49 | */ | |
50 | #define PORT_PXA 31 | |
51 | #define PORT_AMBA 32 | |
52 | #define PORT_CLPS711X 33 | |
53 | #define PORT_SA1100 34 | |
54 | #define PORT_UART00 35 | |
55 | #define PORT_21285 37 | |
56 | ||
57 | /* Sparc type numbers. */ | |
58 | #define PORT_SUNZILOG 38 | |
59 | #define PORT_SUNSAB 39 | |
60 | ||
61 | /* NEC v850. */ | |
62 | #define PORT_V850E_UART 40 | |
63 | ||
64 | /* DZ */ | |
65 | #define PORT_DZ 47 | |
66 | ||
67 | /* Parisc type numbers. */ | |
68 | #define PORT_MUX 48 | |
69 | ||
1e6c9c28 AV |
70 | /* Atmel AT91RM9200 SoC */ |
71 | #define PORT_AT91RM9200 49 | |
72 | ||
1da177e4 LT |
73 | /* Macintosh Zilog type numbers */ |
74 | #define PORT_MAC_ZILOG 50 /* m68k : not yet implemented */ | |
75 | #define PORT_PMAC_ZILOG 51 | |
76 | ||
77 | /* SH-SCI */ | |
78 | #define PORT_SCI 52 | |
79 | #define PORT_SCIF 53 | |
80 | #define PORT_IRDA 54 | |
81 | ||
82 | /* Samsung S3C2410 SoC and derivatives thereof */ | |
83 | #define PORT_S3C2410 55 | |
84 | ||
85 | /* SGI IP22 aka Indy / Challenge S / Indigo 2 */ | |
86 | #define PORT_IP22ZILOG 56 | |
87 | ||
88 | /* Sharp LH7a40x -- an ARM9 SoC series */ | |
89 | #define PORT_LH7A40X 57 | |
90 | ||
91 | /* PPC CPM type number */ | |
92 | #define PORT_CPM 58 | |
93 | ||
94 | /* MPC52xx type numbers */ | |
95 | #define PORT_MPC52xx 59 | |
96 | ||
97 | /* IBM icom */ | |
98 | #define PORT_ICOM 60 | |
99 | ||
100 | /* Samsung S3C2440 SoC */ | |
101 | #define PORT_S3C2440 61 | |
102 | ||
103 | /* Motorola i.MX SoC */ | |
104 | #define PORT_IMX 62 | |
105 | ||
106 | /* Marvell MPSC */ | |
107 | #define PORT_MPSC 63 | |
108 | ||
109 | /* TXX9 type number */ | |
e5c2d749 | 110 | #define PORT_TXX9 64 |
1da177e4 LT |
111 | |
112 | /* NEC VR4100 series SIU/DSIU */ | |
113 | #define PORT_VR41XX_SIU 65 | |
114 | #define PORT_VR41XX_DSIU 66 | |
115 | ||
116 | /* Samsung S3C2400 SoC */ | |
117 | #define PORT_S3C2400 67 | |
118 | ||
119 | /* M32R SIO */ | |
120 | #define PORT_M32R_SIO 68 | |
121 | ||
122 | /*Digi jsm */ | |
913ade51 RK |
123 | #define PORT_JSM 69 |
124 | ||
125 | #define PORT_IP3106 70 | |
1da177e4 | 126 | |
f5417612 SH |
127 | /* Hilscher netx */ |
128 | #define PORT_NETX 71 | |
129 | ||
1da177e4 LT |
130 | #ifdef __KERNEL__ |
131 | ||
132 | #include <linux/config.h> | |
661f83a6 | 133 | #include <linux/compiler.h> |
1da177e4 LT |
134 | #include <linux/interrupt.h> |
135 | #include <linux/circ_buf.h> | |
136 | #include <linux/spinlock.h> | |
137 | #include <linux/sched.h> | |
138 | #include <linux/tty.h> | |
e2862f6a | 139 | #include <linux/mutex.h> |
1da177e4 LT |
140 | |
141 | struct uart_port; | |
142 | struct uart_info; | |
143 | struct serial_struct; | |
144 | struct device; | |
145 | ||
146 | /* | |
147 | * This structure describes all the operations that can be | |
148 | * done on the physical hardware. | |
149 | */ | |
150 | struct uart_ops { | |
151 | unsigned int (*tx_empty)(struct uart_port *); | |
152 | void (*set_mctrl)(struct uart_port *, unsigned int mctrl); | |
153 | unsigned int (*get_mctrl)(struct uart_port *); | |
b129a8cc RK |
154 | void (*stop_tx)(struct uart_port *); |
155 | void (*start_tx)(struct uart_port *); | |
1da177e4 LT |
156 | void (*send_xchar)(struct uart_port *, char ch); |
157 | void (*stop_rx)(struct uart_port *); | |
158 | void (*enable_ms)(struct uart_port *); | |
159 | void (*break_ctl)(struct uart_port *, int ctl); | |
160 | int (*startup)(struct uart_port *); | |
161 | void (*shutdown)(struct uart_port *); | |
162 | void (*set_termios)(struct uart_port *, struct termios *new, | |
163 | struct termios *old); | |
164 | void (*pm)(struct uart_port *, unsigned int state, | |
165 | unsigned int oldstate); | |
166 | int (*set_wake)(struct uart_port *, unsigned int state); | |
167 | ||
168 | /* | |
169 | * Return a string describing the type of the port | |
170 | */ | |
171 | const char *(*type)(struct uart_port *); | |
172 | ||
173 | /* | |
174 | * Release IO and memory resources used by the port. | |
175 | * This includes iounmap if necessary. | |
176 | */ | |
177 | void (*release_port)(struct uart_port *); | |
178 | ||
179 | /* | |
180 | * Request IO and memory resources used by the port. | |
181 | * This includes iomapping the port if necessary. | |
182 | */ | |
183 | int (*request_port)(struct uart_port *); | |
184 | void (*config_port)(struct uart_port *, int); | |
185 | int (*verify_port)(struct uart_port *, struct serial_struct *); | |
186 | int (*ioctl)(struct uart_port *, unsigned int, unsigned long); | |
187 | }; | |
188 | ||
189 | #define UART_CONFIG_TYPE (1 << 0) | |
190 | #define UART_CONFIG_IRQ (1 << 1) | |
191 | ||
192 | struct uart_icount { | |
193 | __u32 cts; | |
194 | __u32 dsr; | |
195 | __u32 rng; | |
196 | __u32 dcd; | |
197 | __u32 rx; | |
198 | __u32 tx; | |
199 | __u32 frame; | |
200 | __u32 overrun; | |
201 | __u32 parity; | |
202 | __u32 brk; | |
203 | __u32 buf_overrun; | |
204 | }; | |
205 | ||
206 | struct uart_port { | |
207 | spinlock_t lock; /* port lock */ | |
208 | unsigned int iobase; /* in/out[bwl] */ | |
209 | unsigned char __iomem *membase; /* read/write[bwl] */ | |
210 | unsigned int irq; /* irq number */ | |
211 | unsigned int uartclk; /* base uart clock */ | |
212 | unsigned char fifosize; /* tx fifo size */ | |
213 | unsigned char x_char; /* xon/xoff char */ | |
214 | unsigned char regshift; /* reg offset shift */ | |
215 | unsigned char iotype; /* io access style */ | |
216 | ||
217 | #define UPIO_PORT (0) | |
218 | #define UPIO_HUB6 (1) | |
219 | #define UPIO_MEM (2) | |
220 | #define UPIO_MEM32 (3) | |
21c614a7 | 221 | #define UPIO_AU (4) /* Au1x00 type IO */ |
1da177e4 LT |
222 | |
223 | unsigned int read_status_mask; /* driver specific */ | |
224 | unsigned int ignore_status_mask; /* driver specific */ | |
225 | struct uart_info *info; /* pointer to parent info */ | |
226 | struct uart_icount icount; /* statistics */ | |
227 | ||
228 | struct console *cons; /* struct console, if any */ | |
229 | #ifdef CONFIG_SERIAL_CORE_CONSOLE | |
230 | unsigned long sysrq; /* sysrq timeout */ | |
231 | #endif | |
232 | ||
233 | unsigned int flags; | |
234 | ||
235 | #define UPF_FOURPORT (1 << 1) | |
236 | #define UPF_SAK (1 << 2) | |
237 | #define UPF_SPD_MASK (0x1030) | |
238 | #define UPF_SPD_HI (0x0010) | |
239 | #define UPF_SPD_VHI (0x0020) | |
240 | #define UPF_SPD_CUST (0x0030) | |
241 | #define UPF_SPD_SHI (0x1000) | |
242 | #define UPF_SPD_WARP (0x1010) | |
243 | #define UPF_SKIP_TEST (1 << 6) | |
244 | #define UPF_AUTO_IRQ (1 << 7) | |
245 | #define UPF_HARDPPS_CD (1 << 11) | |
246 | #define UPF_LOW_LATENCY (1 << 13) | |
247 | #define UPF_BUGGY_UART (1 << 14) | |
1da177e4 | 248 | #define UPF_MAGIC_MULTIPLIER (1 << 16) |
1da177e4 LT |
249 | #define UPF_CONS_FLOW (1 << 23) |
250 | #define UPF_SHARE_IRQ (1 << 24) | |
251 | #define UPF_BOOT_AUTOCONF (1 << 28) | |
252 | #define UPF_IOREMAP (1 << 31) | |
253 | ||
254 | #define UPF_CHANGE_MASK (0x17fff) | |
255 | #define UPF_USR_MASK (UPF_SPD_MASK|UPF_LOW_LATENCY) | |
256 | ||
257 | unsigned int mctrl; /* current modem ctrl settings */ | |
258 | unsigned int timeout; /* character-based timeout */ | |
259 | unsigned int type; /* port type */ | |
260 | struct uart_ops *ops; | |
261 | unsigned int custom_divisor; | |
262 | unsigned int line; /* port index */ | |
263 | unsigned long mapbase; /* for ioremap */ | |
264 | struct device *dev; /* parent device */ | |
265 | unsigned char hub6; /* this should be in the 8250 driver */ | |
266 | unsigned char unused[3]; | |
267 | }; | |
268 | ||
269 | /* | |
270 | * This is the state information which is persistent across opens. | |
271 | * The low level driver must not to touch any elements contained | |
272 | * within. | |
273 | */ | |
274 | struct uart_state { | |
275 | unsigned int close_delay; /* msec */ | |
276 | unsigned int closing_wait; /* msec */ | |
277 | ||
278 | #define USF_CLOSING_WAIT_INF (0) | |
279 | #define USF_CLOSING_WAIT_NONE (~0U) | |
280 | ||
281 | int count; | |
282 | int pm_state; | |
283 | struct uart_info *info; | |
284 | struct uart_port *port; | |
285 | ||
e2862f6a | 286 | struct mutex mutex; |
1da177e4 LT |
287 | }; |
288 | ||
289 | #define UART_XMIT_SIZE PAGE_SIZE | |
290 | /* | |
291 | * This is the state information which is only valid when the port | |
292 | * is open; it may be freed by the core driver once the device has | |
293 | * been closed. Either the low level driver or the core can modify | |
294 | * stuff here. | |
295 | */ | |
296 | struct uart_info { | |
297 | struct tty_struct *tty; | |
298 | struct circ_buf xmit; | |
299 | unsigned int flags; | |
300 | ||
301 | /* | |
302 | * These are the flags that specific to info->flags, and reflect our | |
303 | * internal state. They can not be accessed via port->flags. Low | |
304 | * level drivers must not change these, but may query them instead. | |
305 | */ | |
306 | #define UIF_CHECK_CD (1 << 25) | |
307 | #define UIF_CTS_FLOW (1 << 26) | |
308 | #define UIF_NORMAL_ACTIVE (1 << 29) | |
309 | #define UIF_INITIALIZED (1 << 31) | |
310 | ||
311 | int blocked_open; | |
312 | ||
313 | struct tasklet_struct tlet; | |
314 | ||
315 | wait_queue_head_t open_wait; | |
316 | wait_queue_head_t delta_msr_wait; | |
317 | }; | |
318 | ||
319 | /* number of characters left in xmit buffer before we ask for more */ | |
320 | #define WAKEUP_CHARS 256 | |
321 | ||
322 | struct module; | |
323 | struct tty_driver; | |
324 | ||
325 | struct uart_driver { | |
326 | struct module *owner; | |
327 | const char *driver_name; | |
328 | const char *dev_name; | |
329 | const char *devfs_name; | |
330 | int major; | |
331 | int minor; | |
332 | int nr; | |
333 | struct console *cons; | |
334 | ||
335 | /* | |
336 | * these are private; the low level driver should not | |
337 | * touch these; they should be initialised to NULL | |
338 | */ | |
339 | struct uart_state *state; | |
340 | struct tty_driver *tty_driver; | |
341 | }; | |
342 | ||
343 | void uart_write_wakeup(struct uart_port *port); | |
344 | ||
345 | /* | |
346 | * Baud rate helpers. | |
347 | */ | |
348 | void uart_update_timeout(struct uart_port *port, unsigned int cflag, | |
349 | unsigned int baud); | |
350 | unsigned int uart_get_baud_rate(struct uart_port *port, struct termios *termios, | |
351 | struct termios *old, unsigned int min, | |
352 | unsigned int max); | |
353 | unsigned int uart_get_divisor(struct uart_port *port, unsigned int baud); | |
354 | ||
355 | /* | |
356 | * Console helpers. | |
357 | */ | |
358 | struct uart_port *uart_get_console(struct uart_port *ports, int nr, | |
359 | struct console *c); | |
360 | void uart_parse_options(char *options, int *baud, int *parity, int *bits, | |
361 | int *flow); | |
362 | int uart_set_options(struct uart_port *port, struct console *co, int baud, | |
363 | int parity, int bits, int flow); | |
364 | struct tty_driver *uart_console_device(struct console *co, int *index); | |
365 | ||
366 | /* | |
367 | * Port/driver registration/removal | |
368 | */ | |
369 | int uart_register_driver(struct uart_driver *uart); | |
370 | void uart_unregister_driver(struct uart_driver *uart); | |
1da177e4 LT |
371 | int uart_add_one_port(struct uart_driver *reg, struct uart_port *port); |
372 | int uart_remove_one_port(struct uart_driver *reg, struct uart_port *port); | |
373 | int uart_match_port(struct uart_port *port1, struct uart_port *port2); | |
374 | ||
375 | /* | |
376 | * Power Management | |
377 | */ | |
378 | int uart_suspend_port(struct uart_driver *reg, struct uart_port *port); | |
379 | int uart_resume_port(struct uart_driver *reg, struct uart_port *port); | |
380 | ||
381 | #define uart_circ_empty(circ) ((circ)->head == (circ)->tail) | |
382 | #define uart_circ_clear(circ) ((circ)->head = (circ)->tail = 0) | |
383 | ||
384 | #define uart_circ_chars_pending(circ) \ | |
385 | (CIRC_CNT((circ)->head, (circ)->tail, UART_XMIT_SIZE)) | |
386 | ||
387 | #define uart_circ_chars_free(circ) \ | |
388 | (CIRC_SPACE((circ)->head, (circ)->tail, UART_XMIT_SIZE)) | |
389 | ||
390 | #define uart_tx_stopped(port) \ | |
391 | ((port)->info->tty->stopped || (port)->info->tty->hw_stopped) | |
392 | ||
393 | /* | |
394 | * The following are helper functions for the low level drivers. | |
395 | */ | |
1da177e4 LT |
396 | static inline int |
397 | uart_handle_sysrq_char(struct uart_port *port, unsigned int ch, | |
398 | struct pt_regs *regs) | |
399 | { | |
93c37f29 | 400 | #ifdef SUPPORT_SYSRQ |
1da177e4 LT |
401 | if (port->sysrq) { |
402 | if (ch && time_before(jiffies, port->sysrq)) { | |
403 | handle_sysrq(ch, regs, NULL); | |
404 | port->sysrq = 0; | |
405 | return 1; | |
406 | } | |
407 | port->sysrq = 0; | |
408 | } | |
93c37f29 | 409 | #endif |
1da177e4 LT |
410 | return 0; |
411 | } | |
4e149184 LT |
412 | #ifndef SUPPORT_SYSRQ |
413 | #define uart_handle_sysrq_char(port,ch,regs) uart_handle_sysrq_char(port, 0, NULL) | |
414 | #endif | |
1da177e4 LT |
415 | |
416 | /* | |
417 | * We do the SysRQ and SAK checking like this... | |
418 | */ | |
419 | static inline int uart_handle_break(struct uart_port *port) | |
420 | { | |
421 | struct uart_info *info = port->info; | |
422 | #ifdef SUPPORT_SYSRQ | |
423 | if (port->cons && port->cons->index == port->line) { | |
424 | if (!port->sysrq) { | |
425 | port->sysrq = jiffies + HZ*5; | |
426 | return 1; | |
427 | } | |
428 | port->sysrq = 0; | |
429 | } | |
430 | #endif | |
431 | if (info->flags & UPF_SAK) | |
432 | do_SAK(info->tty); | |
433 | return 0; | |
434 | } | |
435 | ||
436 | /** | |
437 | * uart_handle_dcd_change - handle a change of carrier detect state | |
438 | * @port: uart_port structure for the open port | |
439 | * @status: new carrier detect status, nonzero if active | |
440 | */ | |
441 | static inline void | |
442 | uart_handle_dcd_change(struct uart_port *port, unsigned int status) | |
443 | { | |
444 | struct uart_info *info = port->info; | |
445 | ||
446 | port->icount.dcd++; | |
447 | ||
448 | #ifdef CONFIG_HARD_PPS | |
449 | if ((port->flags & UPF_HARDPPS_CD) && status) | |
450 | hardpps(); | |
451 | #endif | |
452 | ||
453 | if (info->flags & UIF_CHECK_CD) { | |
454 | if (status) | |
455 | wake_up_interruptible(&info->open_wait); | |
456 | else if (info->tty) | |
457 | tty_hangup(info->tty); | |
458 | } | |
459 | } | |
460 | ||
461 | /** | |
462 | * uart_handle_cts_change - handle a change of clear-to-send state | |
463 | * @port: uart_port structure for the open port | |
464 | * @status: new clear to send status, nonzero if active | |
465 | */ | |
466 | static inline void | |
467 | uart_handle_cts_change(struct uart_port *port, unsigned int status) | |
468 | { | |
469 | struct uart_info *info = port->info; | |
470 | struct tty_struct *tty = info->tty; | |
471 | ||
472 | port->icount.cts++; | |
473 | ||
474 | if (info->flags & UIF_CTS_FLOW) { | |
475 | if (tty->hw_stopped) { | |
476 | if (status) { | |
477 | tty->hw_stopped = 0; | |
b129a8cc | 478 | port->ops->start_tx(port); |
1da177e4 LT |
479 | uart_write_wakeup(port); |
480 | } | |
481 | } else { | |
482 | if (!status) { | |
483 | tty->hw_stopped = 1; | |
b129a8cc | 484 | port->ops->stop_tx(port); |
1da177e4 LT |
485 | } |
486 | } | |
487 | } | |
488 | } | |
489 | ||
05ab3014 RK |
490 | #include <linux/tty_flip.h> |
491 | ||
492 | static inline void | |
493 | uart_insert_char(struct uart_port *port, unsigned int status, | |
494 | unsigned int overrun, unsigned int ch, unsigned int flag) | |
495 | { | |
496 | struct tty_struct *tty = port->info->tty; | |
497 | ||
498 | if ((status & port->ignore_status_mask & ~overrun) == 0) | |
499 | tty_insert_flip_char(tty, ch, flag); | |
500 | ||
501 | /* | |
502 | * Overrun is special. Since it's reported immediately, | |
503 | * it doesn't affect the current character. | |
504 | */ | |
505 | if (status & ~port->ignore_status_mask & overrun) | |
506 | tty_insert_flip_char(tty, 0, TTY_OVERRUN); | |
507 | } | |
508 | ||
1da177e4 LT |
509 | /* |
510 | * UART_ENABLE_MS - determine if port should enable modem status irqs | |
511 | */ | |
512 | #define UART_ENABLE_MS(port,cflag) ((port)->flags & UPF_HARDPPS_CD || \ | |
513 | (cflag) & CRTSCTS || \ | |
514 | !((cflag) & CLOCAL)) | |
515 | ||
516 | #endif | |
517 | ||
518 | #endif /* LINUX_SERIAL_CORE_H */ |