]>
Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * ALSA driver for ATI IXP 150/200/250 AC97 modem controllers | |
3 | * | |
4 | * Copyright (c) 2004 Takashi Iwai <[email protected]> | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, write to the Free Software | |
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
19 | * | |
20 | */ | |
21 | ||
1da177e4 LT |
22 | #include <asm/io.h> |
23 | #include <linux/delay.h> | |
24 | #include <linux/interrupt.h> | |
25 | #include <linux/init.h> | |
26 | #include <linux/pci.h> | |
27 | #include <linux/slab.h> | |
65a77217 | 28 | #include <linux/module.h> |
62932df8 | 29 | #include <linux/mutex.h> |
1da177e4 LT |
30 | #include <sound/core.h> |
31 | #include <sound/pcm.h> | |
32 | #include <sound/pcm_params.h> | |
33 | #include <sound/info.h> | |
34 | #include <sound/ac97_codec.h> | |
35 | #include <sound/initval.h> | |
36 | ||
37 | MODULE_AUTHOR("Takashi Iwai <[email protected]>"); | |
38 | MODULE_DESCRIPTION("ATI IXP MC97 controller"); | |
39 | MODULE_LICENSE("GPL"); | |
40 | MODULE_SUPPORTED_DEVICE("{{ATI,IXP150/200/250}}"); | |
41 | ||
b7fe4622 CL |
42 | static int index = -2; /* Exclude the first card */ |
43 | static char *id = SNDRV_DEFAULT_STR1; /* ID for this card */ | |
44 | static int ac97_clock = 48000; | |
1da177e4 | 45 | |
b7fe4622 | 46 | module_param(index, int, 0444); |
1da177e4 | 47 | MODULE_PARM_DESC(index, "Index value for ATI IXP controller."); |
b7fe4622 | 48 | module_param(id, charp, 0444); |
1da177e4 | 49 | MODULE_PARM_DESC(id, "ID string for ATI IXP controller."); |
b7fe4622 | 50 | module_param(ac97_clock, int, 0444); |
1da177e4 LT |
51 | MODULE_PARM_DESC(ac97_clock, "AC'97 codec clock (default 48000Hz)."); |
52 | ||
2b3e584b | 53 | /* just for backward compatibility */ |
a67ff6a5 | 54 | static bool enable; |
698444f3 | 55 | module_param(enable, bool, 0444); |
2b3e584b | 56 | |
1da177e4 LT |
57 | |
58 | /* | |
59 | */ | |
60 | ||
61 | #define ATI_REG_ISR 0x00 /* interrupt source */ | |
62 | #define ATI_REG_ISR_MODEM_IN_XRUN (1U<<0) | |
63 | #define ATI_REG_ISR_MODEM_IN_STATUS (1U<<1) | |
64 | #define ATI_REG_ISR_MODEM_OUT1_XRUN (1U<<2) | |
65 | #define ATI_REG_ISR_MODEM_OUT1_STATUS (1U<<3) | |
66 | #define ATI_REG_ISR_MODEM_OUT2_XRUN (1U<<4) | |
67 | #define ATI_REG_ISR_MODEM_OUT2_STATUS (1U<<5) | |
68 | #define ATI_REG_ISR_MODEM_OUT3_XRUN (1U<<6) | |
69 | #define ATI_REG_ISR_MODEM_OUT3_STATUS (1U<<7) | |
70 | #define ATI_REG_ISR_PHYS_INTR (1U<<8) | |
71 | #define ATI_REG_ISR_PHYS_MISMATCH (1U<<9) | |
72 | #define ATI_REG_ISR_CODEC0_NOT_READY (1U<<10) | |
73 | #define ATI_REG_ISR_CODEC1_NOT_READY (1U<<11) | |
74 | #define ATI_REG_ISR_CODEC2_NOT_READY (1U<<12) | |
75 | #define ATI_REG_ISR_NEW_FRAME (1U<<13) | |
76 | #define ATI_REG_ISR_MODEM_GPIO_DATA (1U<<14) | |
77 | ||
78 | #define ATI_REG_IER 0x04 /* interrupt enable */ | |
79 | #define ATI_REG_IER_MODEM_IN_XRUN_EN (1U<<0) | |
80 | #define ATI_REG_IER_MODEM_STATUS_EN (1U<<1) | |
81 | #define ATI_REG_IER_MODEM_OUT1_XRUN_EN (1U<<2) | |
82 | #define ATI_REG_IER_MODEM_OUT2_XRUN_EN (1U<<4) | |
83 | #define ATI_REG_IER_MODEM_OUT3_XRUN_EN (1U<<6) | |
84 | #define ATI_REG_IER_PHYS_INTR_EN (1U<<8) | |
85 | #define ATI_REG_IER_PHYS_MISMATCH_EN (1U<<9) | |
86 | #define ATI_REG_IER_CODEC0_INTR_EN (1U<<10) | |
87 | #define ATI_REG_IER_CODEC1_INTR_EN (1U<<11) | |
88 | #define ATI_REG_IER_CODEC2_INTR_EN (1U<<12) | |
89 | #define ATI_REG_IER_NEW_FRAME_EN (1U<<13) /* (RO */ | |
90 | #define ATI_REG_IER_MODEM_GPIO_DATA_EN (1U<<14) /* (WO) modem is running */ | |
91 | #define ATI_REG_IER_MODEM_SET_BUS_BUSY (1U<<15) | |
92 | ||
93 | #define ATI_REG_CMD 0x08 /* command */ | |
94 | #define ATI_REG_CMD_POWERDOWN (1U<<0) | |
95 | #define ATI_REG_CMD_MODEM_RECEIVE_EN (1U<<1) /* modem only */ | |
96 | #define ATI_REG_CMD_MODEM_SEND1_EN (1U<<2) /* modem only */ | |
97 | #define ATI_REG_CMD_MODEM_SEND2_EN (1U<<3) /* modem only */ | |
98 | #define ATI_REG_CMD_MODEM_SEND3_EN (1U<<4) /* modem only */ | |
99 | #define ATI_REG_CMD_MODEM_STATUS_MEM (1U<<5) /* modem only */ | |
100 | #define ATI_REG_CMD_MODEM_IN_DMA_EN (1U<<8) /* modem only */ | |
101 | #define ATI_REG_CMD_MODEM_OUT_DMA1_EN (1U<<9) /* modem only */ | |
102 | #define ATI_REG_CMD_MODEM_OUT_DMA2_EN (1U<<10) /* modem only */ | |
103 | #define ATI_REG_CMD_MODEM_OUT_DMA3_EN (1U<<11) /* modem only */ | |
104 | #define ATI_REG_CMD_AUDIO_PRESENT (1U<<20) | |
105 | #define ATI_REG_CMD_MODEM_GPIO_THRU_DMA (1U<<22) /* modem only */ | |
106 | #define ATI_REG_CMD_LOOPBACK_EN (1U<<23) | |
107 | #define ATI_REG_CMD_PACKED_DIS (1U<<24) | |
108 | #define ATI_REG_CMD_BURST_EN (1U<<25) | |
109 | #define ATI_REG_CMD_PANIC_EN (1U<<26) | |
110 | #define ATI_REG_CMD_MODEM_PRESENT (1U<<27) | |
111 | #define ATI_REG_CMD_ACLINK_ACTIVE (1U<<28) | |
112 | #define ATI_REG_CMD_AC_SOFT_RESET (1U<<29) | |
113 | #define ATI_REG_CMD_AC_SYNC (1U<<30) | |
114 | #define ATI_REG_CMD_AC_RESET (1U<<31) | |
115 | ||
116 | #define ATI_REG_PHYS_OUT_ADDR 0x0c | |
117 | #define ATI_REG_PHYS_OUT_CODEC_MASK (3U<<0) | |
118 | #define ATI_REG_PHYS_OUT_RW (1U<<2) | |
119 | #define ATI_REG_PHYS_OUT_ADDR_EN (1U<<8) | |
120 | #define ATI_REG_PHYS_OUT_ADDR_SHIFT 9 | |
121 | #define ATI_REG_PHYS_OUT_DATA_SHIFT 16 | |
122 | ||
123 | #define ATI_REG_PHYS_IN_ADDR 0x10 | |
124 | #define ATI_REG_PHYS_IN_READ_FLAG (1U<<8) | |
125 | #define ATI_REG_PHYS_IN_ADDR_SHIFT 9 | |
126 | #define ATI_REG_PHYS_IN_DATA_SHIFT 16 | |
127 | ||
128 | #define ATI_REG_SLOTREQ 0x14 | |
129 | ||
130 | #define ATI_REG_COUNTER 0x18 | |
131 | #define ATI_REG_COUNTER_SLOT (3U<<0) /* slot # */ | |
132 | #define ATI_REG_COUNTER_BITCLOCK (31U<<8) | |
133 | ||
134 | #define ATI_REG_IN_FIFO_THRESHOLD 0x1c | |
135 | ||
136 | #define ATI_REG_MODEM_IN_DMA_LINKPTR 0x20 | |
137 | #define ATI_REG_MODEM_IN_DMA_DT_START 0x24 /* RO */ | |
138 | #define ATI_REG_MODEM_IN_DMA_DT_NEXT 0x28 /* RO */ | |
139 | #define ATI_REG_MODEM_IN_DMA_DT_CUR 0x2c /* RO */ | |
140 | #define ATI_REG_MODEM_IN_DMA_DT_SIZE 0x30 | |
141 | #define ATI_REG_MODEM_OUT_FIFO 0x34 /* output threshold */ | |
142 | #define ATI_REG_MODEM_OUT1_DMA_THRESHOLD_MASK (0xf<<16) | |
143 | #define ATI_REG_MODEM_OUT1_DMA_THRESHOLD_SHIFT 16 | |
144 | #define ATI_REG_MODEM_OUT_DMA1_LINKPTR 0x38 | |
145 | #define ATI_REG_MODEM_OUT_DMA2_LINKPTR 0x3c | |
146 | #define ATI_REG_MODEM_OUT_DMA3_LINKPTR 0x40 | |
147 | #define ATI_REG_MODEM_OUT_DMA1_DT_START 0x44 | |
148 | #define ATI_REG_MODEM_OUT_DMA1_DT_NEXT 0x48 | |
149 | #define ATI_REG_MODEM_OUT_DMA1_DT_CUR 0x4c | |
150 | #define ATI_REG_MODEM_OUT_DMA2_DT_START 0x50 | |
151 | #define ATI_REG_MODEM_OUT_DMA2_DT_NEXT 0x54 | |
152 | #define ATI_REG_MODEM_OUT_DMA2_DT_CUR 0x58 | |
153 | #define ATI_REG_MODEM_OUT_DMA3_DT_START 0x5c | |
154 | #define ATI_REG_MODEM_OUT_DMA3_DT_NEXT 0x60 | |
155 | #define ATI_REG_MODEM_OUT_DMA3_DT_CUR 0x64 | |
156 | #define ATI_REG_MODEM_OUT_DMA12_DT_SIZE 0x68 | |
157 | #define ATI_REG_MODEM_OUT_DMA3_DT_SIZE 0x6c | |
158 | #define ATI_REG_MODEM_OUT_FIFO_USED 0x70 | |
159 | #define ATI_REG_MODEM_OUT_GPIO 0x74 | |
160 | #define ATI_REG_MODEM_OUT_GPIO_EN 1 | |
161 | #define ATI_REG_MODEM_OUT_GPIO_DATA_SHIFT 5 | |
162 | #define ATI_REG_MODEM_IN_GPIO 0x78 | |
163 | ||
164 | #define ATI_REG_MODEM_MIRROR 0x7c | |
165 | #define ATI_REG_AUDIO_MIRROR 0x80 | |
166 | ||
167 | #define ATI_REG_MODEM_FIFO_FLUSH 0x88 | |
168 | #define ATI_REG_MODEM_FIFO_OUT1_FLUSH (1U<<0) | |
169 | #define ATI_REG_MODEM_FIFO_OUT2_FLUSH (1U<<1) | |
170 | #define ATI_REG_MODEM_FIFO_OUT3_FLUSH (1U<<2) | |
171 | #define ATI_REG_MODEM_FIFO_IN_FLUSH (1U<<3) | |
172 | ||
173 | /* LINKPTR */ | |
174 | #define ATI_REG_LINKPTR_EN (1U<<0) | |
175 | ||
176 | #define ATI_MAX_DESCRIPTORS 256 /* max number of descriptor packets */ | |
177 | ||
178 | ||
74ee4ff1 | 179 | struct atiixp_modem; |
1da177e4 LT |
180 | |
181 | /* | |
182 | * DMA packate descriptor | |
183 | */ | |
184 | ||
74ee4ff1 | 185 | struct atiixp_dma_desc { |
1da177e4 LT |
186 | u32 addr; /* DMA buffer address */ |
187 | u16 status; /* status bits */ | |
188 | u16 size; /* size of the packet in dwords */ | |
189 | u32 next; /* address of the next packet descriptor */ | |
74ee4ff1 | 190 | }; |
1da177e4 LT |
191 | |
192 | /* | |
193 | * stream enum | |
194 | */ | |
195 | enum { ATI_DMA_PLAYBACK, ATI_DMA_CAPTURE, NUM_ATI_DMAS }; /* DMAs */ | |
196 | enum { ATI_PCM_OUT, ATI_PCM_IN, NUM_ATI_PCMS }; /* AC97 pcm slots */ | |
197 | enum { ATI_PCMDEV_ANALOG, NUM_ATI_PCMDEVS }; /* pcm devices */ | |
198 | ||
199 | #define NUM_ATI_CODECS 3 | |
200 | ||
201 | ||
202 | /* | |
203 | * constants and callbacks for each DMA type | |
204 | */ | |
74ee4ff1 | 205 | struct atiixp_dma_ops { |
1da177e4 LT |
206 | int type; /* ATI_DMA_XXX */ |
207 | unsigned int llp_offset; /* LINKPTR offset */ | |
208 | unsigned int dt_cur; /* DT_CUR offset */ | |
74ee4ff1 TI |
209 | /* called from open callback */ |
210 | void (*enable_dma)(struct atiixp_modem *chip, int on); | |
211 | /* called from trigger (START/STOP) */ | |
212 | void (*enable_transfer)(struct atiixp_modem *chip, int on); | |
213 | /* called from trigger (STOP only) */ | |
214 | void (*flush_dma)(struct atiixp_modem *chip); | |
1da177e4 LT |
215 | }; |
216 | ||
217 | /* | |
218 | * DMA stream | |
219 | */ | |
74ee4ff1 TI |
220 | struct atiixp_dma { |
221 | const struct atiixp_dma_ops *ops; | |
1da177e4 | 222 | struct snd_dma_buffer desc_buf; |
74ee4ff1 | 223 | struct snd_pcm_substream *substream; /* assigned PCM substream */ |
1da177e4 LT |
224 | unsigned int buf_addr, buf_bytes; /* DMA buffer address, bytes */ |
225 | unsigned int period_bytes, periods; | |
226 | int opened; | |
227 | int running; | |
228 | int pcm_open_flag; | |
229 | int ac97_pcm_type; /* index # of ac97_pcm to access, -1 = not used */ | |
230 | }; | |
231 | ||
232 | /* | |
233 | * ATI IXP chip | |
234 | */ | |
74ee4ff1 TI |
235 | struct atiixp_modem { |
236 | struct snd_card *card; | |
1da177e4 LT |
237 | struct pci_dev *pci; |
238 | ||
239 | struct resource *res; /* memory i/o */ | |
240 | unsigned long addr; | |
241 | void __iomem *remap_addr; | |
242 | int irq; | |
243 | ||
74ee4ff1 TI |
244 | struct snd_ac97_bus *ac97_bus; |
245 | struct snd_ac97 *ac97[NUM_ATI_CODECS]; | |
1da177e4 LT |
246 | |
247 | spinlock_t reg_lock; | |
248 | ||
74ee4ff1 | 249 | struct atiixp_dma dmas[NUM_ATI_DMAS]; |
1da177e4 | 250 | struct ac97_pcm *pcms[NUM_ATI_PCMS]; |
74ee4ff1 | 251 | struct snd_pcm *pcmdevs[NUM_ATI_PCMDEVS]; |
1da177e4 LT |
252 | |
253 | int max_channels; /* max. channels for PCM out */ | |
254 | ||
255 | unsigned int codec_not_ready_bits; /* for codec detection */ | |
256 | ||
257 | int spdif_over_aclink; /* passed from the module option */ | |
62932df8 | 258 | struct mutex open_mutex; /* playback open mutex */ |
1da177e4 LT |
259 | }; |
260 | ||
261 | ||
262 | /* | |
263 | */ | |
cebe41d4 | 264 | static DEFINE_PCI_DEVICE_TABLE(snd_atiixp_ids) = { |
28d27aae JP |
265 | { PCI_VDEVICE(ATI, 0x434d), 0 }, /* SB200 */ |
266 | { PCI_VDEVICE(ATI, 0x4378), 0 }, /* SB400 */ | |
1da177e4 LT |
267 | { 0, } |
268 | }; | |
269 | ||
270 | MODULE_DEVICE_TABLE(pci, snd_atiixp_ids); | |
271 | ||
272 | ||
273 | /* | |
274 | * lowlevel functions | |
275 | */ | |
276 | ||
277 | /* | |
278 | * update the bits of the given register. | |
279 | * return 1 if the bits changed. | |
280 | */ | |
74ee4ff1 TI |
281 | static int snd_atiixp_update_bits(struct atiixp_modem *chip, unsigned int reg, |
282 | unsigned int mask, unsigned int value) | |
1da177e4 LT |
283 | { |
284 | void __iomem *addr = chip->remap_addr + reg; | |
285 | unsigned int data, old_data; | |
286 | old_data = data = readl(addr); | |
287 | data &= ~mask; | |
288 | data |= value; | |
289 | if (old_data == data) | |
290 | return 0; | |
291 | writel(data, addr); | |
292 | return 1; | |
293 | } | |
294 | ||
295 | /* | |
296 | * macros for easy use | |
297 | */ | |
298 | #define atiixp_write(chip,reg,value) \ | |
299 | writel(value, chip->remap_addr + ATI_REG_##reg) | |
300 | #define atiixp_read(chip,reg) \ | |
301 | readl(chip->remap_addr + ATI_REG_##reg) | |
302 | #define atiixp_update(chip,reg,mask,val) \ | |
303 | snd_atiixp_update_bits(chip, ATI_REG_##reg, mask, val) | |
304 | ||
1da177e4 LT |
305 | /* |
306 | * handling DMA packets | |
307 | * | |
308 | * we allocate a linear buffer for the DMA, and split it to each packet. | |
309 | * in a future version, a scatter-gather buffer should be implemented. | |
310 | */ | |
311 | ||
312 | #define ATI_DESC_LIST_SIZE \ | |
74ee4ff1 | 313 | PAGE_ALIGN(ATI_MAX_DESCRIPTORS * sizeof(struct atiixp_dma_desc)) |
1da177e4 LT |
314 | |
315 | /* | |
316 | * build packets ring for the given buffer size. | |
317 | * | |
318 | * IXP handles the buffer descriptors, which are connected as a linked | |
319 | * list. although we can change the list dynamically, in this version, | |
320 | * a static RING of buffer descriptors is used. | |
321 | * | |
322 | * the ring is built in this function, and is set up to the hardware. | |
323 | */ | |
74ee4ff1 TI |
324 | static int atiixp_build_dma_packets(struct atiixp_modem *chip, |
325 | struct atiixp_dma *dma, | |
326 | struct snd_pcm_substream *substream, | |
327 | unsigned int periods, | |
328 | unsigned int period_bytes) | |
1da177e4 LT |
329 | { |
330 | unsigned int i; | |
331 | u32 addr, desc_addr; | |
332 | unsigned long flags; | |
333 | ||
334 | if (periods > ATI_MAX_DESCRIPTORS) | |
335 | return -ENOMEM; | |
336 | ||
337 | if (dma->desc_buf.area == NULL) { | |
338 | if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci), | |
339 | ATI_DESC_LIST_SIZE, &dma->desc_buf) < 0) | |
340 | return -ENOMEM; | |
341 | dma->period_bytes = dma->periods = 0; /* clear */ | |
342 | } | |
343 | ||
344 | if (dma->periods == periods && dma->period_bytes == period_bytes) | |
345 | return 0; | |
346 | ||
347 | /* reset DMA before changing the descriptor table */ | |
348 | spin_lock_irqsave(&chip->reg_lock, flags); | |
349 | writel(0, chip->remap_addr + dma->ops->llp_offset); | |
350 | dma->ops->enable_dma(chip, 0); | |
351 | dma->ops->enable_dma(chip, 1); | |
352 | spin_unlock_irqrestore(&chip->reg_lock, flags); | |
353 | ||
354 | /* fill the entries */ | |
355 | addr = (u32)substream->runtime->dma_addr; | |
356 | desc_addr = (u32)dma->desc_buf.addr; | |
357 | for (i = 0; i < periods; i++) { | |
74ee4ff1 TI |
358 | struct atiixp_dma_desc *desc; |
359 | desc = &((struct atiixp_dma_desc *)dma->desc_buf.area)[i]; | |
1da177e4 LT |
360 | desc->addr = cpu_to_le32(addr); |
361 | desc->status = 0; | |
362 | desc->size = period_bytes >> 2; /* in dwords */ | |
74ee4ff1 | 363 | desc_addr += sizeof(struct atiixp_dma_desc); |
1da177e4 LT |
364 | if (i == periods - 1) |
365 | desc->next = cpu_to_le32((u32)dma->desc_buf.addr); | |
366 | else | |
367 | desc->next = cpu_to_le32(desc_addr); | |
368 | addr += period_bytes; | |
369 | } | |
370 | ||
371 | writel((u32)dma->desc_buf.addr | ATI_REG_LINKPTR_EN, | |
372 | chip->remap_addr + dma->ops->llp_offset); | |
373 | ||
374 | dma->period_bytes = period_bytes; | |
375 | dma->periods = periods; | |
376 | ||
377 | return 0; | |
378 | } | |
379 | ||
380 | /* | |
381 | * remove the ring buffer and release it if assigned | |
382 | */ | |
74ee4ff1 TI |
383 | static void atiixp_clear_dma_packets(struct atiixp_modem *chip, |
384 | struct atiixp_dma *dma, | |
385 | struct snd_pcm_substream *substream) | |
1da177e4 LT |
386 | { |
387 | if (dma->desc_buf.area) { | |
388 | writel(0, chip->remap_addr + dma->ops->llp_offset); | |
389 | snd_dma_free_pages(&dma->desc_buf); | |
390 | dma->desc_buf.area = NULL; | |
391 | } | |
392 | } | |
393 | ||
394 | /* | |
395 | * AC97 interface | |
396 | */ | |
74ee4ff1 | 397 | static int snd_atiixp_acquire_codec(struct atiixp_modem *chip) |
1da177e4 LT |
398 | { |
399 | int timeout = 1000; | |
400 | ||
401 | while (atiixp_read(chip, PHYS_OUT_ADDR) & ATI_REG_PHYS_OUT_ADDR_EN) { | |
402 | if (! timeout--) { | |
ca6aafd8 | 403 | dev_warn(chip->card->dev, "codec acquire timeout\n"); |
1da177e4 LT |
404 | return -EBUSY; |
405 | } | |
406 | udelay(1); | |
407 | } | |
408 | return 0; | |
409 | } | |
410 | ||
74ee4ff1 TI |
411 | static unsigned short snd_atiixp_codec_read(struct atiixp_modem *chip, |
412 | unsigned short codec, | |
413 | unsigned short reg) | |
1da177e4 LT |
414 | { |
415 | unsigned int data; | |
416 | int timeout; | |
417 | ||
418 | if (snd_atiixp_acquire_codec(chip) < 0) | |
419 | return 0xffff; | |
420 | data = (reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) | | |
421 | ATI_REG_PHYS_OUT_ADDR_EN | | |
422 | ATI_REG_PHYS_OUT_RW | | |
423 | codec; | |
424 | atiixp_write(chip, PHYS_OUT_ADDR, data); | |
425 | if (snd_atiixp_acquire_codec(chip) < 0) | |
426 | return 0xffff; | |
427 | timeout = 1000; | |
428 | do { | |
429 | data = atiixp_read(chip, PHYS_IN_ADDR); | |
430 | if (data & ATI_REG_PHYS_IN_READ_FLAG) | |
431 | return data >> ATI_REG_PHYS_IN_DATA_SHIFT; | |
432 | udelay(1); | |
433 | } while (--timeout); | |
434 | /* time out may happen during reset */ | |
435 | if (reg < 0x7c) | |
ca6aafd8 | 436 | dev_warn(chip->card->dev, "codec read timeout (reg %x)\n", reg); |
1da177e4 LT |
437 | return 0xffff; |
438 | } | |
439 | ||
440 | ||
74ee4ff1 TI |
441 | static void snd_atiixp_codec_write(struct atiixp_modem *chip, |
442 | unsigned short codec, | |
443 | unsigned short reg, unsigned short val) | |
1da177e4 LT |
444 | { |
445 | unsigned int data; | |
446 | ||
447 | if (snd_atiixp_acquire_codec(chip) < 0) | |
448 | return; | |
449 | data = ((unsigned int)val << ATI_REG_PHYS_OUT_DATA_SHIFT) | | |
450 | ((unsigned int)reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) | | |
451 | ATI_REG_PHYS_OUT_ADDR_EN | codec; | |
452 | atiixp_write(chip, PHYS_OUT_ADDR, data); | |
453 | } | |
454 | ||
455 | ||
74ee4ff1 TI |
456 | static unsigned short snd_atiixp_ac97_read(struct snd_ac97 *ac97, |
457 | unsigned short reg) | |
1da177e4 | 458 | { |
74ee4ff1 | 459 | struct atiixp_modem *chip = ac97->private_data; |
1da177e4 LT |
460 | return snd_atiixp_codec_read(chip, ac97->num, reg); |
461 | ||
462 | } | |
463 | ||
74ee4ff1 TI |
464 | static void snd_atiixp_ac97_write(struct snd_ac97 *ac97, unsigned short reg, |
465 | unsigned short val) | |
1da177e4 | 466 | { |
74ee4ff1 | 467 | struct atiixp_modem *chip = ac97->private_data; |
83a5b72a SK |
468 | if (reg == AC97_GPIO_STATUS) { |
469 | atiixp_write(chip, MODEM_OUT_GPIO, | |
470 | (val << ATI_REG_MODEM_OUT_GPIO_DATA_SHIFT) | ATI_REG_MODEM_OUT_GPIO_EN); | |
471 | return; | |
472 | } | |
1da177e4 LT |
473 | snd_atiixp_codec_write(chip, ac97->num, reg, val); |
474 | } | |
475 | ||
476 | /* | |
477 | * reset AC link | |
478 | */ | |
74ee4ff1 | 479 | static int snd_atiixp_aclink_reset(struct atiixp_modem *chip) |
1da177e4 LT |
480 | { |
481 | int timeout; | |
482 | ||
483 | /* reset powerdoewn */ | |
484 | if (atiixp_update(chip, CMD, ATI_REG_CMD_POWERDOWN, 0)) | |
485 | udelay(10); | |
486 | ||
487 | /* perform a software reset */ | |
488 | atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, ATI_REG_CMD_AC_SOFT_RESET); | |
489 | atiixp_read(chip, CMD); | |
490 | udelay(10); | |
491 | atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, 0); | |
492 | ||
493 | timeout = 10; | |
494 | while (! (atiixp_read(chip, CMD) & ATI_REG_CMD_ACLINK_ACTIVE)) { | |
495 | /* do a hard reset */ | |
496 | atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET, | |
497 | ATI_REG_CMD_AC_SYNC); | |
498 | atiixp_read(chip, CMD); | |
bfdcbace | 499 | msleep(1); |
1da177e4 | 500 | atiixp_update(chip, CMD, ATI_REG_CMD_AC_RESET, ATI_REG_CMD_AC_RESET); |
7e79443c | 501 | if (!--timeout) { |
ca6aafd8 | 502 | dev_err(chip->card->dev, "codec reset timeout\n"); |
1da177e4 LT |
503 | break; |
504 | } | |
505 | } | |
506 | ||
507 | /* deassert RESET and assert SYNC to make sure */ | |
508 | atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET, | |
509 | ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET); | |
510 | ||
511 | return 0; | |
512 | } | |
513 | ||
c7561cd8 | 514 | #ifdef CONFIG_PM_SLEEP |
74ee4ff1 | 515 | static int snd_atiixp_aclink_down(struct atiixp_modem *chip) |
1da177e4 LT |
516 | { |
517 | // if (atiixp_read(chip, MODEM_MIRROR) & 0x1) /* modem running, too? */ | |
518 | // return -EBUSY; | |
519 | atiixp_update(chip, CMD, | |
520 | ATI_REG_CMD_POWERDOWN | ATI_REG_CMD_AC_RESET, | |
521 | ATI_REG_CMD_POWERDOWN); | |
522 | return 0; | |
523 | } | |
524 | #endif | |
525 | ||
526 | /* | |
527 | * auto-detection of codecs | |
528 | * | |
529 | * the IXP chip can generate interrupts for the non-existing codecs. | |
530 | * NEW_FRAME interrupt is used to make sure that the interrupt is generated | |
531 | * even if all three codecs are connected. | |
532 | */ | |
533 | ||
534 | #define ALL_CODEC_NOT_READY \ | |
535 | (ATI_REG_ISR_CODEC0_NOT_READY |\ | |
536 | ATI_REG_ISR_CODEC1_NOT_READY |\ | |
537 | ATI_REG_ISR_CODEC2_NOT_READY) | |
538 | #define CODEC_CHECK_BITS (ALL_CODEC_NOT_READY|ATI_REG_ISR_NEW_FRAME) | |
539 | ||
74ee4ff1 | 540 | static int snd_atiixp_codec_detect(struct atiixp_modem *chip) |
1da177e4 LT |
541 | { |
542 | int timeout; | |
543 | ||
544 | chip->codec_not_ready_bits = 0; | |
545 | atiixp_write(chip, IER, CODEC_CHECK_BITS); | |
546 | /* wait for the interrupts */ | |
bfdcbace | 547 | timeout = 50; |
1da177e4 | 548 | while (timeout-- > 0) { |
bfdcbace | 549 | msleep(1); |
1da177e4 LT |
550 | if (chip->codec_not_ready_bits) |
551 | break; | |
552 | } | |
553 | atiixp_write(chip, IER, 0); /* disable irqs */ | |
554 | ||
555 | if ((chip->codec_not_ready_bits & ALL_CODEC_NOT_READY) == ALL_CODEC_NOT_READY) { | |
ca6aafd8 | 556 | dev_err(chip->card->dev, "no codec detected!\n"); |
1da177e4 LT |
557 | return -ENXIO; |
558 | } | |
559 | return 0; | |
560 | } | |
561 | ||
562 | ||
563 | /* | |
564 | * enable DMA and irqs | |
565 | */ | |
74ee4ff1 | 566 | static int snd_atiixp_chip_start(struct atiixp_modem *chip) |
1da177e4 LT |
567 | { |
568 | unsigned int reg; | |
569 | ||
570 | /* set up spdif, enable burst mode */ | |
571 | reg = atiixp_read(chip, CMD); | |
572 | reg |= ATI_REG_CMD_BURST_EN; | |
573 | if(!(reg & ATI_REG_CMD_MODEM_PRESENT)) | |
574 | reg |= ATI_REG_CMD_MODEM_PRESENT; | |
575 | atiixp_write(chip, CMD, reg); | |
576 | ||
577 | /* clear all interrupt source */ | |
578 | atiixp_write(chip, ISR, 0xffffffff); | |
579 | /* enable irqs */ | |
580 | atiixp_write(chip, IER, | |
581 | ATI_REG_IER_MODEM_STATUS_EN | | |
582 | ATI_REG_IER_MODEM_IN_XRUN_EN | | |
583 | ATI_REG_IER_MODEM_OUT1_XRUN_EN); | |
584 | return 0; | |
585 | } | |
586 | ||
587 | ||
588 | /* | |
589 | * disable DMA and IRQs | |
590 | */ | |
74ee4ff1 | 591 | static int snd_atiixp_chip_stop(struct atiixp_modem *chip) |
1da177e4 LT |
592 | { |
593 | /* clear interrupt source */ | |
594 | atiixp_write(chip, ISR, atiixp_read(chip, ISR)); | |
595 | /* disable irqs */ | |
596 | atiixp_write(chip, IER, 0); | |
597 | return 0; | |
598 | } | |
599 | ||
600 | ||
601 | /* | |
602 | * PCM section | |
603 | */ | |
604 | ||
605 | /* | |
606 | * pointer callback simplly reads XXX_DMA_DT_CUR register as the current | |
607 | * position. when SG-buffer is implemented, the offset must be calculated | |
608 | * correctly... | |
609 | */ | |
74ee4ff1 | 610 | static snd_pcm_uframes_t snd_atiixp_pcm_pointer(struct snd_pcm_substream *substream) |
1da177e4 | 611 | { |
74ee4ff1 TI |
612 | struct atiixp_modem *chip = snd_pcm_substream_chip(substream); |
613 | struct snd_pcm_runtime *runtime = substream->runtime; | |
614 | struct atiixp_dma *dma = runtime->private_data; | |
1da177e4 LT |
615 | unsigned int curptr; |
616 | int timeout = 1000; | |
617 | ||
618 | while (timeout--) { | |
619 | curptr = readl(chip->remap_addr + dma->ops->dt_cur); | |
620 | if (curptr < dma->buf_addr) | |
621 | continue; | |
622 | curptr -= dma->buf_addr; | |
623 | if (curptr >= dma->buf_bytes) | |
624 | continue; | |
625 | return bytes_to_frames(runtime, curptr); | |
626 | } | |
ca6aafd8 | 627 | dev_dbg(chip->card->dev, "invalid DMA pointer read 0x%x (buf=%x)\n", |
1da177e4 LT |
628 | readl(chip->remap_addr + dma->ops->dt_cur), dma->buf_addr); |
629 | return 0; | |
630 | } | |
631 | ||
632 | /* | |
633 | * XRUN detected, and stop the PCM substream | |
634 | */ | |
74ee4ff1 TI |
635 | static void snd_atiixp_xrun_dma(struct atiixp_modem *chip, |
636 | struct atiixp_dma *dma) | |
1da177e4 LT |
637 | { |
638 | if (! dma->substream || ! dma->running) | |
639 | return; | |
ca6aafd8 | 640 | dev_dbg(chip->card->dev, "XRUN detected (DMA %d)\n", dma->ops->type); |
cc7282b8 | 641 | snd_pcm_stream_lock(dma->substream); |
1da177e4 | 642 | snd_pcm_stop(dma->substream, SNDRV_PCM_STATE_XRUN); |
cc7282b8 | 643 | snd_pcm_stream_unlock(dma->substream); |
1da177e4 LT |
644 | } |
645 | ||
646 | /* | |
647 | * the period ack. update the substream. | |
648 | */ | |
74ee4ff1 TI |
649 | static void snd_atiixp_update_dma(struct atiixp_modem *chip, |
650 | struct atiixp_dma *dma) | |
1da177e4 LT |
651 | { |
652 | if (! dma->substream || ! dma->running) | |
653 | return; | |
654 | snd_pcm_period_elapsed(dma->substream); | |
655 | } | |
656 | ||
657 | /* set BUS_BUSY interrupt bit if any DMA is running */ | |
658 | /* call with spinlock held */ | |
74ee4ff1 | 659 | static void snd_atiixp_check_bus_busy(struct atiixp_modem *chip) |
1da177e4 LT |
660 | { |
661 | unsigned int bus_busy; | |
662 | if (atiixp_read(chip, CMD) & (ATI_REG_CMD_MODEM_SEND1_EN | | |
663 | ATI_REG_CMD_MODEM_RECEIVE_EN)) | |
664 | bus_busy = ATI_REG_IER_MODEM_SET_BUS_BUSY; | |
665 | else | |
666 | bus_busy = 0; | |
667 | atiixp_update(chip, IER, ATI_REG_IER_MODEM_SET_BUS_BUSY, bus_busy); | |
668 | } | |
669 | ||
670 | /* common trigger callback | |
671 | * calling the lowlevel callbacks in it | |
672 | */ | |
74ee4ff1 | 673 | static int snd_atiixp_pcm_trigger(struct snd_pcm_substream *substream, int cmd) |
1da177e4 | 674 | { |
74ee4ff1 TI |
675 | struct atiixp_modem *chip = snd_pcm_substream_chip(substream); |
676 | struct atiixp_dma *dma = substream->runtime->private_data; | |
83a5b72a | 677 | int err = 0; |
1da177e4 | 678 | |
da3cec35 TI |
679 | if (snd_BUG_ON(!dma->ops->enable_transfer || |
680 | !dma->ops->flush_dma)) | |
681 | return -EINVAL; | |
1da177e4 | 682 | |
1da177e4 | 683 | spin_lock(&chip->reg_lock); |
83a5b72a SK |
684 | switch(cmd) { |
685 | case SNDRV_PCM_TRIGGER_START: | |
1da177e4 LT |
686 | dma->ops->enable_transfer(chip, 1); |
687 | dma->running = 1; | |
83a5b72a SK |
688 | break; |
689 | case SNDRV_PCM_TRIGGER_STOP: | |
1da177e4 LT |
690 | dma->ops->enable_transfer(chip, 0); |
691 | dma->running = 0; | |
83a5b72a SK |
692 | break; |
693 | default: | |
694 | err = -EINVAL; | |
695 | break; | |
1da177e4 | 696 | } |
83a5b72a | 697 | if (! err) { |
1da177e4 LT |
698 | snd_atiixp_check_bus_busy(chip); |
699 | if (cmd == SNDRV_PCM_TRIGGER_STOP) { | |
700 | dma->ops->flush_dma(chip); | |
701 | snd_atiixp_check_bus_busy(chip); | |
702 | } | |
83a5b72a | 703 | } |
1da177e4 | 704 | spin_unlock(&chip->reg_lock); |
83a5b72a | 705 | return err; |
1da177e4 LT |
706 | } |
707 | ||
708 | ||
709 | /* | |
710 | * lowlevel callbacks for each DMA type | |
711 | * | |
712 | * every callback is supposed to be called in chip->reg_lock spinlock | |
713 | */ | |
714 | ||
715 | /* flush FIFO of analog OUT DMA */ | |
74ee4ff1 | 716 | static void atiixp_out_flush_dma(struct atiixp_modem *chip) |
1da177e4 LT |
717 | { |
718 | atiixp_write(chip, MODEM_FIFO_FLUSH, ATI_REG_MODEM_FIFO_OUT1_FLUSH); | |
719 | } | |
720 | ||
721 | /* enable/disable analog OUT DMA */ | |
74ee4ff1 | 722 | static void atiixp_out_enable_dma(struct atiixp_modem *chip, int on) |
1da177e4 LT |
723 | { |
724 | unsigned int data; | |
725 | data = atiixp_read(chip, CMD); | |
726 | if (on) { | |
727 | if (data & ATI_REG_CMD_MODEM_OUT_DMA1_EN) | |
728 | return; | |
729 | atiixp_out_flush_dma(chip); | |
730 | data |= ATI_REG_CMD_MODEM_OUT_DMA1_EN; | |
731 | } else | |
732 | data &= ~ATI_REG_CMD_MODEM_OUT_DMA1_EN; | |
733 | atiixp_write(chip, CMD, data); | |
734 | } | |
735 | ||
736 | /* start/stop transfer over OUT DMA */ | |
74ee4ff1 | 737 | static void atiixp_out_enable_transfer(struct atiixp_modem *chip, int on) |
1da177e4 LT |
738 | { |
739 | atiixp_update(chip, CMD, ATI_REG_CMD_MODEM_SEND1_EN, | |
740 | on ? ATI_REG_CMD_MODEM_SEND1_EN : 0); | |
741 | } | |
742 | ||
743 | /* enable/disable analog IN DMA */ | |
74ee4ff1 | 744 | static void atiixp_in_enable_dma(struct atiixp_modem *chip, int on) |
1da177e4 LT |
745 | { |
746 | atiixp_update(chip, CMD, ATI_REG_CMD_MODEM_IN_DMA_EN, | |
747 | on ? ATI_REG_CMD_MODEM_IN_DMA_EN : 0); | |
748 | } | |
749 | ||
750 | /* start/stop analog IN DMA */ | |
74ee4ff1 | 751 | static void atiixp_in_enable_transfer(struct atiixp_modem *chip, int on) |
1da177e4 LT |
752 | { |
753 | if (on) { | |
754 | unsigned int data = atiixp_read(chip, CMD); | |
755 | if (! (data & ATI_REG_CMD_MODEM_RECEIVE_EN)) { | |
756 | data |= ATI_REG_CMD_MODEM_RECEIVE_EN; | |
757 | atiixp_write(chip, CMD, data); | |
758 | } | |
759 | } else | |
760 | atiixp_update(chip, CMD, ATI_REG_CMD_MODEM_RECEIVE_EN, 0); | |
761 | } | |
762 | ||
763 | /* flush FIFO of analog IN DMA */ | |
74ee4ff1 | 764 | static void atiixp_in_flush_dma(struct atiixp_modem *chip) |
1da177e4 LT |
765 | { |
766 | atiixp_write(chip, MODEM_FIFO_FLUSH, ATI_REG_MODEM_FIFO_IN_FLUSH); | |
767 | } | |
768 | ||
769 | /* set up slots and formats for analog OUT */ | |
74ee4ff1 | 770 | static int snd_atiixp_playback_prepare(struct snd_pcm_substream *substream) |
1da177e4 | 771 | { |
74ee4ff1 | 772 | struct atiixp_modem *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
773 | unsigned int data; |
774 | ||
775 | spin_lock_irq(&chip->reg_lock); | |
776 | /* set output threshold */ | |
777 | data = atiixp_read(chip, MODEM_OUT_FIFO); | |
778 | data &= ~ATI_REG_MODEM_OUT1_DMA_THRESHOLD_MASK; | |
779 | data |= 0x04 << ATI_REG_MODEM_OUT1_DMA_THRESHOLD_SHIFT; | |
780 | atiixp_write(chip, MODEM_OUT_FIFO, data); | |
781 | spin_unlock_irq(&chip->reg_lock); | |
782 | return 0; | |
783 | } | |
784 | ||
785 | /* set up slots and formats for analog IN */ | |
74ee4ff1 | 786 | static int snd_atiixp_capture_prepare(struct snd_pcm_substream *substream) |
1da177e4 LT |
787 | { |
788 | return 0; | |
789 | } | |
790 | ||
791 | /* | |
792 | * hw_params - allocate the buffer and set up buffer descriptors | |
793 | */ | |
74ee4ff1 TI |
794 | static int snd_atiixp_pcm_hw_params(struct snd_pcm_substream *substream, |
795 | struct snd_pcm_hw_params *hw_params) | |
1da177e4 | 796 | { |
74ee4ff1 TI |
797 | struct atiixp_modem *chip = snd_pcm_substream_chip(substream); |
798 | struct atiixp_dma *dma = substream->runtime->private_data; | |
1da177e4 LT |
799 | int err; |
800 | int i; | |
801 | ||
802 | err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); | |
803 | if (err < 0) | |
804 | return err; | |
805 | dma->buf_addr = substream->runtime->dma_addr; | |
806 | dma->buf_bytes = params_buffer_bytes(hw_params); | |
807 | ||
808 | err = atiixp_build_dma_packets(chip, dma, substream, | |
809 | params_periods(hw_params), | |
810 | params_period_bytes(hw_params)); | |
811 | if (err < 0) | |
812 | return err; | |
813 | ||
814 | /* set up modem rate */ | |
815 | for (i = 0; i < NUM_ATI_CODECS; i++) { | |
816 | if (! chip->ac97[i]) | |
817 | continue; | |
818 | snd_ac97_write(chip->ac97[i], AC97_LINE1_RATE, params_rate(hw_params)); | |
819 | snd_ac97_write(chip->ac97[i], AC97_LINE1_LEVEL, 0); | |
820 | } | |
821 | ||
822 | return err; | |
823 | } | |
824 | ||
74ee4ff1 | 825 | static int snd_atiixp_pcm_hw_free(struct snd_pcm_substream *substream) |
1da177e4 | 826 | { |
74ee4ff1 TI |
827 | struct atiixp_modem *chip = snd_pcm_substream_chip(substream); |
828 | struct atiixp_dma *dma = substream->runtime->private_data; | |
1da177e4 LT |
829 | |
830 | atiixp_clear_dma_packets(chip, dma, substream); | |
831 | snd_pcm_lib_free_pages(substream); | |
832 | return 0; | |
833 | } | |
834 | ||
835 | ||
836 | /* | |
837 | * pcm hardware definition, identical for all DMA types | |
838 | */ | |
74ee4ff1 | 839 | static struct snd_pcm_hardware snd_atiixp_pcm_hw = |
1da177e4 LT |
840 | { |
841 | .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | | |
842 | SNDRV_PCM_INFO_BLOCK_TRANSFER | | |
843 | SNDRV_PCM_INFO_MMAP_VALID), | |
844 | .formats = SNDRV_PCM_FMTBIT_S16_LE, | |
74ee4ff1 TI |
845 | .rates = (SNDRV_PCM_RATE_8000 | |
846 | SNDRV_PCM_RATE_16000 | | |
847 | SNDRV_PCM_RATE_KNOT), | |
1da177e4 LT |
848 | .rate_min = 8000, |
849 | .rate_max = 16000, | |
850 | .channels_min = 2, | |
851 | .channels_max = 2, | |
852 | .buffer_bytes_max = 256 * 1024, | |
853 | .period_bytes_min = 32, | |
854 | .period_bytes_max = 128 * 1024, | |
855 | .periods_min = 2, | |
856 | .periods_max = ATI_MAX_DESCRIPTORS, | |
857 | }; | |
858 | ||
74ee4ff1 TI |
859 | static int snd_atiixp_pcm_open(struct snd_pcm_substream *substream, |
860 | struct atiixp_dma *dma, int pcm_type) | |
1da177e4 | 861 | { |
74ee4ff1 TI |
862 | struct atiixp_modem *chip = snd_pcm_substream_chip(substream); |
863 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
864 | int err; |
865 | static unsigned int rates[] = { 8000, 9600, 12000, 16000 }; | |
74ee4ff1 | 866 | static struct snd_pcm_hw_constraint_list hw_constraints_rates = { |
1da177e4 LT |
867 | .count = ARRAY_SIZE(rates), |
868 | .list = rates, | |
869 | .mask = 0, | |
870 | }; | |
871 | ||
da3cec35 TI |
872 | if (snd_BUG_ON(!dma->ops || !dma->ops->enable_dma)) |
873 | return -EINVAL; | |
1da177e4 LT |
874 | |
875 | if (dma->opened) | |
876 | return -EBUSY; | |
877 | dma->substream = substream; | |
878 | runtime->hw = snd_atiixp_pcm_hw; | |
879 | dma->ac97_pcm_type = pcm_type; | |
74ee4ff1 TI |
880 | if ((err = snd_pcm_hw_constraint_list(runtime, 0, |
881 | SNDRV_PCM_HW_PARAM_RATE, | |
882 | &hw_constraints_rates)) < 0) | |
1da177e4 | 883 | return err; |
74ee4ff1 TI |
884 | if ((err = snd_pcm_hw_constraint_integer(runtime, |
885 | SNDRV_PCM_HW_PARAM_PERIODS)) < 0) | |
1da177e4 LT |
886 | return err; |
887 | runtime->private_data = dma; | |
888 | ||
889 | /* enable DMA bits */ | |
890 | spin_lock_irq(&chip->reg_lock); | |
891 | dma->ops->enable_dma(chip, 1); | |
892 | spin_unlock_irq(&chip->reg_lock); | |
893 | dma->opened = 1; | |
894 | ||
895 | return 0; | |
896 | } | |
897 | ||
74ee4ff1 TI |
898 | static int snd_atiixp_pcm_close(struct snd_pcm_substream *substream, |
899 | struct atiixp_dma *dma) | |
1da177e4 | 900 | { |
74ee4ff1 | 901 | struct atiixp_modem *chip = snd_pcm_substream_chip(substream); |
1da177e4 | 902 | /* disable DMA bits */ |
da3cec35 TI |
903 | if (snd_BUG_ON(!dma->ops || !dma->ops->enable_dma)) |
904 | return -EINVAL; | |
1da177e4 LT |
905 | spin_lock_irq(&chip->reg_lock); |
906 | dma->ops->enable_dma(chip, 0); | |
907 | spin_unlock_irq(&chip->reg_lock); | |
908 | dma->substream = NULL; | |
909 | dma->opened = 0; | |
910 | return 0; | |
911 | } | |
912 | ||
913 | /* | |
914 | */ | |
74ee4ff1 | 915 | static int snd_atiixp_playback_open(struct snd_pcm_substream *substream) |
1da177e4 | 916 | { |
74ee4ff1 | 917 | struct atiixp_modem *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
918 | int err; |
919 | ||
62932df8 | 920 | mutex_lock(&chip->open_mutex); |
1da177e4 | 921 | err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_PLAYBACK], 0); |
62932df8 | 922 | mutex_unlock(&chip->open_mutex); |
1da177e4 LT |
923 | if (err < 0) |
924 | return err; | |
925 | return 0; | |
926 | } | |
927 | ||
74ee4ff1 | 928 | static int snd_atiixp_playback_close(struct snd_pcm_substream *substream) |
1da177e4 | 929 | { |
74ee4ff1 | 930 | struct atiixp_modem *chip = snd_pcm_substream_chip(substream); |
1da177e4 | 931 | int err; |
62932df8 | 932 | mutex_lock(&chip->open_mutex); |
1da177e4 | 933 | err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_PLAYBACK]); |
62932df8 | 934 | mutex_unlock(&chip->open_mutex); |
1da177e4 LT |
935 | return err; |
936 | } | |
937 | ||
74ee4ff1 | 938 | static int snd_atiixp_capture_open(struct snd_pcm_substream *substream) |
1da177e4 | 939 | { |
74ee4ff1 | 940 | struct atiixp_modem *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
941 | return snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_CAPTURE], 1); |
942 | } | |
943 | ||
74ee4ff1 | 944 | static int snd_atiixp_capture_close(struct snd_pcm_substream *substream) |
1da177e4 | 945 | { |
74ee4ff1 | 946 | struct atiixp_modem *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
947 | return snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_CAPTURE]); |
948 | } | |
949 | ||
950 | ||
951 | /* AC97 playback */ | |
74ee4ff1 | 952 | static struct snd_pcm_ops snd_atiixp_playback_ops = { |
1da177e4 LT |
953 | .open = snd_atiixp_playback_open, |
954 | .close = snd_atiixp_playback_close, | |
955 | .ioctl = snd_pcm_lib_ioctl, | |
956 | .hw_params = snd_atiixp_pcm_hw_params, | |
957 | .hw_free = snd_atiixp_pcm_hw_free, | |
958 | .prepare = snd_atiixp_playback_prepare, | |
959 | .trigger = snd_atiixp_pcm_trigger, | |
960 | .pointer = snd_atiixp_pcm_pointer, | |
961 | }; | |
962 | ||
963 | /* AC97 capture */ | |
74ee4ff1 | 964 | static struct snd_pcm_ops snd_atiixp_capture_ops = { |
1da177e4 LT |
965 | .open = snd_atiixp_capture_open, |
966 | .close = snd_atiixp_capture_close, | |
967 | .ioctl = snd_pcm_lib_ioctl, | |
968 | .hw_params = snd_atiixp_pcm_hw_params, | |
969 | .hw_free = snd_atiixp_pcm_hw_free, | |
970 | .prepare = snd_atiixp_capture_prepare, | |
971 | .trigger = snd_atiixp_pcm_trigger, | |
972 | .pointer = snd_atiixp_pcm_pointer, | |
973 | }; | |
974 | ||
74ee4ff1 | 975 | static struct atiixp_dma_ops snd_atiixp_playback_dma_ops = { |
1da177e4 LT |
976 | .type = ATI_DMA_PLAYBACK, |
977 | .llp_offset = ATI_REG_MODEM_OUT_DMA1_LINKPTR, | |
978 | .dt_cur = ATI_REG_MODEM_OUT_DMA1_DT_CUR, | |
979 | .enable_dma = atiixp_out_enable_dma, | |
980 | .enable_transfer = atiixp_out_enable_transfer, | |
981 | .flush_dma = atiixp_out_flush_dma, | |
982 | }; | |
983 | ||
74ee4ff1 | 984 | static struct atiixp_dma_ops snd_atiixp_capture_dma_ops = { |
1da177e4 LT |
985 | .type = ATI_DMA_CAPTURE, |
986 | .llp_offset = ATI_REG_MODEM_IN_DMA_LINKPTR, | |
987 | .dt_cur = ATI_REG_MODEM_IN_DMA_DT_CUR, | |
988 | .enable_dma = atiixp_in_enable_dma, | |
989 | .enable_transfer = atiixp_in_enable_transfer, | |
990 | .flush_dma = atiixp_in_flush_dma, | |
991 | }; | |
992 | ||
e23e7a14 | 993 | static int snd_atiixp_pcm_new(struct atiixp_modem *chip) |
1da177e4 | 994 | { |
74ee4ff1 | 995 | struct snd_pcm *pcm; |
1da177e4 LT |
996 | int err; |
997 | ||
998 | /* initialize constants */ | |
999 | chip->dmas[ATI_DMA_PLAYBACK].ops = &snd_atiixp_playback_dma_ops; | |
1000 | chip->dmas[ATI_DMA_CAPTURE].ops = &snd_atiixp_capture_dma_ops; | |
1001 | ||
1002 | /* PCM #0: analog I/O */ | |
1003 | err = snd_pcm_new(chip->card, "ATI IXP MC97", ATI_PCMDEV_ANALOG, 1, 1, &pcm); | |
1004 | if (err < 0) | |
1005 | return err; | |
1006 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_atiixp_playback_ops); | |
1007 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_atiixp_capture_ops); | |
6632d198 | 1008 | pcm->dev_class = SNDRV_PCM_CLASS_MODEM; |
1da177e4 LT |
1009 | pcm->private_data = chip; |
1010 | strcpy(pcm->name, "ATI IXP MC97"); | |
1011 | chip->pcmdevs[ATI_PCMDEV_ANALOG] = pcm; | |
1012 | ||
1013 | snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, | |
74ee4ff1 TI |
1014 | snd_dma_pci_data(chip->pci), |
1015 | 64*1024, 128*1024); | |
1da177e4 LT |
1016 | |
1017 | return 0; | |
1018 | } | |
1019 | ||
1020 | ||
1021 | ||
1022 | /* | |
1023 | * interrupt handler | |
1024 | */ | |
7d12e780 | 1025 | static irqreturn_t snd_atiixp_interrupt(int irq, void *dev_id) |
1da177e4 | 1026 | { |
74ee4ff1 | 1027 | struct atiixp_modem *chip = dev_id; |
1da177e4 LT |
1028 | unsigned int status; |
1029 | ||
1030 | status = atiixp_read(chip, ISR); | |
1031 | ||
1032 | if (! status) | |
1033 | return IRQ_NONE; | |
1034 | ||
1035 | /* process audio DMA */ | |
1036 | if (status & ATI_REG_ISR_MODEM_OUT1_XRUN) | |
1037 | snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]); | |
1038 | else if (status & ATI_REG_ISR_MODEM_OUT1_STATUS) | |
1039 | snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]); | |
1040 | if (status & ATI_REG_ISR_MODEM_IN_XRUN) | |
1041 | snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]); | |
1042 | else if (status & ATI_REG_ISR_MODEM_IN_STATUS) | |
1043 | snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]); | |
1044 | ||
1045 | /* for codec detection */ | |
1046 | if (status & CODEC_CHECK_BITS) { | |
1047 | unsigned int detected; | |
1048 | detected = status & CODEC_CHECK_BITS; | |
1049 | spin_lock(&chip->reg_lock); | |
1050 | chip->codec_not_ready_bits |= detected; | |
1051 | atiixp_update(chip, IER, detected, 0); /* disable the detected irqs */ | |
1052 | spin_unlock(&chip->reg_lock); | |
1053 | } | |
1054 | ||
1055 | /* ack */ | |
1056 | atiixp_write(chip, ISR, status); | |
1057 | ||
1058 | return IRQ_HANDLED; | |
1059 | } | |
1060 | ||
1061 | ||
1062 | /* | |
1063 | * ac97 mixer section | |
1064 | */ | |
1065 | ||
e23e7a14 | 1066 | static int snd_atiixp_mixer_new(struct atiixp_modem *chip, int clock) |
1da177e4 | 1067 | { |
74ee4ff1 TI |
1068 | struct snd_ac97_bus *pbus; |
1069 | struct snd_ac97_template ac97; | |
1da177e4 LT |
1070 | int i, err; |
1071 | int codec_count; | |
74ee4ff1 | 1072 | static struct snd_ac97_bus_ops ops = { |
1da177e4 LT |
1073 | .write = snd_atiixp_ac97_write, |
1074 | .read = snd_atiixp_ac97_read, | |
1075 | }; | |
1076 | static unsigned int codec_skip[NUM_ATI_CODECS] = { | |
1077 | ATI_REG_ISR_CODEC0_NOT_READY, | |
1078 | ATI_REG_ISR_CODEC1_NOT_READY, | |
1079 | ATI_REG_ISR_CODEC2_NOT_READY, | |
1080 | }; | |
1081 | ||
1082 | if (snd_atiixp_codec_detect(chip) < 0) | |
1083 | return -ENXIO; | |
1084 | ||
1085 | if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &pbus)) < 0) | |
1086 | return err; | |
1087 | pbus->clock = clock; | |
1da177e4 LT |
1088 | chip->ac97_bus = pbus; |
1089 | ||
1090 | codec_count = 0; | |
1091 | for (i = 0; i < NUM_ATI_CODECS; i++) { | |
1092 | if (chip->codec_not_ready_bits & codec_skip[i]) | |
1093 | continue; | |
1094 | memset(&ac97, 0, sizeof(ac97)); | |
1095 | ac97.private_data = chip; | |
1096 | ac97.pci = chip->pci; | |
1097 | ac97.num = i; | |
f1a63a38 | 1098 | ac97.scaps = AC97_SCAP_SKIP_AUDIO | AC97_SCAP_POWER_SAVE; |
1da177e4 LT |
1099 | if ((err = snd_ac97_mixer(pbus, &ac97, &chip->ac97[i])) < 0) { |
1100 | chip->ac97[i] = NULL; /* to be sure */ | |
ca6aafd8 TI |
1101 | dev_dbg(chip->card->dev, |
1102 | "codec %d not available for modem\n", i); | |
1da177e4 LT |
1103 | continue; |
1104 | } | |
1105 | codec_count++; | |
1106 | } | |
1107 | ||
1108 | if (! codec_count) { | |
ca6aafd8 | 1109 | dev_err(chip->card->dev, "no codec available\n"); |
1da177e4 LT |
1110 | return -ENODEV; |
1111 | } | |
1112 | ||
1113 | /* snd_ac97_tune_hardware(chip->ac97, ac97_quirks); */ | |
1114 | ||
1115 | return 0; | |
1116 | } | |
1117 | ||
1118 | ||
c7561cd8 | 1119 | #ifdef CONFIG_PM_SLEEP |
1da177e4 LT |
1120 | /* |
1121 | * power management | |
1122 | */ | |
68cb2b55 | 1123 | static int snd_atiixp_suspend(struct device *dev) |
1da177e4 | 1124 | { |
68cb2b55 TI |
1125 | struct pci_dev *pci = to_pci_dev(dev); |
1126 | struct snd_card *card = dev_get_drvdata(dev); | |
92304cc7 | 1127 | struct atiixp_modem *chip = card->private_data; |
1da177e4 LT |
1128 | int i; |
1129 | ||
92304cc7 | 1130 | snd_power_change_state(card, SNDRV_CTL_POWER_D3hot); |
1da177e4 | 1131 | for (i = 0; i < NUM_ATI_PCMDEVS; i++) |
92304cc7 | 1132 | snd_pcm_suspend_all(chip->pcmdevs[i]); |
1da177e4 | 1133 | for (i = 0; i < NUM_ATI_CODECS; i++) |
92304cc7 | 1134 | snd_ac97_suspend(chip->ac97[i]); |
1da177e4 LT |
1135 | snd_atiixp_aclink_down(chip); |
1136 | snd_atiixp_chip_stop(chip); | |
1137 | ||
92304cc7 TI |
1138 | pci_disable_device(pci); |
1139 | pci_save_state(pci); | |
68cb2b55 | 1140 | pci_set_power_state(pci, PCI_D3hot); |
1da177e4 LT |
1141 | return 0; |
1142 | } | |
1143 | ||
68cb2b55 | 1144 | static int snd_atiixp_resume(struct device *dev) |
1da177e4 | 1145 | { |
68cb2b55 TI |
1146 | struct pci_dev *pci = to_pci_dev(dev); |
1147 | struct snd_card *card = dev_get_drvdata(dev); | |
92304cc7 | 1148 | struct atiixp_modem *chip = card->private_data; |
1da177e4 LT |
1149 | int i; |
1150 | ||
92304cc7 | 1151 | pci_set_power_state(pci, PCI_D0); |
30b35399 TI |
1152 | pci_restore_state(pci); |
1153 | if (pci_enable_device(pci) < 0) { | |
ca6aafd8 | 1154 | dev_err(dev, "pci_enable_device failed, disabling device\n"); |
30b35399 TI |
1155 | snd_card_disconnect(card); |
1156 | return -EIO; | |
1157 | } | |
92304cc7 | 1158 | pci_set_master(pci); |
1da177e4 LT |
1159 | |
1160 | snd_atiixp_aclink_reset(chip); | |
1161 | snd_atiixp_chip_start(chip); | |
1162 | ||
1163 | for (i = 0; i < NUM_ATI_CODECS; i++) | |
92304cc7 | 1164 | snd_ac97_resume(chip->ac97[i]); |
1da177e4 | 1165 | |
92304cc7 | 1166 | snd_power_change_state(card, SNDRV_CTL_POWER_D0); |
1da177e4 LT |
1167 | return 0; |
1168 | } | |
1da177e4 | 1169 | |
68cb2b55 TI |
1170 | static SIMPLE_DEV_PM_OPS(snd_atiixp_pm, snd_atiixp_suspend, snd_atiixp_resume); |
1171 | #define SND_ATIIXP_PM_OPS &snd_atiixp_pm | |
1172 | #else | |
1173 | #define SND_ATIIXP_PM_OPS NULL | |
c7561cd8 | 1174 | #endif /* CONFIG_PM_SLEEP */ |
1da177e4 | 1175 | |
adf1b3d2 | 1176 | #ifdef CONFIG_PROC_FS |
1da177e4 LT |
1177 | /* |
1178 | * proc interface for register dump | |
1179 | */ | |
1180 | ||
74ee4ff1 TI |
1181 | static void snd_atiixp_proc_read(struct snd_info_entry *entry, |
1182 | struct snd_info_buffer *buffer) | |
1da177e4 | 1183 | { |
74ee4ff1 | 1184 | struct atiixp_modem *chip = entry->private_data; |
1da177e4 LT |
1185 | int i; |
1186 | ||
1187 | for (i = 0; i < 256; i += 4) | |
1188 | snd_iprintf(buffer, "%02x: %08x\n", i, readl(chip->remap_addr + i)); | |
1189 | } | |
1190 | ||
e23e7a14 | 1191 | static void snd_atiixp_proc_init(struct atiixp_modem *chip) |
1da177e4 | 1192 | { |
74ee4ff1 | 1193 | struct snd_info_entry *entry; |
1da177e4 | 1194 | |
98b4f592 | 1195 | if (! snd_card_proc_new(chip->card, "atiixp-modem", &entry)) |
bf850204 | 1196 | snd_info_set_text_ops(entry, chip, snd_atiixp_proc_read); |
1da177e4 | 1197 | } |
adf1b3d2 TI |
1198 | #else |
1199 | #define snd_atiixp_proc_init(chip) | |
1200 | #endif | |
1da177e4 LT |
1201 | |
1202 | ||
1203 | /* | |
1204 | * destructor | |
1205 | */ | |
1206 | ||
74ee4ff1 | 1207 | static int snd_atiixp_free(struct atiixp_modem *chip) |
1da177e4 LT |
1208 | { |
1209 | if (chip->irq < 0) | |
1210 | goto __hw_end; | |
1211 | snd_atiixp_chip_stop(chip); | |
f000fd80 | 1212 | |
1da177e4 LT |
1213 | __hw_end: |
1214 | if (chip->irq >= 0) | |
74ee4ff1 | 1215 | free_irq(chip->irq, chip); |
1da177e4 LT |
1216 | if (chip->remap_addr) |
1217 | iounmap(chip->remap_addr); | |
1218 | pci_release_regions(chip->pci); | |
1219 | pci_disable_device(chip->pci); | |
1220 | kfree(chip); | |
1221 | return 0; | |
1222 | } | |
1223 | ||
74ee4ff1 | 1224 | static int snd_atiixp_dev_free(struct snd_device *device) |
1da177e4 | 1225 | { |
74ee4ff1 | 1226 | struct atiixp_modem *chip = device->device_data; |
1da177e4 LT |
1227 | return snd_atiixp_free(chip); |
1228 | } | |
1229 | ||
1230 | /* | |
1231 | * constructor for chip instance | |
1232 | */ | |
e23e7a14 BP |
1233 | static int snd_atiixp_create(struct snd_card *card, |
1234 | struct pci_dev *pci, | |
1235 | struct atiixp_modem **r_chip) | |
1da177e4 | 1236 | { |
74ee4ff1 | 1237 | static struct snd_device_ops ops = { |
1da177e4 LT |
1238 | .dev_free = snd_atiixp_dev_free, |
1239 | }; | |
74ee4ff1 | 1240 | struct atiixp_modem *chip; |
1da177e4 LT |
1241 | int err; |
1242 | ||
1243 | if ((err = pci_enable_device(pci)) < 0) | |
1244 | return err; | |
1245 | ||
e560d8d8 | 1246 | chip = kzalloc(sizeof(*chip), GFP_KERNEL); |
1da177e4 LT |
1247 | if (chip == NULL) { |
1248 | pci_disable_device(pci); | |
1249 | return -ENOMEM; | |
1250 | } | |
1251 | ||
1252 | spin_lock_init(&chip->reg_lock); | |
62932df8 | 1253 | mutex_init(&chip->open_mutex); |
1da177e4 LT |
1254 | chip->card = card; |
1255 | chip->pci = pci; | |
1256 | chip->irq = -1; | |
1257 | if ((err = pci_request_regions(pci, "ATI IXP MC97")) < 0) { | |
1258 | kfree(chip); | |
1259 | pci_disable_device(pci); | |
1260 | return err; | |
1261 | } | |
1262 | chip->addr = pci_resource_start(pci, 0); | |
2f5ad54e | 1263 | chip->remap_addr = pci_ioremap_bar(pci, 0); |
1da177e4 | 1264 | if (chip->remap_addr == NULL) { |
ca6aafd8 | 1265 | dev_err(card->dev, "AC'97 space ioremap problem\n"); |
1da177e4 LT |
1266 | snd_atiixp_free(chip); |
1267 | return -EIO; | |
1268 | } | |
1269 | ||
437a5a46 | 1270 | if (request_irq(pci->irq, snd_atiixp_interrupt, IRQF_SHARED, |
934c2b6d | 1271 | KBUILD_MODNAME, chip)) { |
ca6aafd8 | 1272 | dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq); |
1da177e4 LT |
1273 | snd_atiixp_free(chip); |
1274 | return -EBUSY; | |
1275 | } | |
1276 | chip->irq = pci->irq; | |
1277 | pci_set_master(pci); | |
1278 | synchronize_irq(chip->irq); | |
1279 | ||
1280 | if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) { | |
1281 | snd_atiixp_free(chip); | |
1282 | return err; | |
1283 | } | |
1284 | ||
1da177e4 LT |
1285 | *r_chip = chip; |
1286 | return 0; | |
1287 | } | |
1288 | ||
1289 | ||
e23e7a14 BP |
1290 | static int snd_atiixp_probe(struct pci_dev *pci, |
1291 | const struct pci_device_id *pci_id) | |
1da177e4 | 1292 | { |
74ee4ff1 TI |
1293 | struct snd_card *card; |
1294 | struct atiixp_modem *chip; | |
1da177e4 LT |
1295 | int err; |
1296 | ||
60c5772b | 1297 | err = snd_card_new(&pci->dev, index, id, THIS_MODULE, 0, &card); |
e58de7ba TI |
1298 | if (err < 0) |
1299 | return err; | |
1da177e4 | 1300 | |
1da177e4 LT |
1301 | strcpy(card->driver, "ATIIXP-MODEM"); |
1302 | strcpy(card->shortname, "ATI IXP Modem"); | |
1303 | if ((err = snd_atiixp_create(card, pci, &chip)) < 0) | |
1304 | goto __error; | |
92304cc7 | 1305 | card->private_data = chip; |
1da177e4 LT |
1306 | |
1307 | if ((err = snd_atiixp_aclink_reset(chip)) < 0) | |
1308 | goto __error; | |
1309 | ||
b7fe4622 | 1310 | if ((err = snd_atiixp_mixer_new(chip, ac97_clock)) < 0) |
1da177e4 LT |
1311 | goto __error; |
1312 | ||
1313 | if ((err = snd_atiixp_pcm_new(chip)) < 0) | |
1314 | goto __error; | |
1315 | ||
1316 | snd_atiixp_proc_init(chip); | |
1317 | ||
1318 | snd_atiixp_chip_start(chip); | |
1319 | ||
1320 | sprintf(card->longname, "%s rev %x at 0x%lx, irq %i", | |
44c10138 | 1321 | card->shortname, pci->revision, chip->addr, chip->irq); |
1da177e4 | 1322 | |
1da177e4 LT |
1323 | if ((err = snd_card_register(card)) < 0) |
1324 | goto __error; | |
1325 | ||
1326 | pci_set_drvdata(pci, card); | |
1da177e4 LT |
1327 | return 0; |
1328 | ||
1329 | __error: | |
1330 | snd_card_free(card); | |
1331 | return err; | |
1332 | } | |
1333 | ||
e23e7a14 | 1334 | static void snd_atiixp_remove(struct pci_dev *pci) |
1da177e4 LT |
1335 | { |
1336 | snd_card_free(pci_get_drvdata(pci)); | |
1da177e4 LT |
1337 | } |
1338 | ||
e9f66d9b | 1339 | static struct pci_driver atiixp_modem_driver = { |
3733e424 | 1340 | .name = KBUILD_MODNAME, |
1da177e4 LT |
1341 | .id_table = snd_atiixp_ids, |
1342 | .probe = snd_atiixp_probe, | |
e23e7a14 | 1343 | .remove = snd_atiixp_remove, |
68cb2b55 TI |
1344 | .driver = { |
1345 | .pm = SND_ATIIXP_PM_OPS, | |
1346 | }, | |
1da177e4 LT |
1347 | }; |
1348 | ||
e9f66d9b | 1349 | module_pci_driver(atiixp_modem_driver); |