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Commit | Line | Data |
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2e62c498 | 1 | // SPDX-License-Identifier: GPL-2.0+ |
c283cf2c MC |
2 | /* |
3 | * drivers/watchdog/ar7_wdt.c | |
4 | * | |
5 | * Copyright (C) 2007 Nicolas Thill <[email protected]> | |
6 | * Copyright (c) 2005 Enrik Berkhan <[email protected]> | |
7 | * | |
8 | * Some code taken from: | |
9 | * National Semiconductor SCx200 Watchdog support | |
10 | * Copyright (c) 2001,2002 Christer Weinigel <[email protected]> | |
11 | * | |
c283cf2c MC |
12 | */ |
13 | ||
27c766aa JP |
14 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
15 | ||
c283cf2c MC |
16 | #include <linux/module.h> |
17 | #include <linux/moduleparam.h> | |
18 | #include <linux/errno.h> | |
c283cf2c | 19 | #include <linux/miscdevice.h> |
64d4062a | 20 | #include <linux/platform_device.h> |
c283cf2c | 21 | #include <linux/watchdog.h> |
c283cf2c MC |
22 | #include <linux/fs.h> |
23 | #include <linux/ioport.h> | |
24 | #include <linux/io.h> | |
25 | #include <linux/uaccess.h> | |
780019dd | 26 | #include <linux/clk.h> |
c283cf2c MC |
27 | |
28 | #include <asm/addrspace.h> | |
c5e7f5a3 | 29 | #include <asm/mach-ar7/ar7.h> |
c283cf2c | 30 | |
c283cf2c MC |
31 | #define LONGNAME "TI AR7 Watchdog Timer" |
32 | ||
33 | MODULE_AUTHOR("Nicolas Thill <[email protected]>"); | |
34 | MODULE_DESCRIPTION(LONGNAME); | |
35 | MODULE_LICENSE("GPL"); | |
c283cf2c MC |
36 | |
37 | static int margin = 60; | |
38 | module_param(margin, int, 0); | |
39 | MODULE_PARM_DESC(margin, "Watchdog margin in seconds"); | |
40 | ||
86a1e189 WVS |
41 | static bool nowayout = WATCHDOG_NOWAYOUT; |
42 | module_param(nowayout, bool, 0); | |
c283cf2c MC |
43 | MODULE_PARM_DESC(nowayout, "Disable watchdog shutdown on close"); |
44 | ||
45 | #define READ_REG(x) readl((void __iomem *)&(x)) | |
46 | #define WRITE_REG(x, v) writel((v), (void __iomem *)&(x)) | |
47 | ||
48 | struct ar7_wdt { | |
49 | u32 kick_lock; | |
50 | u32 kick; | |
51 | u32 change_lock; | |
52 | u32 change; | |
53 | u32 disable_lock; | |
54 | u32 disable; | |
55 | u32 prescale_lock; | |
56 | u32 prescale; | |
57 | }; | |
58 | ||
670d59c0 | 59 | static unsigned long wdt_is_open; |
c283cf2c | 60 | static unsigned expect_close; |
1334f329 | 61 | static DEFINE_SPINLOCK(wdt_lock); |
c283cf2c MC |
62 | |
63 | /* XXX currently fixed, allows max margin ~68.72 secs */ | |
64 | #define prescale_value 0xffff | |
65 | ||
c283cf2c MC |
66 | /* Pointer to the remapped WDT IO space */ |
67 | static struct ar7_wdt *ar7_wdt; | |
c283cf2c | 68 | |
780019dd FF |
69 | static struct clk *vbus_clk; |
70 | ||
c283cf2c MC |
71 | static void ar7_wdt_kick(u32 value) |
72 | { | |
73 | WRITE_REG(ar7_wdt->kick_lock, 0x5555); | |
74 | if ((READ_REG(ar7_wdt->kick_lock) & 3) == 1) { | |
75 | WRITE_REG(ar7_wdt->kick_lock, 0xaaaa); | |
76 | if ((READ_REG(ar7_wdt->kick_lock) & 3) == 3) { | |
77 | WRITE_REG(ar7_wdt->kick, value); | |
78 | return; | |
79 | } | |
80 | } | |
27c766aa | 81 | pr_err("failed to unlock WDT kick reg\n"); |
c283cf2c MC |
82 | } |
83 | ||
84 | static void ar7_wdt_prescale(u32 value) | |
85 | { | |
86 | WRITE_REG(ar7_wdt->prescale_lock, 0x5a5a); | |
87 | if ((READ_REG(ar7_wdt->prescale_lock) & 3) == 1) { | |
88 | WRITE_REG(ar7_wdt->prescale_lock, 0xa5a5); | |
89 | if ((READ_REG(ar7_wdt->prescale_lock) & 3) == 3) { | |
90 | WRITE_REG(ar7_wdt->prescale, value); | |
91 | return; | |
92 | } | |
93 | } | |
27c766aa | 94 | pr_err("failed to unlock WDT prescale reg\n"); |
c283cf2c MC |
95 | } |
96 | ||
97 | static void ar7_wdt_change(u32 value) | |
98 | { | |
99 | WRITE_REG(ar7_wdt->change_lock, 0x6666); | |
100 | if ((READ_REG(ar7_wdt->change_lock) & 3) == 1) { | |
101 | WRITE_REG(ar7_wdt->change_lock, 0xbbbb); | |
102 | if ((READ_REG(ar7_wdt->change_lock) & 3) == 3) { | |
103 | WRITE_REG(ar7_wdt->change, value); | |
104 | return; | |
105 | } | |
106 | } | |
27c766aa | 107 | pr_err("failed to unlock WDT change reg\n"); |
c283cf2c MC |
108 | } |
109 | ||
110 | static void ar7_wdt_disable(u32 value) | |
111 | { | |
112 | WRITE_REG(ar7_wdt->disable_lock, 0x7777); | |
113 | if ((READ_REG(ar7_wdt->disable_lock) & 3) == 1) { | |
114 | WRITE_REG(ar7_wdt->disable_lock, 0xcccc); | |
115 | if ((READ_REG(ar7_wdt->disable_lock) & 3) == 2) { | |
116 | WRITE_REG(ar7_wdt->disable_lock, 0xdddd); | |
117 | if ((READ_REG(ar7_wdt->disable_lock) & 3) == 3) { | |
118 | WRITE_REG(ar7_wdt->disable, value); | |
119 | return; | |
120 | } | |
121 | } | |
122 | } | |
27c766aa | 123 | pr_err("failed to unlock WDT disable reg\n"); |
c283cf2c MC |
124 | } |
125 | ||
126 | static void ar7_wdt_update_margin(int new_margin) | |
127 | { | |
128 | u32 change; | |
780019dd | 129 | u32 vbus_rate; |
c283cf2c | 130 | |
780019dd FF |
131 | vbus_rate = clk_get_rate(vbus_clk); |
132 | change = new_margin * (vbus_rate / prescale_value); | |
670d59c0 AC |
133 | if (change < 1) |
134 | change = 1; | |
135 | if (change > 0xffff) | |
136 | change = 0xffff; | |
c283cf2c | 137 | ar7_wdt_change(change); |
780019dd | 138 | margin = change * prescale_value / vbus_rate; |
27c766aa JP |
139 | pr_info("timer margin %d seconds (prescale %d, change %d, freq %d)\n", |
140 | margin, prescale_value, change, vbus_rate); | |
c283cf2c MC |
141 | } |
142 | ||
143 | static void ar7_wdt_enable_wdt(void) | |
144 | { | |
27c766aa | 145 | pr_debug("enabling watchdog timer\n"); |
c283cf2c MC |
146 | ar7_wdt_disable(1); |
147 | ar7_wdt_kick(1); | |
148 | } | |
149 | ||
150 | static void ar7_wdt_disable_wdt(void) | |
151 | { | |
27c766aa | 152 | pr_debug("disabling watchdog timer\n"); |
c283cf2c MC |
153 | ar7_wdt_disable(0); |
154 | } | |
155 | ||
156 | static int ar7_wdt_open(struct inode *inode, struct file *file) | |
157 | { | |
158 | /* only allow one at a time */ | |
670d59c0 | 159 | if (test_and_set_bit(0, &wdt_is_open)) |
c283cf2c MC |
160 | return -EBUSY; |
161 | ar7_wdt_enable_wdt(); | |
162 | expect_close = 0; | |
163 | ||
c5bf68fe | 164 | return stream_open(inode, file); |
c283cf2c MC |
165 | } |
166 | ||
167 | static int ar7_wdt_release(struct inode *inode, struct file *file) | |
168 | { | |
169 | if (!expect_close) | |
27c766aa | 170 | pr_warn("watchdog device closed unexpectedly, will not disable the watchdog timer\n"); |
c283cf2c MC |
171 | else if (!nowayout) |
172 | ar7_wdt_disable_wdt(); | |
670d59c0 | 173 | clear_bit(0, &wdt_is_open); |
c283cf2c MC |
174 | return 0; |
175 | } | |
176 | ||
c283cf2c MC |
177 | static ssize_t ar7_wdt_write(struct file *file, const char *data, |
178 | size_t len, loff_t *ppos) | |
179 | { | |
180 | /* check for a magic close character */ | |
181 | if (len) { | |
182 | size_t i; | |
183 | ||
670d59c0 | 184 | spin_lock(&wdt_lock); |
c283cf2c | 185 | ar7_wdt_kick(1); |
670d59c0 | 186 | spin_unlock(&wdt_lock); |
c283cf2c MC |
187 | |
188 | expect_close = 0; | |
189 | for (i = 0; i < len; ++i) { | |
190 | char c; | |
7944d3a5 | 191 | if (get_user(c, data + i)) |
c283cf2c MC |
192 | return -EFAULT; |
193 | if (c == 'V') | |
194 | expect_close = 1; | |
195 | } | |
196 | ||
197 | } | |
198 | return len; | |
199 | } | |
200 | ||
670d59c0 AC |
201 | static long ar7_wdt_ioctl(struct file *file, |
202 | unsigned int cmd, unsigned long arg) | |
c283cf2c | 203 | { |
42747d71 | 204 | static const struct watchdog_info ident = { |
c283cf2c MC |
205 | .identity = LONGNAME, |
206 | .firmware_version = 1, | |
e73a7802 WVS |
207 | .options = (WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | |
208 | WDIOF_MAGICCLOSE), | |
c283cf2c MC |
209 | }; |
210 | int new_margin; | |
211 | ||
212 | switch (cmd) { | |
c283cf2c MC |
213 | case WDIOC_GETSUPPORT: |
214 | if (copy_to_user((struct watchdog_info *)arg, &ident, | |
215 | sizeof(ident))) | |
216 | return -EFAULT; | |
217 | return 0; | |
218 | case WDIOC_GETSTATUS: | |
219 | case WDIOC_GETBOOTSTATUS: | |
220 | if (put_user(0, (int *)arg)) | |
221 | return -EFAULT; | |
222 | return 0; | |
223 | case WDIOC_KEEPALIVE: | |
224 | ar7_wdt_kick(1); | |
225 | return 0; | |
226 | case WDIOC_SETTIMEOUT: | |
227 | if (get_user(new_margin, (int *)arg)) | |
228 | return -EFAULT; | |
229 | if (new_margin < 1) | |
230 | return -EINVAL; | |
231 | ||
670d59c0 | 232 | spin_lock(&wdt_lock); |
c283cf2c MC |
233 | ar7_wdt_update_margin(new_margin); |
234 | ar7_wdt_kick(1); | |
670d59c0 | 235 | spin_unlock(&wdt_lock); |
bd490f82 | 236 | fallthrough; |
c283cf2c MC |
237 | case WDIOC_GETTIMEOUT: |
238 | if (put_user(margin, (int *)arg)) | |
239 | return -EFAULT; | |
240 | return 0; | |
0c06090c WVS |
241 | default: |
242 | return -ENOTTY; | |
c283cf2c MC |
243 | } |
244 | } | |
245 | ||
b47a166e | 246 | static const struct file_operations ar7_wdt_fops = { |
c283cf2c MC |
247 | .owner = THIS_MODULE, |
248 | .write = ar7_wdt_write, | |
670d59c0 | 249 | .unlocked_ioctl = ar7_wdt_ioctl, |
b6dfb247 | 250 | .compat_ioctl = compat_ptr_ioctl, |
c283cf2c MC |
251 | .open = ar7_wdt_open, |
252 | .release = ar7_wdt_release, | |
6038f373 | 253 | .llseek = no_llseek, |
c283cf2c MC |
254 | }; |
255 | ||
256 | static struct miscdevice ar7_wdt_miscdev = { | |
257 | .minor = WATCHDOG_MINOR, | |
258 | .name = "watchdog", | |
259 | .fops = &ar7_wdt_fops, | |
260 | }; | |
261 | ||
2d991a16 | 262 | static int ar7_wdt_probe(struct platform_device *pdev) |
c283cf2c MC |
263 | { |
264 | int rc; | |
265 | ||
54ccba2f | 266 | ar7_wdt = devm_platform_ioremap_resource_byname(pdev, "regs"); |
4c271bb6 TR |
267 | if (IS_ERR(ar7_wdt)) |
268 | return PTR_ERR(ar7_wdt); | |
c283cf2c | 269 | |
780019dd FF |
270 | vbus_clk = clk_get(NULL, "vbus"); |
271 | if (IS_ERR(vbus_clk)) { | |
27c766aa | 272 | pr_err("could not get vbus clock\n"); |
ae21cc20 | 273 | return PTR_ERR(vbus_clk); |
780019dd FF |
274 | } |
275 | ||
c283cf2c MC |
276 | ar7_wdt_disable_wdt(); |
277 | ar7_wdt_prescale(prescale_value); | |
278 | ar7_wdt_update_margin(margin); | |
279 | ||
c283cf2c MC |
280 | rc = misc_register(&ar7_wdt_miscdev); |
281 | if (rc) { | |
27c766aa | 282 | pr_err("unable to register misc device\n"); |
ae21cc20 | 283 | goto out; |
c283cf2c | 284 | } |
ae21cc20 | 285 | return 0; |
c283cf2c | 286 | |
c283cf2c | 287 | out: |
ae21cc20 JL |
288 | clk_put(vbus_clk); |
289 | vbus_clk = NULL; | |
c283cf2c MC |
290 | return rc; |
291 | } | |
292 | ||
4b12b896 | 293 | static int ar7_wdt_remove(struct platform_device *pdev) |
c283cf2c MC |
294 | { |
295 | misc_deregister(&ar7_wdt_miscdev); | |
ae21cc20 JL |
296 | clk_put(vbus_clk); |
297 | vbus_clk = NULL; | |
64d4062a FF |
298 | return 0; |
299 | } | |
300 | ||
301 | static void ar7_wdt_shutdown(struct platform_device *pdev) | |
302 | { | |
303 | if (!nowayout) | |
304 | ar7_wdt_disable_wdt(); | |
305 | } | |
306 | ||
307 | static struct platform_driver ar7_wdt_driver = { | |
308 | .probe = ar7_wdt_probe, | |
82268714 | 309 | .remove = ar7_wdt_remove, |
64d4062a FF |
310 | .shutdown = ar7_wdt_shutdown, |
311 | .driver = { | |
64d4062a FF |
312 | .name = "ar7_wdt", |
313 | }, | |
314 | }; | |
315 | ||
b8ec6118 | 316 | module_platform_driver(ar7_wdt_driver); |