[linux.git] / include / scsi / sas.h

/*
 * SAS structures and definitions header file
 *
 * Copyright (C) 2005 Adaptec, Inc.  All rights reserved.
 * Copyright (C) 2005 Luben Tuikov <[email protected]>
 *
 * This file is licensed under GPLv2.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of the
 * License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
 * USA
 *
 */

#ifndef _SAS_H_
#define _SAS_H_

#include <linux/types.h>
#include <asm/byteorder.h>

#define SAS_ADDR_SIZE        8
#define HASHED_SAS_ADDR_SIZE 3
#define SAS_ADDR(_sa) ((unsigned long long) be64_to_cpu(*(__be64 *)(_sa)))

#define SMP_REQUEST             0x40
#define SMP_RESPONSE            0x41

#define SSP_DATA                0x01
#define SSP_XFER_RDY            0x05
#define SSP_COMMAND             0x06
#define SSP_RESPONSE            0x07
#define SSP_TASK                0x16

#define SMP_REPORT_GENERAL       0x00
#define SMP_REPORT_MANUF_INFO    0x01
#define SMP_READ_GPIO_REG        0x02
#define SMP_DISCOVER             0x10
#define SMP_REPORT_PHY_ERR_LOG   0x11
#define SMP_REPORT_PHY_SATA      0x12
#define SMP_REPORT_ROUTE_INFO    0x13
#define SMP_WRITE_GPIO_REG       0x82
#define SMP_CONF_ROUTE_INFO      0x90
#define SMP_PHY_CONTROL          0x91
#define SMP_PHY_TEST_FUNCTION    0x92

#define SMP_RESP_FUNC_ACC        0x00
#define SMP_RESP_FUNC_UNK        0x01
#define SMP_RESP_FUNC_FAILED     0x02
#define SMP_RESP_INV_FRM_LEN     0x03
#define SMP_RESP_NO_PHY          0x10
#define SMP_RESP_NO_INDEX        0x11
#define SMP_RESP_PHY_NO_SATA     0x12
#define SMP_RESP_PHY_UNK_OP      0x13
#define SMP_RESP_PHY_UNK_TESTF   0x14
#define SMP_RESP_PHY_TEST_INPROG 0x15
#define SMP_RESP_PHY_VACANT      0x16

/* SAM TMFs */
#define TMF_ABORT_TASK      0x01
#define TMF_ABORT_TASK_SET  0x02
#define TMF_CLEAR_TASK_SET  0x04
#define TMF_LU_RESET        0x08
#define TMF_CLEAR_ACA       0x40
#define TMF_QUERY_TASK      0x80

/* SAS TMF responses */
#define TMF_RESP_FUNC_COMPLETE   0x00
#define TMF_RESP_INVALID_FRAME   0x02
#define TMF_RESP_FUNC_ESUPP      0x04
#define TMF_RESP_FUNC_FAILED     0x05
#define TMF_RESP_FUNC_SUCC       0x08
#define TMF_RESP_NO_LUN          0x09
#define TMF_RESP_OVERLAPPED_TAG  0x0A

enum sas_oob_mode {
	OOB_NOT_CONNECTED,
	SATA_OOB_MODE,
	SAS_OOB_MODE
};

/* See sas_discover.c if you plan on changing these.
 */
enum sas_dev_type {
	NO_DEVICE   = 0,	  /* protocol */
	SAS_END_DEV = 1,	  /* protocol */
	EDGE_DEV    = 2,	  /* protocol */
	FANOUT_DEV  = 3,	  /* protocol */
	SAS_HA      = 4,
	SATA_DEV    = 5,
	SATA_PM     = 7,
	SATA_PM_PORT= 8,
};

/* Partly from IDENTIFY address frame. */
enum sas_proto {
	SATA_PROTO    = 1,
	SAS_PROTO_SMP = 2,	  /* protocol */
	SAS_PROTO_STP = 4,	  /* protocol */
	SAS_PROTO_SSP = 8,	  /* protocol */
	SAS_PROTO_ALL = 0xE,
};

/* From the spec; local phys only */
enum phy_func {
	PHY_FUNC_NOP,
	PHY_FUNC_LINK_RESET,		  /* Enables the phy */
	PHY_FUNC_HARD_RESET,
	PHY_FUNC_DISABLE,
	PHY_FUNC_CLEAR_ERROR_LOG = 5,
	PHY_FUNC_CLEAR_AFFIL,
	PHY_FUNC_TX_SATA_PS_SIGNAL,
	PHY_FUNC_RELEASE_SPINUP_HOLD = 0x10, /* LOCAL PORT ONLY! */
	PHY_FUNC_SET_LINK_RATE,
};

/* SAS LLDD would need to report only _very_few_ of those, like BROADCAST.
 * Most of those are here for completeness.
 */
enum sas_prim {
	SAS_PRIM_AIP_NORMAL = 1,
	SAS_PRIM_AIP_R0     = 2,
	SAS_PRIM_AIP_R1     = 3,
	SAS_PRIM_AIP_R2     = 4,
	SAS_PRIM_AIP_WC     = 5,
	SAS_PRIM_AIP_WD     = 6,
	SAS_PRIM_AIP_WP     = 7,
	SAS_PRIM_AIP_RWP    = 8,

	SAS_PRIM_BC_CH      = 9,
	SAS_PRIM_BC_RCH0    = 10,
	SAS_PRIM_BC_RCH1    = 11,
	SAS_PRIM_BC_R0      = 12,
	SAS_PRIM_BC_R1      = 13,
	SAS_PRIM_BC_R2      = 14,
	SAS_PRIM_BC_R3      = 15,
	SAS_PRIM_BC_R4      = 16,

	SAS_PRIM_NOTIFY_ENSP= 17,
	SAS_PRIM_NOTIFY_R0  = 18,
	SAS_PRIM_NOTIFY_R1  = 19,
	SAS_PRIM_NOTIFY_R2  = 20,

	SAS_PRIM_CLOSE_CLAF = 21,
	SAS_PRIM_CLOSE_NORM = 22,
	SAS_PRIM_CLOSE_R0   = 23,
	SAS_PRIM_CLOSE_R1   = 24,

	SAS_PRIM_OPEN_RTRY  = 25,
	SAS_PRIM_OPEN_RJCT  = 26,
	SAS_PRIM_OPEN_ACPT  = 27,

	SAS_PRIM_DONE       = 28,
	SAS_PRIM_BREAK      = 29,

	SATA_PRIM_DMAT      = 33,
	SATA_PRIM_PMNAK     = 34,
	SATA_PRIM_PMACK     = 35,
	SATA_PRIM_PMREQ_S   = 36,
	SATA_PRIM_PMREQ_P   = 37,
	SATA_SATA_R_ERR     = 38,
};

enum sas_open_rej_reason {
	/* Abandon open */
	SAS_OREJ_UNKNOWN   = 0,
	SAS_OREJ_BAD_DEST  = 1,
	SAS_OREJ_CONN_RATE = 2,
	SAS_OREJ_EPROTO    = 3,
	SAS_OREJ_RESV_AB0  = 4,
	SAS_OREJ_RESV_AB1  = 5,
	SAS_OREJ_RESV_AB2  = 6,
	SAS_OREJ_RESV_AB3  = 7,
	SAS_OREJ_WRONG_DEST= 8,
	SAS_OREJ_STP_NORES = 9,

	/* Retry open */
	SAS_OREJ_NO_DEST   = 10,
	SAS_OREJ_PATH_BLOCKED = 11,
	SAS_OREJ_RSVD_CONT0 = 12,
	SAS_OREJ_RSVD_CONT1 = 13,
	SAS_OREJ_RSVD_INIT0 = 14,
	SAS_OREJ_RSVD_INIT1 = 15,
	SAS_OREJ_RSVD_STOP0 = 16,
	SAS_OREJ_RSVD_STOP1 = 17,
	SAS_OREJ_RSVD_RETRY = 18,
};

struct  dev_to_host_fis {
	u8     fis_type;	  /* 0x34 */
	u8     flags;
	u8     status;
	u8     error;

	u8     lbal;
	union { u8 lbam; u8 byte_count_low; };
	union { u8 lbah; u8 byte_count_high; };
	u8     device;

	u8     lbal_exp;
	u8     lbam_exp;
	u8     lbah_exp;
	u8     _r_a;

	union { u8  sector_count; u8 interrupt_reason; };
	u8     sector_count_exp;
	u8     _r_b;
	u8     _r_c;

	u32    _r_d;
} __attribute__ ((packed));

struct host_to_dev_fis {
	u8     fis_type;	  /* 0x27 */
	u8     flags;
	u8     command;
	u8     features;

	u8     lbal;
	union { u8 lbam; u8 byte_count_low; };
	union { u8 lbah; u8 byte_count_high; };
	u8     device;

	u8     lbal_exp;
	u8     lbam_exp;
	u8     lbah_exp;
	u8     features_exp;

	union { u8  sector_count; u8 interrupt_reason; };
	u8     sector_count_exp;
	u8     _r_a;
	u8     control;

	u32    _r_b;
} __attribute__ ((packed));

/* Prefer to have code clarity over header file clarity.
 */
#ifdef __LITTLE_ENDIAN_BITFIELD
struct sas_identify_frame {
	/* Byte 0 */
	u8  frame_type:4;
	u8  dev_type:3;
	u8  _un0:1;

	/* Byte 1 */
	u8  _un1;

	/* Byte 2 */
	union {
		struct {
			u8  _un20:1;
			u8  smp_iport:1;
			u8  stp_iport:1;
			u8  ssp_iport:1;
			u8  _un247:4;
		};
		u8 initiator_bits;
	};

	/* Byte 3 */
	union {
		struct {
			u8  _un30:1;
			u8 smp_tport:1;
			u8 stp_tport:1;
			u8 ssp_tport:1;
			u8 _un347:4;
		};
		u8 target_bits;
	};

	/* Byte 4 - 11 */
	u8 _un4_11[8];

	/* Byte 12 - 19 */
	u8 sas_addr[SAS_ADDR_SIZE];

	/* Byte 20 */
	u8 phy_id;

	u8 _un21_27[7];

	__be32 crc;
} __attribute__ ((packed));

struct ssp_frame_hdr {
	u8     frame_type;
	u8     hashed_dest_addr[HASHED_SAS_ADDR_SIZE];
	u8     _r_a;
	u8     hashed_src_addr[HASHED_SAS_ADDR_SIZE];
	__be16 _r_b;

	u8     changing_data_ptr:1;
	u8     retransmit:1;
	u8     retry_data_frames:1;
	u8     _r_c:5;

	u8     num_fill_bytes:2;
	u8     _r_d:6;

	u32    _r_e;
	__be16 tag;
	__be16 tptt;
	__be32 data_offs;
} __attribute__ ((packed));

struct ssp_response_iu {
	u8     _r_a[10];

	u8     datapres:2;
	u8     _r_b:6;

	u8     status;

	u32    _r_c;

	__be32 sense_data_len;
	__be32 response_data_len;

	u8     resp_data[0];
	u8     sense_data[0];
} __attribute__ ((packed));

/* ---------- SMP ---------- */

struct report_general_resp {
	__be16  change_count;
	__be16  route_indexes;
	u8      _r_a;
	u8      num_phys;

	u8      conf_route_table:1;
	u8      configuring:1;
	u8      _r_b:6;

	u8      _r_c;

	u8      enclosure_logical_id[8];

	u8      _r_d[12];
} __attribute__ ((packed));

struct discover_resp {
	u8    _r_a[5];

	u8    phy_id;
	__be16 _r_b;

	u8    _r_c:4;
	u8    attached_dev_type:3;
	u8    _r_d:1;

	u8    linkrate:4;
	u8    _r_e:4;

	u8    attached_sata_host:1;
	u8    iproto:3;
	u8    _r_f:4;

	u8    attached_sata_dev:1;
	u8    tproto:3;
	u8    _r_g:3;
	u8    attached_sata_ps:1;

	u8    sas_addr[8];
	u8    attached_sas_addr[8];
	u8    attached_phy_id;

	u8    _r_h[7];

	u8    hmin_linkrate:4;
	u8    pmin_linkrate:4;
	u8    hmax_linkrate:4;
	u8    pmax_linkrate:4;

	u8    change_count;

	u8    pptv:4;
	u8    _r_i:3;
	u8    virtual:1;

	u8    routing_attr:4;
	u8    _r_j:4;

	u8    conn_type;
	u8    conn_el_index;
	u8    conn_phy_link;

	u8    _r_k[8];
} __attribute__ ((packed));

struct report_phy_sata_resp {
	u8    _r_a[5];

	u8    phy_id;
	u8    _r_b;

	u8    affil_valid:1;
	u8    affil_supp:1;
	u8    _r_c:6;

	u32    _r_d;

	u8    stp_sas_addr[8];

	struct dev_to_host_fis fis;

	u32   _r_e;

	u8    affil_stp_ini_addr[8];

	__be32 crc;
} __attribute__ ((packed));

struct smp_resp {
	u8    frame_type;
	u8    function;
	u8    result;
	u8    reserved;
	union {
		struct report_general_resp  rg;
		struct discover_resp        disc;
		struct report_phy_sata_resp rps;
	};
} __attribute__ ((packed));

#elif defined(__BIG_ENDIAN_BITFIELD)
struct sas_identify_frame {
	/* Byte 0 */
	u8  _un0:1;
	u8  dev_type:3;
	u8  frame_type:4;

	/* Byte 1 */
	u8  _un1;

	/* Byte 2 */
	union {
		struct {
			u8  _un247:4;
			u8  ssp_iport:1;
			u8  stp_iport:1;
			u8  smp_iport:1;
			u8  _un20:1;
		};
		u8 initiator_bits;
	};

	/* Byte 3 */
	union {
		struct {
			u8 _un347:4;
			u8 ssp_tport:1;
			u8 stp_tport:1;
			u8 smp_tport:1;
			u8 _un30:1;
		};
		u8 target_bits;
	};

	/* Byte 4 - 11 */
	u8 _un4_11[8];

	/* Byte 12 - 19 */
	u8 sas_addr[SAS_ADDR_SIZE];

	/* Byte 20 */
	u8 phy_id;

	u8 _un21_27[7];

	__be32 crc;
} __attribute__ ((packed));

struct ssp_frame_hdr {
	u8     frame_type;
	u8     hashed_dest_addr[HASHED_SAS_ADDR_SIZE];
	u8     _r_a;
	u8     hashed_src_addr[HASHED_SAS_ADDR_SIZE];
	__be16 _r_b;

	u8     _r_c:5;
	u8     retry_data_frames:1;
	u8     retransmit:1;
	u8     changing_data_ptr:1;

	u8     _r_d:6;
	u8     num_fill_bytes:2;

	u32    _r_e;
	__be16 tag;
	__be16 tptt;
	__be32 data_offs;
} __attribute__ ((packed));

struct ssp_response_iu {
	u8     _r_a[10];

	u8     _r_b:6;
	u8     datapres:2;

	u8     status;

	u32    _r_c;

	__be32 sense_data_len;
	__be32 response_data_len;

	u8     resp_data[0];
	u8     sense_data[0];
} __attribute__ ((packed));

/* ---------- SMP ---------- */

struct report_general_resp {
	__be16  change_count;
	__be16  route_indexes;
	u8      _r_a;
	u8      num_phys;

	u8      _r_b:6;
	u8      configuring:1;
	u8      conf_route_table:1;

	u8      _r_c;

	u8      enclosure_logical_id[8];

	u8      _r_d[12];
} __attribute__ ((packed));

struct discover_resp {
	u8    _r_a[5];

	u8    phy_id;
	__be16 _r_b;

	u8    _r_d:1;
	u8    attached_dev_type:3;
	u8    _r_c:4;

	u8    _r_e:4;
	u8    linkrate:4;

	u8    _r_f:4;
	u8    iproto:3;
	u8    attached_sata_host:1;

	u8    attached_sata_ps:1;
	u8    _r_g:3;
	u8    tproto:3;
	u8    attached_sata_dev:1;

	u8    sas_addr[8];
	u8    attached_sas_addr[8];
	u8    attached_phy_id;

	u8    _r_h[7];

	u8    pmin_linkrate:4;
	u8    hmin_linkrate:4;
	u8    pmax_linkrate:4;
	u8    hmax_linkrate:4;

	u8    change_count;

	u8    virtual:1;
	u8    _r_i:3;
	u8    pptv:4;

	u8    _r_j:4;
	u8    routing_attr:4;

	u8    conn_type;
	u8    conn_el_index;
	u8    conn_phy_link;

	u8    _r_k[8];
} __attribute__ ((packed));

struct report_phy_sata_resp {
	u8    _r_a[5];

	u8    phy_id;
	u8    _r_b;

	u8    _r_c:6;
	u8    affil_supp:1;
	u8    affil_valid:1;

	u32   _r_d;

	u8    stp_sas_addr[8];

	struct dev_to_host_fis fis;

	u32   _r_e;

	u8    affil_stp_ini_addr[8];

	__be32 crc;
} __attribute__ ((packed));

struct smp_resp {
	u8    frame_type;
	u8    function;
	u8    result;
	u8    reserved;
	union {
		struct report_general_resp  rg;
		struct discover_resp        disc;
		struct report_phy_sata_resp rps;
	};
} __attribute__ ((packed));

#else
#error "Bitfield order not defined!"
#endif

#endif /* _SAS_H_ */
Commit	Line	Data
2908d778 JB	1	/*
	2	* SAS structures and definitions header file
	3	*
	4	* Copyright (C) 2005 Adaptec, Inc. All rights reserved.
	5	* Copyright (C) 2005 Luben Tuikov <[email protected]>
	6	*
	7	* This file is licensed under GPLv2.
	8	*
	9	* This program is free software; you can redistribute it and/or
	10	* modify it under the terms of the GNU General Public License as
	11	* published by the Free Software Foundation; either version 2 of the
	12	* License, or (at your option) any later version.
	13	*
	14	* This program is distributed in the hope that it will be useful, but
	15	* WITHOUT ANY WARRANTY; without even the implied warranty of
	16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	17	* General Public License for more details.
	18	*
	19	* You should have received a copy of the GNU General Public License
	20	* along with this program; if not, write to the Free Software
	21	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
	22	* USA
	23	*
	24	*/
	25
	26	#ifndef _SAS_H_
	27	#define _SAS_H_
	28
	29	#include <linux/types.h>
	30	#include <asm/byteorder.h>
	31
	32	#define SAS_ADDR_SIZE 8
	33	#define HASHED_SAS_ADDR_SIZE 3
	34	#define SAS_ADDR(_sa) ((unsigned long long) be64_to_cpu((__be64 )(_sa)))
	35
	36	#define SMP_REQUEST 0x40
	37	#define SMP_RESPONSE 0x41
	38
	39	#define SSP_DATA 0x01
	40	#define SSP_XFER_RDY 0x05
	41	#define SSP_COMMAND 0x06
	42	#define SSP_RESPONSE 0x07
	43	#define SSP_TASK 0x16
	44
	45	#define SMP_REPORT_GENERAL 0x00
	46	#define SMP_REPORT_MANUF_INFO 0x01
	47	#define SMP_READ_GPIO_REG 0x02
	48	#define SMP_DISCOVER 0x10
	49	#define SMP_REPORT_PHY_ERR_LOG 0x11
	50	#define SMP_REPORT_PHY_SATA 0x12
	51	#define SMP_REPORT_ROUTE_INFO 0x13
	52	#define SMP_WRITE_GPIO_REG 0x82
	53	#define SMP_CONF_ROUTE_INFO 0x90
	54	#define SMP_PHY_CONTROL 0x91
	55	#define SMP_PHY_TEST_FUNCTION 0x92
	56
	57	#define SMP_RESP_FUNC_ACC 0x00
	58	#define SMP_RESP_FUNC_UNK 0x01
	59	#define SMP_RESP_FUNC_FAILED 0x02
	60	#define SMP_RESP_INV_FRM_LEN 0x03
	61	#define SMP_RESP_NO_PHY 0x10
	62	#define SMP_RESP_NO_INDEX 0x11
	63	#define SMP_RESP_PHY_NO_SATA 0x12
	64	#define SMP_RESP_PHY_UNK_OP 0x13
65	#define SMP_RESP_PHY_UNK_TESTF 0x14
66	#define SMP_RESP_PHY_TEST_INPROG 0x15
67	#define SMP_RESP_PHY_VACANT 0x16
68
69	/* SAM TMFs */
70	#define TMF_ABORT_TASK 0x01
71	#define TMF_ABORT_TASK_SET 0x02
72	#define TMF_CLEAR_TASK_SET 0x04
73	#define TMF_LU_RESET 0x08
74	#define TMF_CLEAR_ACA 0x40
75	#define TMF_QUERY_TASK 0x80
76
77	/* SAS TMF responses */
78	#define TMF_RESP_FUNC_COMPLETE 0x00
79	#define TMF_RESP_INVALID_FRAME 0x02
80	#define TMF_RESP_FUNC_ESUPP 0x04
81	#define TMF_RESP_FUNC_FAILED 0x05
82	#define TMF_RESP_FUNC_SUCC 0x08
83	#define TMF_RESP_NO_LUN 0x09
84	#define TMF_RESP_OVERLAPPED_TAG 0x0A
85
86	enum sas_oob_mode {
87	OOB_NOT_CONNECTED,
88	SATA_OOB_MODE,
89	SAS_OOB_MODE
90	};
91
92	/* See sas_discover.c if you plan on changing these.
93	*/
94	enum sas_dev_type {
95	NO_DEVICE = 0, /* protocol */
96	SAS_END_DEV = 1, /* protocol */
97	EDGE_DEV = 2, /* protocol */
98	FANOUT_DEV = 3, /* protocol */
99	SAS_HA = 4,
100	SATA_DEV = 5,
101	SATA_PM = 7,
102	SATA_PM_PORT= 8,
103	};
104
2908d778 JB	105	/* Partly from IDENTIFY address frame. */
	106	enum sas_proto {
	107	SATA_PROTO = 1,
	108	SAS_PROTO_SMP = 2, /* protocol */
	109	SAS_PROTO_STP = 4, /* protocol */
	110	SAS_PROTO_SSP = 8, /* protocol */
	111	SAS_PROTO_ALL = 0xE,
	112	};
	113
	114	/* From the spec; local phys only */
	115	enum phy_func {
	116	PHY_FUNC_NOP,
	117	PHY_FUNC_LINK_RESET, /* Enables the phy */
	118	PHY_FUNC_HARD_RESET,
	119	PHY_FUNC_DISABLE,
	120	PHY_FUNC_CLEAR_ERROR_LOG = 5,
	121	PHY_FUNC_CLEAR_AFFIL,
	122	PHY_FUNC_TX_SATA_PS_SIGNAL,
	123	PHY_FUNC_RELEASE_SPINUP_HOLD = 0x10, /* LOCAL PORT ONLY! */
a01e70e5	124	PHY_FUNC_SET_LINK_RATE,
2908d778 JB	125	};
	126
	127	/* SAS LLDD would need to report only _very_few_ of those, like BROADCAST.
	128	* Most of those are here for completeness.
	129	*/
	130	enum sas_prim {
	131	SAS_PRIM_AIP_NORMAL = 1,
	132	SAS_PRIM_AIP_R0 = 2,
	133	SAS_PRIM_AIP_R1 = 3,
	134	SAS_PRIM_AIP_R2 = 4,
	135	SAS_PRIM_AIP_WC = 5,
	136	SAS_PRIM_AIP_WD = 6,
	137	SAS_PRIM_AIP_WP = 7,
	138	SAS_PRIM_AIP_RWP = 8,
	139
	140	SAS_PRIM_BC_CH = 9,
	141	SAS_PRIM_BC_RCH0 = 10,
	142	SAS_PRIM_BC_RCH1 = 11,
	143	SAS_PRIM_BC_R0 = 12,
	144	SAS_PRIM_BC_R1 = 13,
	145	SAS_PRIM_BC_R2 = 14,
	146	SAS_PRIM_BC_R3 = 15,
	147	SAS_PRIM_BC_R4 = 16,
	148
	149	SAS_PRIM_NOTIFY_ENSP= 17,
	150	SAS_PRIM_NOTIFY_R0 = 18,
	151	SAS_PRIM_NOTIFY_R1 = 19,
	152	SAS_PRIM_NOTIFY_R2 = 20,
	153
	154	SAS_PRIM_CLOSE_CLAF = 21,
	155	SAS_PRIM_CLOSE_NORM = 22,
	156	SAS_PRIM_CLOSE_R0 = 23,
	157	SAS_PRIM_CLOSE_R1 = 24,
	158
	159	SAS_PRIM_OPEN_RTRY = 25,
	160	SAS_PRIM_OPEN_RJCT = 26,
	161	SAS_PRIM_OPEN_ACPT = 27,
	162
	163	SAS_PRIM_DONE = 28,
	164	SAS_PRIM_BREAK = 29,
	165
	166	SATA_PRIM_DMAT = 33,
	167	SATA_PRIM_PMNAK = 34,
	168	SATA_PRIM_PMACK = 35,
	169	SATA_PRIM_PMREQ_S = 36,
	170	SATA_PRIM_PMREQ_P = 37,
	171	SATA_SATA_R_ERR = 38,
	172	};
	173
	174	enum sas_open_rej_reason {
	175	/* Abandon open */
	176	SAS_OREJ_UNKNOWN = 0,
	177	SAS_OREJ_BAD_DEST = 1,
	178	SAS_OREJ_CONN_RATE = 2,
	179	SAS_OREJ_EPROTO = 3,
	180	SAS_OREJ_RESV_AB0 = 4,
	181	SAS_OREJ_RESV_AB1 = 5,
	182	SAS_OREJ_RESV_AB2 = 6,
	183	SAS_OREJ_RESV_AB3 = 7,
	184	SAS_OREJ_WRONG_DEST= 8,
	185	SAS_OREJ_STP_NORES = 9,
	186
	187	/* Retry open */
	188	SAS_OREJ_NO_DEST = 10,
189	SAS_OREJ_PATH_BLOCKED = 11,
190	SAS_OREJ_RSVD_CONT0 = 12,
191	SAS_OREJ_RSVD_CONT1 = 13,
192	SAS_OREJ_RSVD_INIT0 = 14,
193	SAS_OREJ_RSVD_INIT1 = 15,
194	SAS_OREJ_RSVD_STOP0 = 16,
195	SAS_OREJ_RSVD_STOP1 = 17,
196	SAS_OREJ_RSVD_RETRY = 18,
197	};
198
199	struct dev_to_host_fis {
200	u8 fis_type; /* 0x34 */
201	u8 flags;
202	u8 status;
203	u8 error;
204
205	u8 lbal;
206	union { u8 lbam; u8 byte_count_low; };
207	union { u8 lbah; u8 byte_count_high; };
208	u8 device;
209
210	u8 lbal_exp;
211	u8 lbam_exp;
212	u8 lbah_exp;
213	u8 _r_a;
214
215	union { u8 sector_count; u8 interrupt_reason; };
216	u8 sector_count_exp;
217	u8 _r_b;
218	u8 _r_c;
219
220	u32 _r_d;
221	} __attribute__ ((packed));
222
223	struct host_to_dev_fis {
224	u8 fis_type; /* 0x27 */
225	u8 flags;
226	u8 command;
227	u8 features;
228
229	u8 lbal;
230	union { u8 lbam; u8 byte_count_low; };
231	union { u8 lbah; u8 byte_count_high; };
232	u8 device;
233
234	u8 lbal_exp;
235	u8 lbam_exp;
236	u8 lbah_exp;
237	u8 features_exp;
238
239	union { u8 sector_count; u8 interrupt_reason; };
240	u8 sector_count_exp;
241	u8 _r_a;
242	u8 control;
243
244	u32 _r_b;
245	} __attribute__ ((packed));
246
247	/* Prefer to have code clarity over header file clarity.
248	*/
249	#ifdef __LITTLE_ENDIAN_BITFIELD
250	struct sas_identify_frame {
251	/* Byte 0 */
252	u8 frame_type:4;
253	u8 dev_type:3;
254	u8 _un0:1;
255
256	/* Byte 1 */
257	u8 _un1;
258
259	/* Byte 2 */
260	union {
261	struct {
262	u8 _un20:1;
263	u8 smp_iport:1;
264	u8 stp_iport:1;
265	u8 ssp_iport:1;
266	u8 _un247:4;
267	};
268	u8 initiator_bits;
269	};
270
271	/* Byte 3 */
272	union {
273	struct {
274	u8 _un30:1;
275	u8 smp_tport:1;
276	u8 stp_tport:1;
277	u8 ssp_tport:1;
278	u8 _un347:4;
279	};
280	u8 target_bits;
281	};
282
283	/* Byte 4 - 11 */
284	u8 _un4_11[8];
285
286	/* Byte 12 - 19 */
287	u8 sas_addr[SAS_ADDR_SIZE];
288
289	/* Byte 20 */
290	u8 phy_id;
291
292	u8 _un21_27[7];
293
294	__be32 crc;
295	} __attribute__ ((packed));
296
297	struct ssp_frame_hdr {
298	u8 frame_type;
299	u8 hashed_dest_addr[HASHED_SAS_ADDR_SIZE];
300	u8 _r_a;
301	u8 hashed_src_addr[HASHED_SAS_ADDR_SIZE];
302	__be16 _r_b;
303
304	u8 changing_data_ptr:1;
305	u8 retransmit:1;
306	u8 retry_data_frames:1;
307	u8 _r_c:5;
308
309	u8 num_fill_bytes:2;
310	u8 _r_d:6;
311
312	u32 _r_e;
313	__be16 tag;
314	__be16 tptt;
315	__be32 data_offs;
316	} __attribute__ ((packed));
317
318	struct ssp_response_iu {
319	u8 _r_a[10];
320
321	u8 datapres:2;
322	u8 _r_b:6;
323
324	u8 status;
325
326	u32 _r_c;
327
328	__be32 sense_data_len;
329	__be32 response_data_len;
330
331	u8 resp_data[0];
332	u8 sense_data[0];
333	} __attribute__ ((packed));
334
335	/* ---------- SMP ---------- */
336
337	struct report_general_resp {
338	__be16 change_count;
339	__be16 route_indexes;
340	u8 _r_a;
341	u8 num_phys;
342
343	u8 conf_route_table:1;
344	u8 configuring:1;
345	u8 _r_b:6;
346
347	u8 _r_c;
348
349	u8 enclosure_logical_id[8];
350
351	u8 _r_d[12];
352	} __attribute__ ((packed));
353
354	struct discover_resp {
355	u8 _r_a[5];
356
357	u8 phy_id;
358	__be16 _r_b;
359
360	u8 _r_c:4;
361	u8 attached_dev_type:3;
362	u8 _r_d:1;
363
364	u8 linkrate:4;
365	u8 _r_e:4;
366
367	u8 attached_sata_host:1;
368	u8 iproto:3;
369	u8 _r_f:4;
370
371	u8 attached_sata_dev:1;
372	u8 tproto:3;
373	u8 _r_g:3;
374	u8 attached_sata_ps:1;
375
376	u8 sas_addr[8];
377	u8 attached_sas_addr[8];
378	u8 attached_phy_id;
379
380	u8 _r_h[7];
381
382	u8 hmin_linkrate:4;
383	u8 pmin_linkrate:4;
384	u8 hmax_linkrate:4;
385	u8 pmax_linkrate:4;
386
387	u8 change_count;
388
389	u8 pptv:4;
390	u8 _r_i:3;
391	u8 virtual:1;
392
393	u8 routing_attr:4;
394	u8 _r_j:4;
395
396	u8 conn_type;
397	u8 conn_el_index;
398	u8 conn_phy_link;
399
400	u8 _r_k[8];
401	} __attribute__ ((packed));
402
403	struct report_phy_sata_resp {
404	u8 _r_a[5];
405
406	u8 phy_id;
407	u8 _r_b;
408
409	u8 affil_valid:1;
410	u8 affil_supp:1;
411	u8 _r_c:6;
412
413	u32 _r_d;
414
415	u8 stp_sas_addr[8];
416
417	struct dev_to_host_fis fis;
418
419	u32 _r_e;
420
421	u8 affil_stp_ini_addr[8];
422
423	__be32 crc;
424	} __attribute__ ((packed));
425
426	struct smp_resp {
427	u8 frame_type;
428	u8 function;
429	u8 result;
430	u8 reserved;
431	union {
432	struct report_general_resp rg;
433	struct discover_resp disc;
434	struct report_phy_sata_resp rps;
435	};
436	} __attribute__ ((packed));
437
438	#elif defined(__BIG_ENDIAN_BITFIELD)
439	struct sas_identify_frame {
440	/* Byte 0 */
441	u8 _un0:1;
442	u8 dev_type:3;
443	u8 frame_type:4;
444
445	/* Byte 1 */
446	u8 _un1;
447
448	/* Byte 2 */
449	union {
450	struct {
451	u8 _un247:4;
452	u8 ssp_iport:1;
453	u8 stp_iport:1;
454	u8 smp_iport:1;
455	u8 _un20:1;
456	};
457	u8 initiator_bits;
458	};
459
460	/* Byte 3 */
461	union {
462	struct {
463	u8 _un347:4;
464	u8 ssp_tport:1;
465	u8 stp_tport:1;
466	u8 smp_tport:1;
467	u8 _un30:1;
468	};
469	u8 target_bits;
470	};
471
472	/* Byte 4 - 11 */
473	u8 _un4_11[8];
474
475	/* Byte 12 - 19 */
476	u8 sas_addr[SAS_ADDR_SIZE];
477
478	/* Byte 20 */
479	u8 phy_id;
480
481	u8 _un21_27[7];
482
483	__be32 crc;
484	} __attribute__ ((packed));
485
486	struct ssp_frame_hdr {
487	u8 frame_type;
488	u8 hashed_dest_addr[HASHED_SAS_ADDR_SIZE];
489	u8 _r_a;
490	u8 hashed_src_addr[HASHED_SAS_ADDR_SIZE];
491	__be16 _r_b;
492
493	u8 _r_c:5;
494	u8 retry_data_frames:1;
495	u8 retransmit:1;
496	u8 changing_data_ptr:1;
497
498	u8 _r_d:6;
499	u8 num_fill_bytes:2;
500
501	u32 _r_e;
502	__be16 tag;
503	__be16 tptt;
504	__be32 data_offs;
505	} __attribute__ ((packed));
506
507	struct ssp_response_iu {
508	u8 _r_a[10];
509
510	u8 _r_b:6;
511	u8 datapres:2;
512
513	u8 status;
514
515	u32 _r_c;
516
517	__be32 sense_data_len;
518	__be32 response_data_len;
519
520	u8 resp_data[0];
521	u8 sense_data[0];
522	} __attribute__ ((packed));
523
524	/* ---------- SMP ---------- */
525
526	struct report_general_resp {
527	__be16 change_count;
528	__be16 route_indexes;
529	u8 _r_a;
530	u8 num_phys;
531
532	u8 _r_b:6;
533	u8 configuring:1;
534	u8 conf_route_table:1;
535
536	u8 _r_c;
537
538	u8 enclosure_logical_id[8];
539
540	u8 _r_d[12];
541	} __attribute__ ((packed));
542
543	struct discover_resp {
544	u8 _r_a[5];
545
546	u8 phy_id;
547	__be16 _r_b;
548
549	u8 _r_d:1;
550	u8 attached_dev_type:3;
551	u8 _r_c:4;
552
553	u8 _r_e:4;
554	u8 linkrate:4;
555
556	u8 _r_f:4;
557	u8 iproto:3;
558	u8 attached_sata_host:1;
559
560	u8 attached_sata_ps:1;
561	u8 _r_g:3;
562	u8 tproto:3;
563	u8 attached_sata_dev:1;
564
565	u8 sas_addr[8];
566	u8 attached_sas_addr[8];
567	u8 attached_phy_id;
568
569	u8 _r_h[7];
570
571	u8 pmin_linkrate:4;
572	u8 hmin_linkrate:4;
573	u8 pmax_linkrate:4;
574	u8 hmax_linkrate:4;
575
576	u8 change_count;
577
578	u8 virtual:1;
579	u8 _r_i:3;
580	u8 pptv:4;
581
582	u8 _r_j:4;
583	u8 routing_attr:4;
584
585	u8 conn_type;
586	u8 conn_el_index;
587	u8 conn_phy_link;
588
589	u8 _r_k[8];
590	} __attribute__ ((packed));
591
592	struct report_phy_sata_resp {
593	u8 _r_a[5];
594
595	u8 phy_id;
596	u8 _r_b;
597
598	u8 _r_c:6;
599	u8 affil_supp:1;
600	u8 affil_valid:1;
601
602	u32 _r_d;
603
604	u8 stp_sas_addr[8];
605
606	struct dev_to_host_fis fis;
607
608	u32 _r_e;
609
610	u8 affil_stp_ini_addr[8];
611
612	__be32 crc;
613	} __attribute__ ((packed));
614
615	struct smp_resp {
616	u8 frame_type;
617	u8 function;
618	u8 result;
619	u8 reserved;
620	union {
621	struct report_general_resp rg;
622	struct discover_resp disc;
623	struct report_phy_sata_resp rps;
624	};
625	} __attribute__ ((packed));
626
627	#else
628	#error "Bitfield order not defined!"
629	#endif
630
631	#endif /* _SAS_H_ */