[linux.git] / drivers / rtc / rtc-da9063.c

/* rtc-da9063.c - Real time clock device driver for DA9063
 * Copyright (C) 2013-2015  Dialog Semiconductor Ltd.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version 2
 * of the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#include <linux/delay.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/regmap.h>
#include <linux/rtc.h>
#include <linux/slab.h>

#include <linux/mfd/da9062/registers.h>
#include <linux/mfd/da9063/registers.h>
#include <linux/mfd/da9063/core.h>

#define YEARS_TO_DA9063(year)		((year) - 100)
#define MONTHS_TO_DA9063(month)		((month) + 1)
#define YEARS_FROM_DA9063(year)		((year) + 100)
#define MONTHS_FROM_DA9063(month)	((month) - 1)

enum {
	RTC_SEC	= 0,
	RTC_MIN	= 1,
	RTC_HOUR = 2,
	RTC_DAY	= 3,
	RTC_MONTH = 4,
	RTC_YEAR = 5,
	RTC_DATA_LEN
};

struct da9063_compatible_rtc_regmap {
	/* REGS */
	int rtc_enable_reg;
	int rtc_enable_32k_crystal_reg;
	int rtc_alarm_secs_reg;
	int rtc_alarm_year_reg;
	int rtc_count_secs_reg;
	int rtc_count_year_reg;
	int rtc_event_reg;
	/* MASKS */
	int rtc_enable_mask;
	int rtc_crystal_mask;
	int rtc_event_alarm_mask;
	int rtc_alarm_on_mask;
	int rtc_alarm_status_mask;
	int rtc_tick_on_mask;
	int rtc_ready_to_read_mask;
	int rtc_count_sec_mask;
	int rtc_count_min_mask;
	int rtc_count_hour_mask;
	int rtc_count_day_mask;
	int rtc_count_month_mask;
	int rtc_count_year_mask;
	/* ALARM CONFIG */
	int rtc_data_start;
	int rtc_alarm_len;
};

struct da9063_compatible_rtc {
	struct rtc_device *rtc_dev;
	struct rtc_time alarm_time;
	struct regmap *regmap;
	const struct da9063_compatible_rtc_regmap *config;
	bool rtc_sync;
};

static const struct da9063_compatible_rtc_regmap da9063_ad_regs = {
	/* REGS */
	.rtc_enable_reg             = DA9063_REG_CONTROL_E,
	.rtc_alarm_secs_reg         = DA9063_AD_REG_ALARM_MI,
	.rtc_alarm_year_reg         = DA9063_AD_REG_ALARM_Y,
	.rtc_count_secs_reg         = DA9063_REG_COUNT_S,
	.rtc_count_year_reg         = DA9063_REG_COUNT_Y,
	.rtc_event_reg              = DA9063_REG_EVENT_A,
	/* MASKS */
	.rtc_enable_mask            = DA9063_RTC_EN,
	.rtc_crystal_mask           = DA9063_CRYSTAL,
	.rtc_enable_32k_crystal_reg = DA9063_REG_EN_32K,
	.rtc_event_alarm_mask       = DA9063_E_ALARM,
	.rtc_alarm_on_mask          = DA9063_ALARM_ON,
	.rtc_alarm_status_mask      = DA9063_ALARM_STATUS_ALARM |
				      DA9063_ALARM_STATUS_TICK,
	.rtc_tick_on_mask           = DA9063_TICK_ON,
	.rtc_ready_to_read_mask     = DA9063_RTC_READ,
	.rtc_count_sec_mask         = DA9063_COUNT_SEC_MASK,
	.rtc_count_min_mask         = DA9063_COUNT_MIN_MASK,
	.rtc_count_hour_mask        = DA9063_COUNT_HOUR_MASK,
	.rtc_count_day_mask         = DA9063_COUNT_DAY_MASK,
	.rtc_count_month_mask       = DA9063_COUNT_MONTH_MASK,
	.rtc_count_year_mask        = DA9063_COUNT_YEAR_MASK,
	/* ALARM CONFIG */
	.rtc_data_start             = RTC_MIN,
	.rtc_alarm_len              = RTC_DATA_LEN - 1,
};

static const struct da9063_compatible_rtc_regmap da9063_bb_regs = {
	/* REGS */
	.rtc_enable_reg             = DA9063_REG_CONTROL_E,
	.rtc_alarm_secs_reg         = DA9063_BB_REG_ALARM_S,
	.rtc_alarm_year_reg         = DA9063_BB_REG_ALARM_Y,
	.rtc_count_secs_reg         = DA9063_REG_COUNT_S,
	.rtc_count_year_reg         = DA9063_REG_COUNT_Y,
	.rtc_event_reg              = DA9063_REG_EVENT_A,
	/* MASKS */
	.rtc_enable_mask            = DA9063_RTC_EN,
	.rtc_crystal_mask           = DA9063_CRYSTAL,
	.rtc_enable_32k_crystal_reg = DA9063_REG_EN_32K,
	.rtc_event_alarm_mask       = DA9063_E_ALARM,
	.rtc_alarm_on_mask          = DA9063_ALARM_ON,
	.rtc_alarm_status_mask      = DA9063_ALARM_STATUS_ALARM |
				      DA9063_ALARM_STATUS_TICK,
	.rtc_tick_on_mask           = DA9063_TICK_ON,
	.rtc_ready_to_read_mask     = DA9063_RTC_READ,
	.rtc_count_sec_mask         = DA9063_COUNT_SEC_MASK,
	.rtc_count_min_mask         = DA9063_COUNT_MIN_MASK,
	.rtc_count_hour_mask        = DA9063_COUNT_HOUR_MASK,
	.rtc_count_day_mask         = DA9063_COUNT_DAY_MASK,
	.rtc_count_month_mask       = DA9063_COUNT_MONTH_MASK,
	.rtc_count_year_mask        = DA9063_COUNT_YEAR_MASK,
	/* ALARM CONFIG */
	.rtc_data_start             = RTC_SEC,
	.rtc_alarm_len              = RTC_DATA_LEN,
};

static const struct da9063_compatible_rtc_regmap da9062_aa_regs = {
	/* REGS */
	.rtc_enable_reg             = DA9062AA_CONTROL_E,
	.rtc_alarm_secs_reg         = DA9062AA_ALARM_S,
	.rtc_alarm_year_reg         = DA9062AA_ALARM_Y,
	.rtc_count_secs_reg         = DA9062AA_COUNT_S,
	.rtc_count_year_reg         = DA9062AA_COUNT_Y,
	.rtc_event_reg              = DA9062AA_EVENT_A,
	/* MASKS */
	.rtc_enable_mask            = DA9062AA_RTC_EN_MASK,
	.rtc_crystal_mask           = DA9062AA_CRYSTAL_MASK,
	.rtc_enable_32k_crystal_reg = DA9062AA_EN_32K,
	.rtc_event_alarm_mask       = DA9062AA_M_ALARM_MASK,
	.rtc_alarm_on_mask          = DA9062AA_ALARM_ON_MASK,
	.rtc_alarm_status_mask      = (0x02 << 6),
	.rtc_tick_on_mask           = DA9062AA_TICK_ON_MASK,
	.rtc_ready_to_read_mask     = DA9062AA_RTC_READ_MASK,
	.rtc_count_sec_mask         = DA9062AA_COUNT_SEC_MASK,
	.rtc_count_min_mask         = DA9062AA_COUNT_MIN_MASK,
	.rtc_count_hour_mask        = DA9062AA_COUNT_HOUR_MASK,
	.rtc_count_day_mask         = DA9062AA_COUNT_DAY_MASK,
	.rtc_count_month_mask       = DA9062AA_COUNT_MONTH_MASK,
	.rtc_count_year_mask        = DA9062AA_COUNT_YEAR_MASK,
	/* ALARM CONFIG */
	.rtc_data_start             = RTC_SEC,
	.rtc_alarm_len              = RTC_DATA_LEN,
};

static const struct of_device_id da9063_compatible_reg_id_table[] = {
	{ .compatible = "dlg,da9063-rtc", .data = &da9063_bb_regs },
	{ .compatible = "dlg,da9062-rtc", .data = &da9062_aa_regs },
	{ },
};
MODULE_DEVICE_TABLE(of, da9063_compatible_reg_id_table);

static void da9063_data_to_tm(u8 *data, struct rtc_time *tm,
			      struct da9063_compatible_rtc *rtc)
{
	const struct da9063_compatible_rtc_regmap *config = rtc->config;

	tm->tm_sec  = data[RTC_SEC]  & config->rtc_count_sec_mask;
	tm->tm_min  = data[RTC_MIN]  & config->rtc_count_min_mask;
	tm->tm_hour = data[RTC_HOUR] & config->rtc_count_hour_mask;
	tm->tm_mday = data[RTC_DAY]  & config->rtc_count_day_mask;
	tm->tm_mon  = MONTHS_FROM_DA9063(data[RTC_MONTH] &
					 config->rtc_count_month_mask);
	tm->tm_year = YEARS_FROM_DA9063(data[RTC_YEAR] &
					config->rtc_count_year_mask);
}

static void da9063_tm_to_data(struct rtc_time *tm, u8 *data,
			      struct da9063_compatible_rtc *rtc)
{
	const struct da9063_compatible_rtc_regmap *config = rtc->config;

	data[RTC_SEC]   = tm->tm_sec & config->rtc_count_sec_mask;
	data[RTC_MIN]   = tm->tm_min & config->rtc_count_min_mask;
	data[RTC_HOUR]  = tm->tm_hour & config->rtc_count_hour_mask;
	data[RTC_DAY]   = tm->tm_mday & config->rtc_count_day_mask;
	data[RTC_MONTH] = MONTHS_TO_DA9063(tm->tm_mon) &
				config->rtc_count_month_mask;
	data[RTC_YEAR]  = YEARS_TO_DA9063(tm->tm_year) &
				config->rtc_count_year_mask;
}

static int da9063_rtc_stop_alarm(struct device *dev)
{
	struct da9063_compatible_rtc *rtc = dev_get_drvdata(dev);
	const struct da9063_compatible_rtc_regmap *config = rtc->config;

	return regmap_update_bits(rtc->regmap,
				  config->rtc_alarm_year_reg,
				  config->rtc_alarm_on_mask,
				  0);
}

static int da9063_rtc_start_alarm(struct device *dev)
{
	struct da9063_compatible_rtc *rtc = dev_get_drvdata(dev);
	const struct da9063_compatible_rtc_regmap *config = rtc->config;

	return regmap_update_bits(rtc->regmap,
				  config->rtc_alarm_year_reg,
				  config->rtc_alarm_on_mask,
				  config->rtc_alarm_on_mask);
}

static int da9063_rtc_read_time(struct device *dev, struct rtc_time *tm)
{
	struct da9063_compatible_rtc *rtc = dev_get_drvdata(dev);
	const struct da9063_compatible_rtc_regmap *config = rtc->config;
	unsigned long tm_secs;
	unsigned long al_secs;
	u8 data[RTC_DATA_LEN];
	int ret;

	ret = regmap_bulk_read(rtc->regmap,
			       config->rtc_count_secs_reg,
			       data, RTC_DATA_LEN);
	if (ret < 0) {
		dev_err(dev, "Failed to read RTC time data: %d\n", ret);
		return ret;
	}

	if (!(data[RTC_SEC] & config->rtc_ready_to_read_mask)) {
		dev_dbg(dev, "RTC not yet ready to be read by the host\n");
		return -EINVAL;
	}

	da9063_data_to_tm(data, tm, rtc);

	rtc_tm_to_time(tm, &tm_secs);
	rtc_tm_to_time(&rtc->alarm_time, &al_secs);

	/* handle the rtc synchronisation delay */
	if (rtc->rtc_sync == true && al_secs - tm_secs == 1)
		memcpy(tm, &rtc->alarm_time, sizeof(struct rtc_time));
	else
		rtc->rtc_sync = false;

	return 0;
}

static int da9063_rtc_set_time(struct device *dev, struct rtc_time *tm)
{
	struct da9063_compatible_rtc *rtc = dev_get_drvdata(dev);
	const struct da9063_compatible_rtc_regmap *config = rtc->config;
	u8 data[RTC_DATA_LEN];
	int ret;

	da9063_tm_to_data(tm, data, rtc);
	ret = regmap_bulk_write(rtc->regmap,
				config->rtc_count_secs_reg,
				data, RTC_DATA_LEN);
	if (ret < 0)
		dev_err(dev, "Failed to set RTC time data: %d\n", ret);

	return ret;
}

static int da9063_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
{
	struct da9063_compatible_rtc *rtc = dev_get_drvdata(dev);
	const struct da9063_compatible_rtc_regmap *config = rtc->config;
	u8 data[RTC_DATA_LEN];
	int ret;
	unsigned int val;

	data[RTC_SEC] = 0;
	ret = regmap_bulk_read(rtc->regmap,
			       config->rtc_alarm_secs_reg,
			       &data[config->rtc_data_start],
			       config->rtc_alarm_len);
	if (ret < 0)
		return ret;

	da9063_data_to_tm(data, &alrm->time, rtc);

	alrm->enabled = !!(data[RTC_YEAR] & config->rtc_alarm_on_mask);

	ret = regmap_read(rtc->regmap,
			  config->rtc_event_reg,
			  &val);
	if (ret < 0)
		return ret;

	if (val & config->rtc_event_alarm_mask)
		alrm->pending = 1;
	else
		alrm->pending = 0;

	return 0;
}

static int da9063_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
{
	struct da9063_compatible_rtc *rtc = dev_get_drvdata(dev);
	const struct da9063_compatible_rtc_regmap *config = rtc->config;
	u8 data[RTC_DATA_LEN];
	int ret;

	da9063_tm_to_data(&alrm->time, data, rtc);

	ret = da9063_rtc_stop_alarm(dev);
	if (ret < 0) {
		dev_err(dev, "Failed to stop alarm: %d\n", ret);
		return ret;
	}

	ret = regmap_bulk_write(rtc->regmap,
				config->rtc_alarm_secs_reg,
				&data[config->rtc_data_start],
				config->rtc_alarm_len);
	if (ret < 0) {
		dev_err(dev, "Failed to write alarm: %d\n", ret);
		return ret;
	}

	da9063_data_to_tm(data, &rtc->alarm_time, rtc);

	if (alrm->enabled) {
		ret = da9063_rtc_start_alarm(dev);
		if (ret < 0) {
			dev_err(dev, "Failed to start alarm: %d\n", ret);
			return ret;
		}
	}

	return ret;
}

static int da9063_rtc_alarm_irq_enable(struct device *dev,
				       unsigned int enabled)
{
	if (enabled)
		return da9063_rtc_start_alarm(dev);
	else
		return da9063_rtc_stop_alarm(dev);
}

static irqreturn_t da9063_alarm_event(int irq, void *data)
{
	struct da9063_compatible_rtc *rtc = data;
	const struct da9063_compatible_rtc_regmap *config = rtc->config;

	regmap_update_bits(rtc->regmap,
			   config->rtc_alarm_year_reg,
			   config->rtc_alarm_on_mask,
			   0);

	rtc->rtc_sync = true;
	rtc_update_irq(rtc->rtc_dev, 1, RTC_IRQF | RTC_AF);

	return IRQ_HANDLED;
}

static const struct rtc_class_ops da9063_rtc_ops = {
	.read_time = da9063_rtc_read_time,
	.set_time = da9063_rtc_set_time,
	.read_alarm = da9063_rtc_read_alarm,
	.set_alarm = da9063_rtc_set_alarm,
	.alarm_irq_enable = da9063_rtc_alarm_irq_enable,
};

static int da9063_rtc_probe(struct platform_device *pdev)
{
	struct da9063_compatible_rtc *rtc;
	const struct da9063_compatible_rtc_regmap *config;
	const struct of_device_id *match;
	int irq_alarm;
	u8 data[RTC_DATA_LEN];
	int ret;

	if (!pdev->dev.of_node)
		return -ENXIO;

	match = of_match_node(da9063_compatible_reg_id_table,
			      pdev->dev.of_node);

	rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
	if (!rtc)
		return -ENOMEM;

	rtc->config = match->data;
	if (of_device_is_compatible(pdev->dev.of_node, "dlg,da9063-rtc")) {
		struct da9063 *chip = dev_get_drvdata(pdev->dev.parent);

		if (chip->variant_code == PMIC_DA9063_AD)
			rtc->config = &da9063_ad_regs;
	}

	rtc->regmap = dev_get_regmap(pdev->dev.parent, NULL);
	if (!rtc->regmap) {
		dev_warn(&pdev->dev, "Parent regmap unavailable.\n");
		return -ENXIO;
	}

	config = rtc->config;
	ret = regmap_update_bits(rtc->regmap,
				 config->rtc_enable_reg,
				 config->rtc_enable_mask,
				 config->rtc_enable_mask);
	if (ret < 0) {
		dev_err(&pdev->dev, "Failed to enable RTC\n");
		return ret;
	}

	ret = regmap_update_bits(rtc->regmap,
				 config->rtc_enable_32k_crystal_reg,
				 config->rtc_crystal_mask,
				 config->rtc_crystal_mask);
	if (ret < 0) {
		dev_err(&pdev->dev, "Failed to run 32kHz oscillator\n");
		return ret;
	}

	ret = regmap_update_bits(rtc->regmap,
				 config->rtc_alarm_secs_reg,
				 config->rtc_alarm_status_mask,
				 0);
	if (ret < 0) {
		dev_err(&pdev->dev, "Failed to access RTC alarm register\n");
		return ret;
	}

	ret = regmap_update_bits(rtc->regmap,
				 config->rtc_alarm_secs_reg,
				 DA9063_ALARM_STATUS_ALARM,
				 DA9063_ALARM_STATUS_ALARM);
	if (ret < 0) {
		dev_err(&pdev->dev, "Failed to access RTC alarm register\n");
		return ret;
	}

	ret = regmap_update_bits(rtc->regmap,
				 config->rtc_alarm_year_reg,
				 config->rtc_tick_on_mask,
				 0);
	if (ret < 0) {
		dev_err(&pdev->dev, "Failed to disable TICKs\n");
		return ret;
	}

	data[RTC_SEC] = 0;
	ret = regmap_bulk_read(rtc->regmap,
			       config->rtc_alarm_secs_reg,
			       &data[config->rtc_data_start],
			       config->rtc_alarm_len);
	if (ret < 0) {
		dev_err(&pdev->dev, "Failed to read initial alarm data: %d\n",
			ret);
		return ret;
	}

	platform_set_drvdata(pdev, rtc);

	rtc->rtc_dev = devm_rtc_device_register(&pdev->dev, DA9063_DRVNAME_RTC,
					   &da9063_rtc_ops, THIS_MODULE);
	if (IS_ERR(rtc->rtc_dev))
		return PTR_ERR(rtc->rtc_dev);

	da9063_data_to_tm(data, &rtc->alarm_time, rtc);
	rtc->rtc_sync = false;

	irq_alarm = platform_get_irq_byname(pdev, "ALARM");
	ret = devm_request_threaded_irq(&pdev->dev, irq_alarm, NULL,
					da9063_alarm_event,
					IRQF_TRIGGER_LOW | IRQF_ONESHOT,
					"ALARM", rtc);
	if (ret)
		dev_err(&pdev->dev, "Failed to request ALARM IRQ %d: %d\n",
			irq_alarm, ret);

	return ret;
}

static struct platform_driver da9063_rtc_driver = {
	.probe		= da9063_rtc_probe,
	.driver		= {
		.name	= DA9063_DRVNAME_RTC,
		.of_match_table = da9063_compatible_reg_id_table,
	},
};

module_platform_driver(da9063_rtc_driver);

MODULE_AUTHOR("S Twiss <[email protected]>");
MODULE_DESCRIPTION("Real time clock device driver for Dialog DA9063");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:" DA9063_DRVNAME_RTC);
Commit	Line	Data
c2a57550	1	/* rtc-da9063.c - Real time clock device driver for DA9063
ce006ca6	2	* Copyright (C) 2013-2015 Dialog Semiconductor Ltd.
c2a57550	3	*
ce006ca6 ST	4	* This program is free software; you can redistribute it and/or
	5	* modify it under the terms of the GNU General Public License
	6	* as published by the Free Software Foundation; either version 2
	7	* of the License, or (at your option) any later version.
c2a57550	8	*
ce006ca6	9	* This program is distributed in the hope that it will be useful,
c2a57550	10	* but WITHOUT ANY WARRANTY; without even the implied warranty of
ce006ca6 ST	11	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
ce006ca6 ST	12	* GNU General Public License for more details.
c2a57550 OST	13	*/
c2a57550 OST	14
80ca3277 T	15	#include <linux/delay.h>
	16	#include <linux/init.h>
	17	#include <linux/interrupt.h>
c2a57550 OST	18	#include <linux/kernel.h>
c2a57550 OST	19	#include <linux/module.h>
80ca3277	20	#include <linux/of.h>
c2a57550	21	#include <linux/platform_device.h>
80ca3277	22	#include <linux/regmap.h>
c2a57550 OST	23	#include <linux/rtc.h>
c2a57550 OST	24	#include <linux/slab.h>
80ca3277 T	25
80ca3277 T	26	#include <linux/mfd/da9062/registers.h>
c2a57550 OST	27	#include <linux/mfd/da9063/registers.h>
	28	#include <linux/mfd/da9063/core.h>
	29
	30	#define YEARS_TO_DA9063(year) ((year) - 100)
	31	#define MONTHS_TO_DA9063(month) ((month) + 1)
	32	#define YEARS_FROM_DA9063(year) ((year) + 100)
	33	#define MONTHS_FROM_DA9063(month) ((month) - 1)
	34
80ca3277 T	35	enum {
	36	RTC_SEC = 0,
	37	RTC_MIN = 1,
	38	RTC_HOUR = 2,
	39	RTC_DAY = 3,
	40	RTC_MONTH = 4,
	41	RTC_YEAR = 5,
	42	RTC_DATA_LEN
	43	};
	44
	45	struct da9063_compatible_rtc_regmap {
	46	/* REGS */
	47	int rtc_enable_reg;
	48	int rtc_enable_32k_crystal_reg;
	49	int rtc_alarm_secs_reg;
	50	int rtc_alarm_year_reg;
	51	int rtc_count_secs_reg;
	52	int rtc_count_year_reg;
	53	int rtc_event_reg;
	54	/* MASKS */
	55	int rtc_enable_mask;
	56	int rtc_crystal_mask;
	57	int rtc_event_alarm_mask;
	58	int rtc_alarm_on_mask;
	59	int rtc_alarm_status_mask;
	60	int rtc_tick_on_mask;
	61	int rtc_ready_to_read_mask;
	62	int rtc_count_sec_mask;
	63	int rtc_count_min_mask;
	64	int rtc_count_hour_mask;
	65	int rtc_count_day_mask;
	66	int rtc_count_month_mask;
	67	int rtc_count_year_mask;
	68	/* ALARM CONFIG */
	69	int rtc_data_start;
	70	int rtc_alarm_len;
	71	};
	72
	73	struct da9063_compatible_rtc {
	74	struct rtc_device *rtc_dev;
	75	struct rtc_time alarm_time;
	76	struct regmap *regmap;
	77	const struct da9063_compatible_rtc_regmap *config;
	78	bool rtc_sync;
	79	};
	80
	81	static const struct da9063_compatible_rtc_regmap da9063_ad_regs = {
	82	/* REGS */
	83	.rtc_enable_reg = DA9063_REG_CONTROL_E,
	84	.rtc_alarm_secs_reg = DA9063_AD_REG_ALARM_MI,
	85	.rtc_alarm_year_reg = DA9063_AD_REG_ALARM_Y,
	86	.rtc_count_secs_reg = DA9063_REG_COUNT_S,
	87	.rtc_count_year_reg = DA9063_REG_COUNT_Y,
	88	.rtc_event_reg = DA9063_REG_EVENT_A,
	89	/* MASKS */
	90	.rtc_enable_mask = DA9063_RTC_EN,
	91	.rtc_crystal_mask = DA9063_CRYSTAL,
	92	.rtc_enable_32k_crystal_reg = DA9063_REG_EN_32K,
	93	.rtc_event_alarm_mask = DA9063_E_ALARM,
	94	.rtc_alarm_on_mask = DA9063_ALARM_ON,
	95	.rtc_alarm_status_mask = DA9063_ALARM_STATUS_ALARM \|
	96	DA9063_ALARM_STATUS_TICK,
	97	.rtc_tick_on_mask = DA9063_TICK_ON,
	98	.rtc_ready_to_read_mask = DA9063_RTC_READ,
99	.rtc_count_sec_mask = DA9063_COUNT_SEC_MASK,
100	.rtc_count_min_mask = DA9063_COUNT_MIN_MASK,
101	.rtc_count_hour_mask = DA9063_COUNT_HOUR_MASK,
102	.rtc_count_day_mask = DA9063_COUNT_DAY_MASK,
103	.rtc_count_month_mask = DA9063_COUNT_MONTH_MASK,
104	.rtc_count_year_mask = DA9063_COUNT_YEAR_MASK,
105	/* ALARM CONFIG */
106	.rtc_data_start = RTC_MIN,
107	.rtc_alarm_len = RTC_DATA_LEN - 1,
108	};
109
110	static const struct da9063_compatible_rtc_regmap da9063_bb_regs = {
111	/* REGS */
112	.rtc_enable_reg = DA9063_REG_CONTROL_E,
113	.rtc_alarm_secs_reg = DA9063_BB_REG_ALARM_S,
114	.rtc_alarm_year_reg = DA9063_BB_REG_ALARM_Y,
115	.rtc_count_secs_reg = DA9063_REG_COUNT_S,
116	.rtc_count_year_reg = DA9063_REG_COUNT_Y,
117	.rtc_event_reg = DA9063_REG_EVENT_A,
118	/* MASKS */
119	.rtc_enable_mask = DA9063_RTC_EN,
120	.rtc_crystal_mask = DA9063_CRYSTAL,
121	.rtc_enable_32k_crystal_reg = DA9063_REG_EN_32K,
122	.rtc_event_alarm_mask = DA9063_E_ALARM,
123	.rtc_alarm_on_mask = DA9063_ALARM_ON,
124	.rtc_alarm_status_mask = DA9063_ALARM_STATUS_ALARM \|
125	DA9063_ALARM_STATUS_TICK,
126	.rtc_tick_on_mask = DA9063_TICK_ON,
127	.rtc_ready_to_read_mask = DA9063_RTC_READ,
128	.rtc_count_sec_mask = DA9063_COUNT_SEC_MASK,
129	.rtc_count_min_mask = DA9063_COUNT_MIN_MASK,
130	.rtc_count_hour_mask = DA9063_COUNT_HOUR_MASK,
131	.rtc_count_day_mask = DA9063_COUNT_DAY_MASK,
132	.rtc_count_month_mask = DA9063_COUNT_MONTH_MASK,
133	.rtc_count_year_mask = DA9063_COUNT_YEAR_MASK,
134	/* ALARM CONFIG */
135	.rtc_data_start = RTC_SEC,
136	.rtc_alarm_len = RTC_DATA_LEN,
137	};
138
139	static const struct da9063_compatible_rtc_regmap da9062_aa_regs = {
140	/* REGS */
141	.rtc_enable_reg = DA9062AA_CONTROL_E,
142	.rtc_alarm_secs_reg = DA9062AA_ALARM_S,
143	.rtc_alarm_year_reg = DA9062AA_ALARM_Y,
144	.rtc_count_secs_reg = DA9062AA_COUNT_S,
145	.rtc_count_year_reg = DA9062AA_COUNT_Y,
146	.rtc_event_reg = DA9062AA_EVENT_A,
147	/* MASKS */
148	.rtc_enable_mask = DA9062AA_RTC_EN_MASK,
149	.rtc_crystal_mask = DA9062AA_CRYSTAL_MASK,
150	.rtc_enable_32k_crystal_reg = DA9062AA_EN_32K,
151	.rtc_event_alarm_mask = DA9062AA_M_ALARM_MASK,
152	.rtc_alarm_on_mask = DA9062AA_ALARM_ON_MASK,
153	.rtc_alarm_status_mask = (0x02 << 6),
154	.rtc_tick_on_mask = DA9062AA_TICK_ON_MASK,
155	.rtc_ready_to_read_mask = DA9062AA_RTC_READ_MASK,
156	.rtc_count_sec_mask = DA9062AA_COUNT_SEC_MASK,
157	.rtc_count_min_mask = DA9062AA_COUNT_MIN_MASK,
158	.rtc_count_hour_mask = DA9062AA_COUNT_HOUR_MASK,
159	.rtc_count_day_mask = DA9062AA_COUNT_DAY_MASK,
160	.rtc_count_month_mask = DA9062AA_COUNT_MONTH_MASK,
161	.rtc_count_year_mask = DA9062AA_COUNT_YEAR_MASK,
162	/* ALARM CONFIG */
163	.rtc_data_start = RTC_SEC,
164	.rtc_alarm_len = RTC_DATA_LEN,
165	};
166
167	static const struct of_device_id da9063_compatible_reg_id_table[] = {
168	{ .compatible = "dlg,da9063-rtc", .data = &da9063_bb_regs },
169	{ .compatible = "dlg,da9062-rtc", .data = &da9062_aa_regs },
170	{ },
c2a57550	171	};
73798d5c	172	MODULE_DEVICE_TABLE(of, da9063_compatible_reg_id_table);
c2a57550	173
80ca3277 T	174	static void da9063_data_to_tm(u8 data, struct rtc_time tm,
80ca3277 T	175	struct da9063_compatible_rtc *rtc)
c2a57550	176	{
80ca3277 T	177	const struct da9063_compatible_rtc_regmap *config = rtc->config;
	178
	179	tm->tm_sec = data[RTC_SEC] & config->rtc_count_sec_mask;
	180	tm->tm_min = data[RTC_MIN] & config->rtc_count_min_mask;
	181	tm->tm_hour = data[RTC_HOUR] & config->rtc_count_hour_mask;
	182	tm->tm_mday = data[RTC_DAY] & config->rtc_count_day_mask;
c2a57550	183	tm->tm_mon = MONTHS_FROM_DA9063(data[RTC_MONTH] &
80ca3277	184	config->rtc_count_month_mask);
c2a57550	185	tm->tm_year = YEARS_FROM_DA9063(data[RTC_YEAR] &
80ca3277	186	config->rtc_count_year_mask);
c2a57550 OST	187	}
c2a57550 OST	188
80ca3277 T	189	static void da9063_tm_to_data(struct rtc_time tm, u8 data,
80ca3277 T	190	struct da9063_compatible_rtc *rtc)
c2a57550	191	{
80ca3277 T	192	const struct da9063_compatible_rtc_regmap *config = rtc->config;
80ca3277 T	193
2ad2c174 ES	194	data[RTC_SEC] = tm->tm_sec & config->rtc_count_sec_mask;
	195	data[RTC_MIN] = tm->tm_min & config->rtc_count_min_mask;
	196	data[RTC_HOUR] = tm->tm_hour & config->rtc_count_hour_mask;
	197	data[RTC_DAY] = tm->tm_mday & config->rtc_count_day_mask;
	198	data[RTC_MONTH] = MONTHS_TO_DA9063(tm->tm_mon) &
80ca3277	199	config->rtc_count_month_mask;
2ad2c174	200	data[RTC_YEAR] = YEARS_TO_DA9063(tm->tm_year) &
80ca3277	201	config->rtc_count_year_mask;
c2a57550 OST	202	}
	203
	204	static int da9063_rtc_stop_alarm(struct device *dev)
	205	{
80ca3277 T	206	struct da9063_compatible_rtc *rtc = dev_get_drvdata(dev);
80ca3277 T	207	const struct da9063_compatible_rtc_regmap *config = rtc->config;
c2a57550	208
80ca3277 T	209	return regmap_update_bits(rtc->regmap,
	210	config->rtc_alarm_year_reg,
	211	config->rtc_alarm_on_mask,
	212	0);
c2a57550 OST	213	}
	214
	215	static int da9063_rtc_start_alarm(struct device *dev)
	216	{
80ca3277 T	217	struct da9063_compatible_rtc *rtc = dev_get_drvdata(dev);
80ca3277 T	218	const struct da9063_compatible_rtc_regmap *config = rtc->config;
c2a57550	219
80ca3277 T	220	return regmap_update_bits(rtc->regmap,
	221	config->rtc_alarm_year_reg,
	222	config->rtc_alarm_on_mask,
	223	config->rtc_alarm_on_mask);
c2a57550 OST	224	}
	225
	226	static int da9063_rtc_read_time(struct device dev, struct rtc_time tm)
	227	{
80ca3277 T	228	struct da9063_compatible_rtc *rtc = dev_get_drvdata(dev);
80ca3277 T	229	const struct da9063_compatible_rtc_regmap *config = rtc->config;
c2a57550 OST	230	unsigned long tm_secs;
	231	unsigned long al_secs;
	232	u8 data[RTC_DATA_LEN];
	233	int ret;
	234
80ca3277 T	235	ret = regmap_bulk_read(rtc->regmap,
80ca3277 T	236	config->rtc_count_secs_reg,
c2a57550 OST	237	data, RTC_DATA_LEN);
	238	if (ret < 0) {
	239	dev_err(dev, "Failed to read RTC time data: %d\n", ret);
	240	return ret;
	241	}
	242
80ca3277	243	if (!(data[RTC_SEC] & config->rtc_ready_to_read_mask)) {
c2a57550 OST	244	dev_dbg(dev, "RTC not yet ready to be read by the host\n");
	245	return -EINVAL;
	246	}
	247
80ca3277	248	da9063_data_to_tm(data, tm, rtc);
c2a57550 OST	249
	250	rtc_tm_to_time(tm, &tm_secs);
	251	rtc_tm_to_time(&rtc->alarm_time, &al_secs);
	252
	253	/* handle the rtc synchronisation delay */
	254	if (rtc->rtc_sync == true && al_secs - tm_secs == 1)
	255	memcpy(tm, &rtc->alarm_time, sizeof(struct rtc_time));
	256	else
	257	rtc->rtc_sync = false;
	258
bb54be13	259	return 0;
c2a57550 OST	260	}
	261
	262	static int da9063_rtc_set_time(struct device dev, struct rtc_time tm)
	263	{
80ca3277 T	264	struct da9063_compatible_rtc *rtc = dev_get_drvdata(dev);
80ca3277 T	265	const struct da9063_compatible_rtc_regmap *config = rtc->config;
c2a57550 OST	266	u8 data[RTC_DATA_LEN];
	267	int ret;
	268
80ca3277 T	269	da9063_tm_to_data(tm, data, rtc);
	270	ret = regmap_bulk_write(rtc->regmap,
	271	config->rtc_count_secs_reg,
c2a57550 OST	272	data, RTC_DATA_LEN);
	273	if (ret < 0)
	274	dev_err(dev, "Failed to set RTC time data: %d\n", ret);
	275
	276	return ret;
	277	}
	278
	279	static int da9063_rtc_read_alarm(struct device dev, struct rtc_wkalrm alrm)
	280	{
80ca3277 T	281	struct da9063_compatible_rtc *rtc = dev_get_drvdata(dev);
80ca3277 T	282	const struct da9063_compatible_rtc_regmap *config = rtc->config;
c2a57550 OST	283	u8 data[RTC_DATA_LEN];
	284	int ret;
	285	unsigned int val;
	286
9cb42e2a	287	data[RTC_SEC] = 0;
80ca3277 T	288	ret = regmap_bulk_read(rtc->regmap,
	289	config->rtc_alarm_secs_reg,
	290	&data[config->rtc_data_start],
	291	config->rtc_alarm_len);
c2a57550 OST	292	if (ret < 0)
	293	return ret;
	294
80ca3277	295	da9063_data_to_tm(data, &alrm->time, rtc);
c2a57550	296
80ca3277	297	alrm->enabled = !!(data[RTC_YEAR] & config->rtc_alarm_on_mask);
c2a57550	298
80ca3277 T	299	ret = regmap_read(rtc->regmap,
	300	config->rtc_event_reg,
	301	&val);
c2a57550 OST	302	if (ret < 0)
	303	return ret;
	304
80ca3277	305	if (val & config->rtc_event_alarm_mask)
c2a57550 OST	306	alrm->pending = 1;
	307	else
	308	alrm->pending = 0;
	309
	310	return 0;
	311	}
	312
	313	static int da9063_rtc_set_alarm(struct device dev, struct rtc_wkalrm alrm)
	314	{
80ca3277 T	315	struct da9063_compatible_rtc *rtc = dev_get_drvdata(dev);
80ca3277 T	316	const struct da9063_compatible_rtc_regmap *config = rtc->config;
c2a57550 OST	317	u8 data[RTC_DATA_LEN];
	318	int ret;
	319
80ca3277	320	da9063_tm_to_data(&alrm->time, data, rtc);
c2a57550 OST	321
	322	ret = da9063_rtc_stop_alarm(dev);
	323	if (ret < 0) {
	324	dev_err(dev, "Failed to stop alarm: %d\n", ret);
	325	return ret;
	326	}
	327
80ca3277 T	328	ret = regmap_bulk_write(rtc->regmap,
	329	config->rtc_alarm_secs_reg,
	330	&data[config->rtc_data_start],
	331	config->rtc_alarm_len);
c2a57550 OST	332	if (ret < 0) {
	333	dev_err(dev, "Failed to write alarm: %d\n", ret);
	334	return ret;
	335	}
	336
80ca3277	337	da9063_data_to_tm(data, &rtc->alarm_time, rtc);
c2a57550 OST	338
	339	if (alrm->enabled) {
	340	ret = da9063_rtc_start_alarm(dev);
	341	if (ret < 0) {
	342	dev_err(dev, "Failed to start alarm: %d\n", ret);
	343	return ret;
	344	}
	345	}
	346
	347	return ret;
	348	}
	349
80ca3277 T	350	static int da9063_rtc_alarm_irq_enable(struct device *dev,
80ca3277 T	351	unsigned int enabled)
c2a57550 OST	352	{
	353	if (enabled)
	354	return da9063_rtc_start_alarm(dev);
	355	else
	356	return da9063_rtc_stop_alarm(dev);
	357	}
	358
	359	static irqreturn_t da9063_alarm_event(int irq, void *data)
	360	{
80ca3277 T	361	struct da9063_compatible_rtc *rtc = data;
80ca3277 T	362	const struct da9063_compatible_rtc_regmap *config = rtc->config;
c2a57550	363
80ca3277 T	364	regmap_update_bits(rtc->regmap,
	365	config->rtc_alarm_year_reg,
	366	config->rtc_alarm_on_mask,
	367	0);
c2a57550 OST	368
	369	rtc->rtc_sync = true;
	370	rtc_update_irq(rtc->rtc_dev, 1, RTC_IRQF \| RTC_AF);
	371
	372	return IRQ_HANDLED;
	373	}
	374
	375	static const struct rtc_class_ops da9063_rtc_ops = {
	376	.read_time = da9063_rtc_read_time,
	377	.set_time = da9063_rtc_set_time,
	378	.read_alarm = da9063_rtc_read_alarm,
	379	.set_alarm = da9063_rtc_set_alarm,
	380	.alarm_irq_enable = da9063_rtc_alarm_irq_enable,
	381	};
	382
	383	static int da9063_rtc_probe(struct platform_device *pdev)
	384	{
80ca3277 T	385	struct da9063_compatible_rtc *rtc;
	386	const struct da9063_compatible_rtc_regmap *config;
	387	const struct of_device_id *match;
c2a57550 OST	388	int irq_alarm;
	389	u8 data[RTC_DATA_LEN];
	390	int ret;
	391
80ca3277 T	392	if (!pdev->dev.of_node)
80ca3277 T	393	return -ENXIO;
c2a57550	394
80ca3277 T	395	match = of_match_node(da9063_compatible_reg_id_table,
80ca3277 T	396	pdev->dev.of_node);
c2a57550	397
9cb42e2a OST	398	rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
	399	if (!rtc)
	400	return -ENOMEM;
	401
80ca3277 T	402	rtc->config = match->data;
	403	if (of_device_is_compatible(pdev->dev.of_node, "dlg,da9063-rtc")) {
	404	struct da9063 *chip = dev_get_drvdata(pdev->dev.parent);
	405
	406	if (chip->variant_code == PMIC_DA9063_AD)
	407	rtc->config = &da9063_ad_regs;
9cb42e2a OST	408	}
9cb42e2a OST	409
80ca3277 T	410	rtc->regmap = dev_get_regmap(pdev->dev.parent, NULL);
	411	if (!rtc->regmap) {
	412	dev_warn(&pdev->dev, "Parent regmap unavailable.\n");
	413	return -ENXIO;
	414	}
	415
	416	config = rtc->config;
	417	ret = regmap_update_bits(rtc->regmap,
	418	config->rtc_enable_reg,
	419	config->rtc_enable_mask,
	420	config->rtc_enable_mask);
	421	if (ret < 0) {
	422	dev_err(&pdev->dev, "Failed to enable RTC\n");
	423	return ret;
	424	}
	425
	426	ret = regmap_update_bits(rtc->regmap,
	427	config->rtc_enable_32k_crystal_reg,
	428	config->rtc_crystal_mask,
	429	config->rtc_crystal_mask);
	430	if (ret < 0) {
	431	dev_err(&pdev->dev, "Failed to run 32kHz oscillator\n");
	432	return ret;
	433	}
	434
	435	ret = regmap_update_bits(rtc->regmap,
	436	config->rtc_alarm_secs_reg,
	437	config->rtc_alarm_status_mask,
	438	0);
c2a57550 OST	439	if (ret < 0) {
c2a57550 OST	440	dev_err(&pdev->dev, "Failed to access RTC alarm register\n");
80ca3277	441	return ret;
c2a57550 OST	442	}
c2a57550 OST	443
80ca3277 T	444	ret = regmap_update_bits(rtc->regmap,
80ca3277 T	445	config->rtc_alarm_secs_reg,
c2a57550 OST	446	DA9063_ALARM_STATUS_ALARM,
	447	DA9063_ALARM_STATUS_ALARM);
	448	if (ret < 0) {
	449	dev_err(&pdev->dev, "Failed to access RTC alarm register\n");
80ca3277	450	return ret;
c2a57550 OST	451	}
c2a57550 OST	452
80ca3277 T	453	ret = regmap_update_bits(rtc->regmap,
	454	config->rtc_alarm_year_reg,
	455	config->rtc_tick_on_mask,
	456	0);
c2a57550 OST	457	if (ret < 0) {
c2a57550 OST	458	dev_err(&pdev->dev, "Failed to disable TICKs\n");
80ca3277	459	return ret;
c2a57550 OST	460	}
c2a57550 OST	461
9cb42e2a	462	data[RTC_SEC] = 0;
80ca3277 T	463	ret = regmap_bulk_read(rtc->regmap,
	464	config->rtc_alarm_secs_reg,
	465	&data[config->rtc_data_start],
	466	config->rtc_alarm_len);
c2a57550 OST	467	if (ret < 0) {
	468	dev_err(&pdev->dev, "Failed to read initial alarm data: %d\n",
	469	ret);
80ca3277	470	return ret;
c2a57550 OST	471	}
c2a57550 OST	472
c2a57550 OST	473	platform_set_drvdata(pdev, rtc);
c2a57550 OST	474
77535ace ST	475	rtc->rtc_dev = devm_rtc_device_register(&pdev->dev, DA9063_DRVNAME_RTC,
	476	&da9063_rtc_ops, THIS_MODULE);
	477	if (IS_ERR(rtc->rtc_dev))
	478	return PTR_ERR(rtc->rtc_dev);
	479
	480	da9063_data_to_tm(data, &rtc->alarm_time, rtc);
	481	rtc->rtc_sync = false;
	482
c2a57550 OST	483	irq_alarm = platform_get_irq_byname(pdev, "ALARM");
	484	ret = devm_request_threaded_irq(&pdev->dev, irq_alarm, NULL,
	485	da9063_alarm_event,
	486	IRQF_TRIGGER_LOW \| IRQF_ONESHOT,
	487	"ALARM", rtc);
77535ace	488	if (ret)
c2a57550 OST	489	dev_err(&pdev->dev, "Failed to request ALARM IRQ %d: %d\n",
c2a57550 OST	490	irq_alarm, ret);
c2a57550	491
c2a57550 OST	492	return ret;
	493	}
	494
	495	static struct platform_driver da9063_rtc_driver = {
	496	.probe = da9063_rtc_probe,
	497	.driver = {
	498	.name = DA9063_DRVNAME_RTC,
80ca3277	499	.of_match_table = da9063_compatible_reg_id_table,
c2a57550 OST	500	},
	501	};
	502
	503	module_platform_driver(da9063_rtc_driver);
	504
	505	MODULE_AUTHOR("S Twiss <[email protected]>");
	506	MODULE_DESCRIPTION("Real time clock device driver for Dialog DA9063");
ce006ca6	507	MODULE_LICENSE("GPL");
c2a57550	508	MODULE_ALIAS("platform:" DA9063_DRVNAME_RTC);