[linux.git] / drivers / bcma / core.c

/*
 * Broadcom specific AMBA
 * Core ops
 *
 * Licensed under the GNU/GPL. See COPYING for details.
 */

#include "bcma_private.h"
#include <linux/export.h>
#include <linux/bcma/bcma.h>

static bool bcma_core_wait_value(struct bcma_device *core, u16 reg, u32 mask,
				 u32 value, int timeout)
{
	unsigned long deadline = jiffies + timeout;
	u32 val;

	do {
		val = bcma_aread32(core, reg);
		if ((val & mask) == value)
			return true;
		cpu_relax();
		udelay(10);
	} while (!time_after_eq(jiffies, deadline));

	bcma_warn(core->bus, "Timeout waiting for register 0x%04X!\n", reg);

	return false;
}

bool bcma_core_is_enabled(struct bcma_device *core)
{
	if ((bcma_aread32(core, BCMA_IOCTL) & (BCMA_IOCTL_CLK | BCMA_IOCTL_FGC))
	    != BCMA_IOCTL_CLK)
		return false;
	if (bcma_aread32(core, BCMA_RESET_CTL) & BCMA_RESET_CTL_RESET)
		return false;
	return true;
}
EXPORT_SYMBOL_GPL(bcma_core_is_enabled);

void bcma_core_disable(struct bcma_device *core, u32 flags)
{
	if (bcma_aread32(core, BCMA_RESET_CTL) & BCMA_RESET_CTL_RESET)
		return;

	bcma_core_wait_value(core, BCMA_RESET_ST, ~0, 0, 300);

	bcma_awrite32(core, BCMA_RESET_CTL, BCMA_RESET_CTL_RESET);
	bcma_aread32(core, BCMA_RESET_CTL);
	udelay(1);

	bcma_awrite32(core, BCMA_IOCTL, flags);
	bcma_aread32(core, BCMA_IOCTL);
	udelay(10);
}
EXPORT_SYMBOL_GPL(bcma_core_disable);

int bcma_core_enable(struct bcma_device *core, u32 flags)
{
	bcma_core_disable(core, flags);

	bcma_awrite32(core, BCMA_IOCTL, (BCMA_IOCTL_CLK | BCMA_IOCTL_FGC | flags));
	bcma_aread32(core, BCMA_IOCTL);

	bcma_awrite32(core, BCMA_RESET_CTL, 0);
	bcma_aread32(core, BCMA_RESET_CTL);
	udelay(1);

	bcma_awrite32(core, BCMA_IOCTL, (BCMA_IOCTL_CLK | flags));
	bcma_aread32(core, BCMA_IOCTL);
	udelay(1);

	return 0;
}
EXPORT_SYMBOL_GPL(bcma_core_enable);

void bcma_core_set_clockmode(struct bcma_device *core,
			     enum bcma_clkmode clkmode)
{
	u16 i;

	WARN_ON(core->id.id != BCMA_CORE_CHIPCOMMON &&
		core->id.id != BCMA_CORE_PCIE &&
		core->id.id != BCMA_CORE_80211);

	switch (clkmode) {
	case BCMA_CLKMODE_FAST:
		bcma_set32(core, BCMA_CLKCTLST, BCMA_CLKCTLST_FORCEHT);
		usleep_range(64, 300);
		for (i = 0; i < 1500; i++) {
			if (bcma_read32(core, BCMA_CLKCTLST) &
			    BCMA_CLKCTLST_HAVEHT) {
				i = 0;
				break;
			}
			udelay(10);
		}
		if (i)
			bcma_err(core->bus, "HT force timeout\n");
		break;
	case BCMA_CLKMODE_DYNAMIC:
		bcma_set32(core, BCMA_CLKCTLST, ~BCMA_CLKCTLST_FORCEHT);
		break;
	}
}
EXPORT_SYMBOL_GPL(bcma_core_set_clockmode);

void bcma_core_pll_ctl(struct bcma_device *core, u32 req, u32 status, bool on)
{
	u16 i;

	WARN_ON(req & ~BCMA_CLKCTLST_EXTRESREQ);
	WARN_ON(status & ~BCMA_CLKCTLST_EXTRESST);

	if (on) {
		bcma_set32(core, BCMA_CLKCTLST, req);
		for (i = 0; i < 10000; i++) {
			if ((bcma_read32(core, BCMA_CLKCTLST) & status) ==
			    status) {
				i = 0;
				break;
			}
			udelay(10);
		}
		if (i)
			bcma_err(core->bus, "PLL enable timeout\n");
	} else {
		/*
		 * Mask the PLL but don't wait for it to be disabled. PLL may be
		 * shared between cores and will be still up if there is another
		 * core using it.
		 */
		bcma_mask32(core, BCMA_CLKCTLST, ~req);
		bcma_read32(core, BCMA_CLKCTLST);
	}
}
EXPORT_SYMBOL_GPL(bcma_core_pll_ctl);

u32 bcma_core_dma_translation(struct bcma_device *core)
{
	switch (core->bus->hosttype) {
	case BCMA_HOSTTYPE_SOC:
		return 0;
	case BCMA_HOSTTYPE_PCI:
		if (bcma_aread32(core, BCMA_IOST) & BCMA_IOST_DMA64)
			return BCMA_DMA_TRANSLATION_DMA64_CMT;
		else
			return BCMA_DMA_TRANSLATION_DMA32_CMT;
	default:
		bcma_err(core->bus, "DMA translation unknown for host %d\n",
			 core->bus->hosttype);
	}
	return BCMA_DMA_TRANSLATION_NONE;
}
EXPORT_SYMBOL(bcma_core_dma_translation);
Commit	Line	Data
8369ae33 RM	1	/*
	2	* Broadcom specific AMBA
	3	* Core ops
	4	*
	5	* Licensed under the GNU/GPL. See COPYING for details.
	6	*/
	7
	8	#include "bcma_private.h"
44a8e377	9	#include <linux/export.h>
8369ae33 RM	10	#include <linux/bcma/bcma.h>
8369ae33 RM	11
972da7ec RM	12	static bool bcma_core_wait_value(struct bcma_device *core, u16 reg, u32 mask,
	13	u32 value, int timeout)
	14	{
	15	unsigned long deadline = jiffies + timeout;
	16	u32 val;
	17
	18	do {
	19	val = bcma_aread32(core, reg);
	20	if ((val & mask) == value)
	21	return true;
	22	cpu_relax();
	23	udelay(10);
	24	} while (!time_after_eq(jiffies, deadline));
	25
	26	bcma_warn(core->bus, "Timeout waiting for register 0x%04X!\n", reg);
	27
	28	return false;
	29	}
	30
8369ae33 RM	31	bool bcma_core_is_enabled(struct bcma_device *core)
	32	{
	33	if ((bcma_aread32(core, BCMA_IOCTL) & (BCMA_IOCTL_CLK \| BCMA_IOCTL_FGC))
	34	!= BCMA_IOCTL_CLK)
	35	return false;
	36	if (bcma_aread32(core, BCMA_RESET_CTL) & BCMA_RESET_CTL_RESET)
	37	return false;
	38	return true;
	39	}
	40	EXPORT_SYMBOL_GPL(bcma_core_is_enabled);
	41
e3ae0cac	42	void bcma_core_disable(struct bcma_device *core, u32 flags)
8369ae33 RM	43	{
	44	if (bcma_aread32(core, BCMA_RESET_CTL) & BCMA_RESET_CTL_RESET)
	45	return;
	46
972da7ec	47	bcma_core_wait_value(core, BCMA_RESET_ST, ~0, 0, 300);
8369ae33 RM	48
8369ae33 RM	49	bcma_awrite32(core, BCMA_RESET_CTL, BCMA_RESET_CTL_RESET);
044e68c0	50	bcma_aread32(core, BCMA_RESET_CTL);
8369ae33	51	udelay(1);
972da7ec RM	52
	53	bcma_awrite32(core, BCMA_IOCTL, flags);
	54	bcma_aread32(core, BCMA_IOCTL);
	55	udelay(10);
8369ae33	56	}
e3ae0cac	57	EXPORT_SYMBOL_GPL(bcma_core_disable);
8369ae33 RM	58
	59	int bcma_core_enable(struct bcma_device *core, u32 flags)
	60	{
	61	bcma_core_disable(core, flags);
	62
	63	bcma_awrite32(core, BCMA_IOCTL, (BCMA_IOCTL_CLK \| BCMA_IOCTL_FGC \| flags));
	64	bcma_aread32(core, BCMA_IOCTL);
	65
	66	bcma_awrite32(core, BCMA_RESET_CTL, 0);
972da7ec	67	bcma_aread32(core, BCMA_RESET_CTL);
8369ae33 RM	68	udelay(1);
	69
	70	bcma_awrite32(core, BCMA_IOCTL, (BCMA_IOCTL_CLK \| flags));
	71	bcma_aread32(core, BCMA_IOCTL);
	72	udelay(1);
	73
	74	return 0;
	75	}
	76	EXPORT_SYMBOL_GPL(bcma_core_enable);
7424dd0d RM	77
	78	void bcma_core_set_clockmode(struct bcma_device *core,
	79	enum bcma_clkmode clkmode)
	80	{
	81	u16 i;
	82
	83	WARN_ON(core->id.id != BCMA_CORE_CHIPCOMMON &&
	84	core->id.id != BCMA_CORE_PCIE &&
	85	core->id.id != BCMA_CORE_80211);
	86
	87	switch (clkmode) {
	88	case BCMA_CLKMODE_FAST:
	89	bcma_set32(core, BCMA_CLKCTLST, BCMA_CLKCTLST_FORCEHT);
1fd41a65	90	usleep_range(64, 300);
7424dd0d RM	91	for (i = 0; i < 1500; i++) {
	92	if (bcma_read32(core, BCMA_CLKCTLST) &
	93	BCMA_CLKCTLST_HAVEHT) {
	94	i = 0;
	95	break;
	96	}
	97	udelay(10);
	98	}
	99	if (i)
3d9d8af3	100	bcma_err(core->bus, "HT force timeout\n");
7424dd0d RM	101	break;
7424dd0d RM	102	case BCMA_CLKMODE_DYNAMIC:
0b2948ee	103	bcma_set32(core, BCMA_CLKCTLST, ~BCMA_CLKCTLST_FORCEHT);
7424dd0d RM	104	break;
	105	}
	106	}
	107	EXPORT_SYMBOL_GPL(bcma_core_set_clockmode);
6f53912f RM	108
	109	void bcma_core_pll_ctl(struct bcma_device *core, u32 req, u32 status, bool on)
	110	{
	111	u16 i;
	112
	113	WARN_ON(req & ~BCMA_CLKCTLST_EXTRESREQ);
	114	WARN_ON(status & ~BCMA_CLKCTLST_EXTRESST);
	115
	116	if (on) {
	117	bcma_set32(core, BCMA_CLKCTLST, req);
	118	for (i = 0; i < 10000; i++) {
	119	if ((bcma_read32(core, BCMA_CLKCTLST) & status) ==
	120	status) {
	121	i = 0;
	122	break;
	123	}
	124	udelay(10);
	125	}
	126	if (i)
3d9d8af3	127	bcma_err(core->bus, "PLL enable timeout\n");
6f53912f	128	} else {
c722839c RM	129	/*
	130	* Mask the PLL but don't wait for it to be disabled. PLL may be
	131	* shared between cores and will be still up if there is another
	132	* core using it.
	133	*/
	134	bcma_mask32(core, BCMA_CLKCTLST, ~req);
	135	bcma_read32(core, BCMA_CLKCTLST);
6f53912f RM	136	}
	137	}
	138	EXPORT_SYMBOL_GPL(bcma_core_pll_ctl);
05aec233 RM	139
	140	u32 bcma_core_dma_translation(struct bcma_device *core)
	141	{
	142	switch (core->bus->hosttype) {
ecd177c2 HM	143	case BCMA_HOSTTYPE_SOC:
ecd177c2 HM	144	return 0;
05aec233 RM	145	case BCMA_HOSTTYPE_PCI:
	146	if (bcma_aread32(core, BCMA_IOST) & BCMA_IOST_DMA64)
	147	return BCMA_DMA_TRANSLATION_DMA64_CMT;
	148	else
	149	return BCMA_DMA_TRANSLATION_DMA32_CMT;
	150	default:
3d9d8af3 RM	151	bcma_err(core->bus, "DMA translation unknown for host %d\n",
3d9d8af3 RM	152	core->bus->hosttype);
05aec233 RM	153	}
	154	return BCMA_DMA_TRANSLATION_NONE;
	155	}
	156	EXPORT_SYMBOL(bcma_core_dma_translation);