[linux.git] / arch / arm / mach-mmp / clock.h

/*
 *  linux/arch/arm/mach-mmp/clock.h
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License version 2 as
 *  published by the Free Software Foundation.
 */

#include <linux/clkdev.h>

struct clkops {
	void			(*enable)(struct clk *);
	void			(*disable)(struct clk *);
	unsigned long		(*getrate)(struct clk *);
	int			(*setrate)(struct clk *, unsigned long);
};

struct clk {
	const struct clkops	*ops;

	void __iomem	*clk_rst;	/* clock reset control register */
	int		fnclksel;	/* functional clock select (APBC) */
	uint32_t	enable_val;	/* value for clock enable (APMU) */
	unsigned long	rate;
	int		enabled;
};

extern struct clkops apbc_clk_ops;
extern struct clkops apmu_clk_ops;

#define APBC_CLK(_name, _reg, _fnclksel, _rate)			\
struct clk clk_##_name = {					\
		.clk_rst	= APBC_##_reg,			\
		.fnclksel	= _fnclksel,			\
		.rate		= _rate,			\
		.ops		= &apbc_clk_ops,		\
}

#define APBC_CLK_OPS(_name, _reg, _fnclksel, _rate, _ops)	\
struct clk clk_##_name = {					\
		.clk_rst	= APBC_##_reg,			\
		.fnclksel	= _fnclksel,			\
		.rate		= _rate,			\
		.ops		= _ops,				\
}

#define APMU_CLK(_name, _reg, _eval, _rate)			\
struct clk clk_##_name = {					\
		.clk_rst	= APMU_##_reg,			\
		.enable_val	= _eval,			\
		.rate		= _rate,			\
		.ops		= &apmu_clk_ops,		\
}

#define APMU_CLK_OPS(_name, _reg, _eval, _rate, _ops)		\
struct clk clk_##_name = {					\
		.clk_rst	= APMU_##_reg,			\
		.enable_val	= _eval,			\
		.rate		= _rate,			\
		.ops		= _ops,				\
}

#define INIT_CLKREG(_clk, _devname, _conname)			\
	{							\
		.clk		= _clk,				\
		.dev_id		= _devname,			\
		.con_id		= _conname,			\
	}

extern struct clk clk_pxa168_gpio;
extern struct clk clk_pxa168_timers;
Commit	Line	Data
49cbe786 EM	1	/*
	2	* linux/arch/arm/mach-mmp/clock.h
	3	*
	4	* This program is free software; you can redistribute it and/or modify
	5	* it under the terms of the GNU General Public License version 2 as
	6	* published by the Free Software Foundation.
	7	*/
	8
6d803ba7	9	#include <linux/clkdev.h>
49cbe786 EM	10
	11	struct clkops {
	12	void (enable)(struct clk );
	13	void (disable)(struct clk );
	14	unsigned long (getrate)(struct clk );
52585ccd	15	int (setrate)(struct clk , unsigned long);
49cbe786 EM	16	};
	17
	18	struct clk {
	19	const struct clkops *ops;
	20
	21	void __iomem clk_rst; / clock reset control register */
	22	int fnclksel; /* functional clock select (APBC) */
	23	uint32_t enable_val; /* value for clock enable (APMU) */
	24	unsigned long rate;
	25	int enabled;
	26	};
	27
	28	extern struct clkops apbc_clk_ops;
4092855d	29	extern struct clkops apmu_clk_ops;
49cbe786 EM	30
	31	#define APBC_CLK(_name, _reg, _fnclksel, _rate) \
	32	struct clk clk_##_name = { \
97b09da4	33	.clk_rst = APBC_##_reg, \
49cbe786 EM	34	.fnclksel = _fnclksel, \
	35	.rate = _rate, \
	36	.ops = &apbc_clk_ops, \
	37	}
	38
	39	#define APBC_CLK_OPS(_name, _reg, _fnclksel, _rate, _ops) \
	40	struct clk clk_##_name = { \
97b09da4	41	.clk_rst = APBC_##_reg, \
49cbe786 EM	42	.fnclksel = _fnclksel, \
	43	.rate = _rate, \
	44	.ops = _ops, \
	45	}
	46
	47	#define APMU_CLK(_name, _reg, _eval, _rate) \
	48	struct clk clk_##_name = { \
97b09da4	49	.clk_rst = APMU_##_reg, \
49cbe786 EM	50	.enable_val = _eval, \
	51	.rate = _rate, \
	52	.ops = &apmu_clk_ops, \
	53	}
	54
	55	#define APMU_CLK_OPS(_name, _reg, _eval, _rate, _ops) \
	56	struct clk clk_##_name = { \
97b09da4	57	.clk_rst = APMU_##_reg, \
49cbe786 EM	58	.enable_val = _eval, \
	59	.rate = _rate, \
	60	.ops = _ops, \
	61	}
	62
	63	#define INIT_CLKREG(_clk, _devname, _conname) \
	64	{ \
	65	.clk = _clk, \
	66	.dev_id = _devname, \
	67	.con_id = _conname, \
	68	}
	69
	70	extern struct clk clk_pxa168_gpio;
	71	extern struct clk clk_pxa168_timers;