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Commit | Line | Data |
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b2441318 | 1 | // SPDX-License-Identifier: GPL-2.0 |
2c2e6ecf DD |
2 | /* |
3 | * cpuidle-powernv - idle state cpuidle driver. | |
4 | * Adapted from drivers/cpuidle/cpuidle-pseries | |
5 | * | |
6 | */ | |
7 | ||
8 | #include <linux/kernel.h> | |
9 | #include <linux/module.h> | |
10 | #include <linux/init.h> | |
11 | #include <linux/moduleparam.h> | |
12 | #include <linux/cpuidle.h> | |
13 | #include <linux/cpu.h> | |
14 | #include <linux/notifier.h> | |
0d948730 | 15 | #include <linux/clockchips.h> |
0888839c | 16 | #include <linux/of.h> |
92c83ff5 | 17 | #include <linux/slab.h> |
2c2e6ecf DD |
18 | |
19 | #include <asm/machdep.h> | |
20 | #include <asm/firmware.h> | |
8eb8ac89 | 21 | #include <asm/opal.h> |
591ac0cb | 22 | #include <asm/runlatch.h> |
09206b60 | 23 | #include <asm/cpuidle.h> |
2c2e6ecf | 24 | |
9e9fc6f0 GS |
25 | /* |
26 | * Expose only those Hardware idle states via the cpuidle framework | |
27 | * that have latency value below POWERNV_THRESHOLD_LATENCY_NS. | |
28 | */ | |
3005c597 SP |
29 | #define POWERNV_THRESHOLD_LATENCY_NS 200000 |
30 | ||
ed61390b | 31 | static struct cpuidle_driver powernv_idle_driver = { |
2c2e6ecf DD |
32 | .name = "powernv_idle", |
33 | .owner = THIS_MODULE, | |
34 | }; | |
35 | ||
624e46d0 NP |
36 | static int max_idle_state __read_mostly; |
37 | static struct cpuidle_state *cpuidle_state_table __read_mostly; | |
3005c597 | 38 | |
09206b60 GS |
39 | struct stop_psscr_table { |
40 | u64 val; | |
41 | u64 mask; | |
42 | }; | |
43 | ||
624e46d0 | 44 | static struct stop_psscr_table stop_psscr_table[CPUIDLE_STATE_MAX] __read_mostly; |
3005c597 | 45 | |
624e46d0 NP |
46 | static u64 snooze_timeout __read_mostly; |
47 | static bool snooze_timeout_en __read_mostly; | |
2c2e6ecf DD |
48 | |
49 | static int snooze_loop(struct cpuidle_device *dev, | |
50 | struct cpuidle_driver *drv, | |
51 | int index) | |
52 | { | |
78eaa10f SB |
53 | u64 snooze_exit_time; |
54 | ||
2c2e6ecf DD |
55 | set_thread_flag(TIF_POLLING_NRFLAG); |
56 | ||
3fc5ee92 NP |
57 | local_irq_enable(); |
58 | ||
78eaa10f | 59 | snooze_exit_time = get_tb() + snooze_timeout; |
591ac0cb | 60 | ppc64_runlatch_off(); |
26eb48a9 | 61 | HMT_very_low(); |
2c2e6ecf | 62 | while (!need_resched()) { |
7ded4291 NP |
63 | if (likely(snooze_timeout_en) && get_tb() > snooze_exit_time) { |
64 | /* | |
65 | * Task has not woken up but we are exiting the polling | |
66 | * loop anyway. Require a barrier after polling is | |
67 | * cleared to order subsequent test of need_resched(). | |
68 | */ | |
69 | clear_thread_flag(TIF_POLLING_NRFLAG); | |
70 | smp_mb(); | |
78eaa10f | 71 | break; |
7ded4291 | 72 | } |
2c2e6ecf DD |
73 | } |
74 | ||
75 | HMT_medium(); | |
591ac0cb | 76 | ppc64_runlatch_on(); |
2c2e6ecf | 77 | clear_thread_flag(TIF_POLLING_NRFLAG); |
3fc5ee92 | 78 | |
2c2e6ecf DD |
79 | return index; |
80 | } | |
81 | ||
82 | static int nap_loop(struct cpuidle_device *dev, | |
83 | struct cpuidle_driver *drv, | |
84 | int index) | |
85 | { | |
2201f994 NP |
86 | power7_idle_type(PNV_THREAD_NAP); |
87 | ||
2c2e6ecf DD |
88 | return index; |
89 | } | |
90 | ||
cc5a2f7b | 91 | /* Register for fastsleep only in oneshot mode of broadcast */ |
92 | #ifdef CONFIG_TICK_ONESHOT | |
0d948730 PM |
93 | static int fastsleep_loop(struct cpuidle_device *dev, |
94 | struct cpuidle_driver *drv, | |
95 | int index) | |
96 | { | |
97 | unsigned long old_lpcr = mfspr(SPRN_LPCR); | |
98 | unsigned long new_lpcr; | |
99 | ||
100 | if (unlikely(system_state < SYSTEM_RUNNING)) | |
101 | return index; | |
102 | ||
103 | new_lpcr = old_lpcr; | |
9b6a68d9 MN |
104 | /* Do not exit powersave upon decrementer as we've setup the timer |
105 | * offload. | |
0d948730 | 106 | */ |
9b6a68d9 | 107 | new_lpcr &= ~LPCR_PECE1; |
0d948730 PM |
108 | |
109 | mtspr(SPRN_LPCR, new_lpcr); | |
2201f994 NP |
110 | |
111 | power7_idle_type(PNV_THREAD_SLEEP); | |
0d948730 PM |
112 | |
113 | mtspr(SPRN_LPCR, old_lpcr); | |
114 | ||
115 | return index; | |
116 | } | |
cc5a2f7b | 117 | #endif |
3005c597 SP |
118 | |
119 | static int stop_loop(struct cpuidle_device *dev, | |
120 | struct cpuidle_driver *drv, | |
121 | int index) | |
122 | { | |
2201f994 | 123 | power9_idle_type(stop_psscr_table[index].val, |
09206b60 | 124 | stop_psscr_table[index].mask); |
3005c597 SP |
125 | return index; |
126 | } | |
127 | ||
2c2e6ecf DD |
128 | /* |
129 | * States for dedicated partition case. | |
130 | */ | |
169f3fae | 131 | static struct cpuidle_state powernv_states[CPUIDLE_STATE_MAX] = { |
2c2e6ecf DD |
132 | { /* Snooze */ |
133 | .name = "snooze", | |
134 | .desc = "snooze", | |
2c2e6ecf DD |
135 | .exit_latency = 0, |
136 | .target_residency = 0, | |
957efced | 137 | .enter = snooze_loop }, |
2c2e6ecf DD |
138 | }; |
139 | ||
10fcca9d | 140 | static int powernv_cpuidle_cpu_online(unsigned int cpu) |
2c2e6ecf | 141 | { |
10fcca9d | 142 | struct cpuidle_device *dev = per_cpu(cpuidle_devices, cpu); |
2c2e6ecf DD |
143 | |
144 | if (dev && cpuidle_get_driver()) { | |
10fcca9d SAS |
145 | cpuidle_pause_and_lock(); |
146 | cpuidle_enable_device(dev); | |
147 | cpuidle_resume_and_unlock(); | |
148 | } | |
149 | return 0; | |
150 | } | |
2c2e6ecf | 151 | |
10fcca9d SAS |
152 | static int powernv_cpuidle_cpu_dead(unsigned int cpu) |
153 | { | |
154 | struct cpuidle_device *dev = per_cpu(cpuidle_devices, cpu); | |
2c2e6ecf | 155 | |
10fcca9d SAS |
156 | if (dev && cpuidle_get_driver()) { |
157 | cpuidle_pause_and_lock(); | |
158 | cpuidle_disable_device(dev); | |
159 | cpuidle_resume_and_unlock(); | |
2c2e6ecf | 160 | } |
10fcca9d | 161 | return 0; |
2c2e6ecf DD |
162 | } |
163 | ||
2c2e6ecf DD |
164 | /* |
165 | * powernv_cpuidle_driver_init() | |
166 | */ | |
167 | static int powernv_cpuidle_driver_init(void) | |
168 | { | |
169 | int idle_state; | |
170 | struct cpuidle_driver *drv = &powernv_idle_driver; | |
171 | ||
172 | drv->state_count = 0; | |
173 | ||
174 | for (idle_state = 0; idle_state < max_idle_state; ++idle_state) { | |
175 | /* Is the state not enabled? */ | |
176 | if (cpuidle_state_table[idle_state].enter == NULL) | |
177 | continue; | |
178 | ||
179 | drv->states[drv->state_count] = /* structure copy */ | |
180 | cpuidle_state_table[idle_state]; | |
181 | ||
182 | drv->state_count += 1; | |
183 | } | |
184 | ||
293d264f VS |
185 | /* |
186 | * On the PowerNV platform cpu_present may be less than cpu_possible in | |
187 | * cases when firmware detects the CPU, but it is not available to the | |
188 | * OS. If CONFIG_HOTPLUG_CPU=n, then such CPUs are not hotplugable at | |
189 | * run time and hence cpu_devices are not created for those CPUs by the | |
190 | * generic topology_init(). | |
191 | * | |
192 | * drv->cpumask defaults to cpu_possible_mask in | |
193 | * __cpuidle_driver_init(). This breaks cpuidle on PowerNV where | |
194 | * cpu_devices are not created for CPUs in cpu_possible_mask that | |
195 | * cannot be hot-added later at run time. | |
196 | * | |
197 | * Trying cpuidle_register_device() on a CPU without a cpu_device is | |
198 | * incorrect, so pass a correct CPU mask to the generic cpuidle driver. | |
199 | */ | |
200 | ||
201 | drv->cpumask = (struct cpumask *)cpu_present_mask; | |
202 | ||
2c2e6ecf DD |
203 | return 0; |
204 | } | |
205 | ||
9e9fc6f0 GS |
206 | static inline void add_powernv_state(int index, const char *name, |
207 | unsigned int flags, | |
208 | int (*idle_fn)(struct cpuidle_device *, | |
209 | struct cpuidle_driver *, | |
210 | int), | |
211 | unsigned int target_residency, | |
212 | unsigned int exit_latency, | |
09206b60 | 213 | u64 psscr_val, u64 psscr_mask) |
9e9fc6f0 GS |
214 | { |
215 | strlcpy(powernv_states[index].name, name, CPUIDLE_NAME_LEN); | |
216 | strlcpy(powernv_states[index].desc, name, CPUIDLE_NAME_LEN); | |
217 | powernv_states[index].flags = flags; | |
218 | powernv_states[index].target_residency = target_residency; | |
219 | powernv_states[index].exit_latency = exit_latency; | |
220 | powernv_states[index].enter = idle_fn; | |
09206b60 GS |
221 | stop_psscr_table[index].val = psscr_val; |
222 | stop_psscr_table[index].mask = psscr_mask; | |
9e9fc6f0 GS |
223 | } |
224 | ||
ecad4502 GS |
225 | /* |
226 | * Returns 0 if prop1_len == prop2_len. Else returns -1 | |
227 | */ | |
228 | static inline int validate_dt_prop_sizes(const char *prop1, int prop1_len, | |
229 | const char *prop2, int prop2_len) | |
230 | { | |
231 | if (prop1_len == prop2_len) | |
232 | return 0; | |
233 | ||
234 | pr_warn("cpuidle-powernv: array sizes don't match for %s and %s\n", | |
235 | prop1, prop2); | |
236 | return -1; | |
237 | } | |
238 | ||
785a12af | 239 | extern u32 pnv_get_supported_cpuidle_states(void); |
0888839c PM |
240 | static int powernv_add_idle_states(void) |
241 | { | |
242 | struct device_node *power_mgt; | |
0888839c | 243 | int nr_idle_states = 1; /* Snooze */ |
ecad4502 | 244 | int dt_idle_states, count; |
957efced SP |
245 | u32 latency_ns[CPUIDLE_STATE_MAX]; |
246 | u32 residency_ns[CPUIDLE_STATE_MAX]; | |
247 | u32 flags[CPUIDLE_STATE_MAX]; | |
3005c597 | 248 | u64 psscr_val[CPUIDLE_STATE_MAX]; |
09206b60 | 249 | u64 psscr_mask[CPUIDLE_STATE_MAX]; |
3005c597 | 250 | const char *names[CPUIDLE_STATE_MAX]; |
09206b60 | 251 | u32 has_stop_states = 0; |
92c83ff5 | 252 | int i, rc; |
785a12af GS |
253 | u32 supported_flags = pnv_get_supported_cpuidle_states(); |
254 | ||
0888839c PM |
255 | |
256 | /* Currently we have snooze statically defined */ | |
257 | ||
258 | power_mgt = of_find_node_by_path("/ibm,opal/power-mgt"); | |
259 | if (!power_mgt) { | |
260 | pr_warn("opal: PowerMgmt Node not found\n"); | |
92c83ff5 | 261 | goto out; |
0888839c PM |
262 | } |
263 | ||
70734a78 PM |
264 | /* Read values of any property to determine the num of idle states */ |
265 | dt_idle_states = of_property_count_u32_elems(power_mgt, "ibm,cpu-idle-state-flags"); | |
266 | if (dt_idle_states < 0) { | |
267 | pr_warn("cpuidle-powernv: no idle states found in the DT\n"); | |
92c83ff5 | 268 | goto out; |
0888839c PM |
269 | } |
270 | ||
ecad4502 GS |
271 | count = of_property_count_u32_elems(power_mgt, |
272 | "ibm,cpu-idle-state-latencies-ns"); | |
273 | ||
274 | if (validate_dt_prop_sizes("ibm,cpu-idle-state-flags", dt_idle_states, | |
275 | "ibm,cpu-idle-state-latencies-ns", | |
276 | count) != 0) | |
277 | goto out; | |
278 | ||
279 | count = of_property_count_strings(power_mgt, | |
280 | "ibm,cpu-idle-state-names"); | |
281 | if (validate_dt_prop_sizes("ibm,cpu-idle-state-flags", dt_idle_states, | |
282 | "ibm,cpu-idle-state-names", | |
283 | count) != 0) | |
284 | goto out; | |
285 | ||
957efced SP |
286 | /* |
287 | * Since snooze is used as first idle state, max idle states allowed is | |
288 | * CPUIDLE_STATE_MAX -1 | |
289 | */ | |
290 | if (dt_idle_states > CPUIDLE_STATE_MAX - 1) { | |
291 | pr_warn("cpuidle-powernv: discovered idle states more than allowed"); | |
292 | dt_idle_states = CPUIDLE_STATE_MAX - 1; | |
293 | } | |
294 | ||
70734a78 PM |
295 | if (of_property_read_u32_array(power_mgt, |
296 | "ibm,cpu-idle-state-flags", flags, dt_idle_states)) { | |
297 | pr_warn("cpuidle-powernv : missing ibm,cpu-idle-state-flags in DT\n"); | |
957efced | 298 | goto out; |
70734a78 | 299 | } |
92c83ff5 | 300 | |
957efced SP |
301 | if (of_property_read_u32_array(power_mgt, |
302 | "ibm,cpu-idle-state-latencies-ns", latency_ns, | |
303 | dt_idle_states)) { | |
92c83ff5 | 304 | pr_warn("cpuidle-powernv: missing ibm,cpu-idle-state-latencies-ns in DT\n"); |
957efced | 305 | goto out; |
74aa51b5 | 306 | } |
3005c597 SP |
307 | if (of_property_read_string_array(power_mgt, |
308 | "ibm,cpu-idle-state-names", names, dt_idle_states) < 0) { | |
309 | pr_warn("cpuidle-powernv: missing ibm,cpu-idle-state-names in DT\n"); | |
310 | goto out; | |
311 | } | |
312 | ||
313 | /* | |
314 | * If the idle states use stop instruction, probe for psscr values | |
09206b60 | 315 | * and psscr mask which are necessary to specify required stop level. |
3005c597 | 316 | */ |
09206b60 GS |
317 | has_stop_states = (flags[0] & |
318 | (OPAL_PM_STOP_INST_FAST | OPAL_PM_STOP_INST_DEEP)); | |
319 | if (has_stop_states) { | |
ecad4502 GS |
320 | count = of_property_count_u64_elems(power_mgt, |
321 | "ibm,cpu-idle-state-psscr"); | |
322 | if (validate_dt_prop_sizes("ibm,cpu-idle-state-flags", | |
323 | dt_idle_states, | |
324 | "ibm,cpu-idle-state-psscr", | |
325 | count) != 0) | |
326 | goto out; | |
327 | ||
328 | count = of_property_count_u64_elems(power_mgt, | |
329 | "ibm,cpu-idle-state-psscr-mask"); | |
330 | if (validate_dt_prop_sizes("ibm,cpu-idle-state-flags", | |
331 | dt_idle_states, | |
332 | "ibm,cpu-idle-state-psscr-mask", | |
333 | count) != 0) | |
334 | goto out; | |
335 | ||
3005c597 SP |
336 | if (of_property_read_u64_array(power_mgt, |
337 | "ibm,cpu-idle-state-psscr", psscr_val, dt_idle_states)) { | |
09206b60 | 338 | pr_warn("cpuidle-powernv: missing ibm,cpu-idle-state-psscr in DT\n"); |
3005c597 SP |
339 | goto out; |
340 | } | |
74aa51b5 | 341 | |
09206b60 GS |
342 | if (of_property_read_u64_array(power_mgt, |
343 | "ibm,cpu-idle-state-psscr-mask", | |
344 | psscr_mask, dt_idle_states)) { | |
345 | pr_warn("cpuidle-powernv:Missing ibm,cpu-idle-state-psscr-mask in DT\n"); | |
346 | goto out; | |
347 | } | |
348 | } | |
349 | ||
ecad4502 GS |
350 | count = of_property_count_u32_elems(power_mgt, |
351 | "ibm,cpu-idle-state-residency-ns"); | |
352 | ||
353 | if (count < 0) { | |
354 | rc = count; | |
355 | } else if (validate_dt_prop_sizes("ibm,cpu-idle-state-flags", | |
356 | dt_idle_states, | |
357 | "ibm,cpu-idle-state-residency-ns", | |
358 | count) != 0) { | |
359 | goto out; | |
360 | } else { | |
361 | rc = of_property_read_u32_array(power_mgt, | |
362 | "ibm,cpu-idle-state-residency-ns", | |
363 | residency_ns, dt_idle_states); | |
364 | } | |
0888839c PM |
365 | |
366 | for (i = 0; i < dt_idle_states; i++) { | |
9e9fc6f0 | 367 | unsigned int exit_latency, target_residency; |
f9122ee4 | 368 | bool stops_timebase = false; |
785a12af GS |
369 | |
370 | /* | |
371 | * Skip the platform idle state whose flag isn't in | |
372 | * the supported_cpuidle_states flag mask. | |
373 | */ | |
374 | if ((flags[i] & supported_flags) != flags[i]) | |
375 | continue; | |
3005c597 SP |
376 | /* |
377 | * If an idle state has exit latency beyond | |
378 | * POWERNV_THRESHOLD_LATENCY_NS then don't use it | |
379 | * in cpu-idle. | |
380 | */ | |
381 | if (latency_ns[i] > POWERNV_THRESHOLD_LATENCY_NS) | |
382 | continue; | |
9e9fc6f0 GS |
383 | /* |
384 | * Firmware passes residency and latency values in ns. | |
385 | * cpuidle expects it in us. | |
386 | */ | |
8d4e10e9 | 387 | exit_latency = DIV_ROUND_UP(latency_ns[i], 1000); |
9e9fc6f0 | 388 | if (!rc) |
8d4e10e9 | 389 | target_residency = DIV_ROUND_UP(residency_ns[i], 1000); |
9e9fc6f0 GS |
390 | else |
391 | target_residency = 0; | |
0888839c | 392 | |
09206b60 GS |
393 | if (has_stop_states) { |
394 | int err = validate_psscr_val_mask(&psscr_val[i], | |
395 | &psscr_mask[i], | |
396 | flags[i]); | |
397 | if (err) { | |
398 | report_invalid_psscr_val(psscr_val[i], err); | |
399 | continue; | |
400 | } | |
401 | } | |
402 | ||
f9122ee4 GS |
403 | if (flags[i] & OPAL_PM_TIMEBASE_STOP) |
404 | stops_timebase = true; | |
405 | ||
92c83ff5 | 406 | /* |
9e9fc6f0 GS |
407 | * For nap and fastsleep, use default target_residency |
408 | * values if f/w does not expose it. | |
74aa51b5 | 409 | */ |
70734a78 | 410 | if (flags[i] & OPAL_PM_NAP_ENABLED) { |
9e9fc6f0 GS |
411 | if (!rc) |
412 | target_residency = 100; | |
0888839c | 413 | /* Add NAP state */ |
9e9fc6f0 GS |
414 | add_powernv_state(nr_idle_states, "Nap", |
415 | CPUIDLE_FLAG_NONE, nap_loop, | |
09206b60 | 416 | target_residency, exit_latency, 0, 0); |
f9122ee4 | 417 | } else if (has_stop_states && !stops_timebase) { |
9e9fc6f0 GS |
418 | add_powernv_state(nr_idle_states, names[i], |
419 | CPUIDLE_FLAG_NONE, stop_loop, | |
420 | target_residency, exit_latency, | |
09206b60 | 421 | psscr_val[i], psscr_mask[i]); |
cc5a2f7b | 422 | } |
423 | ||
424 | /* | |
425 | * All cpuidle states with CPUIDLE_FLAG_TIMER_STOP set must come | |
426 | * within this config dependency check. | |
427 | */ | |
428 | #ifdef CONFIG_TICK_ONESHOT | |
f9122ee4 GS |
429 | else if (flags[i] & OPAL_PM_SLEEP_ENABLED || |
430 | flags[i] & OPAL_PM_SLEEP_ENABLED_ER1) { | |
9e9fc6f0 GS |
431 | if (!rc) |
432 | target_residency = 300000; | |
0888839c | 433 | /* Add FASTSLEEP state */ |
9e9fc6f0 GS |
434 | add_powernv_state(nr_idle_states, "FastSleep", |
435 | CPUIDLE_FLAG_TIMER_STOP, | |
436 | fastsleep_loop, | |
09206b60 | 437 | target_residency, exit_latency, 0, 0); |
f9122ee4 | 438 | } else if (has_stop_states && stops_timebase) { |
9e9fc6f0 GS |
439 | add_powernv_state(nr_idle_states, names[i], |
440 | CPUIDLE_FLAG_TIMER_STOP, stop_loop, | |
441 | target_residency, exit_latency, | |
09206b60 | 442 | psscr_val[i], psscr_mask[i]); |
0888839c | 443 | } |
cc5a2f7b | 444 | #endif |
f9122ee4 GS |
445 | else |
446 | continue; | |
92c83ff5 | 447 | nr_idle_states++; |
0888839c | 448 | } |
92c83ff5 | 449 | out: |
0888839c PM |
450 | return nr_idle_states; |
451 | } | |
452 | ||
2c2e6ecf DD |
453 | /* |
454 | * powernv_idle_probe() | |
455 | * Choose state table for shared versus dedicated partition | |
456 | */ | |
457 | static int powernv_idle_probe(void) | |
458 | { | |
2c2e6ecf DD |
459 | if (cpuidle_disable != IDLE_NO_OVERRIDE) |
460 | return -ENODEV; | |
461 | ||
e4d54f71 | 462 | if (firmware_has_feature(FW_FEATURE_OPAL)) { |
2c2e6ecf | 463 | cpuidle_state_table = powernv_states; |
0888839c PM |
464 | /* Device tree can indicate more idle states */ |
465 | max_idle_state = powernv_add_idle_states(); | |
78eaa10f SB |
466 | if (max_idle_state > 1) { |
467 | snooze_timeout_en = true; | |
468 | snooze_timeout = powernv_states[1].target_residency * | |
469 | tb_ticks_per_usec; | |
470 | } | |
2c2e6ecf DD |
471 | } else |
472 | return -ENODEV; | |
473 | ||
474 | return 0; | |
475 | } | |
476 | ||
477 | static int __init powernv_processor_idle_init(void) | |
478 | { | |
479 | int retval; | |
480 | ||
481 | retval = powernv_idle_probe(); | |
482 | if (retval) | |
483 | return retval; | |
484 | ||
485 | powernv_cpuidle_driver_init(); | |
486 | retval = cpuidle_register(&powernv_idle_driver, NULL); | |
487 | if (retval) { | |
488 | printk(KERN_DEBUG "Registration of powernv driver failed.\n"); | |
489 | return retval; | |
490 | } | |
491 | ||
10fcca9d SAS |
492 | retval = cpuhp_setup_state_nocalls(CPUHP_AP_ONLINE_DYN, |
493 | "cpuidle/powernv:online", | |
494 | powernv_cpuidle_cpu_online, NULL); | |
495 | WARN_ON(retval < 0); | |
496 | retval = cpuhp_setup_state_nocalls(CPUHP_CPUIDLE_DEAD, | |
497 | "cpuidle/powernv:dead", NULL, | |
498 | powernv_cpuidle_cpu_dead); | |
499 | WARN_ON(retval < 0); | |
2c2e6ecf DD |
500 | printk(KERN_DEBUG "powernv_idle_driver registered\n"); |
501 | return 0; | |
502 | } | |
503 | ||
504 | device_initcall(powernv_processor_idle_init); |