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drivers/net: Remove address use from assignments of function pointers
[linux.git] / drivers / net / e1000e / netdev.c
CommitLineData
bc7f75fa
AK		 1/*******************************************************************************
2
3 Intel PRO/1000 Linux driver
451152d9 4 Copyright(c) 1999 - 2010 Intel Corporation.
bc7f75fa
AK		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <[email protected]>
24 e1000-devel Mailing List <[email protected]>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
8544b9f7
BA		 29#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
30
bc7f75fa
AK		 31#include <linux/module.h>
32#include <linux/types.h>
33#include <linux/init.h>
34#include <linux/pci.h>
35#include <linux/vmalloc.h>
36#include <linux/pagemap.h>
37#include <linux/delay.h>
38#include <linux/netdevice.h>
39#include <linux/tcp.h>
40#include <linux/ipv6.h>
5a0e3ad6 41#include <linux/slab.h>
bc7f75fa
AK		 42#include <net/checksum.h>
43#include <net/ip6_checksum.h>
44#include <linux/mii.h>
45#include <linux/ethtool.h>
46#include <linux/if_vlan.h>
47#include <linux/cpu.h>
48#include <linux/smp.h>
97ac8cae 49#include <linux/pm_qos_params.h>
23606cf5 50#include <linux/pm_runtime.h>
111b9dc5 51#include <linux/aer.h>
bc7f75fa
AK		 52
53#include "e1000.h"
54
c14c643b
BA		 55#define DRV_EXTRAVERSION "-k2"
56
57#define DRV_VERSION "1.2.7" DRV_EXTRAVERSION
bc7f75fa
AK		 58char e1000e_driver_name[] = "e1000e";
59const char e1000e_driver_version[] = DRV_VERSION;
60
61static const struct e1000_info *e1000_info_tbl[] = {
62 [board_82571] = &e1000_82571_info,
63 [board_82572] = &e1000_82572_info,
64 [board_82573] = &e1000_82573_info,
4662e82b 65 [board_82574] = &e1000_82574_info,
8c81c9c3 66 [board_82583] = &e1000_82583_info,
bc7f75fa
AK		 67 [board_80003es2lan] = &e1000_es2_info,
68 [board_ich8lan] = &e1000_ich8_info,
69 [board_ich9lan] = &e1000_ich9_info,
f4187b56 70 [board_ich10lan] = &e1000_ich10_info,
a4f58f54 71 [board_pchlan] = &e1000_pch_info,
d3738bb8 72 [board_pch2lan] = &e1000_pch2_info,
bc7f75fa
AK		 73};
74
84f4ee90
TI		 75struct e1000_reg_info {
76 u32 ofs;
77 char *name;
78};
79
80#define E1000_RDFH 0x02410 /* Rx Data FIFO Head - RW */
81#define E1000_RDFT 0x02418 /* Rx Data FIFO Tail - RW */
82#define E1000_RDFHS 0x02420 /* Rx Data FIFO Head Saved - RW */
83#define E1000_RDFTS 0x02428 /* Rx Data FIFO Tail Saved - RW */
84#define E1000_RDFPC 0x02430 /* Rx Data FIFO Packet Count - RW */
85
86#define E1000_TDFH 0x03410 /* Tx Data FIFO Head - RW */
87#define E1000_TDFT 0x03418 /* Tx Data FIFO Tail - RW */
88#define E1000_TDFHS 0x03420 /* Tx Data FIFO Head Saved - RW */
89#define E1000_TDFTS 0x03428 /* Tx Data FIFO Tail Saved - RW */
90#define E1000_TDFPC 0x03430 /* Tx Data FIFO Packet Count - RW */
91
92static const struct e1000_reg_info e1000_reg_info_tbl[] = {
93
94 /* General Registers */
95 {E1000_CTRL, "CTRL"},
96 {E1000_STATUS, "STATUS"},
97 {E1000_CTRL_EXT, "CTRL_EXT"},
98
99 /* Interrupt Registers */
100 {E1000_ICR, "ICR"},
101
102 /* RX Registers */
103 {E1000_RCTL, "RCTL"},
104 {E1000_RDLEN, "RDLEN"},
105 {E1000_RDH, "RDH"},
106 {E1000_RDT, "RDT"},
107 {E1000_RDTR, "RDTR"},
108 {E1000_RXDCTL(0), "RXDCTL"},
109 {E1000_ERT, "ERT"},
110 {E1000_RDBAL, "RDBAL"},
111 {E1000_RDBAH, "RDBAH"},
112 {E1000_RDFH, "RDFH"},
113 {E1000_RDFT, "RDFT"},
114 {E1000_RDFHS, "RDFHS"},
115 {E1000_RDFTS, "RDFTS"},
116 {E1000_RDFPC, "RDFPC"},
117
118 /* TX Registers */
119 {E1000_TCTL, "TCTL"},
120 {E1000_TDBAL, "TDBAL"},
121 {E1000_TDBAH, "TDBAH"},
122 {E1000_TDLEN, "TDLEN"},
123 {E1000_TDH, "TDH"},
124 {E1000_TDT, "TDT"},
125 {E1000_TIDV, "TIDV"},
126 {E1000_TXDCTL(0), "TXDCTL"},
127 {E1000_TADV, "TADV"},
128 {E1000_TARC(0), "TARC"},
129 {E1000_TDFH, "TDFH"},
130 {E1000_TDFT, "TDFT"},
131 {E1000_TDFHS, "TDFHS"},
132 {E1000_TDFTS, "TDFTS"},
133 {E1000_TDFPC, "TDFPC"},
134
135 /* List Terminator */
136 {}
137};
138
139/*
140 * e1000_regdump - register printout routine
141 */
142static void e1000_regdump(struct e1000_hw *hw, struct e1000_reg_info *reginfo)
143{
144 int n = 0;
145 char rname[16];
146 u32 regs[8];
147
148 switch (reginfo->ofs) {
149 case E1000_RXDCTL(0):
150 for (n = 0; n < 2; n++)
151 regs[n] = __er32(hw, E1000_RXDCTL(n));
152 break;
153 case E1000_TXDCTL(0):
154 for (n = 0; n < 2; n++)
155 regs[n] = __er32(hw, E1000_TXDCTL(n));
156 break;
157 case E1000_TARC(0):
158 for (n = 0; n < 2; n++)
159 regs[n] = __er32(hw, E1000_TARC(n));
160 break;
161 default:
162 printk(KERN_INFO "%-15s %08x\n",
163 reginfo->name, __er32(hw, reginfo->ofs));
164 return;
165 }
166
167 snprintf(rname, 16, "%s%s", reginfo->name, "[0-1]");
168 printk(KERN_INFO "%-15s ", rname);
169 for (n = 0; n < 2; n++)
170 printk(KERN_CONT "%08x ", regs[n]);
171 printk(KERN_CONT "\n");
172}
173
174
175/*
176 * e1000e_dump - Print registers, tx-ring and rx-ring
177 */
178static void e1000e_dump(struct e1000_adapter *adapter)
179{
180 struct net_device *netdev = adapter->netdev;
181 struct e1000_hw *hw = &adapter->hw;
182 struct e1000_reg_info *reginfo;
183 struct e1000_ring *tx_ring = adapter->tx_ring;
184 struct e1000_tx_desc *tx_desc;
185 struct my_u0 { u64 a; u64 b; } *u0;
186 struct e1000_buffer *buffer_info;
187 struct e1000_ring *rx_ring = adapter->rx_ring;
188 union e1000_rx_desc_packet_split *rx_desc_ps;
189 struct e1000_rx_desc *rx_desc;
190 struct my_u1 { u64 a; u64 b; u64 c; u64 d; } *u1;
191 u32 staterr;
192 int i = 0;
193
194 if (!netif_msg_hw(adapter))
195 return;
196
197 /* Print netdevice Info */
198 if (netdev) {
199 dev_info(&adapter->pdev->dev, "Net device Info\n");
200 printk(KERN_INFO "Device Name state "
201 "trans_start last_rx\n");
202 printk(KERN_INFO "%-15s %016lX %016lX %016lX\n",
203 netdev->name,
204 netdev->state,
205 netdev->trans_start,
206 netdev->last_rx);
207 }
208
209 /* Print Registers */
210 dev_info(&adapter->pdev->dev, "Register Dump\n");
211 printk(KERN_INFO " Register Name Value\n");
212 for (reginfo = (struct e1000_reg_info *)e1000_reg_info_tbl;
213 reginfo->name; reginfo++) {
214 e1000_regdump(hw, reginfo);
215 }
216
217 /* Print TX Ring Summary */
218 if (!netdev || !netif_running(netdev))
219 goto exit;
220
221 dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
222 printk(KERN_INFO "Queue [NTU] [NTC] [bi(ntc)->dma ]"
223 " leng ntw timestamp\n");
224 buffer_info = &tx_ring->buffer_info[tx_ring->next_to_clean];
225 printk(KERN_INFO " %5d %5X %5X %016llX %04X %3X %016llX\n",
226 0, tx_ring->next_to_use, tx_ring->next_to_clean,
8eb64e6b 227 (unsigned long long)buffer_info->dma,
84f4ee90
TI		 228 buffer_info->length,
229 buffer_info->next_to_watch,
8eb64e6b 230 (unsigned long long)buffer_info->time_stamp);
84f4ee90
TI		 231
232 /* Print TX Rings */
233 if (!netif_msg_tx_done(adapter))
234 goto rx_ring_summary;
235
236 dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
237
238 /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended)
239 *
240 * Legacy Transmit Descriptor
241 * +--------------------------------------------------------------+
242 * 0 | Buffer Address [63:0] (Reserved on Write Back) |
243 * +--------------------------------------------------------------+
244 * 8 | Special | CSS | Status | CMD | CSO | Length |
245 * +--------------------------------------------------------------+
246 * 63 48 47 36 35 32 31 24 23 16 15 0
247 *
248 * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload
249 * 63 48 47 40 39 32 31 16 15 8 7 0
250 * +----------------------------------------------------------------+
251 * 0 | TUCSE | TUCS0 | TUCSS | IPCSE | IPCS0 | IPCSS |
252 * +----------------------------------------------------------------+
253 * 8 | MSS | HDRLEN | RSV | STA | TUCMD | DTYP | PAYLEN |
254 * +----------------------------------------------------------------+
255 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
256 *
257 * Extended Data Descriptor (DTYP=0x1)
258 * +----------------------------------------------------------------+
259 * 0 | Buffer Address [63:0] |
260 * +----------------------------------------------------------------+
261 * 8 | VLAN tag | POPTS | Rsvd | Status | Command | DTYP | DTALEN |
262 * +----------------------------------------------------------------+
263 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
264 */
265 printk(KERN_INFO "Tl[desc] [address 63:0 ] [SpeCssSCmCsLen]"
266 " [bi->dma ] leng ntw timestamp bi->skb "
267 "<-- Legacy format\n");
268 printk(KERN_INFO "Tc[desc] [Ce CoCsIpceCoS] [MssHlRSCm0Plen]"
269 " [bi->dma ] leng ntw timestamp bi->skb "
270 "<-- Ext Context format\n");
271 printk(KERN_INFO "Td[desc] [address 63:0 ] [VlaPoRSCm1Dlen]"
272 " [bi->dma ] leng ntw timestamp bi->skb "
273 "<-- Ext Data format\n");
274 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
275 tx_desc = E1000_TX_DESC(*tx_ring, i);
276 buffer_info = &tx_ring->buffer_info[i];
277 u0 = (struct my_u0 *)tx_desc;
278 printk(KERN_INFO "T%c[0x%03X] %016llX %016llX %016llX "
279 "%04X %3X %016llX %p",
280 (!(le64_to_cpu(u0->b) & (1<<29)) ? 'l' :
281 ((le64_to_cpu(u0->b) & (1<<20)) ? 'd' : 'c')), i,
8eb64e6b
BA		 282 (unsigned long long)le64_to_cpu(u0->a),
283 (unsigned long long)le64_to_cpu(u0->b),
284 (unsigned long long)buffer_info->dma,
285 buffer_info->length, buffer_info->next_to_watch,
286 (unsigned long long)buffer_info->time_stamp,
84f4ee90
TI		 287 buffer_info->skb);
288 if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean)
289 printk(KERN_CONT " NTC/U\n");
290 else if (i == tx_ring->next_to_use)
291 printk(KERN_CONT " NTU\n");
292 else if (i == tx_ring->next_to_clean)
293 printk(KERN_CONT " NTC\n");
294 else
295 printk(KERN_CONT "\n");
296
297 if (netif_msg_pktdata(adapter) && buffer_info->dma != 0)
298 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
299 16, 1, phys_to_virt(buffer_info->dma),
300 buffer_info->length, true);
301 }
302
303 /* Print RX Rings Summary */
304rx_ring_summary:
305 dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
306 printk(KERN_INFO "Queue [NTU] [NTC]\n");
307 printk(KERN_INFO " %5d %5X %5X\n", 0,
308 rx_ring->next_to_use, rx_ring->next_to_clean);
309
310 /* Print RX Rings */
311 if (!netif_msg_rx_status(adapter))
312 goto exit;
313
314 dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
315 switch (adapter->rx_ps_pages) {
316 case 1:
317 case 2:
318 case 3:
319 /* [Extended] Packet Split Receive Descriptor Format
320 *
321 * +-----------------------------------------------------+
322 * 0 | Buffer Address 0 [63:0] |
323 * +-----------------------------------------------------+
324 * 8 | Buffer Address 1 [63:0] |
325 * +-----------------------------------------------------+
326 * 16 | Buffer Address 2 [63:0] |
327 * +-----------------------------------------------------+
328 * 24 | Buffer Address 3 [63:0] |
329 * +-----------------------------------------------------+
330 */
331 printk(KERN_INFO "R [desc] [buffer 0 63:0 ] "
332 "[buffer 1 63:0 ] "
333 "[buffer 2 63:0 ] [buffer 3 63:0 ] [bi->dma ] "
334 "[bi->skb] <-- Ext Pkt Split format\n");
335 /* [Extended] Receive Descriptor (Write-Back) Format
336 *
337 * 63 48 47 32 31 13 12 8 7 4 3 0
338 * +------------------------------------------------------+
339 * 0 | Packet | IP | Rsvd | MRQ | Rsvd | MRQ RSS |
340 * | Checksum | Ident | | Queue | | Type |
341 * +------------------------------------------------------+
342 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
343 * +------------------------------------------------------+
344 * 63 48 47 32 31 20 19 0
345 */
346 printk(KERN_INFO "RWB[desc] [ck ipid mrqhsh] "
347 "[vl l0 ee es] "
348 "[ l3 l2 l1 hs] [reserved ] ---------------- "
349 "[bi->skb] <-- Ext Rx Write-Back format\n");
350 for (i = 0; i < rx_ring->count; i++) {
351 buffer_info = &rx_ring->buffer_info[i];
352 rx_desc_ps = E1000_RX_DESC_PS(*rx_ring, i);
353 u1 = (struct my_u1 *)rx_desc_ps;
354 staterr =
355 le32_to_cpu(rx_desc_ps->wb.middle.status_error);
356 if (staterr & E1000_RXD_STAT_DD) {
357 /* Descriptor Done */
358 printk(KERN_INFO "RWB[0x%03X] %016llX "
359 "%016llX %016llX %016llX "
360 "---------------- %p", i,
8eb64e6b
BA		 361 (unsigned long long)le64_to_cpu(u1->a),
362 (unsigned long long)le64_to_cpu(u1->b),
363 (unsigned long long)le64_to_cpu(u1->c),
364 (unsigned long long)le64_to_cpu(u1->d),
84f4ee90
TI		 365 buffer_info->skb);
366 } else {
367 printk(KERN_INFO "R [0x%03X] %016llX "
368 "%016llX %016llX %016llX %016llX %p", i,
8eb64e6b
BA		 369 (unsigned long long)le64_to_cpu(u1->a),
370 (unsigned long long)le64_to_cpu(u1->b),
371 (unsigned long long)le64_to_cpu(u1->c),
372 (unsigned long long)le64_to_cpu(u1->d),
373 (unsigned long long)buffer_info->dma,
84f4ee90
TI		 374 buffer_info->skb);
375
376 if (netif_msg_pktdata(adapter))
377 print_hex_dump(KERN_INFO, "",
378 DUMP_PREFIX_ADDRESS, 16, 1,
379 phys_to_virt(buffer_info->dma),
380 adapter->rx_ps_bsize0, true);
381 }
382
383 if (i == rx_ring->next_to_use)
384 printk(KERN_CONT " NTU\n");
385 else if (i == rx_ring->next_to_clean)
386 printk(KERN_CONT " NTC\n");
387 else
388 printk(KERN_CONT "\n");
389 }
390 break;
391 default:
392 case 0:
393 /* Legacy Receive Descriptor Format
394 *
395 * +-----------------------------------------------------+
396 * | Buffer Address [63:0] |
397 * +-----------------------------------------------------+
398 * | VLAN Tag | Errors | Status 0 | Packet csum | Length |
399 * +-----------------------------------------------------+
400 * 63 48 47 40 39 32 31 16 15 0
401 */
402 printk(KERN_INFO "Rl[desc] [address 63:0 ] "
403 "[vl er S cks ln] [bi->dma ] [bi->skb] "
404 "<-- Legacy format\n");
405 for (i = 0; rx_ring->desc && (i < rx_ring->count); i++) {
406 rx_desc = E1000_RX_DESC(*rx_ring, i);
407 buffer_info = &rx_ring->buffer_info[i];
408 u0 = (struct my_u0 *)rx_desc;
409 printk(KERN_INFO "Rl[0x%03X] %016llX %016llX "
8eb64e6b
BA		 410 "%016llX %p", i,
411 (unsigned long long)le64_to_cpu(u0->a),
412 (unsigned long long)le64_to_cpu(u0->b),
413 (unsigned long long)buffer_info->dma,
414 buffer_info->skb);
84f4ee90
TI		 415 if (i == rx_ring->next_to_use)
416 printk(KERN_CONT " NTU\n");
417 else if (i == rx_ring->next_to_clean)
418 printk(KERN_CONT " NTC\n");
419 else
420 printk(KERN_CONT "\n");
421
422 if (netif_msg_pktdata(adapter))
423 print_hex_dump(KERN_INFO, "",
424 DUMP_PREFIX_ADDRESS,
425 16, 1, phys_to_virt(buffer_info->dma),
426 adapter->rx_buffer_len, true);
427 }
428 }
429
430exit:
431 return;
432}
433
bc7f75fa
AK		 434/**
435 * e1000_desc_unused - calculate if we have unused descriptors
436 **/
437static int e1000_desc_unused(struct e1000_ring *ring)
438{
439 if (ring->next_to_clean > ring->next_to_use)
440 return ring->next_to_clean - ring->next_to_use - 1;
441
442 return ring->count + ring->next_to_clean - ring->next_to_use - 1;
443}
444
445/**
ad68076e 446 * e1000_receive_skb - helper function to handle Rx indications
bc7f75fa
AK		 447 * @adapter: board private structure
448 * @status: descriptor status field as written by hardware
449 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
450 * @skb: pointer to sk_buff to be indicated to stack
451 **/
452static void e1000_receive_skb(struct e1000_adapter *adapter,
453 struct net_device *netdev,
454 struct sk_buff *skb,
a39fe742 455 u8 status, __le16 vlan)
bc7f75fa
AK		 456{
457 skb->protocol = eth_type_trans(skb, netdev);
458
459 if (adapter->vlgrp && (status & E1000_RXD_STAT_VP))
c405b828
HX		 460 vlan_gro_receive(&adapter->napi, adapter->vlgrp,
461 le16_to_cpu(vlan), skb);
bc7f75fa 462 else
89c88b16 463 napi_gro_receive(&adapter->napi, skb);
bc7f75fa
AK		 464}
465
466/**
467 * e1000_rx_checksum - Receive Checksum Offload for 82543
468 * @adapter: board private structure
469 * @status_err: receive descriptor status and error fields
470 * @csum: receive descriptor csum field
471 * @sk_buff: socket buffer with received data
472 **/
473static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
474 u32 csum, struct sk_buff *skb)
475{
476 u16 status = (u16)status_err;
477 u8 errors = (u8)(status_err >> 24);
478 skb->ip_summed = CHECKSUM_NONE;
479
480 /* Ignore Checksum bit is set */
481 if (status & E1000_RXD_STAT_IXSM)
482 return;
483 /* TCP/UDP checksum error bit is set */
484 if (errors & E1000_RXD_ERR_TCPE) {
485 /* let the stack verify checksum errors */
486 adapter->hw_csum_err++;
487 return;
488 }
489
490 /* TCP/UDP Checksum has not been calculated */
491 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
492 return;
493
494 /* It must be a TCP or UDP packet with a valid checksum */
495 if (status & E1000_RXD_STAT_TCPCS) {
496 /* TCP checksum is good */
497 skb->ip_summed = CHECKSUM_UNNECESSARY;
498 } else {
ad68076e
BA		 499 /*
500 * IP fragment with UDP payload
501 * Hardware complements the payload checksum, so we undo it
bc7f75fa
AK		 502 * and then put the value in host order for further stack use.
503 */
a39fe742
AV		 504 __sum16 sum = (__force __sum16)htons(csum);
505 skb->csum = csum_unfold(~sum);
bc7f75fa
AK		 506 skb->ip_summed = CHECKSUM_COMPLETE;
507 }
508 adapter->hw_csum_good++;
509}
510
511/**
512 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
513 * @adapter: address of board private structure
514 **/
515static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
516 int cleaned_count)
517{
518 struct net_device *netdev = adapter->netdev;
519 struct pci_dev *pdev = adapter->pdev;
520 struct e1000_ring *rx_ring = adapter->rx_ring;
521 struct e1000_rx_desc *rx_desc;
522 struct e1000_buffer *buffer_info;
523 struct sk_buff *skb;
524 unsigned int i;
89d71a66 525 unsigned int bufsz = adapter->rx_buffer_len;
bc7f75fa
AK		 526
527 i = rx_ring->next_to_use;
528 buffer_info = &rx_ring->buffer_info[i];
529
530 while (cleaned_count--) {
531 skb = buffer_info->skb;
532 if (skb) {
533 skb_trim(skb, 0);
534 goto map_skb;
535 }
536
89d71a66 537 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
bc7f75fa
AK		 538 if (!skb) {
539 /* Better luck next round */
540 adapter->alloc_rx_buff_failed++;
541 break;
542 }
543
bc7f75fa
AK		 544 buffer_info->skb = skb;
545map_skb:
0be3f55f 546 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
bc7f75fa 547 adapter->rx_buffer_len,
0be3f55f
NN		 548 DMA_FROM_DEVICE);
549 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
bc7f75fa
AK		 550 dev_err(&pdev->dev, "RX DMA map failed\n");
551 adapter->rx_dma_failed++;
552 break;
553 }
554
555 rx_desc = E1000_RX_DESC(*rx_ring, i);
556 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
557
50849d79
TH		 558 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
559 /*
560 * Force memory writes to complete before letting h/w
561 * know there are new descriptors to fetch. (Only
562 * applicable for weak-ordered memory model archs,
563 * such as IA-64).
564 */
565 wmb();
566 writel(i, adapter->hw.hw_addr + rx_ring->tail);
567 }
bc7f75fa
AK		 568 i++;
569 if (i == rx_ring->count)
570 i = 0;
571 buffer_info = &rx_ring->buffer_info[i];
572 }
573
50849d79 574 rx_ring->next_to_use = i;
bc7f75fa
AK		 575}
576
577/**
578 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
579 * @adapter: address of board private structure
580 **/
581static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
582 int cleaned_count)
583{
584 struct net_device *netdev = adapter->netdev;
585 struct pci_dev *pdev = adapter->pdev;
586 union e1000_rx_desc_packet_split *rx_desc;
587 struct e1000_ring *rx_ring = adapter->rx_ring;
588 struct e1000_buffer *buffer_info;
589 struct e1000_ps_page *ps_page;
590 struct sk_buff *skb;
591 unsigned int i, j;
592
593 i = rx_ring->next_to_use;
594 buffer_info = &rx_ring->buffer_info[i];
595
596 while (cleaned_count--) {
597 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
598
599 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40
AK		 600 ps_page = &buffer_info->ps_pages[j];
601 if (j >= adapter->rx_ps_pages) {
602 /* all unused desc entries get hw null ptr */
a39fe742 603 rx_desc->read.buffer_addr[j+1] = ~cpu_to_le64(0);
47f44e40
AK		 604 continue;
605 }
606 if (!ps_page->page) {
607 ps_page->page = alloc_page(GFP_ATOMIC);
bc7f75fa 608 if (!ps_page->page) {
47f44e40
AK		 609 adapter->alloc_rx_buff_failed++;
610 goto no_buffers;
611 }
0be3f55f
NN		 612 ps_page->dma = dma_map_page(&pdev->dev,
613 ps_page->page,
614 0, PAGE_SIZE,
615 DMA_FROM_DEVICE);
616 if (dma_mapping_error(&pdev->dev,
617 ps_page->dma)) {
47f44e40
AK		 618 dev_err(&adapter->pdev->dev,
619 "RX DMA page map failed\n");
620 adapter->rx_dma_failed++;
621 goto no_buffers;
bc7f75fa 622 }
bc7f75fa 623 }
47f44e40
AK		 624 /*
625 * Refresh the desc even if buffer_addrs
626 * didn't change because each write-back
627 * erases this info.
628 */
629 rx_desc->read.buffer_addr[j+1] =
630 cpu_to_le64(ps_page->dma);
bc7f75fa
AK		 631 }
632
89d71a66
ED		 633 skb = netdev_alloc_skb_ip_align(netdev,
634 adapter->rx_ps_bsize0);
bc7f75fa
AK		 635
636 if (!skb) {
637 adapter->alloc_rx_buff_failed++;
638 break;
639 }
640
bc7f75fa 641 buffer_info->skb = skb;
0be3f55f 642 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
bc7f75fa 643 adapter->rx_ps_bsize0,
0be3f55f
NN		 644 DMA_FROM_DEVICE);
645 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
bc7f75fa
AK		 646 dev_err(&pdev->dev, "RX DMA map failed\n");
647 adapter->rx_dma_failed++;
648 /* cleanup skb */
649 dev_kfree_skb_any(skb);
650 buffer_info->skb = NULL;
651 break;
652 }
653
654 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
655
50849d79
TH		 656 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
657 /*
658 * Force memory writes to complete before letting h/w
659 * know there are new descriptors to fetch. (Only
660 * applicable for weak-ordered memory model archs,
661 * such as IA-64).
662 */
663 wmb();
664 writel(i<<1, adapter->hw.hw_addr + rx_ring->tail);
665 }
666
bc7f75fa
AK		 667 i++;
668 if (i == rx_ring->count)
669 i = 0;
670 buffer_info = &rx_ring->buffer_info[i];
671 }
672
673no_buffers:
50849d79 674 rx_ring->next_to_use = i;
bc7f75fa
AK		 675}
676
97ac8cae
BA		 677/**
678 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
679 * @adapter: address of board private structure
97ac8cae
BA		 680 * @cleaned_count: number of buffers to allocate this pass
681 **/
682
683static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
684 int cleaned_count)
685{
686 struct net_device *netdev = adapter->netdev;
687 struct pci_dev *pdev = adapter->pdev;
688 struct e1000_rx_desc *rx_desc;
689 struct e1000_ring *rx_ring = adapter->rx_ring;
690 struct e1000_buffer *buffer_info;
691 struct sk_buff *skb;
692 unsigned int i;
89d71a66 693 unsigned int bufsz = 256 - 16 /* for skb_reserve */;
97ac8cae
BA		 694
695 i = rx_ring->next_to_use;
696 buffer_info = &rx_ring->buffer_info[i];
697
698 while (cleaned_count--) {
699 skb = buffer_info->skb;
700 if (skb) {
701 skb_trim(skb, 0);
702 goto check_page;
703 }
704
89d71a66 705 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
97ac8cae
BA		 706 if (unlikely(!skb)) {
707 /* Better luck next round */
708 adapter->alloc_rx_buff_failed++;
709 break;
710 }
711
97ac8cae
BA		 712 buffer_info->skb = skb;
713check_page:
714 /* allocate a new page if necessary */
715 if (!buffer_info->page) {
716 buffer_info->page = alloc_page(GFP_ATOMIC);
717 if (unlikely(!buffer_info->page)) {
718 adapter->alloc_rx_buff_failed++;
719 break;
720 }
721 }
722
723 if (!buffer_info->dma)
0be3f55f 724 buffer_info->dma = dma_map_page(&pdev->dev,
97ac8cae
BA		 725 buffer_info->page, 0,
726 PAGE_SIZE,
0be3f55f 727 DMA_FROM_DEVICE);
97ac8cae
BA		 728
729 rx_desc = E1000_RX_DESC(*rx_ring, i);
730 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
731
732 if (unlikely(++i == rx_ring->count))
733 i = 0;
734 buffer_info = &rx_ring->buffer_info[i];
735 }
736
737 if (likely(rx_ring->next_to_use != i)) {
738 rx_ring->next_to_use = i;
739 if (unlikely(i-- == 0))
740 i = (rx_ring->count - 1);
741
742 /* Force memory writes to complete before letting h/w
743 * know there are new descriptors to fetch. (Only
744 * applicable for weak-ordered memory model archs,
745 * such as IA-64). */
746 wmb();
747 writel(i, adapter->hw.hw_addr + rx_ring->tail);
748 }
749}
750
bc7f75fa
AK		 751/**
752 * e1000_clean_rx_irq - Send received data up the network stack; legacy
753 * @adapter: board private structure
754 *
755 * the return value indicates whether actual cleaning was done, there
756 * is no guarantee that everything was cleaned
757 **/
758static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
759 int *work_done, int work_to_do)
760{
761 struct net_device *netdev = adapter->netdev;
762 struct pci_dev *pdev = adapter->pdev;
3bb99fe2 763 struct e1000_hw *hw = &adapter->hw;
bc7f75fa
AK		 764 struct e1000_ring *rx_ring = adapter->rx_ring;
765 struct e1000_rx_desc *rx_desc, *next_rxd;
766 struct e1000_buffer *buffer_info, *next_buffer;
767 u32 length;
768 unsigned int i;
769 int cleaned_count = 0;
770 bool cleaned = 0;
771 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
772
773 i = rx_ring->next_to_clean;
774 rx_desc = E1000_RX_DESC(*rx_ring, i);
775 buffer_info = &rx_ring->buffer_info[i];
776
777 while (rx_desc->status & E1000_RXD_STAT_DD) {
778 struct sk_buff *skb;
779 u8 status;
780
781 if (*work_done >= work_to_do)
782 break;
783 (*work_done)++;
2d0bb1c1 784 rmb(); /* read descriptor and rx_buffer_info after status DD */
bc7f75fa
AK		 785
786 status = rx_desc->status;
787 skb = buffer_info->skb;
788 buffer_info->skb = NULL;
789
790 prefetch(skb->data - NET_IP_ALIGN);
791
792 i++;
793 if (i == rx_ring->count)
794 i = 0;
795 next_rxd = E1000_RX_DESC(*rx_ring, i);
796 prefetch(next_rxd);
797
798 next_buffer = &rx_ring->buffer_info[i];
799
800 cleaned = 1;
801 cleaned_count++;
0be3f55f 802 dma_unmap_single(&pdev->dev,
bc7f75fa
AK		 803 buffer_info->dma,
804 adapter->rx_buffer_len,
0be3f55f 805 DMA_FROM_DEVICE);
bc7f75fa
AK		 806 buffer_info->dma = 0;
807
808 length = le16_to_cpu(rx_desc->length);
809
b94b5028
JB		 810 /*
811 * !EOP means multiple descriptors were used to store a single
812 * packet, if that's the case we need to toss it. In fact, we
813 * need to toss every packet with the EOP bit clear and the
814 * next frame that _does_ have the EOP bit set, as it is by
815 * definition only a frame fragment
816 */
817 if (unlikely(!(status & E1000_RXD_STAT_EOP)))
818 adapter->flags2 |= FLAG2_IS_DISCARDING;
819
820 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
bc7f75fa 821 /* All receives must fit into a single buffer */
3bb99fe2 822 e_dbg("Receive packet consumed multiple buffers\n");
bc7f75fa
AK		 823 /* recycle */
824 buffer_info->skb = skb;
b94b5028
JB		 825 if (status & E1000_RXD_STAT_EOP)
826 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK		 827 goto next_desc;
828 }
829
830 if (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) {
831 /* recycle */
832 buffer_info->skb = skb;
833 goto next_desc;
834 }
835
eb7c3adb
JK		 836 /* adjust length to remove Ethernet CRC */
837 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
838 length -= 4;
839
bc7f75fa
AK		 840 total_rx_bytes += length;
841 total_rx_packets++;
842
ad68076e
BA		 843 /*
844 * code added for copybreak, this should improve
bc7f75fa 845 * performance for small packets with large amounts
ad68076e
BA		 846 * of reassembly being done in the stack
847 */
bc7f75fa
AK		 848 if (length < copybreak) {
849 struct sk_buff *new_skb =
89d71a66 850 netdev_alloc_skb_ip_align(netdev, length);
bc7f75fa 851 if (new_skb) {
808ff676
BA		 852 skb_copy_to_linear_data_offset(new_skb,
853 -NET_IP_ALIGN,
854 (skb->data -
855 NET_IP_ALIGN),
856 (length +
857 NET_IP_ALIGN));
bc7f75fa
AK		 858 /* save the skb in buffer_info as good */
859 buffer_info->skb = skb;
860 skb = new_skb;
861 }
862 /* else just continue with the old one */
863 }
864 /* end copybreak code */
865 skb_put(skb, length);
866
867 /* Receive Checksum Offload */
868 e1000_rx_checksum(adapter,
869 (u32)(status) |
870 ((u32)(rx_desc->errors) << 24),
871 le16_to_cpu(rx_desc->csum), skb);
872
873 e1000_receive_skb(adapter, netdev, skb,status,rx_desc->special);
874
875next_desc:
876 rx_desc->status = 0;
877
878 /* return some buffers to hardware, one at a time is too slow */
879 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
880 adapter->alloc_rx_buf(adapter, cleaned_count);
881 cleaned_count = 0;
882 }
883
884 /* use prefetched values */
885 rx_desc = next_rxd;
886 buffer_info = next_buffer;
887 }
888 rx_ring->next_to_clean = i;
889
890 cleaned_count = e1000_desc_unused(rx_ring);
891 if (cleaned_count)
892 adapter->alloc_rx_buf(adapter, cleaned_count);
893
bc7f75fa 894 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 895 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK		 896 netdev->stats.rx_bytes += total_rx_bytes;
897 netdev->stats.rx_packets += total_rx_packets;
bc7f75fa
AK		 898 return cleaned;
899}
900
bc7f75fa
AK		 901static void e1000_put_txbuf(struct e1000_adapter *adapter,
902 struct e1000_buffer *buffer_info)
903{
03b1320d
AD		 904 if (buffer_info->dma) {
905 if (buffer_info->mapped_as_page)
0be3f55f
NN		 906 dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
907 buffer_info->length, DMA_TO_DEVICE);
03b1320d 908 else
0be3f55f
NN		 909 dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
910 buffer_info->length, DMA_TO_DEVICE);
03b1320d
AD		 911 buffer_info->dma = 0;
912 }
bc7f75fa
AK		 913 if (buffer_info->skb) {
914 dev_kfree_skb_any(buffer_info->skb);
915 buffer_info->skb = NULL;
916 }
1b7719c4 917 buffer_info->time_stamp = 0;
bc7f75fa
AK		 918}
919
41cec6f1 920static void e1000_print_hw_hang(struct work_struct *work)
bc7f75fa 921{
41cec6f1
BA		 922 struct e1000_adapter *adapter = container_of(work,
923 struct e1000_adapter,
924 print_hang_task);
bc7f75fa
AK		 925 struct e1000_ring *tx_ring = adapter->tx_ring;
926 unsigned int i = tx_ring->next_to_clean;
927 unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
928 struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
41cec6f1
BA		 929 struct e1000_hw *hw = &adapter->hw;
930 u16 phy_status, phy_1000t_status, phy_ext_status;
931 u16 pci_status;
932
933 e1e_rphy(hw, PHY_STATUS, &phy_status);
934 e1e_rphy(hw, PHY_1000T_STATUS, &phy_1000t_status);
935 e1e_rphy(hw, PHY_EXT_STATUS, &phy_ext_status);
bc7f75fa 936
41cec6f1
BA		 937 pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status);
938
939 /* detected Hardware unit hang */
940 e_err("Detected Hardware Unit Hang:\n"
44defeb3
JK		 941 " TDH <%x>\n"
942 " TDT <%x>\n"
943 " next_to_use <%x>\n"
944 " next_to_clean <%x>\n"
945 "buffer_info[next_to_clean]:\n"
946 " time_stamp <%lx>\n"
947 " next_to_watch <%x>\n"
948 " jiffies <%lx>\n"
41cec6f1
BA		 949 " next_to_watch.status <%x>\n"
950 "MAC Status <%x>\n"
951 "PHY Status <%x>\n"
952 "PHY 1000BASE-T Status <%x>\n"
953 "PHY Extended Status <%x>\n"
954 "PCI Status <%x>\n",
44defeb3
JK		 955 readl(adapter->hw.hw_addr + tx_ring->head),
956 readl(adapter->hw.hw_addr + tx_ring->tail),
957 tx_ring->next_to_use,
958 tx_ring->next_to_clean,
959 tx_ring->buffer_info[eop].time_stamp,
960 eop,
961 jiffies,
41cec6f1
BA		 962 eop_desc->upper.fields.status,
963 er32(STATUS),
964 phy_status,
965 phy_1000t_status,
966 phy_ext_status,
967 pci_status);
bc7f75fa
AK		 968}
969
970/**
971 * e1000_clean_tx_irq - Reclaim resources after transmit completes
972 * @adapter: board private structure
973 *
974 * the return value indicates whether actual cleaning was done, there
975 * is no guarantee that everything was cleaned
976 **/
977static bool e1000_clean_tx_irq(struct e1000_adapter *adapter)
978{
979 struct net_device *netdev = adapter->netdev;
980 struct e1000_hw *hw = &adapter->hw;
981 struct e1000_ring *tx_ring = adapter->tx_ring;
982 struct e1000_tx_desc *tx_desc, *eop_desc;
983 struct e1000_buffer *buffer_info;
984 unsigned int i, eop;
985 unsigned int count = 0;
bc7f75fa
AK		 986 unsigned int total_tx_bytes = 0, total_tx_packets = 0;
987
988 i = tx_ring->next_to_clean;
989 eop = tx_ring->buffer_info[i].next_to_watch;
990 eop_desc = E1000_TX_DESC(*tx_ring, eop);
991
12d04a3c
AD		 992 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
993 (count < tx_ring->count)) {
a86043c2 994 bool cleaned = false;
2d0bb1c1 995 rmb(); /* read buffer_info after eop_desc */
a86043c2 996 for (; !cleaned; count++) {
bc7f75fa
AK		 997 tx_desc = E1000_TX_DESC(*tx_ring, i);
998 buffer_info = &tx_ring->buffer_info[i];
999 cleaned = (i == eop);
1000
1001 if (cleaned) {
9ed318d5
TH		 1002 total_tx_packets += buffer_info->segs;
1003 total_tx_bytes += buffer_info->bytecount;
bc7f75fa
AK		 1004 }
1005
1006 e1000_put_txbuf(adapter, buffer_info);
1007 tx_desc->upper.data = 0;
1008
1009 i++;
1010 if (i == tx_ring->count)
1011 i = 0;
1012 }
1013
dac87619
TL		 1014 if (i == tx_ring->next_to_use)
1015 break;
bc7f75fa
AK		 1016 eop = tx_ring->buffer_info[i].next_to_watch;
1017 eop_desc = E1000_TX_DESC(*tx_ring, eop);
bc7f75fa
AK		 1018 }
1019
1020 tx_ring->next_to_clean = i;
1021
1022#define TX_WAKE_THRESHOLD 32
a86043c2
JB		 1023 if (count && netif_carrier_ok(netdev) &&
1024 e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
bc7f75fa
AK		 1025 /* Make sure that anybody stopping the queue after this
1026 * sees the new next_to_clean.
1027 */
1028 smp_mb();
1029
1030 if (netif_queue_stopped(netdev) &&
1031 !(test_bit(__E1000_DOWN, &adapter->state))) {
1032 netif_wake_queue(netdev);
1033 ++adapter->restart_queue;
1034 }
1035 }
1036
1037 if (adapter->detect_tx_hung) {
41cec6f1
BA		 1038 /*
1039 * Detect a transmit hang in hardware, this serializes the
1040 * check with the clearing of time_stamp and movement of i
1041 */
bc7f75fa 1042 adapter->detect_tx_hung = 0;
12d04a3c
AD		 1043 if (tx_ring->buffer_info[i].time_stamp &&
1044 time_after(jiffies, tx_ring->buffer_info[i].time_stamp
8e95a202
JP		 1045 + (adapter->tx_timeout_factor * HZ)) &&
1046 !(er32(STATUS) & E1000_STATUS_TXOFF)) {
41cec6f1 1047 schedule_work(&adapter->print_hang_task);
bc7f75fa
AK		 1048 netif_stop_queue(netdev);
1049 }
1050 }
1051 adapter->total_tx_bytes += total_tx_bytes;
1052 adapter->total_tx_packets += total_tx_packets;
7274c20f
AK		 1053 netdev->stats.tx_bytes += total_tx_bytes;
1054 netdev->stats.tx_packets += total_tx_packets;
12d04a3c 1055 return (count < tx_ring->count);
bc7f75fa
AK		 1056}
1057
bc7f75fa
AK		 1058/**
1059 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
1060 * @adapter: board private structure
1061 *
1062 * the return value indicates whether actual cleaning was done, there
1063 * is no guarantee that everything was cleaned
1064 **/
1065static bool e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
1066 int *work_done, int work_to_do)
1067{
3bb99fe2 1068 struct e1000_hw *hw = &adapter->hw;
bc7f75fa
AK		 1069 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
1070 struct net_device *netdev = adapter->netdev;
1071 struct pci_dev *pdev = adapter->pdev;
1072 struct e1000_ring *rx_ring = adapter->rx_ring;
1073 struct e1000_buffer *buffer_info, *next_buffer;
1074 struct e1000_ps_page *ps_page;
1075 struct sk_buff *skb;
1076 unsigned int i, j;
1077 u32 length, staterr;
1078 int cleaned_count = 0;
1079 bool cleaned = 0;
1080 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1081
1082 i = rx_ring->next_to_clean;
1083 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
1084 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1085 buffer_info = &rx_ring->buffer_info[i];
1086
1087 while (staterr & E1000_RXD_STAT_DD) {
1088 if (*work_done >= work_to_do)
1089 break;
1090 (*work_done)++;
1091 skb = buffer_info->skb;
2d0bb1c1 1092 rmb(); /* read descriptor and rx_buffer_info after status DD */
bc7f75fa
AK		 1093
1094 /* in the packet split case this is header only */
1095 prefetch(skb->data - NET_IP_ALIGN);
1096
1097 i++;
1098 if (i == rx_ring->count)
1099 i = 0;
1100 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
1101 prefetch(next_rxd);
1102
1103 next_buffer = &rx_ring->buffer_info[i];
1104
1105 cleaned = 1;
1106 cleaned_count++;
0be3f55f 1107 dma_unmap_single(&pdev->dev, buffer_info->dma,
bc7f75fa 1108 adapter->rx_ps_bsize0,
0be3f55f 1109 DMA_FROM_DEVICE);
bc7f75fa
AK		 1110 buffer_info->dma = 0;
1111
b94b5028
JB		 1112 /* see !EOP comment in other rx routine */
1113 if (!(staterr & E1000_RXD_STAT_EOP))
1114 adapter->flags2 |= FLAG2_IS_DISCARDING;
1115
1116 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
3bb99fe2
BA		 1117 e_dbg("Packet Split buffers didn't pick up the full "
1118 "packet\n");
bc7f75fa 1119 dev_kfree_skb_irq(skb);
b94b5028
JB		 1120 if (staterr & E1000_RXD_STAT_EOP)
1121 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK		 1122 goto next_desc;
1123 }
1124
1125 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) {
1126 dev_kfree_skb_irq(skb);
1127 goto next_desc;
1128 }
1129
1130 length = le16_to_cpu(rx_desc->wb.middle.length0);
1131
1132 if (!length) {
3bb99fe2
BA		 1133 e_dbg("Last part of the packet spanning multiple "
1134 "descriptors\n");
bc7f75fa
AK		 1135 dev_kfree_skb_irq(skb);
1136 goto next_desc;
1137 }
1138
1139 /* Good Receive */
1140 skb_put(skb, length);
1141
1142 {
ad68076e
BA		 1143 /*
1144 * this looks ugly, but it seems compiler issues make it
1145 * more efficient than reusing j
1146 */
bc7f75fa
AK		 1147 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
1148
ad68076e
BA		 1149 /*
1150 * page alloc/put takes too long and effects small packet
1151 * throughput, so unsplit small packets and save the alloc/put
1152 * only valid in softirq (napi) context to call kmap_*
1153 */
bc7f75fa
AK		 1154 if (l1 && (l1 <= copybreak) &&
1155 ((length + l1) <= adapter->rx_ps_bsize0)) {
1156 u8 *vaddr;
1157
47f44e40 1158 ps_page = &buffer_info->ps_pages[0];
bc7f75fa 1159
ad68076e
BA		 1160 /*
1161 * there is no documentation about how to call
bc7f75fa 1162 * kmap_atomic, so we can't hold the mapping
ad68076e
BA		 1163 * very long
1164 */
0be3f55f
NN		 1165 dma_sync_single_for_cpu(&pdev->dev, ps_page->dma,
1166 PAGE_SIZE, DMA_FROM_DEVICE);
bc7f75fa
AK		 1167 vaddr = kmap_atomic(ps_page->page, KM_SKB_DATA_SOFTIRQ);
1168 memcpy(skb_tail_pointer(skb), vaddr, l1);
1169 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
0be3f55f
NN		 1170 dma_sync_single_for_device(&pdev->dev, ps_page->dma,
1171 PAGE_SIZE, DMA_FROM_DEVICE);
140a7480 1172
eb7c3adb
JK		 1173 /* remove the CRC */
1174 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
1175 l1 -= 4;
1176
bc7f75fa
AK		 1177 skb_put(skb, l1);
1178 goto copydone;
1179 } /* if */
1180 }
1181
1182 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1183 length = le16_to_cpu(rx_desc->wb.upper.length[j]);
1184 if (!length)
1185 break;
1186
47f44e40 1187 ps_page = &buffer_info->ps_pages[j];
0be3f55f
NN		 1188 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1189 DMA_FROM_DEVICE);
bc7f75fa
AK		 1190 ps_page->dma = 0;
1191 skb_fill_page_desc(skb, j, ps_page->page, 0, length);
1192 ps_page->page = NULL;
1193 skb->len += length;
1194 skb->data_len += length;
1195 skb->truesize += length;
1196 }
1197
eb7c3adb
JK		 1198 /* strip the ethernet crc, problem is we're using pages now so
1199 * this whole operation can get a little cpu intensive
1200 */
1201 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
1202 pskb_trim(skb, skb->len - 4);
1203
bc7f75fa
AK		 1204copydone:
1205 total_rx_bytes += skb->len;
1206 total_rx_packets++;
1207
1208 e1000_rx_checksum(adapter, staterr, le16_to_cpu(
1209 rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
1210
1211 if (rx_desc->wb.upper.header_status &
1212 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
1213 adapter->rx_hdr_split++;
1214
1215 e1000_receive_skb(adapter, netdev, skb,
1216 staterr, rx_desc->wb.middle.vlan);
1217
1218next_desc:
1219 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
1220 buffer_info->skb = NULL;
1221
1222 /* return some buffers to hardware, one at a time is too slow */
1223 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1224 adapter->alloc_rx_buf(adapter, cleaned_count);
1225 cleaned_count = 0;
1226 }
1227
1228 /* use prefetched values */
1229 rx_desc = next_rxd;
1230 buffer_info = next_buffer;
1231
1232 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1233 }
1234 rx_ring->next_to_clean = i;
1235
1236 cleaned_count = e1000_desc_unused(rx_ring);
1237 if (cleaned_count)
1238 adapter->alloc_rx_buf(adapter, cleaned_count);
1239
bc7f75fa 1240 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 1241 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK		 1242 netdev->stats.rx_bytes += total_rx_bytes;
1243 netdev->stats.rx_packets += total_rx_packets;
bc7f75fa
AK		 1244 return cleaned;
1245}
1246
97ac8cae
BA		 1247/**
1248 * e1000_consume_page - helper function
1249 **/
1250static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
1251 u16 length)
1252{
1253 bi->page = NULL;
1254 skb->len += length;
1255 skb->data_len += length;
1256 skb->truesize += length;
1257}
1258
1259/**
1260 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
1261 * @adapter: board private structure
1262 *
1263 * the return value indicates whether actual cleaning was done, there
1264 * is no guarantee that everything was cleaned
1265 **/
1266
1267static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
1268 int *work_done, int work_to_do)
1269{
1270 struct net_device *netdev = adapter->netdev;
1271 struct pci_dev *pdev = adapter->pdev;
1272 struct e1000_ring *rx_ring = adapter->rx_ring;
1273 struct e1000_rx_desc *rx_desc, *next_rxd;
1274 struct e1000_buffer *buffer_info, *next_buffer;
1275 u32 length;
1276 unsigned int i;
1277 int cleaned_count = 0;
1278 bool cleaned = false;
1279 unsigned int total_rx_bytes=0, total_rx_packets=0;
1280
1281 i = rx_ring->next_to_clean;
1282 rx_desc = E1000_RX_DESC(*rx_ring, i);
1283 buffer_info = &rx_ring->buffer_info[i];
1284
1285 while (rx_desc->status & E1000_RXD_STAT_DD) {
1286 struct sk_buff *skb;
1287 u8 status;
1288
1289 if (*work_done >= work_to_do)
1290 break;
1291 (*work_done)++;
2d0bb1c1 1292 rmb(); /* read descriptor and rx_buffer_info after status DD */
97ac8cae
BA		 1293
1294 status = rx_desc->status;
1295 skb = buffer_info->skb;
1296 buffer_info->skb = NULL;
1297
1298 ++i;
1299 if (i == rx_ring->count)
1300 i = 0;
1301 next_rxd = E1000_RX_DESC(*rx_ring, i);
1302 prefetch(next_rxd);
1303
1304 next_buffer = &rx_ring->buffer_info[i];
1305
1306 cleaned = true;
1307 cleaned_count++;
0be3f55f
NN		 1308 dma_unmap_page(&pdev->dev, buffer_info->dma, PAGE_SIZE,
1309 DMA_FROM_DEVICE);
97ac8cae
BA		 1310 buffer_info->dma = 0;
1311
1312 length = le16_to_cpu(rx_desc->length);
1313
1314 /* errors is only valid for DD + EOP descriptors */
1315 if (unlikely((status & E1000_RXD_STAT_EOP) &&
1316 (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) {
1317 /* recycle both page and skb */
1318 buffer_info->skb = skb;
1319 /* an error means any chain goes out the window
1320 * too */
1321 if (rx_ring->rx_skb_top)
1322 dev_kfree_skb(rx_ring->rx_skb_top);
1323 rx_ring->rx_skb_top = NULL;
1324 goto next_desc;
1325 }
1326
1327#define rxtop rx_ring->rx_skb_top
1328 if (!(status & E1000_RXD_STAT_EOP)) {
1329 /* this descriptor is only the beginning (or middle) */
1330 if (!rxtop) {
1331 /* this is the beginning of a chain */
1332 rxtop = skb;
1333 skb_fill_page_desc(rxtop, 0, buffer_info->page,
1334 0, length);
1335 } else {
1336 /* this is the middle of a chain */
1337 skb_fill_page_desc(rxtop,
1338 skb_shinfo(rxtop)->nr_frags,
1339 buffer_info->page, 0, length);
1340 /* re-use the skb, only consumed the page */
1341 buffer_info->skb = skb;
1342 }
1343 e1000_consume_page(buffer_info, rxtop, length);
1344 goto next_desc;
1345 } else {
1346 if (rxtop) {
1347 /* end of the chain */
1348 skb_fill_page_desc(rxtop,
1349 skb_shinfo(rxtop)->nr_frags,
1350 buffer_info->page, 0, length);
1351 /* re-use the current skb, we only consumed the
1352 * page */
1353 buffer_info->skb = skb;
1354 skb = rxtop;
1355 rxtop = NULL;
1356 e1000_consume_page(buffer_info, skb, length);
1357 } else {
1358 /* no chain, got EOP, this buf is the packet
1359 * copybreak to save the put_page/alloc_page */
1360 if (length <= copybreak &&
1361 skb_tailroom(skb) >= length) {
1362 u8 *vaddr;
1363 vaddr = kmap_atomic(buffer_info->page,
1364 KM_SKB_DATA_SOFTIRQ);
1365 memcpy(skb_tail_pointer(skb), vaddr,
1366 length);
1367 kunmap_atomic(vaddr,
1368 KM_SKB_DATA_SOFTIRQ);
1369 /* re-use the page, so don't erase
1370 * buffer_info->page */
1371 skb_put(skb, length);
1372 } else {
1373 skb_fill_page_desc(skb, 0,
1374 buffer_info->page, 0,
1375 length);
1376 e1000_consume_page(buffer_info, skb,
1377 length);
1378 }
1379 }
1380 }
1381
1382 /* Receive Checksum Offload XXX recompute due to CRC strip? */
1383 e1000_rx_checksum(adapter,
1384 (u32)(status) |
1385 ((u32)(rx_desc->errors) << 24),
1386 le16_to_cpu(rx_desc->csum), skb);
1387
1388 /* probably a little skewed due to removing CRC */
1389 total_rx_bytes += skb->len;
1390 total_rx_packets++;
1391
1392 /* eth type trans needs skb->data to point to something */
1393 if (!pskb_may_pull(skb, ETH_HLEN)) {
44defeb3 1394 e_err("pskb_may_pull failed.\n");
97ac8cae
BA		 1395 dev_kfree_skb(skb);
1396 goto next_desc;
1397 }
1398
1399 e1000_receive_skb(adapter, netdev, skb, status,
1400 rx_desc->special);
1401
1402next_desc:
1403 rx_desc->status = 0;
1404
1405 /* return some buffers to hardware, one at a time is too slow */
1406 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1407 adapter->alloc_rx_buf(adapter, cleaned_count);
1408 cleaned_count = 0;
1409 }
1410
1411 /* use prefetched values */
1412 rx_desc = next_rxd;
1413 buffer_info = next_buffer;
1414 }
1415 rx_ring->next_to_clean = i;
1416
1417 cleaned_count = e1000_desc_unused(rx_ring);
1418 if (cleaned_count)
1419 adapter->alloc_rx_buf(adapter, cleaned_count);
1420
1421 adapter->total_rx_bytes += total_rx_bytes;
1422 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK		 1423 netdev->stats.rx_bytes += total_rx_bytes;
1424 netdev->stats.rx_packets += total_rx_packets;
97ac8cae
BA		 1425 return cleaned;
1426}
1427
bc7f75fa
AK		 1428/**
1429 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1430 * @adapter: board private structure
1431 **/
1432static void e1000_clean_rx_ring(struct e1000_adapter *adapter)
1433{
1434 struct e1000_ring *rx_ring = adapter->rx_ring;
1435 struct e1000_buffer *buffer_info;
1436 struct e1000_ps_page *ps_page;
1437 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 1438 unsigned int i, j;
1439
1440 /* Free all the Rx ring sk_buffs */
1441 for (i = 0; i < rx_ring->count; i++) {
1442 buffer_info = &rx_ring->buffer_info[i];
1443 if (buffer_info->dma) {
1444 if (adapter->clean_rx == e1000_clean_rx_irq)
0be3f55f 1445 dma_unmap_single(&pdev->dev, buffer_info->dma,
bc7f75fa 1446 adapter->rx_buffer_len,
0be3f55f 1447 DMA_FROM_DEVICE);
97ac8cae 1448 else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
0be3f55f 1449 dma_unmap_page(&pdev->dev, buffer_info->dma,
97ac8cae 1450 PAGE_SIZE,
0be3f55f 1451 DMA_FROM_DEVICE);
bc7f75fa 1452 else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
0be3f55f 1453 dma_unmap_single(&pdev->dev, buffer_info->dma,
bc7f75fa 1454 adapter->rx_ps_bsize0,
0be3f55f 1455 DMA_FROM_DEVICE);
bc7f75fa
AK		 1456 buffer_info->dma = 0;
1457 }
1458
97ac8cae
BA		 1459 if (buffer_info->page) {
1460 put_page(buffer_info->page);
1461 buffer_info->page = NULL;
1462 }
1463
bc7f75fa
AK		 1464 if (buffer_info->skb) {
1465 dev_kfree_skb(buffer_info->skb);
1466 buffer_info->skb = NULL;
1467 }
1468
1469 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40 1470 ps_page = &buffer_info->ps_pages[j];
bc7f75fa
AK		 1471 if (!ps_page->page)
1472 break;
0be3f55f
NN		 1473 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1474 DMA_FROM_DEVICE);
bc7f75fa
AK		 1475 ps_page->dma = 0;
1476 put_page(ps_page->page);
1477 ps_page->page = NULL;
1478 }
1479 }
1480
1481 /* there also may be some cached data from a chained receive */
1482 if (rx_ring->rx_skb_top) {
1483 dev_kfree_skb(rx_ring->rx_skb_top);
1484 rx_ring->rx_skb_top = NULL;
1485 }
1486
bc7f75fa
AK		 1487 /* Zero out the descriptor ring */
1488 memset(rx_ring->desc, 0, rx_ring->size);
1489
1490 rx_ring->next_to_clean = 0;
1491 rx_ring->next_to_use = 0;
b94b5028 1492 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK		 1493
1494 writel(0, adapter->hw.hw_addr + rx_ring->head);
1495 writel(0, adapter->hw.hw_addr + rx_ring->tail);
1496}
1497
a8f88ff5
JB		 1498static void e1000e_downshift_workaround(struct work_struct *work)
1499{
1500 struct e1000_adapter *adapter = container_of(work,
1501 struct e1000_adapter, downshift_task);
1502
1503 e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);
1504}
1505
bc7f75fa
AK		 1506/**
1507 * e1000_intr_msi - Interrupt Handler
1508 * @irq: interrupt number
1509 * @data: pointer to a network interface device structure
1510 **/
1511static irqreturn_t e1000_intr_msi(int irq, void *data)
1512{
1513 struct net_device *netdev = data;
1514 struct e1000_adapter *adapter = netdev_priv(netdev);
1515 struct e1000_hw *hw = &adapter->hw;
1516 u32 icr = er32(ICR);
1517
ad68076e
BA		 1518 /*
1519 * read ICR disables interrupts using IAM
1520 */
bc7f75fa 1521
573cca8c 1522 if (icr & E1000_ICR_LSC) {
bc7f75fa 1523 hw->mac.get_link_status = 1;
ad68076e
BA		 1524 /*
1525 * ICH8 workaround-- Call gig speed drop workaround on cable
1526 * disconnect (LSC) before accessing any PHY registers
1527 */
bc7f75fa
AK		 1528 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1529 (!(er32(STATUS) & E1000_STATUS_LU)))
a8f88ff5 1530 schedule_work(&adapter->downshift_task);
bc7f75fa 1531
ad68076e
BA		 1532 /*
1533 * 80003ES2LAN workaround-- For packet buffer work-around on
bc7f75fa 1534 * link down event; disable receives here in the ISR and reset
ad68076e
BA		 1535 * adapter in watchdog
1536 */
bc7f75fa
AK		 1537 if (netif_carrier_ok(netdev) &&
1538 adapter->flags & FLAG_RX_NEEDS_RESTART) {
1539 /* disable receives */
1540 u32 rctl = er32(RCTL);
1541 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1542 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 1543 }
1544 /* guard against interrupt when we're going down */
1545 if (!test_bit(__E1000_DOWN, &adapter->state))
1546 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1547 }
1548
288379f0 1549 if (napi_schedule_prep(&adapter->napi)) {
bc7f75fa
AK		 1550 adapter->total_tx_bytes = 0;
1551 adapter->total_tx_packets = 0;
1552 adapter->total_rx_bytes = 0;
1553 adapter->total_rx_packets = 0;
288379f0 1554 __napi_schedule(&adapter->napi);
bc7f75fa
AK		 1555 }
1556
1557 return IRQ_HANDLED;
1558}
1559
1560/**
1561 * e1000_intr - Interrupt Handler
1562 * @irq: interrupt number
1563 * @data: pointer to a network interface device structure
1564 **/
1565static irqreturn_t e1000_intr(int irq, void *data)
1566{
1567 struct net_device *netdev = data;
1568 struct e1000_adapter *adapter = netdev_priv(netdev);
1569 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 1570 u32 rctl, icr = er32(ICR);
4662e82b 1571
a68ea775 1572 if (!icr || test_bit(__E1000_DOWN, &adapter->state))
bc7f75fa
AK		 1573 return IRQ_NONE; /* Not our interrupt */
1574
ad68076e
BA		 1575 /*
1576 * IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1577 * not set, then the adapter didn't send an interrupt
1578 */
bc7f75fa
AK		 1579 if (!(icr & E1000_ICR_INT_ASSERTED))
1580 return IRQ_NONE;
1581
ad68076e
BA		 1582 /*
1583 * Interrupt Auto-Mask...upon reading ICR,
1584 * interrupts are masked. No need for the
1585 * IMC write
1586 */
bc7f75fa 1587
573cca8c 1588 if (icr & E1000_ICR_LSC) {
bc7f75fa 1589 hw->mac.get_link_status = 1;
ad68076e
BA		 1590 /*
1591 * ICH8 workaround-- Call gig speed drop workaround on cable
1592 * disconnect (LSC) before accessing any PHY registers
1593 */
bc7f75fa
AK		 1594 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1595 (!(er32(STATUS) & E1000_STATUS_LU)))
a8f88ff5 1596 schedule_work(&adapter->downshift_task);
bc7f75fa 1597
ad68076e
BA		 1598 /*
1599 * 80003ES2LAN workaround--
bc7f75fa
AK		 1600 * For packet buffer work-around on link down event;
1601 * disable receives here in the ISR and
1602 * reset adapter in watchdog
1603 */
1604 if (netif_carrier_ok(netdev) &&
1605 (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1606 /* disable receives */
1607 rctl = er32(RCTL);
1608 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1609 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 1610 }
1611 /* guard against interrupt when we're going down */
1612 if (!test_bit(__E1000_DOWN, &adapter->state))
1613 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1614 }
1615
288379f0 1616 if (napi_schedule_prep(&adapter->napi)) {
bc7f75fa
AK		 1617 adapter->total_tx_bytes = 0;
1618 adapter->total_tx_packets = 0;
1619 adapter->total_rx_bytes = 0;
1620 adapter->total_rx_packets = 0;
288379f0 1621 __napi_schedule(&adapter->napi);
bc7f75fa
AK		 1622 }
1623
1624 return IRQ_HANDLED;
1625}
1626
4662e82b
BA		 1627static irqreturn_t e1000_msix_other(int irq, void *data)
1628{
1629 struct net_device *netdev = data;
1630 struct e1000_adapter *adapter = netdev_priv(netdev);
1631 struct e1000_hw *hw = &adapter->hw;
1632 u32 icr = er32(ICR);
1633
1634 if (!(icr & E1000_ICR_INT_ASSERTED)) {
a3c69fef
JB		 1635 if (!test_bit(__E1000_DOWN, &adapter->state))
1636 ew32(IMS, E1000_IMS_OTHER);
4662e82b
BA		 1637 return IRQ_NONE;
1638 }
1639
1640 if (icr & adapter->eiac_mask)
1641 ew32(ICS, (icr & adapter->eiac_mask));
1642
1643 if (icr & E1000_ICR_OTHER) {
1644 if (!(icr & E1000_ICR_LSC))
1645 goto no_link_interrupt;
1646 hw->mac.get_link_status = 1;
1647 /* guard against interrupt when we're going down */
1648 if (!test_bit(__E1000_DOWN, &adapter->state))
1649 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1650 }
1651
1652no_link_interrupt:
a3c69fef
JB		 1653 if (!test_bit(__E1000_DOWN, &adapter->state))
1654 ew32(IMS, E1000_IMS_LSC | E1000_IMS_OTHER);
4662e82b
BA		 1655
1656 return IRQ_HANDLED;
1657}
1658
1659
1660static irqreturn_t e1000_intr_msix_tx(int irq, void *data)
1661{
1662 struct net_device *netdev = data;
1663 struct e1000_adapter *adapter = netdev_priv(netdev);
1664 struct e1000_hw *hw = &adapter->hw;
1665 struct e1000_ring *tx_ring = adapter->tx_ring;
1666
1667
1668 adapter->total_tx_bytes = 0;
1669 adapter->total_tx_packets = 0;
1670
1671 if (!e1000_clean_tx_irq(adapter))
1672 /* Ring was not completely cleaned, so fire another interrupt */
1673 ew32(ICS, tx_ring->ims_val);
1674
1675 return IRQ_HANDLED;
1676}
1677
1678static irqreturn_t e1000_intr_msix_rx(int irq, void *data)
1679{
1680 struct net_device *netdev = data;
1681 struct e1000_adapter *adapter = netdev_priv(netdev);
1682
1683 /* Write the ITR value calculated at the end of the
1684 * previous interrupt.
1685 */
1686 if (adapter->rx_ring->set_itr) {
1687 writel(1000000000 / (adapter->rx_ring->itr_val * 256),
1688 adapter->hw.hw_addr + adapter->rx_ring->itr_register);
1689 adapter->rx_ring->set_itr = 0;
1690 }
1691
288379f0 1692 if (napi_schedule_prep(&adapter->napi)) {
4662e82b
BA		 1693 adapter->total_rx_bytes = 0;
1694 adapter->total_rx_packets = 0;
288379f0 1695 __napi_schedule(&adapter->napi);
4662e82b
BA		 1696 }
1697 return IRQ_HANDLED;
1698}
1699
1700/**
1701 * e1000_configure_msix - Configure MSI-X hardware
1702 *
1703 * e1000_configure_msix sets up the hardware to properly
1704 * generate MSI-X interrupts.
1705 **/
1706static void e1000_configure_msix(struct e1000_adapter *adapter)
1707{
1708 struct e1000_hw *hw = &adapter->hw;
1709 struct e1000_ring *rx_ring = adapter->rx_ring;
1710 struct e1000_ring *tx_ring = adapter->tx_ring;
1711 int vector = 0;
1712 u32 ctrl_ext, ivar = 0;
1713
1714 adapter->eiac_mask = 0;
1715
1716 /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1717 if (hw->mac.type == e1000_82574) {
1718 u32 rfctl = er32(RFCTL);
1719 rfctl |= E1000_RFCTL_ACK_DIS;
1720 ew32(RFCTL, rfctl);
1721 }
1722
1723#define E1000_IVAR_INT_ALLOC_VALID 0x8
1724 /* Configure Rx vector */
1725 rx_ring->ims_val = E1000_IMS_RXQ0;
1726 adapter->eiac_mask |= rx_ring->ims_val;
1727 if (rx_ring->itr_val)
1728 writel(1000000000 / (rx_ring->itr_val * 256),
1729 hw->hw_addr + rx_ring->itr_register);
1730 else
1731 writel(1, hw->hw_addr + rx_ring->itr_register);
1732 ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
1733
1734 /* Configure Tx vector */
1735 tx_ring->ims_val = E1000_IMS_TXQ0;
1736 vector++;
1737 if (tx_ring->itr_val)
1738 writel(1000000000 / (tx_ring->itr_val * 256),
1739 hw->hw_addr + tx_ring->itr_register);
1740 else
1741 writel(1, hw->hw_addr + tx_ring->itr_register);
1742 adapter->eiac_mask |= tx_ring->ims_val;
1743 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
1744
1745 /* set vector for Other Causes, e.g. link changes */
1746 vector++;
1747 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
1748 if (rx_ring->itr_val)
1749 writel(1000000000 / (rx_ring->itr_val * 256),
1750 hw->hw_addr + E1000_EITR_82574(vector));
1751 else
1752 writel(1, hw->hw_addr + E1000_EITR_82574(vector));
1753
1754 /* Cause Tx interrupts on every write back */
1755 ivar |= (1 << 31);
1756
1757 ew32(IVAR, ivar);
1758
1759 /* enable MSI-X PBA support */
1760 ctrl_ext = er32(CTRL_EXT);
1761 ctrl_ext |= E1000_CTRL_EXT_PBA_CLR;
1762
1763 /* Auto-Mask Other interrupts upon ICR read */
1764#define E1000_EIAC_MASK_82574 0x01F00000
1765 ew32(IAM, ~E1000_EIAC_MASK_82574 | E1000_IMS_OTHER);
1766 ctrl_ext |= E1000_CTRL_EXT_EIAME;
1767 ew32(CTRL_EXT, ctrl_ext);
1768 e1e_flush();
1769}
1770
1771void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
1772{
1773 if (adapter->msix_entries) {
1774 pci_disable_msix(adapter->pdev);
1775 kfree(adapter->msix_entries);
1776 adapter->msix_entries = NULL;
1777 } else if (adapter->flags & FLAG_MSI_ENABLED) {
1778 pci_disable_msi(adapter->pdev);
1779 adapter->flags &= ~FLAG_MSI_ENABLED;
1780 }
4662e82b
BA		 1781}
1782
1783/**
1784 * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
1785 *
1786 * Attempt to configure interrupts using the best available
1787 * capabilities of the hardware and kernel.
1788 **/
1789void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
1790{
1791 int err;
8e86acd7 1792 int i;
4662e82b
BA		 1793
1794 switch (adapter->int_mode) {
1795 case E1000E_INT_MODE_MSIX:
1796 if (adapter->flags & FLAG_HAS_MSIX) {
8e86acd7
JK		 1797 adapter->num_vectors = 3; /* RxQ0, TxQ0 and other */
1798 adapter->msix_entries = kcalloc(adapter->num_vectors,
4662e82b
BA		 1799 sizeof(struct msix_entry),
1800 GFP_KERNEL);
1801 if (adapter->msix_entries) {
8e86acd7 1802 for (i = 0; i < adapter->num_vectors; i++)
4662e82b
BA		 1803 adapter->msix_entries[i].entry = i;
1804
1805 err = pci_enable_msix(adapter->pdev,
1806 adapter->msix_entries,
8e86acd7
JK		 1807 adapter->num_vectors);
1808 if (err == 0) {
4662e82b 1809 return;
8e86acd7 1810 }
4662e82b
BA		 1811 }
1812 /* MSI-X failed, so fall through and try MSI */
1813 e_err("Failed to initialize MSI-X interrupts. "
1814 "Falling back to MSI interrupts.\n");
1815 e1000e_reset_interrupt_capability(adapter);
1816 }
1817 adapter->int_mode = E1000E_INT_MODE_MSI;
1818 /* Fall through */
1819 case E1000E_INT_MODE_MSI:
1820 if (!pci_enable_msi(adapter->pdev)) {
1821 adapter->flags |= FLAG_MSI_ENABLED;
1822 } else {
1823 adapter->int_mode = E1000E_INT_MODE_LEGACY;
1824 e_err("Failed to initialize MSI interrupts. Falling "
1825 "back to legacy interrupts.\n");
1826 }
1827 /* Fall through */
1828 case E1000E_INT_MODE_LEGACY:
1829 /* Don't do anything; this is the system default */
1830 break;
1831 }
8e86acd7
JK		 1832
1833 /* store the number of vectors being used */
1834 adapter->num_vectors = 1;
4662e82b
BA		 1835}
1836
1837/**
1838 * e1000_request_msix - Initialize MSI-X interrupts
1839 *
1840 * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
1841 * kernel.
1842 **/
1843static int e1000_request_msix(struct e1000_adapter *adapter)
1844{
1845 struct net_device *netdev = adapter->netdev;
1846 int err = 0, vector = 0;
1847
1848 if (strlen(netdev->name) < (IFNAMSIZ - 5))
cb7b48f6 1849 sprintf(adapter->rx_ring->name, "%s-rx-0", netdev->name);
4662e82b
BA		 1850 else
1851 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
1852 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1853 e1000_intr_msix_rx, 0, adapter->rx_ring->name,
4662e82b
BA		 1854 netdev);
1855 if (err)
1856 goto out;
1857 adapter->rx_ring->itr_register = E1000_EITR_82574(vector);
1858 adapter->rx_ring->itr_val = adapter->itr;
1859 vector++;
1860
1861 if (strlen(netdev->name) < (IFNAMSIZ - 5))
cb7b48f6 1862 sprintf(adapter->tx_ring->name, "%s-tx-0", netdev->name);
4662e82b
BA		 1863 else
1864 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
1865 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1866 e1000_intr_msix_tx, 0, adapter->tx_ring->name,
4662e82b
BA		 1867 netdev);
1868 if (err)
1869 goto out;
1870 adapter->tx_ring->itr_register = E1000_EITR_82574(vector);
1871 adapter->tx_ring->itr_val = adapter->itr;
1872 vector++;
1873
1874 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1875 e1000_msix_other, 0, netdev->name, netdev);
4662e82b
BA		 1876 if (err)
1877 goto out;
1878
1879 e1000_configure_msix(adapter);
1880 return 0;
1881out:
1882 return err;
1883}
1884
f8d59f78
BA		 1885/**
1886 * e1000_request_irq - initialize interrupts
1887 *
1888 * Attempts to configure interrupts using the best available
1889 * capabilities of the hardware and kernel.
1890 **/
bc7f75fa
AK		 1891static int e1000_request_irq(struct e1000_adapter *adapter)
1892{
1893 struct net_device *netdev = adapter->netdev;
bc7f75fa
AK		 1894 int err;
1895
4662e82b
BA		 1896 if (adapter->msix_entries) {
1897 err = e1000_request_msix(adapter);
1898 if (!err)
1899 return err;
1900 /* fall back to MSI */
1901 e1000e_reset_interrupt_capability(adapter);
1902 adapter->int_mode = E1000E_INT_MODE_MSI;
1903 e1000e_set_interrupt_capability(adapter);
bc7f75fa 1904 }
4662e82b 1905 if (adapter->flags & FLAG_MSI_ENABLED) {
a0607fd3 1906 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0,
4662e82b
BA		 1907 netdev->name, netdev);
1908 if (!err)
1909 return err;
bc7f75fa 1910
4662e82b
BA		 1911 /* fall back to legacy interrupt */
1912 e1000e_reset_interrupt_capability(adapter);
1913 adapter->int_mode = E1000E_INT_MODE_LEGACY;
bc7f75fa
AK		 1914 }
1915
a0607fd3 1916 err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED,
4662e82b
BA		 1917 netdev->name, netdev);
1918 if (err)
1919 e_err("Unable to allocate interrupt, Error: %d\n", err);
1920
bc7f75fa
AK		 1921 return err;
1922}
1923
1924static void e1000_free_irq(struct e1000_adapter *adapter)
1925{
1926 struct net_device *netdev = adapter->netdev;
1927
4662e82b
BA		 1928 if (adapter->msix_entries) {
1929 int vector = 0;
1930
1931 free_irq(adapter->msix_entries[vector].vector, netdev);
1932 vector++;
1933
1934 free_irq(adapter->msix_entries[vector].vector, netdev);
1935 vector++;
1936
1937 /* Other Causes interrupt vector */
1938 free_irq(adapter->msix_entries[vector].vector, netdev);
1939 return;
bc7f75fa 1940 }
4662e82b
BA		 1941
1942 free_irq(adapter->pdev->irq, netdev);
bc7f75fa
AK		 1943}
1944
1945/**
1946 * e1000_irq_disable - Mask off interrupt generation on the NIC
1947 **/
1948static void e1000_irq_disable(struct e1000_adapter *adapter)
1949{
1950 struct e1000_hw *hw = &adapter->hw;
1951
bc7f75fa 1952 ew32(IMC, ~0);
4662e82b
BA		 1953 if (adapter->msix_entries)
1954 ew32(EIAC_82574, 0);
bc7f75fa 1955 e1e_flush();
8e86acd7
JK		 1956
1957 if (adapter->msix_entries) {
1958 int i;
1959 for (i = 0; i < adapter->num_vectors; i++)
1960 synchronize_irq(adapter->msix_entries[i].vector);
1961 } else {
1962 synchronize_irq(adapter->pdev->irq);
1963 }
bc7f75fa
AK		 1964}
1965
1966/**
1967 * e1000_irq_enable - Enable default interrupt generation settings
1968 **/
1969static void e1000_irq_enable(struct e1000_adapter *adapter)
1970{
1971 struct e1000_hw *hw = &adapter->hw;
1972
4662e82b
BA		 1973 if (adapter->msix_entries) {
1974 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
1975 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | E1000_IMS_LSC);
1976 } else {
1977 ew32(IMS, IMS_ENABLE_MASK);
1978 }
74ef9c39 1979 e1e_flush();
bc7f75fa
AK		 1980}
1981
1982/**
1983 * e1000_get_hw_control - get control of the h/w from f/w
1984 * @adapter: address of board private structure
1985 *
489815ce 1986 * e1000_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK		 1987 * For ASF and Pass Through versions of f/w this means that
1988 * the driver is loaded. For AMT version (only with 82573)
1989 * of the f/w this means that the network i/f is open.
1990 **/
1991static void e1000_get_hw_control(struct e1000_adapter *adapter)
1992{
1993 struct e1000_hw *hw = &adapter->hw;
1994 u32 ctrl_ext;
1995 u32 swsm;
1996
1997 /* Let firmware know the driver has taken over */
1998 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
1999 swsm = er32(SWSM);
2000 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
2001 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2002 ctrl_ext = er32(CTRL_EXT);
ad68076e 2003 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK		 2004 }
2005}
2006
2007/**
2008 * e1000_release_hw_control - release control of the h/w to f/w
2009 * @adapter: address of board private structure
2010 *
489815ce 2011 * e1000_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK		 2012 * For ASF and Pass Through versions of f/w this means that the
2013 * driver is no longer loaded. For AMT version (only with 82573) i
2014 * of the f/w this means that the network i/f is closed.
2015 *
2016 **/
2017static void e1000_release_hw_control(struct e1000_adapter *adapter)
2018{
2019 struct e1000_hw *hw = &adapter->hw;
2020 u32 ctrl_ext;
2021 u32 swsm;
2022
2023 /* Let firmware taken over control of h/w */
2024 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2025 swsm = er32(SWSM);
2026 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
2027 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2028 ctrl_ext = er32(CTRL_EXT);
ad68076e 2029 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK		 2030 }
2031}
2032
bc7f75fa
AK		 2033/**
2034 * @e1000_alloc_ring - allocate memory for a ring structure
2035 **/
2036static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
2037 struct e1000_ring *ring)
2038{
2039 struct pci_dev *pdev = adapter->pdev;
2040
2041 ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma,
2042 GFP_KERNEL);
2043 if (!ring->desc)
2044 return -ENOMEM;
2045
2046 return 0;
2047}
2048
2049/**
2050 * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
2051 * @adapter: board private structure
2052 *
2053 * Return 0 on success, negative on failure
2054 **/
2055int e1000e_setup_tx_resources(struct e1000_adapter *adapter)
2056{
2057 struct e1000_ring *tx_ring = adapter->tx_ring;
2058 int err = -ENOMEM, size;
2059
2060 size = sizeof(struct e1000_buffer) * tx_ring->count;
2061 tx_ring->buffer_info = vmalloc(size);
2062 if (!tx_ring->buffer_info)
2063 goto err;
2064 memset(tx_ring->buffer_info, 0, size);
2065
2066 /* round up to nearest 4K */
2067 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
2068 tx_ring->size = ALIGN(tx_ring->size, 4096);
2069
2070 err = e1000_alloc_ring_dma(adapter, tx_ring);
2071 if (err)
2072 goto err;
2073
2074 tx_ring->next_to_use = 0;
2075 tx_ring->next_to_clean = 0;
bc7f75fa
AK		 2076
2077 return 0;
2078err:
2079 vfree(tx_ring->buffer_info);
44defeb3 2080 e_err("Unable to allocate memory for the transmit descriptor ring\n");
bc7f75fa
AK		 2081 return err;
2082}
2083
2084/**
2085 * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
2086 * @adapter: board private structure
2087 *
2088 * Returns 0 on success, negative on failure
2089 **/
2090int e1000e_setup_rx_resources(struct e1000_adapter *adapter)
2091{
2092 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40
AK		 2093 struct e1000_buffer *buffer_info;
2094 int i, size, desc_len, err = -ENOMEM;
bc7f75fa
AK		 2095
2096 size = sizeof(struct e1000_buffer) * rx_ring->count;
2097 rx_ring->buffer_info = vmalloc(size);
2098 if (!rx_ring->buffer_info)
2099 goto err;
2100 memset(rx_ring->buffer_info, 0, size);
2101
47f44e40
AK		 2102 for (i = 0; i < rx_ring->count; i++) {
2103 buffer_info = &rx_ring->buffer_info[i];
2104 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
2105 sizeof(struct e1000_ps_page),
2106 GFP_KERNEL);
2107 if (!buffer_info->ps_pages)
2108 goto err_pages;
2109 }
bc7f75fa
AK		 2110
2111 desc_len = sizeof(union e1000_rx_desc_packet_split);
2112
2113 /* Round up to nearest 4K */
2114 rx_ring->size = rx_ring->count * desc_len;
2115 rx_ring->size = ALIGN(rx_ring->size, 4096);
2116
2117 err = e1000_alloc_ring_dma(adapter, rx_ring);
2118 if (err)
47f44e40 2119 goto err_pages;
bc7f75fa
AK		 2120
2121 rx_ring->next_to_clean = 0;
2122 rx_ring->next_to_use = 0;
2123 rx_ring->rx_skb_top = NULL;
2124
2125 return 0;
47f44e40
AK		 2126
2127err_pages:
2128 for (i = 0; i < rx_ring->count; i++) {
2129 buffer_info = &rx_ring->buffer_info[i];
2130 kfree(buffer_info->ps_pages);
2131 }
bc7f75fa
AK		 2132err:
2133 vfree(rx_ring->buffer_info);
44defeb3 2134 e_err("Unable to allocate memory for the transmit descriptor ring\n");
bc7f75fa
AK		 2135 return err;
2136}
2137
2138/**
2139 * e1000_clean_tx_ring - Free Tx Buffers
2140 * @adapter: board private structure
2141 **/
2142static void e1000_clean_tx_ring(struct e1000_adapter *adapter)
2143{
2144 struct e1000_ring *tx_ring = adapter->tx_ring;
2145 struct e1000_buffer *buffer_info;
2146 unsigned long size;
2147 unsigned int i;
2148
2149 for (i = 0; i < tx_ring->count; i++) {
2150 buffer_info = &tx_ring->buffer_info[i];
2151 e1000_put_txbuf(adapter, buffer_info);
2152 }
2153
2154 size = sizeof(struct e1000_buffer) * tx_ring->count;
2155 memset(tx_ring->buffer_info, 0, size);
2156
2157 memset(tx_ring->desc, 0, tx_ring->size);
2158
2159 tx_ring->next_to_use = 0;
2160 tx_ring->next_to_clean = 0;
2161
2162 writel(0, adapter->hw.hw_addr + tx_ring->head);
2163 writel(0, adapter->hw.hw_addr + tx_ring->tail);
2164}
2165
2166/**
2167 * e1000e_free_tx_resources - Free Tx Resources per Queue
2168 * @adapter: board private structure
2169 *
2170 * Free all transmit software resources
2171 **/
2172void e1000e_free_tx_resources(struct e1000_adapter *adapter)
2173{
2174 struct pci_dev *pdev = adapter->pdev;
2175 struct e1000_ring *tx_ring = adapter->tx_ring;
2176
2177 e1000_clean_tx_ring(adapter);
2178
2179 vfree(tx_ring->buffer_info);
2180 tx_ring->buffer_info = NULL;
2181
2182 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
2183 tx_ring->dma);
2184 tx_ring->desc = NULL;
2185}
2186
2187/**
2188 * e1000e_free_rx_resources - Free Rx Resources
2189 * @adapter: board private structure
2190 *
2191 * Free all receive software resources
2192 **/
2193
2194void e1000e_free_rx_resources(struct e1000_adapter *adapter)
2195{
2196 struct pci_dev *pdev = adapter->pdev;
2197 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40 2198 int i;
bc7f75fa
AK		 2199
2200 e1000_clean_rx_ring(adapter);
2201
47f44e40
AK		 2202 for (i = 0; i < rx_ring->count; i++) {
2203 kfree(rx_ring->buffer_info[i].ps_pages);
2204 }
2205
bc7f75fa
AK		 2206 vfree(rx_ring->buffer_info);
2207 rx_ring->buffer_info = NULL;
2208
bc7f75fa
AK		 2209 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2210 rx_ring->dma);
2211 rx_ring->desc = NULL;
2212}
2213
2214/**
2215 * e1000_update_itr - update the dynamic ITR value based on statistics
489815ce
AK		 2216 * @adapter: pointer to adapter
2217 * @itr_setting: current adapter->itr
2218 * @packets: the number of packets during this measurement interval
2219 * @bytes: the number of bytes during this measurement interval
2220 *
bc7f75fa
AK		 2221 * Stores a new ITR value based on packets and byte
2222 * counts during the last interrupt. The advantage of per interrupt
2223 * computation is faster updates and more accurate ITR for the current
2224 * traffic pattern. Constants in this function were computed
2225 * based on theoretical maximum wire speed and thresholds were set based
2226 * on testing data as well as attempting to minimize response time
4662e82b
BA		 2227 * while increasing bulk throughput. This functionality is controlled
2228 * by the InterruptThrottleRate module parameter.
bc7f75fa
AK		 2229 **/
2230static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
2231 u16 itr_setting, int packets,
2232 int bytes)
2233{
2234 unsigned int retval = itr_setting;
2235
2236 if (packets == 0)
2237 goto update_itr_done;
2238
2239 switch (itr_setting) {
2240 case lowest_latency:
2241 /* handle TSO and jumbo frames */
2242 if (bytes/packets > 8000)
2243 retval = bulk_latency;
2244 else if ((packets < 5) && (bytes > 512)) {
2245 retval = low_latency;
2246 }
2247 break;
2248 case low_latency: /* 50 usec aka 20000 ints/s */
2249 if (bytes > 10000) {
2250 /* this if handles the TSO accounting */
2251 if (bytes/packets > 8000) {
2252 retval = bulk_latency;
2253 } else if ((packets < 10) || ((bytes/packets) > 1200)) {
2254 retval = bulk_latency;
2255 } else if ((packets > 35)) {
2256 retval = lowest_latency;
2257 }
2258 } else if (bytes/packets > 2000) {
2259 retval = bulk_latency;
2260 } else if (packets <= 2 && bytes < 512) {
2261 retval = lowest_latency;
2262 }
2263 break;
2264 case bulk_latency: /* 250 usec aka 4000 ints/s */
2265 if (bytes > 25000) {
2266 if (packets > 35) {
2267 retval = low_latency;
2268 }
2269 } else if (bytes < 6000) {
2270 retval = low_latency;
2271 }
2272 break;
2273 }
2274
2275update_itr_done:
2276 return retval;
2277}
2278
2279static void e1000_set_itr(struct e1000_adapter *adapter)
2280{
2281 struct e1000_hw *hw = &adapter->hw;
2282 u16 current_itr;
2283 u32 new_itr = adapter->itr;
2284
2285 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2286 if (adapter->link_speed != SPEED_1000) {
2287 current_itr = 0;
2288 new_itr = 4000;
2289 goto set_itr_now;
2290 }
2291
2292 adapter->tx_itr = e1000_update_itr(adapter,
2293 adapter->tx_itr,
2294 adapter->total_tx_packets,
2295 adapter->total_tx_bytes);
2296 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2297 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2298 adapter->tx_itr = low_latency;
2299
2300 adapter->rx_itr = e1000_update_itr(adapter,
2301 adapter->rx_itr,
2302 adapter->total_rx_packets,
2303 adapter->total_rx_bytes);
2304 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2305 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2306 adapter->rx_itr = low_latency;
2307
2308 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2309
2310 switch (current_itr) {
2311 /* counts and packets in update_itr are dependent on these numbers */
2312 case lowest_latency:
2313 new_itr = 70000;
2314 break;
2315 case low_latency:
2316 new_itr = 20000; /* aka hwitr = ~200 */
2317 break;
2318 case bulk_latency:
2319 new_itr = 4000;
2320 break;
2321 default:
2322 break;
2323 }
2324
2325set_itr_now:
2326 if (new_itr != adapter->itr) {
ad68076e
BA		 2327 /*
2328 * this attempts to bias the interrupt rate towards Bulk
bc7f75fa 2329 * by adding intermediate steps when interrupt rate is
ad68076e
BA		 2330 * increasing
2331 */
bc7f75fa
AK		 2332 new_itr = new_itr > adapter->itr ?
2333 min(adapter->itr + (new_itr >> 2), new_itr) :
2334 new_itr;
2335 adapter->itr = new_itr;
4662e82b
BA		 2336 adapter->rx_ring->itr_val = new_itr;
2337 if (adapter->msix_entries)
2338 adapter->rx_ring->set_itr = 1;
2339 else
2340 ew32(ITR, 1000000000 / (new_itr * 256));
bc7f75fa
AK		 2341 }
2342}
2343
4662e82b
BA		 2344/**
2345 * e1000_alloc_queues - Allocate memory for all rings
2346 * @adapter: board private structure to initialize
2347 **/
2348static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter)
2349{
2350 adapter->tx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
2351 if (!adapter->tx_ring)
2352 goto err;
2353
2354 adapter->rx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
2355 if (!adapter->rx_ring)
2356 goto err;
2357
2358 return 0;
2359err:
2360 e_err("Unable to allocate memory for queues\n");
2361 kfree(adapter->rx_ring);
2362 kfree(adapter->tx_ring);
2363 return -ENOMEM;
2364}
2365
bc7f75fa
AK		 2366/**
2367 * e1000_clean - NAPI Rx polling callback
ad68076e 2368 * @napi: struct associated with this polling callback
489815ce 2369 * @budget: amount of packets driver is allowed to process this poll
bc7f75fa
AK		 2370 **/
2371static int e1000_clean(struct napi_struct *napi, int budget)
2372{
2373 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
4662e82b 2374 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 2375 struct net_device *poll_dev = adapter->netdev;
679e8a0f 2376 int tx_cleaned = 1, work_done = 0;
bc7f75fa 2377
4cf1653a 2378 adapter = netdev_priv(poll_dev);
bc7f75fa 2379
4662e82b
BA		 2380 if (adapter->msix_entries &&
2381 !(adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
2382 goto clean_rx;
2383
92af3e95 2384 tx_cleaned = e1000_clean_tx_irq(adapter);
bc7f75fa 2385
4662e82b 2386clean_rx:
bc7f75fa 2387 adapter->clean_rx(adapter, &work_done, budget);
d2c7ddd6 2388
12d04a3c 2389 if (!tx_cleaned)
d2c7ddd6 2390 work_done = budget;
bc7f75fa 2391
53e52c72
DM		 2392 /* If budget not fully consumed, exit the polling mode */
2393 if (work_done < budget) {
bc7f75fa
AK		 2394 if (adapter->itr_setting & 3)
2395 e1000_set_itr(adapter);
288379f0 2396 napi_complete(napi);
a3c69fef
JB		 2397 if (!test_bit(__E1000_DOWN, &adapter->state)) {
2398 if (adapter->msix_entries)
2399 ew32(IMS, adapter->rx_ring->ims_val);
2400 else
2401 e1000_irq_enable(adapter);
2402 }
bc7f75fa
AK		 2403 }
2404
2405 return work_done;
2406}
2407
2408static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
2409{
2410 struct e1000_adapter *adapter = netdev_priv(netdev);
2411 struct e1000_hw *hw = &adapter->hw;
2412 u32 vfta, index;
2413
2414 /* don't update vlan cookie if already programmed */
2415 if ((adapter->hw.mng_cookie.status &
2416 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2417 (vid == adapter->mng_vlan_id))
2418 return;
caaddaf8 2419
bc7f75fa 2420 /* add VID to filter table */
caaddaf8
BA		 2421 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2422 index = (vid >> 5) & 0x7F;
2423 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2424 vfta |= (1 << (vid & 0x1F));
2425 hw->mac.ops.write_vfta(hw, index, vfta);
2426 }
bc7f75fa
AK		 2427}
2428
2429static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
2430{
2431 struct e1000_adapter *adapter = netdev_priv(netdev);
2432 struct e1000_hw *hw = &adapter->hw;
2433 u32 vfta, index;
2434
74ef9c39
JB		 2435 if (!test_bit(__E1000_DOWN, &adapter->state))
2436 e1000_irq_disable(adapter);
bc7f75fa 2437 vlan_group_set_device(adapter->vlgrp, vid, NULL);
74ef9c39
JB		 2438
2439 if (!test_bit(__E1000_DOWN, &adapter->state))
2440 e1000_irq_enable(adapter);
bc7f75fa
AK		 2441
2442 if ((adapter->hw.mng_cookie.status &
2443 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2444 (vid == adapter->mng_vlan_id)) {
2445 /* release control to f/w */
2446 e1000_release_hw_control(adapter);
2447 return;
2448 }
2449
2450 /* remove VID from filter table */
caaddaf8
BA		 2451 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2452 index = (vid >> 5) & 0x7F;
2453 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2454 vfta &= ~(1 << (vid & 0x1F));
2455 hw->mac.ops.write_vfta(hw, index, vfta);
2456 }
bc7f75fa
AK		 2457}
2458
2459static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2460{
2461 struct net_device *netdev = adapter->netdev;
2462 u16 vid = adapter->hw.mng_cookie.vlan_id;
2463 u16 old_vid = adapter->mng_vlan_id;
2464
2465 if (!adapter->vlgrp)
2466 return;
2467
2468 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
2469 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2470 if (adapter->hw.mng_cookie.status &
2471 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
2472 e1000_vlan_rx_add_vid(netdev, vid);
2473 adapter->mng_vlan_id = vid;
2474 }
2475
2476 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
2477 (vid != old_vid) &&
2478 !vlan_group_get_device(adapter->vlgrp, old_vid))
2479 e1000_vlan_rx_kill_vid(netdev, old_vid);
2480 } else {
2481 adapter->mng_vlan_id = vid;
2482 }
2483}
2484
2485
2486static void e1000_vlan_rx_register(struct net_device *netdev,
2487 struct vlan_group *grp)
2488{
2489 struct e1000_adapter *adapter = netdev_priv(netdev);
2490 struct e1000_hw *hw = &adapter->hw;
2491 u32 ctrl, rctl;
2492
74ef9c39
JB		 2493 if (!test_bit(__E1000_DOWN, &adapter->state))
2494 e1000_irq_disable(adapter);
bc7f75fa
AK		 2495 adapter->vlgrp = grp;
2496
2497 if (grp) {
2498 /* enable VLAN tag insert/strip */
2499 ctrl = er32(CTRL);
2500 ctrl |= E1000_CTRL_VME;
2501 ew32(CTRL, ctrl);
2502
2503 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2504 /* enable VLAN receive filtering */
2505 rctl = er32(RCTL);
bc7f75fa
AK		 2506 rctl &= ~E1000_RCTL_CFIEN;
2507 ew32(RCTL, rctl);
2508 e1000_update_mng_vlan(adapter);
2509 }
2510 } else {
2511 /* disable VLAN tag insert/strip */
2512 ctrl = er32(CTRL);
2513 ctrl &= ~E1000_CTRL_VME;
2514 ew32(CTRL, ctrl);
2515
2516 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
bc7f75fa
AK		 2517 if (adapter->mng_vlan_id !=
2518 (u16)E1000_MNG_VLAN_NONE) {
2519 e1000_vlan_rx_kill_vid(netdev,
2520 adapter->mng_vlan_id);
2521 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2522 }
2523 }
2524 }
2525
74ef9c39
JB		 2526 if (!test_bit(__E1000_DOWN, &adapter->state))
2527 e1000_irq_enable(adapter);
bc7f75fa
AK		 2528}
2529
2530static void e1000_restore_vlan(struct e1000_adapter *adapter)
2531{
2532 u16 vid;
2533
2534 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
2535
2536 if (!adapter->vlgrp)
2537 return;
2538
2539 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
2540 if (!vlan_group_get_device(adapter->vlgrp, vid))
2541 continue;
2542 e1000_vlan_rx_add_vid(adapter->netdev, vid);
2543 }
2544}
2545
cd791618 2546static void e1000_init_manageability_pt(struct e1000_adapter *adapter)
bc7f75fa
AK		 2547{
2548 struct e1000_hw *hw = &adapter->hw;
cd791618 2549 u32 manc, manc2h, mdef, i, j;
bc7f75fa
AK		 2550
2551 if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
2552 return;
2553
2554 manc = er32(MANC);
2555
ad68076e
BA		 2556 /*
2557 * enable receiving management packets to the host. this will probably
bc7f75fa 2558 * generate destination unreachable messages from the host OS, but
ad68076e
BA		 2559 * the packets will be handled on SMBUS
2560 */
bc7f75fa
AK		 2561 manc |= E1000_MANC_EN_MNG2HOST;
2562 manc2h = er32(MANC2H);
cd791618
BA		 2563
2564 switch (hw->mac.type) {
2565 default:
2566 manc2h |= (E1000_MANC2H_PORT_623 | E1000_MANC2H_PORT_664);
2567 break;
2568 case e1000_82574:
2569 case e1000_82583:
2570 /*
2571 * Check if IPMI pass-through decision filter already exists;
2572 * if so, enable it.
2573 */
2574 for (i = 0, j = 0; i < 8; i++) {
2575 mdef = er32(MDEF(i));
2576
2577 /* Ignore filters with anything other than IPMI ports */
3b21b508 2578 if (mdef & ~(E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
cd791618
BA		 2579 continue;
2580
2581 /* Enable this decision filter in MANC2H */
2582 if (mdef)
2583 manc2h |= (1 << i);
2584
2585 j |= mdef;
2586 }
2587
2588 if (j == (E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2589 break;
2590
2591 /* Create new decision filter in an empty filter */
2592 for (i = 0, j = 0; i < 8; i++)
2593 if (er32(MDEF(i)) == 0) {
2594 ew32(MDEF(i), (E1000_MDEF_PORT_623 |
2595 E1000_MDEF_PORT_664));
2596 manc2h |= (1 << 1);
2597 j++;
2598 break;
2599 }
2600
2601 if (!j)
2602 e_warn("Unable to create IPMI pass-through filter\n");
2603 break;
2604 }
2605
bc7f75fa
AK		 2606 ew32(MANC2H, manc2h);
2607 ew32(MANC, manc);
2608}
2609
2610/**
2611 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
2612 * @adapter: board private structure
2613 *
2614 * Configure the Tx unit of the MAC after a reset.
2615 **/
2616static void e1000_configure_tx(struct e1000_adapter *adapter)
2617{
2618 struct e1000_hw *hw = &adapter->hw;
2619 struct e1000_ring *tx_ring = adapter->tx_ring;
2620 u64 tdba;
2621 u32 tdlen, tctl, tipg, tarc;
2622 u32 ipgr1, ipgr2;
2623
2624 /* Setup the HW Tx Head and Tail descriptor pointers */
2625 tdba = tx_ring->dma;
2626 tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
284901a9 2627 ew32(TDBAL, (tdba & DMA_BIT_MASK(32)));
bc7f75fa
AK		 2628 ew32(TDBAH, (tdba >> 32));
2629 ew32(TDLEN, tdlen);
2630 ew32(TDH, 0);
2631 ew32(TDT, 0);
2632 tx_ring->head = E1000_TDH;
2633 tx_ring->tail = E1000_TDT;
2634
2635 /* Set the default values for the Tx Inter Packet Gap timer */
2636 tipg = DEFAULT_82543_TIPG_IPGT_COPPER; /* 8 */
2637 ipgr1 = DEFAULT_82543_TIPG_IPGR1; /* 8 */
2638 ipgr2 = DEFAULT_82543_TIPG_IPGR2; /* 6 */
2639
2640 if (adapter->flags & FLAG_TIPG_MEDIUM_FOR_80003ESLAN)
2641 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2; /* 7 */
2642
2643 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
2644 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
2645 ew32(TIPG, tipg);
2646
2647 /* Set the Tx Interrupt Delay register */
2648 ew32(TIDV, adapter->tx_int_delay);
ad68076e 2649 /* Tx irq moderation */
bc7f75fa
AK		 2650 ew32(TADV, adapter->tx_abs_int_delay);
2651
2652 /* Program the Transmit Control Register */
2653 tctl = er32(TCTL);
2654 tctl &= ~E1000_TCTL_CT;
2655 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
2656 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2657
2658 if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
e9ec2c0f 2659 tarc = er32(TARC(0));
ad68076e
BA		 2660 /*
2661 * set the speed mode bit, we'll clear it if we're not at
2662 * gigabit link later
2663 */
bc7f75fa
AK		 2664#define SPEED_MODE_BIT (1 << 21)
2665 tarc |= SPEED_MODE_BIT;
e9ec2c0f 2666 ew32(TARC(0), tarc);
bc7f75fa
AK		 2667 }
2668
2669 /* errata: program both queues to unweighted RR */
2670 if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
e9ec2c0f 2671 tarc = er32(TARC(0));
bc7f75fa 2672 tarc |= 1;
e9ec2c0f
JK		 2673 ew32(TARC(0), tarc);
2674 tarc = er32(TARC(1));
bc7f75fa 2675 tarc |= 1;
e9ec2c0f 2676 ew32(TARC(1), tarc);
bc7f75fa
AK		 2677 }
2678
bc7f75fa
AK		 2679 /* Setup Transmit Descriptor Settings for eop descriptor */
2680 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
2681
2682 /* only set IDE if we are delaying interrupts using the timers */
2683 if (adapter->tx_int_delay)
2684 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
2685
2686 /* enable Report Status bit */
2687 adapter->txd_cmd |= E1000_TXD_CMD_RS;
2688
2689 ew32(TCTL, tctl);
2690
edfea6e6 2691 e1000e_config_collision_dist(hw);
bc7f75fa
AK		 2692}
2693
2694/**
2695 * e1000_setup_rctl - configure the receive control registers
2696 * @adapter: Board private structure
2697 **/
2698#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
2699 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
2700static void e1000_setup_rctl(struct e1000_adapter *adapter)
2701{
2702 struct e1000_hw *hw = &adapter->hw;
2703 u32 rctl, rfctl;
2704 u32 psrctl = 0;
2705 u32 pages = 0;
2706
2707 /* Program MC offset vector base */
2708 rctl = er32(RCTL);
2709 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
2710 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
2711 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
2712 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
2713
2714 /* Do not Store bad packets */
2715 rctl &= ~E1000_RCTL_SBP;
2716
2717 /* Enable Long Packet receive */
2718 if (adapter->netdev->mtu <= ETH_DATA_LEN)
2719 rctl &= ~E1000_RCTL_LPE;
2720 else
2721 rctl |= E1000_RCTL_LPE;
2722
eb7c3adb
JK		 2723 /* Some systems expect that the CRC is included in SMBUS traffic. The
2724 * hardware strips the CRC before sending to both SMBUS (BMC) and to
2725 * host memory when this is enabled
2726 */
2727 if (adapter->flags2 & FLAG2_CRC_STRIPPING)
2728 rctl |= E1000_RCTL_SECRC;
5918bd88 2729
a4f58f54
BA		 2730 /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */
2731 if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) {
2732 u16 phy_data;
2733
2734 e1e_rphy(hw, PHY_REG(770, 26), &phy_data);
2735 phy_data &= 0xfff8;
2736 phy_data |= (1 << 2);
2737 e1e_wphy(hw, PHY_REG(770, 26), phy_data);
2738
2739 e1e_rphy(hw, 22, &phy_data);
2740 phy_data &= 0x0fff;
2741 phy_data |= (1 << 14);
2742 e1e_wphy(hw, 0x10, 0x2823);
2743 e1e_wphy(hw, 0x11, 0x0003);
2744 e1e_wphy(hw, 22, phy_data);
2745 }
2746
d3738bb8
BA		 2747 /* Workaround Si errata on 82579 - configure jumbo frame flow */
2748 if (hw->mac.type == e1000_pch2lan) {
2749 s32 ret_val;
2750
2751 if (rctl & E1000_RCTL_LPE)
2752 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, true);
2753 else
2754 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, false);
2755 }
2756
bc7f75fa
AK		 2757 /* Setup buffer sizes */
2758 rctl &= ~E1000_RCTL_SZ_4096;
2759 rctl |= E1000_RCTL_BSEX;
2760 switch (adapter->rx_buffer_len) {
bc7f75fa
AK		 2761 case 2048:
2762 default:
2763 rctl |= E1000_RCTL_SZ_2048;
2764 rctl &= ~E1000_RCTL_BSEX;
2765 break;
2766 case 4096:
2767 rctl |= E1000_RCTL_SZ_4096;
2768 break;
2769 case 8192:
2770 rctl |= E1000_RCTL_SZ_8192;
2771 break;
2772 case 16384:
2773 rctl |= E1000_RCTL_SZ_16384;
2774 break;
2775 }
2776
2777 /*
2778 * 82571 and greater support packet-split where the protocol
2779 * header is placed in skb->data and the packet data is
2780 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
2781 * In the case of a non-split, skb->data is linearly filled,
2782 * followed by the page buffers. Therefore, skb->data is
2783 * sized to hold the largest protocol header.
2784 *
2785 * allocations using alloc_page take too long for regular MTU
2786 * so only enable packet split for jumbo frames
2787 *
2788 * Using pages when the page size is greater than 16k wastes
2789 * a lot of memory, since we allocate 3 pages at all times
2790 * per packet.
2791 */
bc7f75fa 2792 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
dbcb9fec 2793 if (!(adapter->flags & FLAG_HAS_ERT) && (pages <= 3) &&
97ac8cae 2794 (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
bc7f75fa 2795 adapter->rx_ps_pages = pages;
97ac8cae
BA		 2796 else
2797 adapter->rx_ps_pages = 0;
bc7f75fa
AK		 2798
2799 if (adapter->rx_ps_pages) {
2800 /* Configure extra packet-split registers */
2801 rfctl = er32(RFCTL);
2802 rfctl |= E1000_RFCTL_EXTEN;
ad68076e
BA		 2803 /*
2804 * disable packet split support for IPv6 extension headers,
2805 * because some malformed IPv6 headers can hang the Rx
2806 */
bc7f75fa
AK		 2807 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
2808 E1000_RFCTL_NEW_IPV6_EXT_DIS);
2809
2810 ew32(RFCTL, rfctl);
2811
140a7480
AK		 2812 /* Enable Packet split descriptors */
2813 rctl |= E1000_RCTL_DTYP_PS;
bc7f75fa
AK		 2814
2815 psrctl |= adapter->rx_ps_bsize0 >>
2816 E1000_PSRCTL_BSIZE0_SHIFT;
2817
2818 switch (adapter->rx_ps_pages) {
2819 case 3:
2820 psrctl |= PAGE_SIZE <<
2821 E1000_PSRCTL_BSIZE3_SHIFT;
2822 case 2:
2823 psrctl |= PAGE_SIZE <<
2824 E1000_PSRCTL_BSIZE2_SHIFT;
2825 case 1:
2826 psrctl |= PAGE_SIZE >>
2827 E1000_PSRCTL_BSIZE1_SHIFT;
2828 break;
2829 }
2830
2831 ew32(PSRCTL, psrctl);
2832 }
2833
2834 ew32(RCTL, rctl);
318a94d6
JK		 2835 /* just started the receive unit, no need to restart */
2836 adapter->flags &= ~FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 2837}
2838
2839/**
2840 * e1000_configure_rx - Configure Receive Unit after Reset
2841 * @adapter: board private structure
2842 *
2843 * Configure the Rx unit of the MAC after a reset.
2844 **/
2845static void e1000_configure_rx(struct e1000_adapter *adapter)
2846{
2847 struct e1000_hw *hw = &adapter->hw;
2848 struct e1000_ring *rx_ring = adapter->rx_ring;
2849 u64 rdba;
2850 u32 rdlen, rctl, rxcsum, ctrl_ext;
2851
2852 if (adapter->rx_ps_pages) {
2853 /* this is a 32 byte descriptor */
2854 rdlen = rx_ring->count *
2855 sizeof(union e1000_rx_desc_packet_split);
2856 adapter->clean_rx = e1000_clean_rx_irq_ps;
2857 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
97ac8cae
BA		 2858 } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
2859 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
2860 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
2861 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
bc7f75fa 2862 } else {
97ac8cae 2863 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
bc7f75fa
AK		 2864 adapter->clean_rx = e1000_clean_rx_irq;
2865 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
2866 }
2867
2868 /* disable receives while setting up the descriptors */
2869 rctl = er32(RCTL);
2870 ew32(RCTL, rctl & ~E1000_RCTL_EN);
2871 e1e_flush();
2872 msleep(10);
2873
2874 /* set the Receive Delay Timer Register */
2875 ew32(RDTR, adapter->rx_int_delay);
2876
2877 /* irq moderation */
2878 ew32(RADV, adapter->rx_abs_int_delay);
2879 if (adapter->itr_setting != 0)
ad68076e 2880 ew32(ITR, 1000000000 / (adapter->itr * 256));
bc7f75fa
AK		 2881
2882 ctrl_ext = er32(CTRL_EXT);
bc7f75fa
AK		 2883 /* Auto-Mask interrupts upon ICR access */
2884 ctrl_ext |= E1000_CTRL_EXT_IAME;
2885 ew32(IAM, 0xffffffff);
2886 ew32(CTRL_EXT, ctrl_ext);
2887 e1e_flush();
2888
ad68076e
BA		 2889 /*
2890 * Setup the HW Rx Head and Tail Descriptor Pointers and
2891 * the Base and Length of the Rx Descriptor Ring
2892 */
bc7f75fa 2893 rdba = rx_ring->dma;
284901a9 2894 ew32(RDBAL, (rdba & DMA_BIT_MASK(32)));
bc7f75fa
AK		 2895 ew32(RDBAH, (rdba >> 32));
2896 ew32(RDLEN, rdlen);
2897 ew32(RDH, 0);
2898 ew32(RDT, 0);
2899 rx_ring->head = E1000_RDH;
2900 rx_ring->tail = E1000_RDT;
2901
2902 /* Enable Receive Checksum Offload for TCP and UDP */
2903 rxcsum = er32(RXCSUM);
2904 if (adapter->flags & FLAG_RX_CSUM_ENABLED) {
2905 rxcsum |= E1000_RXCSUM_TUOFL;
2906
ad68076e
BA		 2907 /*
2908 * IPv4 payload checksum for UDP fragments must be
2909 * used in conjunction with packet-split.
2910 */
bc7f75fa
AK		 2911 if (adapter->rx_ps_pages)
2912 rxcsum |= E1000_RXCSUM_IPPCSE;
2913 } else {
2914 rxcsum &= ~E1000_RXCSUM_TUOFL;
2915 /* no need to clear IPPCSE as it defaults to 0 */
2916 }
2917 ew32(RXCSUM, rxcsum);
2918
ad68076e
BA		 2919 /*
2920 * Enable early receives on supported devices, only takes effect when
bc7f75fa 2921 * packet size is equal or larger than the specified value (in 8 byte
ad68076e
BA		 2922 * units), e.g. using jumbo frames when setting to E1000_ERT_2048
2923 */
53ec5498
BA		 2924 if (adapter->flags & FLAG_HAS_ERT) {
2925 if (adapter->netdev->mtu > ETH_DATA_LEN) {
2926 u32 rxdctl = er32(RXDCTL(0));
2927 ew32(RXDCTL(0), rxdctl | 0x3);
2928 ew32(ERT, E1000_ERT_2048 | (1 << 13));
2929 /*
2930 * With jumbo frames and early-receive enabled,
2931 * excessive C-state transition latencies result in
2932 * dropped transactions.
2933 */
ed77134b 2934 pm_qos_update_request(
82f68251 2935 &adapter->netdev->pm_qos_req, 55);
53ec5498 2936 } else {
ed77134b 2937 pm_qos_update_request(
82f68251 2938 &adapter->netdev->pm_qos_req,
ed77134b 2939 PM_QOS_DEFAULT_VALUE);
53ec5498 2940 }
97ac8cae 2941 }
bc7f75fa
AK		 2942
2943 /* Enable Receives */
2944 ew32(RCTL, rctl);
2945}
2946
2947/**
e2de3eb6 2948 * e1000_update_mc_addr_list - Update Multicast addresses
bc7f75fa
AK		 2949 * @hw: pointer to the HW structure
2950 * @mc_addr_list: array of multicast addresses to program
2951 * @mc_addr_count: number of multicast addresses to program
bc7f75fa 2952 *
ab8932f3 2953 * Updates the Multicast Table Array.
bc7f75fa 2954 * The caller must have a packed mc_addr_list of multicast addresses.
bc7f75fa 2955 **/
e2de3eb6 2956static void e1000_update_mc_addr_list(struct e1000_hw *hw, u8 *mc_addr_list,
ab8932f3 2957 u32 mc_addr_count)
bc7f75fa 2958{
ab8932f3 2959 hw->mac.ops.update_mc_addr_list(hw, mc_addr_list, mc_addr_count);
bc7f75fa
AK		 2960}
2961
2962/**
2963 * e1000_set_multi - Multicast and Promiscuous mode set
2964 * @netdev: network interface device structure
2965 *
2966 * The set_multi entry point is called whenever the multicast address
2967 * list or the network interface flags are updated. This routine is
2968 * responsible for configuring the hardware for proper multicast,
2969 * promiscuous mode, and all-multi behavior.
2970 **/
2971static void e1000_set_multi(struct net_device *netdev)
2972{
2973 struct e1000_adapter *adapter = netdev_priv(netdev);
2974 struct e1000_hw *hw = &adapter->hw;
22bedad3 2975 struct netdev_hw_addr *ha;
bc7f75fa
AK		 2976 u8 *mta_list;
2977 u32 rctl;
2978 int i;
2979
2980 /* Check for Promiscuous and All Multicast modes */
2981
2982 rctl = er32(RCTL);
2983
2984 if (netdev->flags & IFF_PROMISC) {
2985 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
746b9f02 2986 rctl &= ~E1000_RCTL_VFE;
bc7f75fa 2987 } else {
746b9f02
PM		 2988 if (netdev->flags & IFF_ALLMULTI) {
2989 rctl |= E1000_RCTL_MPE;
2990 rctl &= ~E1000_RCTL_UPE;
2991 } else {
2992 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2993 }
78ed11a5 2994 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
746b9f02 2995 rctl |= E1000_RCTL_VFE;
bc7f75fa
AK		 2996 }
2997
2998 ew32(RCTL, rctl);
2999
7aeef972
JP		 3000 if (!netdev_mc_empty(netdev)) {
3001 mta_list = kmalloc(netdev_mc_count(netdev) * 6, GFP_ATOMIC);
bc7f75fa
AK		 3002 if (!mta_list)
3003 return;
3004
3005 /* prepare a packed array of only addresses. */
7aeef972 3006 i = 0;
22bedad3
JP		 3007 netdev_for_each_mc_addr(ha, netdev)
3008 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
bc7f75fa 3009
ab8932f3 3010 e1000_update_mc_addr_list(hw, mta_list, i);
bc7f75fa
AK		 3011 kfree(mta_list);
3012 } else {
3013 /*
3014 * if we're called from probe, we might not have
3015 * anything to do here, so clear out the list
3016 */
ab8932f3 3017 e1000_update_mc_addr_list(hw, NULL, 0);
bc7f75fa
AK		 3018 }
3019}
3020
3021/**
ad68076e 3022 * e1000_configure - configure the hardware for Rx and Tx
bc7f75fa
AK		 3023 * @adapter: private board structure
3024 **/
3025static void e1000_configure(struct e1000_adapter *adapter)
3026{
3027 e1000_set_multi(adapter->netdev);
3028
3029 e1000_restore_vlan(adapter);
cd791618 3030 e1000_init_manageability_pt(adapter);
bc7f75fa
AK		 3031
3032 e1000_configure_tx(adapter);
3033 e1000_setup_rctl(adapter);
3034 e1000_configure_rx(adapter);
ad68076e 3035 adapter->alloc_rx_buf(adapter, e1000_desc_unused(adapter->rx_ring));
bc7f75fa
AK		 3036}
3037
3038/**
3039 * e1000e_power_up_phy - restore link in case the phy was powered down
3040 * @adapter: address of board private structure
3041 *
3042 * The phy may be powered down to save power and turn off link when the
3043 * driver is unloaded and wake on lan is not enabled (among others)
3044 * *** this routine MUST be followed by a call to e1000e_reset ***
3045 **/
3046void e1000e_power_up_phy(struct e1000_adapter *adapter)
3047{
17f208de
BA		 3048 if (adapter->hw.phy.ops.power_up)
3049 adapter->hw.phy.ops.power_up(&adapter->hw);
bc7f75fa
AK		 3050
3051 adapter->hw.mac.ops.setup_link(&adapter->hw);
3052}
3053
3054/**
3055 * e1000_power_down_phy - Power down the PHY
3056 *
17f208de
BA		 3057 * Power down the PHY so no link is implied when interface is down.
3058 * The PHY cannot be powered down if management or WoL is active.
bc7f75fa
AK		 3059 */
3060static void e1000_power_down_phy(struct e1000_adapter *adapter)
3061{
bc7f75fa 3062 /* WoL is enabled */
23b66e2b 3063 if (adapter->wol)
bc7f75fa
AK		 3064 return;
3065
17f208de
BA		 3066 if (adapter->hw.phy.ops.power_down)
3067 adapter->hw.phy.ops.power_down(&adapter->hw);
bc7f75fa
AK		 3068}
3069
3070/**
3071 * e1000e_reset - bring the hardware into a known good state
3072 *
3073 * This function boots the hardware and enables some settings that
3074 * require a configuration cycle of the hardware - those cannot be
3075 * set/changed during runtime. After reset the device needs to be
ad68076e 3076 * properly configured for Rx, Tx etc.
bc7f75fa
AK		 3077 */
3078void e1000e_reset(struct e1000_adapter *adapter)
3079{
3080 struct e1000_mac_info *mac = &adapter->hw.mac;
318a94d6 3081 struct e1000_fc_info *fc = &adapter->hw.fc;
bc7f75fa
AK		 3082 struct e1000_hw *hw = &adapter->hw;
3083 u32 tx_space, min_tx_space, min_rx_space;
318a94d6 3084 u32 pba = adapter->pba;
bc7f75fa
AK		 3085 u16 hwm;
3086
ad68076e 3087 /* reset Packet Buffer Allocation to default */
318a94d6 3088 ew32(PBA, pba);
df762464 3089
318a94d6 3090 if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
ad68076e
BA		 3091 /*
3092 * To maintain wire speed transmits, the Tx FIFO should be
bc7f75fa
AK		 3093 * large enough to accommodate two full transmit packets,
3094 * rounded up to the next 1KB and expressed in KB. Likewise,
3095 * the Rx FIFO should be large enough to accommodate at least
3096 * one full receive packet and is similarly rounded up and
ad68076e
BA		 3097 * expressed in KB.
3098 */
df762464 3099 pba = er32(PBA);
bc7f75fa 3100 /* upper 16 bits has Tx packet buffer allocation size in KB */
df762464 3101 tx_space = pba >> 16;
bc7f75fa 3102 /* lower 16 bits has Rx packet buffer allocation size in KB */
df762464 3103 pba &= 0xffff;
ad68076e
BA		 3104 /*
3105 * the Tx fifo also stores 16 bytes of information about the tx
3106 * but don't include ethernet FCS because hardware appends it
318a94d6
JK		 3107 */
3108 min_tx_space = (adapter->max_frame_size +
bc7f75fa
AK		 3109 sizeof(struct e1000_tx_desc) -
3110 ETH_FCS_LEN) * 2;
3111 min_tx_space = ALIGN(min_tx_space, 1024);
3112 min_tx_space >>= 10;
3113 /* software strips receive CRC, so leave room for it */
318a94d6 3114 min_rx_space = adapter->max_frame_size;
bc7f75fa
AK		 3115 min_rx_space = ALIGN(min_rx_space, 1024);
3116 min_rx_space >>= 10;
3117
ad68076e
BA		 3118 /*
3119 * If current Tx allocation is less than the min Tx FIFO size,
bc7f75fa 3120 * and the min Tx FIFO size is less than the current Rx FIFO
ad68076e
BA		 3121 * allocation, take space away from current Rx allocation
3122 */
df762464
AK		 3123 if ((tx_space < min_tx_space) &&
3124 ((min_tx_space - tx_space) < pba)) {
3125 pba -= min_tx_space - tx_space;
bc7f75fa 3126
ad68076e
BA		 3127 /*
3128 * if short on Rx space, Rx wins and must trump tx
3129 * adjustment or use Early Receive if available
3130 */
df762464 3131 if ((pba < min_rx_space) &&
bc7f75fa
AK		 3132 (!(adapter->flags & FLAG_HAS_ERT)))
3133 /* ERT enabled in e1000_configure_rx */
df762464 3134 pba = min_rx_space;
bc7f75fa 3135 }
df762464
AK		 3136
3137 ew32(PBA, pba);
bc7f75fa
AK		 3138 }
3139
bc7f75fa 3140
ad68076e
BA		 3141 /*
3142 * flow control settings
3143 *
38eb394e 3144 * The high water mark must be low enough to fit one full frame
bc7f75fa
AK		 3145 * (or the size used for early receive) above it in the Rx FIFO.
3146 * Set it to the lower of:
3147 * - 90% of the Rx FIFO size, and
3148 * - the full Rx FIFO size minus the early receive size (for parts
3149 * with ERT support assuming ERT set to E1000_ERT_2048), or
38eb394e 3150 * - the full Rx FIFO size minus one full frame
ad68076e 3151 */
d3738bb8
BA		 3152 if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
3153 fc->pause_time = 0xFFFF;
3154 else
3155 fc->pause_time = E1000_FC_PAUSE_TIME;
3156 fc->send_xon = 1;
3157 fc->current_mode = fc->requested_mode;
3158
3159 switch (hw->mac.type) {
3160 default:
3161 if ((adapter->flags & FLAG_HAS_ERT) &&
3162 (adapter->netdev->mtu > ETH_DATA_LEN))
3163 hwm = min(((pba << 10) * 9 / 10),
3164 ((pba << 10) - (E1000_ERT_2048 << 3)));
3165 else
3166 hwm = min(((pba << 10) * 9 / 10),
3167 ((pba << 10) - adapter->max_frame_size));
3168
3169 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */
3170 fc->low_water = fc->high_water - 8;
3171 break;
3172 case e1000_pchlan:
38eb394e
BA		 3173 /*
3174 * Workaround PCH LOM adapter hangs with certain network
3175 * loads. If hangs persist, try disabling Tx flow control.
3176 */
3177 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3178 fc->high_water = 0x3500;
3179 fc->low_water = 0x1500;
3180 } else {
3181 fc->high_water = 0x5000;
3182 fc->low_water = 0x3000;
3183 }
a305595b 3184 fc->refresh_time = 0x1000;
d3738bb8
BA		 3185 break;
3186 case e1000_pch2lan:
3187 fc->high_water = 0x05C20;
3188 fc->low_water = 0x05048;
3189 fc->pause_time = 0x0650;
3190 fc->refresh_time = 0x0400;
3191 break;
38eb394e 3192 }
bc7f75fa 3193
bc7f75fa
AK		 3194 /* Allow time for pending master requests to run */
3195 mac->ops.reset_hw(hw);
97ac8cae
BA		 3196
3197 /*
3198 * For parts with AMT enabled, let the firmware know
3199 * that the network interface is in control
3200 */
c43bc57e 3201 if (adapter->flags & FLAG_HAS_AMT)
97ac8cae
BA		 3202 e1000_get_hw_control(adapter);
3203
bc7f75fa
AK		 3204 ew32(WUC, 0);
3205
3206 if (mac->ops.init_hw(hw))
44defeb3 3207 e_err("Hardware Error\n");
bc7f75fa
AK		 3208
3209 e1000_update_mng_vlan(adapter);
3210
3211 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
3212 ew32(VET, ETH_P_8021Q);
3213
3214 e1000e_reset_adaptive(hw);
3215 e1000_get_phy_info(hw);
3216
918d7197
BA		 3217 if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) &&
3218 !(adapter->flags & FLAG_SMART_POWER_DOWN)) {
bc7f75fa 3219 u16 phy_data = 0;
ad68076e
BA		 3220 /*
3221 * speed up time to link by disabling smart power down, ignore
bc7f75fa 3222 * the return value of this function because there is nothing
ad68076e
BA		 3223 * different we would do if it failed
3224 */
bc7f75fa
AK		 3225 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
3226 phy_data &= ~IGP02E1000_PM_SPD;
3227 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
3228 }
bc7f75fa
AK		 3229}
3230
3231int e1000e_up(struct e1000_adapter *adapter)
3232{
3233 struct e1000_hw *hw = &adapter->hw;
3234
3235 /* hardware has been reset, we need to reload some things */
3236 e1000_configure(adapter);
3237
3238 clear_bit(__E1000_DOWN, &adapter->state);
3239
3240 napi_enable(&adapter->napi);
4662e82b
BA		 3241 if (adapter->msix_entries)
3242 e1000_configure_msix(adapter);
bc7f75fa
AK		 3243 e1000_irq_enable(adapter);
3244
4cb9be7a
JB		 3245 netif_wake_queue(adapter->netdev);
3246
bc7f75fa 3247 /* fire a link change interrupt to start the watchdog */
52a9b231
BA		 3248 if (adapter->msix_entries)
3249 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER);
3250 else
3251 ew32(ICS, E1000_ICS_LSC);
3252
bc7f75fa
AK		 3253 return 0;
3254}
3255
3256void e1000e_down(struct e1000_adapter *adapter)
3257{
3258 struct net_device *netdev = adapter->netdev;
3259 struct e1000_hw *hw = &adapter->hw;
3260 u32 tctl, rctl;
3261
ad68076e
BA		 3262 /*
3263 * signal that we're down so the interrupt handler does not
3264 * reschedule our watchdog timer
3265 */
bc7f75fa
AK		 3266 set_bit(__E1000_DOWN, &adapter->state);
3267
3268 /* disable receives in the hardware */
3269 rctl = er32(RCTL);
3270 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3271 /* flush and sleep below */
3272
4cb9be7a 3273 netif_stop_queue(netdev);
bc7f75fa
AK		 3274
3275 /* disable transmits in the hardware */
3276 tctl = er32(TCTL);
3277 tctl &= ~E1000_TCTL_EN;
3278 ew32(TCTL, tctl);
3279 /* flush both disables and wait for them to finish */
3280 e1e_flush();
3281 msleep(10);
3282
3283 napi_disable(&adapter->napi);
3284 e1000_irq_disable(adapter);
3285
3286 del_timer_sync(&adapter->watchdog_timer);
3287 del_timer_sync(&adapter->phy_info_timer);
3288
bc7f75fa
AK		 3289 netif_carrier_off(netdev);
3290 adapter->link_speed = 0;
3291 adapter->link_duplex = 0;
3292
52cc3086
JK		 3293 if (!pci_channel_offline(adapter->pdev))
3294 e1000e_reset(adapter);
bc7f75fa
AK		 3295 e1000_clean_tx_ring(adapter);
3296 e1000_clean_rx_ring(adapter);
3297
3298 /*
3299 * TODO: for power management, we could drop the link and
3300 * pci_disable_device here.
3301 */
3302}
3303
3304void e1000e_reinit_locked(struct e1000_adapter *adapter)
3305{
3306 might_sleep();
3307 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
3308 msleep(1);
3309 e1000e_down(adapter);
3310 e1000e_up(adapter);
3311 clear_bit(__E1000_RESETTING, &adapter->state);
3312}
3313
3314/**
3315 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
3316 * @adapter: board private structure to initialize
3317 *
3318 * e1000_sw_init initializes the Adapter private data structure.
3319 * Fields are initialized based on PCI device information and
3320 * OS network device settings (MTU size).
3321 **/
3322static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
3323{
bc7f75fa
AK		 3324 struct net_device *netdev = adapter->netdev;
3325
3326 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN;
3327 adapter->rx_ps_bsize0 = 128;
318a94d6
JK		 3328 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
3329 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
bc7f75fa 3330
4662e82b 3331 e1000e_set_interrupt_capability(adapter);
bc7f75fa 3332
4662e82b
BA		 3333 if (e1000_alloc_queues(adapter))
3334 return -ENOMEM;
bc7f75fa 3335
bc7f75fa 3336 /* Explicitly disable IRQ since the NIC can be in any state. */
bc7f75fa
AK		 3337 e1000_irq_disable(adapter);
3338
bc7f75fa
AK		 3339 set_bit(__E1000_DOWN, &adapter->state);
3340 return 0;
bc7f75fa
AK		 3341}
3342
f8d59f78
BA		 3343/**
3344 * e1000_intr_msi_test - Interrupt Handler
3345 * @irq: interrupt number
3346 * @data: pointer to a network interface device structure
3347 **/
3348static irqreturn_t e1000_intr_msi_test(int irq, void *data)
3349{
3350 struct net_device *netdev = data;
3351 struct e1000_adapter *adapter = netdev_priv(netdev);
3352 struct e1000_hw *hw = &adapter->hw;
3353 u32 icr = er32(ICR);
3354
3bb99fe2 3355 e_dbg("icr is %08X\n", icr);
f8d59f78
BA		 3356 if (icr & E1000_ICR_RXSEQ) {
3357 adapter->flags &= ~FLAG_MSI_TEST_FAILED;
3358 wmb();
3359 }
3360
3361 return IRQ_HANDLED;
3362}
3363
3364/**
3365 * e1000_test_msi_interrupt - Returns 0 for successful test
3366 * @adapter: board private struct
3367 *
3368 * code flow taken from tg3.c
3369 **/
3370static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
3371{
3372 struct net_device *netdev = adapter->netdev;
3373 struct e1000_hw *hw = &adapter->hw;
3374 int err;
3375
3376 /* poll_enable hasn't been called yet, so don't need disable */
3377 /* clear any pending events */
3378 er32(ICR);
3379
3380 /* free the real vector and request a test handler */
3381 e1000_free_irq(adapter);
4662e82b 3382 e1000e_reset_interrupt_capability(adapter);
f8d59f78
BA		 3383
3384 /* Assume that the test fails, if it succeeds then the test
3385 * MSI irq handler will unset this flag */
3386 adapter->flags |= FLAG_MSI_TEST_FAILED;
3387
3388 err = pci_enable_msi(adapter->pdev);
3389 if (err)
3390 goto msi_test_failed;
3391
a0607fd3 3392 err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0,
f8d59f78
BA		 3393 netdev->name, netdev);
3394 if (err) {
3395 pci_disable_msi(adapter->pdev);
3396 goto msi_test_failed;
3397 }
3398
3399 wmb();
3400
3401 e1000_irq_enable(adapter);
3402
3403 /* fire an unusual interrupt on the test handler */
3404 ew32(ICS, E1000_ICS_RXSEQ);
3405 e1e_flush();
3406 msleep(50);
3407
3408 e1000_irq_disable(adapter);
3409
3410 rmb();
3411
3412 if (adapter->flags & FLAG_MSI_TEST_FAILED) {
4662e82b 3413 adapter->int_mode = E1000E_INT_MODE_LEGACY;
f8d59f78
BA		 3414 err = -EIO;
3415 e_info("MSI interrupt test failed!\n");
3416 }
3417
3418 free_irq(adapter->pdev->irq, netdev);
3419 pci_disable_msi(adapter->pdev);
3420
3421 if (err == -EIO)
3422 goto msi_test_failed;
3423
3424 /* okay so the test worked, restore settings */
3bb99fe2 3425 e_dbg("MSI interrupt test succeeded!\n");
f8d59f78 3426msi_test_failed:
4662e82b 3427 e1000e_set_interrupt_capability(adapter);
f8d59f78
BA		 3428 e1000_request_irq(adapter);
3429 return err;
3430}
3431
3432/**
3433 * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
3434 * @adapter: board private struct
3435 *
3436 * code flow taken from tg3.c, called with e1000 interrupts disabled.
3437 **/
3438static int e1000_test_msi(struct e1000_adapter *adapter)
3439{
3440 int err;
3441 u16 pci_cmd;
3442
3443 if (!(adapter->flags & FLAG_MSI_ENABLED))
3444 return 0;
3445
3446 /* disable SERR in case the MSI write causes a master abort */
3447 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
36f2407f
DN		 3448 if (pci_cmd & PCI_COMMAND_SERR)
3449 pci_write_config_word(adapter->pdev, PCI_COMMAND,
3450 pci_cmd & ~PCI_COMMAND_SERR);
f8d59f78
BA		 3451
3452 err = e1000_test_msi_interrupt(adapter);
3453
36f2407f
DN		 3454 /* re-enable SERR */
3455 if (pci_cmd & PCI_COMMAND_SERR) {
3456 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
3457 pci_cmd |= PCI_COMMAND_SERR;
3458 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
3459 }
f8d59f78
BA		 3460
3461 /* success ! */
3462 if (!err)
3463 return 0;
3464
3465 /* EIO means MSI test failed */
3466 if (err != -EIO)
3467 return err;
3468
3469 /* back to INTx mode */
3470 e_warn("MSI interrupt test failed, using legacy interrupt.\n");
3471
3472 e1000_free_irq(adapter);
3473
3474 err = e1000_request_irq(adapter);
3475
3476 return err;
3477}
3478
bc7f75fa
AK		 3479/**
3480 * e1000_open - Called when a network interface is made active
3481 * @netdev: network interface device structure
3482 *
3483 * Returns 0 on success, negative value on failure
3484 *
3485 * The open entry point is called when a network interface is made
3486 * active by the system (IFF_UP). At this point all resources needed
3487 * for transmit and receive operations are allocated, the interrupt
3488 * handler is registered with the OS, the watchdog timer is started,
3489 * and the stack is notified that the interface is ready.
3490 **/
3491static int e1000_open(struct net_device *netdev)
3492{
3493 struct e1000_adapter *adapter = netdev_priv(netdev);
3494 struct e1000_hw *hw = &adapter->hw;
23606cf5 3495 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 3496 int err;
3497
3498 /* disallow open during test */
3499 if (test_bit(__E1000_TESTING, &adapter->state))
3500 return -EBUSY;
3501
23606cf5
RW		 3502 pm_runtime_get_sync(&pdev->dev);
3503
9c563d20
JB		 3504 netif_carrier_off(netdev);
3505
bc7f75fa
AK		 3506 /* allocate transmit descriptors */
3507 err = e1000e_setup_tx_resources(adapter);
3508 if (err)
3509 goto err_setup_tx;
3510
3511 /* allocate receive descriptors */
3512 err = e1000e_setup_rx_resources(adapter);
3513 if (err)
3514 goto err_setup_rx;
3515
11b08be8
BA		 3516 /*
3517 * If AMT is enabled, let the firmware know that the network
3518 * interface is now open and reset the part to a known state.
3519 */
3520 if (adapter->flags & FLAG_HAS_AMT) {
3521 e1000_get_hw_control(adapter);
3522 e1000e_reset(adapter);
3523 }
3524
bc7f75fa
AK		 3525 e1000e_power_up_phy(adapter);
3526
3527 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
3528 if ((adapter->hw.mng_cookie.status &
3529 E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
3530 e1000_update_mng_vlan(adapter);
3531
c128ec29
FM		 3532 /* DMA latency requirement to workaround early-receive/jumbo issue */
3533 if (adapter->flags & FLAG_HAS_ERT)
6ba74014
LT		 3534 pm_qos_add_request(&adapter->netdev->pm_qos_req,
3535 PM_QOS_CPU_DMA_LATENCY,
3536 PM_QOS_DEFAULT_VALUE);
c128ec29 3537
ad68076e
BA		 3538 /*
3539 * before we allocate an interrupt, we must be ready to handle it.
bc7f75fa
AK		 3540 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3541 * as soon as we call pci_request_irq, so we have to setup our
ad68076e
BA		 3542 * clean_rx handler before we do so.
3543 */
bc7f75fa
AK		 3544 e1000_configure(adapter);
3545
3546 err = e1000_request_irq(adapter);
3547 if (err)
3548 goto err_req_irq;
3549
f8d59f78
BA		 3550 /*
3551 * Work around PCIe errata with MSI interrupts causing some chipsets to
3552 * ignore e1000e MSI messages, which means we need to test our MSI
3553 * interrupt now
3554 */
4662e82b 3555 if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
f8d59f78
BA		 3556 err = e1000_test_msi(adapter);
3557 if (err) {
3558 e_err("Interrupt allocation failed\n");
3559 goto err_req_irq;
3560 }
3561 }
3562
bc7f75fa
AK		 3563 /* From here on the code is the same as e1000e_up() */
3564 clear_bit(__E1000_DOWN, &adapter->state);
3565
3566 napi_enable(&adapter->napi);
3567
3568 e1000_irq_enable(adapter);
3569
4cb9be7a 3570 netif_start_queue(netdev);
d55b53ff 3571
23606cf5
RW		 3572 adapter->idle_check = true;
3573 pm_runtime_put(&pdev->dev);
3574
bc7f75fa 3575 /* fire a link status change interrupt to start the watchdog */
52a9b231
BA		 3576 if (adapter->msix_entries)
3577 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER);
3578 else
3579 ew32(ICS, E1000_ICS_LSC);
bc7f75fa
AK		 3580
3581 return 0;
3582
3583err_req_irq:
3584 e1000_release_hw_control(adapter);
3585 e1000_power_down_phy(adapter);
3586 e1000e_free_rx_resources(adapter);
3587err_setup_rx:
3588 e1000e_free_tx_resources(adapter);
3589err_setup_tx:
3590 e1000e_reset(adapter);
23606cf5 3591 pm_runtime_put_sync(&pdev->dev);
bc7f75fa
AK		 3592
3593 return err;
3594}
3595
3596/**
3597 * e1000_close - Disables a network interface
3598 * @netdev: network interface device structure
3599 *
3600 * Returns 0, this is not allowed to fail
3601 *
3602 * The close entry point is called when an interface is de-activated
3603 * by the OS. The hardware is still under the drivers control, but
3604 * needs to be disabled. A global MAC reset is issued to stop the
3605 * hardware, and all transmit and receive resources are freed.
3606 **/
3607static int e1000_close(struct net_device *netdev)
3608{
3609 struct e1000_adapter *adapter = netdev_priv(netdev);
23606cf5 3610 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 3611
3612 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
23606cf5
RW		 3613
3614 pm_runtime_get_sync(&pdev->dev);
3615
3616 if (!test_bit(__E1000_DOWN, &adapter->state)) {
3617 e1000e_down(adapter);
3618 e1000_free_irq(adapter);
3619 }
bc7f75fa 3620 e1000_power_down_phy(adapter);
bc7f75fa
AK		 3621
3622 e1000e_free_tx_resources(adapter);
3623 e1000e_free_rx_resources(adapter);
3624
ad68076e
BA		 3625 /*
3626 * kill manageability vlan ID if supported, but not if a vlan with
3627 * the same ID is registered on the host OS (let 8021q kill it)
3628 */
bc7f75fa
AK		 3629 if ((adapter->hw.mng_cookie.status &
3630 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
3631 !(adapter->vlgrp &&
3632 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id)))
3633 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
3634
ad68076e
BA		 3635 /*
3636 * If AMT is enabled, let the firmware know that the network
3637 * interface is now closed
3638 */
c43bc57e 3639 if (adapter->flags & FLAG_HAS_AMT)
bc7f75fa
AK		 3640 e1000_release_hw_control(adapter);
3641
6ba74014
LT		 3642 if (adapter->flags & FLAG_HAS_ERT)
3643 pm_qos_remove_request(&adapter->netdev->pm_qos_req);
c128ec29 3644
23606cf5
RW		 3645 pm_runtime_put_sync(&pdev->dev);
3646
bc7f75fa
AK		 3647 return 0;
3648}
3649/**
3650 * e1000_set_mac - Change the Ethernet Address of the NIC
3651 * @netdev: network interface device structure
3652 * @p: pointer to an address structure
3653 *
3654 * Returns 0 on success, negative on failure
3655 **/
3656static int e1000_set_mac(struct net_device *netdev, void *p)
3657{
3658 struct e1000_adapter *adapter = netdev_priv(netdev);
3659 struct sockaddr *addr = p;
3660
3661 if (!is_valid_ether_addr(addr->sa_data))
3662 return -EADDRNOTAVAIL;
3663
3664 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3665 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
3666
3667 e1000e_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
3668
3669 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
3670 /* activate the work around */
3671 e1000e_set_laa_state_82571(&adapter->hw, 1);
3672
ad68076e
BA		 3673 /*
3674 * Hold a copy of the LAA in RAR[14] This is done so that
bc7f75fa
AK		 3675 * between the time RAR[0] gets clobbered and the time it
3676 * gets fixed (in e1000_watchdog), the actual LAA is in one
3677 * of the RARs and no incoming packets directed to this port
3678 * are dropped. Eventually the LAA will be in RAR[0] and
ad68076e
BA		 3679 * RAR[14]
3680 */
bc7f75fa
AK		 3681 e1000e_rar_set(&adapter->hw,
3682 adapter->hw.mac.addr,
3683 adapter->hw.mac.rar_entry_count - 1);
3684 }
3685
3686 return 0;
3687}
3688
a8f88ff5
JB		 3689/**
3690 * e1000e_update_phy_task - work thread to update phy
3691 * @work: pointer to our work struct
3692 *
3693 * this worker thread exists because we must acquire a
3694 * semaphore to read the phy, which we could msleep while
3695 * waiting for it, and we can't msleep in a timer.
3696 **/
3697static void e1000e_update_phy_task(struct work_struct *work)
3698{
3699 struct e1000_adapter *adapter = container_of(work,
3700 struct e1000_adapter, update_phy_task);
3701 e1000_get_phy_info(&adapter->hw);
3702}
3703
ad68076e
BA		 3704/*
3705 * Need to wait a few seconds after link up to get diagnostic information from
3706 * the phy
3707 */
bc7f75fa
AK		 3708static void e1000_update_phy_info(unsigned long data)
3709{
3710 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
a8f88ff5 3711 schedule_work(&adapter->update_phy_task);
bc7f75fa
AK		 3712}
3713
8c7bbb92
BA		 3714/**
3715 * e1000e_update_phy_stats - Update the PHY statistics counters
3716 * @adapter: board private structure
3717 **/
3718static void e1000e_update_phy_stats(struct e1000_adapter *adapter)
3719{
3720 struct e1000_hw *hw = &adapter->hw;
3721 s32 ret_val;
3722 u16 phy_data;
3723
3724 ret_val = hw->phy.ops.acquire(hw);
3725 if (ret_val)
3726 return;
3727
3728 hw->phy.addr = 1;
3729
3730#define HV_PHY_STATS_PAGE 778
3731 /*
3732 * A page set is expensive so check if already on desired page.
3733 * If not, set to the page with the PHY status registers.
3734 */
3735 ret_val = e1000e_read_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
3736 &phy_data);
3737 if (ret_val)
3738 goto release;
3739 if (phy_data != (HV_PHY_STATS_PAGE << IGP_PAGE_SHIFT)) {
3740 ret_val = e1000e_write_phy_reg_mdic(hw,
3741 IGP01E1000_PHY_PAGE_SELECT,
3742 (HV_PHY_STATS_PAGE <<
3743 IGP_PAGE_SHIFT));
3744 if (ret_val)
3745 goto release;
3746 }
3747
3748 /* Read/clear the upper 16-bit registers and read/accumulate lower */
3749
3750 /* Single Collision Count */
3751 e1000e_read_phy_reg_mdic(hw, HV_SCC_UPPER & MAX_PHY_REG_ADDRESS,
3752 &phy_data);
3753 ret_val = e1000e_read_phy_reg_mdic(hw,
3754 HV_SCC_LOWER & MAX_PHY_REG_ADDRESS,
3755 &phy_data);
3756 if (!ret_val)
3757 adapter->stats.scc += phy_data;
3758
3759 /* Excessive Collision Count */
3760 e1000e_read_phy_reg_mdic(hw, HV_ECOL_UPPER & MAX_PHY_REG_ADDRESS,
3761 &phy_data);
3762 ret_val = e1000e_read_phy_reg_mdic(hw,
3763 HV_ECOL_LOWER & MAX_PHY_REG_ADDRESS,
3764 &phy_data);
3765 if (!ret_val)
3766 adapter->stats.ecol += phy_data;
3767
3768 /* Multiple Collision Count */
3769 e1000e_read_phy_reg_mdic(hw, HV_MCC_UPPER & MAX_PHY_REG_ADDRESS,
3770 &phy_data);
3771 ret_val = e1000e_read_phy_reg_mdic(hw,
3772 HV_MCC_LOWER & MAX_PHY_REG_ADDRESS,
3773 &phy_data);
3774 if (!ret_val)
3775 adapter->stats.mcc += phy_data;
3776
3777 /* Late Collision Count */
3778 e1000e_read_phy_reg_mdic(hw, HV_LATECOL_UPPER & MAX_PHY_REG_ADDRESS,
3779 &phy_data);
3780 ret_val = e1000e_read_phy_reg_mdic(hw,
3781 HV_LATECOL_LOWER &
3782 MAX_PHY_REG_ADDRESS,
3783 &phy_data);
3784 if (!ret_val)
3785 adapter->stats.latecol += phy_data;
3786
3787 /* Collision Count - also used for adaptive IFS */
3788 e1000e_read_phy_reg_mdic(hw, HV_COLC_UPPER & MAX_PHY_REG_ADDRESS,
3789 &phy_data);
3790 ret_val = e1000e_read_phy_reg_mdic(hw,
3791 HV_COLC_LOWER & MAX_PHY_REG_ADDRESS,
3792 &phy_data);
3793 if (!ret_val)
3794 hw->mac.collision_delta = phy_data;
3795
3796 /* Defer Count */
3797 e1000e_read_phy_reg_mdic(hw, HV_DC_UPPER & MAX_PHY_REG_ADDRESS,
3798 &phy_data);
3799 ret_val = e1000e_read_phy_reg_mdic(hw,
3800 HV_DC_LOWER & MAX_PHY_REG_ADDRESS,
3801 &phy_data);
3802 if (!ret_val)
3803 adapter->stats.dc += phy_data;
3804
3805 /* Transmit with no CRS */
3806 e1000e_read_phy_reg_mdic(hw, HV_TNCRS_UPPER & MAX_PHY_REG_ADDRESS,
3807 &phy_data);
3808 ret_val = e1000e_read_phy_reg_mdic(hw,
3809 HV_TNCRS_LOWER & MAX_PHY_REG_ADDRESS,
3810 &phy_data);
3811 if (!ret_val)
3812 adapter->stats.tncrs += phy_data;
3813
3814release:
3815 hw->phy.ops.release(hw);
3816}
3817
bc7f75fa
AK		 3818/**
3819 * e1000e_update_stats - Update the board statistics counters
3820 * @adapter: board private structure
3821 **/
3822void e1000e_update_stats(struct e1000_adapter *adapter)
3823{
7274c20f 3824 struct net_device *netdev = adapter->netdev;
bc7f75fa
AK		 3825 struct e1000_hw *hw = &adapter->hw;
3826 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 3827
3828 /*
3829 * Prevent stats update while adapter is being reset, or if the pci
3830 * connection is down.
3831 */
3832 if (adapter->link_speed == 0)
3833 return;
3834 if (pci_channel_offline(pdev))
3835 return;
3836
bc7f75fa
AK		 3837 adapter->stats.crcerrs += er32(CRCERRS);
3838 adapter->stats.gprc += er32(GPRC);
7c25769f
BA		 3839 adapter->stats.gorc += er32(GORCL);
3840 er32(GORCH); /* Clear gorc */
bc7f75fa
AK		 3841 adapter->stats.bprc += er32(BPRC);
3842 adapter->stats.mprc += er32(MPRC);
3843 adapter->stats.roc += er32(ROC);
3844
bc7f75fa 3845 adapter->stats.mpc += er32(MPC);
8c7bbb92
BA		 3846
3847 /* Half-duplex statistics */
3848 if (adapter->link_duplex == HALF_DUPLEX) {
3849 if (adapter->flags2 & FLAG2_HAS_PHY_STATS) {
3850 e1000e_update_phy_stats(adapter);
3851 } else {
3852 adapter->stats.scc += er32(SCC);
3853 adapter->stats.ecol += er32(ECOL);
3854 adapter->stats.mcc += er32(MCC);
3855 adapter->stats.latecol += er32(LATECOL);
3856 adapter->stats.dc += er32(DC);
3857
3858 hw->mac.collision_delta = er32(COLC);
3859
3860 if ((hw->mac.type != e1000_82574) &&
3861 (hw->mac.type != e1000_82583))
3862 adapter->stats.tncrs += er32(TNCRS);
3863 }
3864 adapter->stats.colc += hw->mac.collision_delta;
a4f58f54 3865 }
8c7bbb92 3866
bc7f75fa
AK		 3867 adapter->stats.xonrxc += er32(XONRXC);
3868 adapter->stats.xontxc += er32(XONTXC);
3869 adapter->stats.xoffrxc += er32(XOFFRXC);
3870 adapter->stats.xofftxc += er32(XOFFTXC);
bc7f75fa 3871 adapter->stats.gptc += er32(GPTC);
7c25769f
BA		 3872 adapter->stats.gotc += er32(GOTCL);
3873 er32(GOTCH); /* Clear gotc */
bc7f75fa
AK		 3874 adapter->stats.rnbc += er32(RNBC);
3875 adapter->stats.ruc += er32(RUC);
bc7f75fa
AK		 3876
3877 adapter->stats.mptc += er32(MPTC);
3878 adapter->stats.bptc += er32(BPTC);
3879
3880 /* used for adaptive IFS */
3881
3882 hw->mac.tx_packet_delta = er32(TPT);
3883 adapter->stats.tpt += hw->mac.tx_packet_delta;
bc7f75fa
AK		 3884
3885 adapter->stats.algnerrc += er32(ALGNERRC);
3886 adapter->stats.rxerrc += er32(RXERRC);
bc7f75fa
AK		 3887 adapter->stats.cexterr += er32(CEXTERR);
3888 adapter->stats.tsctc += er32(TSCTC);
3889 adapter->stats.tsctfc += er32(TSCTFC);
3890
bc7f75fa 3891 /* Fill out the OS statistics structure */
7274c20f
AK		 3892 netdev->stats.multicast = adapter->stats.mprc;
3893 netdev->stats.collisions = adapter->stats.colc;
bc7f75fa
AK		 3894
3895 /* Rx Errors */
3896
ad68076e
BA		 3897 /*
3898 * RLEC on some newer hardware can be incorrect so build
3899 * our own version based on RUC and ROC
3900 */
7274c20f 3901 netdev->stats.rx_errors = adapter->stats.rxerrc +
bc7f75fa
AK		 3902 adapter->stats.crcerrs + adapter->stats.algnerrc +
3903 adapter->stats.ruc + adapter->stats.roc +
3904 adapter->stats.cexterr;
7274c20f 3905 netdev->stats.rx_length_errors = adapter->stats.ruc +
bc7f75fa 3906 adapter->stats.roc;
7274c20f
AK		 3907 netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
3908 netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
3909 netdev->stats.rx_missed_errors = adapter->stats.mpc;
bc7f75fa
AK		 3910
3911 /* Tx Errors */
7274c20f 3912 netdev->stats.tx_errors = adapter->stats.ecol +
bc7f75fa 3913 adapter->stats.latecol;
7274c20f
AK		 3914 netdev->stats.tx_aborted_errors = adapter->stats.ecol;
3915 netdev->stats.tx_window_errors = adapter->stats.latecol;
3916 netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
bc7f75fa
AK		 3917
3918 /* Tx Dropped needs to be maintained elsewhere */
3919
bc7f75fa
AK		 3920 /* Management Stats */
3921 adapter->stats.mgptc += er32(MGTPTC);
3922 adapter->stats.mgprc += er32(MGTPRC);
3923 adapter->stats.mgpdc += er32(MGTPDC);
bc7f75fa
AK		 3924}
3925
7c25769f
BA		 3926/**
3927 * e1000_phy_read_status - Update the PHY register status snapshot
3928 * @adapter: board private structure
3929 **/
3930static void e1000_phy_read_status(struct e1000_adapter *adapter)
3931{
3932 struct e1000_hw *hw = &adapter->hw;
3933 struct e1000_phy_regs *phy = &adapter->phy_regs;
3934 int ret_val;
7c25769f
BA		 3935
3936 if ((er32(STATUS) & E1000_STATUS_LU) &&
3937 (adapter->hw.phy.media_type == e1000_media_type_copper)) {
3938 ret_val = e1e_rphy(hw, PHY_CONTROL, &phy->bmcr);
3939 ret_val |= e1e_rphy(hw, PHY_STATUS, &phy->bmsr);
3940 ret_val |= e1e_rphy(hw, PHY_AUTONEG_ADV, &phy->advertise);
3941 ret_val |= e1e_rphy(hw, PHY_LP_ABILITY, &phy->lpa);
3942 ret_val |= e1e_rphy(hw, PHY_AUTONEG_EXP, &phy->expansion);
3943 ret_val |= e1e_rphy(hw, PHY_1000T_CTRL, &phy->ctrl1000);
3944 ret_val |= e1e_rphy(hw, PHY_1000T_STATUS, &phy->stat1000);
3945 ret_val |= e1e_rphy(hw, PHY_EXT_STATUS, &phy->estatus);
3946 if (ret_val)
44defeb3 3947 e_warn("Error reading PHY register\n");
7c25769f
BA		 3948 } else {
3949 /*
3950 * Do not read PHY registers if link is not up
3951 * Set values to typical power-on defaults
3952 */
3953 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
3954 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
3955 BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
3956 BMSR_ERCAP);
3957 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
3958 ADVERTISE_ALL | ADVERTISE_CSMA);
3959 phy->lpa = 0;
3960 phy->expansion = EXPANSION_ENABLENPAGE;
3961 phy->ctrl1000 = ADVERTISE_1000FULL;
3962 phy->stat1000 = 0;
3963 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
3964 }
7c25769f
BA		 3965}
3966
bc7f75fa
AK		 3967static void e1000_print_link_info(struct e1000_adapter *adapter)
3968{
bc7f75fa
AK		 3969 struct e1000_hw *hw = &adapter->hw;
3970 u32 ctrl = er32(CTRL);
3971
8f12fe86
BA		 3972 /* Link status message must follow this format for user tools */
3973 printk(KERN_INFO "e1000e: %s NIC Link is Up %d Mbps %s, "
3974 "Flow Control: %s\n",
3975 adapter->netdev->name,
44defeb3
JK		 3976 adapter->link_speed,
3977 (adapter->link_duplex == FULL_DUPLEX) ?
3978 "Full Duplex" : "Half Duplex",
3979 ((ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE)) ?
3980 "RX/TX" :
3981 ((ctrl & E1000_CTRL_RFCE) ? "RX" :
3982 ((ctrl & E1000_CTRL_TFCE) ? "TX" : "None" )));
bc7f75fa
AK		 3983}
3984
0c6bdb30 3985static bool e1000e_has_link(struct e1000_adapter *adapter)
318a94d6
JK		 3986{
3987 struct e1000_hw *hw = &adapter->hw;
3988 bool link_active = 0;
3989 s32 ret_val = 0;
3990
3991 /*
3992 * get_link_status is set on LSC (link status) interrupt or
3993 * Rx sequence error interrupt. get_link_status will stay
3994 * false until the check_for_link establishes link
3995 * for copper adapters ONLY
3996 */
3997 switch (hw->phy.media_type) {
3998 case e1000_media_type_copper:
3999 if (hw->mac.get_link_status) {
4000 ret_val = hw->mac.ops.check_for_link(hw);
4001 link_active = !hw->mac.get_link_status;
4002 } else {
4003 link_active = 1;
4004 }
4005 break;
4006 case e1000_media_type_fiber:
4007 ret_val = hw->mac.ops.check_for_link(hw);
4008 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
4009 break;
4010 case e1000_media_type_internal_serdes:
4011 ret_val = hw->mac.ops.check_for_link(hw);
4012 link_active = adapter->hw.mac.serdes_has_link;
4013 break;
4014 default:
4015 case e1000_media_type_unknown:
4016 break;
4017 }
4018
4019 if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
4020 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
4021 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
44defeb3 4022 e_info("Gigabit has been disabled, downgrading speed\n");
318a94d6
JK		 4023 }
4024
4025 return link_active;
4026}
4027
4028static void e1000e_enable_receives(struct e1000_adapter *adapter)
4029{
4030 /* make sure the receive unit is started */
4031 if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
4032 (adapter->flags & FLAG_RX_RESTART_NOW)) {
4033 struct e1000_hw *hw = &adapter->hw;
4034 u32 rctl = er32(RCTL);
4035 ew32(RCTL, rctl | E1000_RCTL_EN);
4036 adapter->flags &= ~FLAG_RX_RESTART_NOW;
4037 }
4038}
4039
bc7f75fa
AK		 4040/**
4041 * e1000_watchdog - Timer Call-back
4042 * @data: pointer to adapter cast into an unsigned long
4043 **/
4044static void e1000_watchdog(unsigned long data)
4045{
4046 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
4047
4048 /* Do the rest outside of interrupt context */
4049 schedule_work(&adapter->watchdog_task);
4050
4051 /* TODO: make this use queue_delayed_work() */
4052}
4053
4054static void e1000_watchdog_task(struct work_struct *work)
4055{
4056 struct e1000_adapter *adapter = container_of(work,
4057 struct e1000_adapter, watchdog_task);
bc7f75fa
AK		 4058 struct net_device *netdev = adapter->netdev;
4059 struct e1000_mac_info *mac = &adapter->hw.mac;
75eb0fad 4060 struct e1000_phy_info *phy = &adapter->hw.phy;
bc7f75fa
AK		 4061 struct e1000_ring *tx_ring = adapter->tx_ring;
4062 struct e1000_hw *hw = &adapter->hw;
4063 u32 link, tctl;
bc7f75fa
AK		 4064 int tx_pending = 0;
4065
b405e8df 4066 link = e1000e_has_link(adapter);
318a94d6 4067 if ((netif_carrier_ok(netdev)) && link) {
23606cf5
RW		 4068 /* Cancel scheduled suspend requests. */
4069 pm_runtime_resume(netdev->dev.parent);
4070
318a94d6 4071 e1000e_enable_receives(adapter);
bc7f75fa 4072 goto link_up;
bc7f75fa
AK		 4073 }
4074
4075 if ((e1000e_enable_tx_pkt_filtering(hw)) &&
4076 (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
4077 e1000_update_mng_vlan(adapter);
4078
bc7f75fa
AK		 4079 if (link) {
4080 if (!netif_carrier_ok(netdev)) {
4081 bool txb2b = 1;
23606cf5
RW		 4082
4083 /* Cancel scheduled suspend requests. */
4084 pm_runtime_resume(netdev->dev.parent);
4085
318a94d6 4086 /* update snapshot of PHY registers on LSC */
7c25769f 4087 e1000_phy_read_status(adapter);
bc7f75fa
AK		 4088 mac->ops.get_link_up_info(&adapter->hw,
4089 &adapter->link_speed,
4090 &adapter->link_duplex);
4091 e1000_print_link_info(adapter);
f4187b56
BA		 4092 /*
4093 * On supported PHYs, check for duplex mismatch only
4094 * if link has autonegotiated at 10/100 half
4095 */
4096 if ((hw->phy.type == e1000_phy_igp_3 ||
4097 hw->phy.type == e1000_phy_bm) &&
4098 (hw->mac.autoneg == true) &&
4099 (adapter->link_speed == SPEED_10 ||
4100 adapter->link_speed == SPEED_100) &&
4101 (adapter->link_duplex == HALF_DUPLEX)) {
4102 u16 autoneg_exp;
4103
4104 e1e_rphy(hw, PHY_AUTONEG_EXP, &autoneg_exp);
4105
4106 if (!(autoneg_exp & NWAY_ER_LP_NWAY_CAPS))
4107 e_info("Autonegotiated half duplex but"
4108 " link partner cannot autoneg. "
4109 " Try forcing full duplex if "
4110 "link gets many collisions.\n");
4111 }
4112
f49c57e1 4113 /* adjust timeout factor according to speed/duplex */
bc7f75fa
AK		 4114 adapter->tx_timeout_factor = 1;
4115 switch (adapter->link_speed) {
4116 case SPEED_10:
4117 txb2b = 0;
10f1b492 4118 adapter->tx_timeout_factor = 16;
bc7f75fa
AK		 4119 break;
4120 case SPEED_100:
4121 txb2b = 0;
4c86e0b9 4122 adapter->tx_timeout_factor = 10;
bc7f75fa
AK		 4123 break;
4124 }
4125
ad68076e
BA		 4126 /*
4127 * workaround: re-program speed mode bit after
4128 * link-up event
4129 */
bc7f75fa
AK		 4130 if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
4131 !txb2b) {
4132 u32 tarc0;
e9ec2c0f 4133 tarc0 = er32(TARC(0));
bc7f75fa 4134 tarc0 &= ~SPEED_MODE_BIT;
e9ec2c0f 4135 ew32(TARC(0), tarc0);
bc7f75fa
AK		 4136 }
4137
ad68076e
BA		 4138 /*
4139 * disable TSO for pcie and 10/100 speeds, to avoid
4140 * some hardware issues
4141 */
bc7f75fa
AK		 4142 if (!(adapter->flags & FLAG_TSO_FORCE)) {
4143 switch (adapter->link_speed) {
4144 case SPEED_10:
4145 case SPEED_100:
44defeb3 4146 e_info("10/100 speed: disabling TSO\n");
bc7f75fa
AK		 4147 netdev->features &= ~NETIF_F_TSO;
4148 netdev->features &= ~NETIF_F_TSO6;
4149 break;
4150 case SPEED_1000:
4151 netdev->features |= NETIF_F_TSO;
4152 netdev->features |= NETIF_F_TSO6;
4153 break;
4154 default:
4155 /* oops */
4156 break;
4157 }
4158 }
4159
ad68076e
BA		 4160 /*
4161 * enable transmits in the hardware, need to do this
4162 * after setting TARC(0)
4163 */
bc7f75fa
AK		 4164 tctl = er32(TCTL);
4165 tctl |= E1000_TCTL_EN;
4166 ew32(TCTL, tctl);
4167
75eb0fad
BA		 4168 /*
4169 * Perform any post-link-up configuration before
4170 * reporting link up.
4171 */
4172 if (phy->ops.cfg_on_link_up)
4173 phy->ops.cfg_on_link_up(hw);
4174
bc7f75fa 4175 netif_carrier_on(netdev);
bc7f75fa
AK		 4176
4177 if (!test_bit(__E1000_DOWN, &adapter->state))
4178 mod_timer(&adapter->phy_info_timer,
4179 round_jiffies(jiffies + 2 * HZ));
bc7f75fa
AK		 4180 }
4181 } else {
4182 if (netif_carrier_ok(netdev)) {
4183 adapter->link_speed = 0;
4184 adapter->link_duplex = 0;
8f12fe86
BA		 4185 /* Link status message must follow this format */
4186 printk(KERN_INFO "e1000e: %s NIC Link is Down\n",
4187 adapter->netdev->name);
bc7f75fa 4188 netif_carrier_off(netdev);
bc7f75fa
AK		 4189 if (!test_bit(__E1000_DOWN, &adapter->state))
4190 mod_timer(&adapter->phy_info_timer,
4191 round_jiffies(jiffies + 2 * HZ));
4192
4193 if (adapter->flags & FLAG_RX_NEEDS_RESTART)
4194 schedule_work(&adapter->reset_task);
23606cf5
RW		 4195 else
4196 pm_schedule_suspend(netdev->dev.parent,
4197 LINK_TIMEOUT);
bc7f75fa
AK		 4198 }
4199 }
4200
4201link_up:
4202 e1000e_update_stats(adapter);
4203
4204 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
4205 adapter->tpt_old = adapter->stats.tpt;
4206 mac->collision_delta = adapter->stats.colc - adapter->colc_old;
4207 adapter->colc_old = adapter->stats.colc;
4208
7c25769f
BA		 4209 adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
4210 adapter->gorc_old = adapter->stats.gorc;
4211 adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
4212 adapter->gotc_old = adapter->stats.gotc;
bc7f75fa
AK		 4213
4214 e1000e_update_adaptive(&adapter->hw);
4215
4216 if (!netif_carrier_ok(netdev)) {
4217 tx_pending = (e1000_desc_unused(tx_ring) + 1 <
4218 tx_ring->count);
4219 if (tx_pending) {
ad68076e
BA		 4220 /*
4221 * We've lost link, so the controller stops DMA,
bc7f75fa
AK		 4222 * but we've got queued Tx work that's never going
4223 * to get done, so reset controller to flush Tx.
ad68076e
BA		 4224 * (Do the reset outside of interrupt context).
4225 */
bc7f75fa
AK		 4226 adapter->tx_timeout_count++;
4227 schedule_work(&adapter->reset_task);
c2d5ab49
JB		 4228 /* return immediately since reset is imminent */
4229 return;
bc7f75fa
AK		 4230 }
4231 }
4232
eab2abf5
JB		 4233 /* Simple mode for Interrupt Throttle Rate (ITR) */
4234 if (adapter->itr_setting == 4) {
4235 /*
4236 * Symmetric Tx/Rx gets a reduced ITR=2000;
4237 * Total asymmetrical Tx or Rx gets ITR=8000;
4238 * everyone else is between 2000-8000.
4239 */
4240 u32 goc = (adapter->gotc + adapter->gorc) / 10000;
4241 u32 dif = (adapter->gotc > adapter->gorc ?
4242 adapter->gotc - adapter->gorc :
4243 adapter->gorc - adapter->gotc) / 10000;
4244 u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
4245
4246 ew32(ITR, 1000000000 / (itr * 256));
4247 }
4248
ad68076e 4249 /* Cause software interrupt to ensure Rx ring is cleaned */
4662e82b
BA		 4250 if (adapter->msix_entries)
4251 ew32(ICS, adapter->rx_ring->ims_val);
4252 else
4253 ew32(ICS, E1000_ICS_RXDMT0);
bc7f75fa
AK		 4254
4255 /* Force detection of hung controller every watchdog period */
4256 adapter->detect_tx_hung = 1;
4257
ad68076e
BA		 4258 /*
4259 * With 82571 controllers, LAA may be overwritten due to controller
4260 * reset from the other port. Set the appropriate LAA in RAR[0]
4261 */
bc7f75fa
AK		 4262 if (e1000e_get_laa_state_82571(hw))
4263 e1000e_rar_set(hw, adapter->hw.mac.addr, 0);
4264
4265 /* Reset the timer */
4266 if (!test_bit(__E1000_DOWN, &adapter->state))
4267 mod_timer(&adapter->watchdog_timer,
4268 round_jiffies(jiffies + 2 * HZ));
4269}
4270
4271#define E1000_TX_FLAGS_CSUM 0x00000001
4272#define E1000_TX_FLAGS_VLAN 0x00000002
4273#define E1000_TX_FLAGS_TSO 0x00000004
4274#define E1000_TX_FLAGS_IPV4 0x00000008
4275#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
4276#define E1000_TX_FLAGS_VLAN_SHIFT 16
4277
4278static int e1000_tso(struct e1000_adapter *adapter,
4279 struct sk_buff *skb)
4280{
4281 struct e1000_ring *tx_ring = adapter->tx_ring;
4282 struct e1000_context_desc *context_desc;
4283 struct e1000_buffer *buffer_info;
4284 unsigned int i;
4285 u32 cmd_length = 0;
4286 u16 ipcse = 0, tucse, mss;
4287 u8 ipcss, ipcso, tucss, tucso, hdr_len;
4288 int err;
4289
3d5e33c9
BA		 4290 if (!skb_is_gso(skb))
4291 return 0;
bc7f75fa 4292
3d5e33c9
BA		 4293 if (skb_header_cloned(skb)) {
4294 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
4295 if (err)
4296 return err;
bc7f75fa
AK		 4297 }
4298
3d5e33c9
BA		 4299 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
4300 mss = skb_shinfo(skb)->gso_size;
4301 if (skb->protocol == htons(ETH_P_IP)) {
4302 struct iphdr *iph = ip_hdr(skb);
4303 iph->tot_len = 0;
4304 iph->check = 0;
4305 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
4306 0, IPPROTO_TCP, 0);
4307 cmd_length = E1000_TXD_CMD_IP;
4308 ipcse = skb_transport_offset(skb) - 1;
8e1e8a47 4309 } else if (skb_is_gso_v6(skb)) {
3d5e33c9
BA		 4310 ipv6_hdr(skb)->payload_len = 0;
4311 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
4312 &ipv6_hdr(skb)->daddr,
4313 0, IPPROTO_TCP, 0);
4314 ipcse = 0;
4315 }
4316 ipcss = skb_network_offset(skb);
4317 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
4318 tucss = skb_transport_offset(skb);
4319 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
4320 tucse = 0;
4321
4322 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
4323 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
4324
4325 i = tx_ring->next_to_use;
4326 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
4327 buffer_info = &tx_ring->buffer_info[i];
4328
4329 context_desc->lower_setup.ip_fields.ipcss = ipcss;
4330 context_desc->lower_setup.ip_fields.ipcso = ipcso;
4331 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
4332 context_desc->upper_setup.tcp_fields.tucss = tucss;
4333 context_desc->upper_setup.tcp_fields.tucso = tucso;
4334 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
4335 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
4336 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
4337 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
4338
4339 buffer_info->time_stamp = jiffies;
4340 buffer_info->next_to_watch = i;
4341
4342 i++;
4343 if (i == tx_ring->count)
4344 i = 0;
4345 tx_ring->next_to_use = i;
4346
4347 return 1;
bc7f75fa
AK		 4348}
4349
4350static bool e1000_tx_csum(struct e1000_adapter *adapter, struct sk_buff *skb)
4351{
4352 struct e1000_ring *tx_ring = adapter->tx_ring;
4353 struct e1000_context_desc *context_desc;
4354 struct e1000_buffer *buffer_info;
4355 unsigned int i;
4356 u8 css;
af807c82 4357 u32 cmd_len = E1000_TXD_CMD_DEXT;
5f66f208 4358 __be16 protocol;
bc7f75fa 4359
af807c82
DG		 4360 if (skb->ip_summed != CHECKSUM_PARTIAL)
4361 return 0;
bc7f75fa 4362
5f66f208
AJ		 4363 if (skb->protocol == cpu_to_be16(ETH_P_8021Q))
4364 protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto;
4365 else
4366 protocol = skb->protocol;
4367
3f518390 4368 switch (protocol) {
09640e63 4369 case cpu_to_be16(ETH_P_IP):
af807c82
DG		 4370 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
4371 cmd_len |= E1000_TXD_CMD_TCP;
4372 break;
09640e63 4373 case cpu_to_be16(ETH_P_IPV6):
af807c82
DG		 4374 /* XXX not handling all IPV6 headers */
4375 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
4376 cmd_len |= E1000_TXD_CMD_TCP;
4377 break;
4378 default:
4379 if (unlikely(net_ratelimit()))
5f66f208
AJ		 4380 e_warn("checksum_partial proto=%x!\n",
4381 be16_to_cpu(protocol));
af807c82 4382 break;
bc7f75fa
AK		 4383 }
4384
af807c82
DG		 4385 css = skb_transport_offset(skb);
4386
4387 i = tx_ring->next_to_use;
4388 buffer_info = &tx_ring->buffer_info[i];
4389 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
4390
4391 context_desc->lower_setup.ip_config = 0;
4392 context_desc->upper_setup.tcp_fields.tucss = css;
4393 context_desc->upper_setup.tcp_fields.tucso =
4394 css + skb->csum_offset;
4395 context_desc->upper_setup.tcp_fields.tucse = 0;
4396 context_desc->tcp_seg_setup.data = 0;
4397 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
4398
4399 buffer_info->time_stamp = jiffies;
4400 buffer_info->next_to_watch = i;
4401
4402 i++;
4403 if (i == tx_ring->count)
4404 i = 0;
4405 tx_ring->next_to_use = i;
4406
4407 return 1;
bc7f75fa
AK		 4408}
4409
4410#define E1000_MAX_PER_TXD 8192
4411#define E1000_MAX_TXD_PWR 12
4412
4413static int e1000_tx_map(struct e1000_adapter *adapter,
4414 struct sk_buff *skb, unsigned int first,
4415 unsigned int max_per_txd, unsigned int nr_frags,
4416 unsigned int mss)
4417{
4418 struct e1000_ring *tx_ring = adapter->tx_ring;
03b1320d 4419 struct pci_dev *pdev = adapter->pdev;
1b7719c4 4420 struct e1000_buffer *buffer_info;
8ddc951c 4421 unsigned int len = skb_headlen(skb);
03b1320d 4422 unsigned int offset = 0, size, count = 0, i;
9ed318d5 4423 unsigned int f, bytecount, segs;
bc7f75fa
AK		 4424
4425 i = tx_ring->next_to_use;
4426
4427 while (len) {
1b7719c4 4428 buffer_info = &tx_ring->buffer_info[i];
bc7f75fa
AK		 4429 size = min(len, max_per_txd);
4430
bc7f75fa 4431 buffer_info->length = size;
bc7f75fa 4432 buffer_info->time_stamp = jiffies;
bc7f75fa 4433 buffer_info->next_to_watch = i;
0be3f55f
NN		 4434 buffer_info->dma = dma_map_single(&pdev->dev,
4435 skb->data + offset,
4436 size, DMA_TO_DEVICE);
03b1320d 4437 buffer_info->mapped_as_page = false;
0be3f55f 4438 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
03b1320d 4439 goto dma_error;
bc7f75fa
AK		 4440
4441 len -= size;
4442 offset += size;
03b1320d 4443 count++;
1b7719c4
AD		 4444
4445 if (len) {
4446 i++;
4447 if (i == tx_ring->count)
4448 i = 0;
4449 }
bc7f75fa
AK		 4450 }
4451
4452 for (f = 0; f < nr_frags; f++) {
4453 struct skb_frag_struct *frag;
4454
4455 frag = &skb_shinfo(skb)->frags[f];
4456 len = frag->size;
03b1320d 4457 offset = frag->page_offset;
bc7f75fa
AK		 4458
4459 while (len) {
1b7719c4
AD		 4460 i++;
4461 if (i == tx_ring->count)
4462 i = 0;
4463
bc7f75fa
AK		 4464 buffer_info = &tx_ring->buffer_info[i];
4465 size = min(len, max_per_txd);
bc7f75fa
AK		 4466
4467 buffer_info->length = size;
4468 buffer_info->time_stamp = jiffies;
bc7f75fa 4469 buffer_info->next_to_watch = i;
0be3f55f 4470 buffer_info->dma = dma_map_page(&pdev->dev, frag->page,
03b1320d 4471 offset, size,
0be3f55f 4472 DMA_TO_DEVICE);
03b1320d 4473 buffer_info->mapped_as_page = true;
0be3f55f 4474 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
03b1320d 4475 goto dma_error;
bc7f75fa
AK		 4476
4477 len -= size;
4478 offset += size;
4479 count++;
bc7f75fa
AK		 4480 }
4481 }
4482
9ed318d5
TH		 4483 segs = skb_shinfo(skb)->gso_segs ?: 1;
4484 /* multiply data chunks by size of headers */
4485 bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len;
4486
bc7f75fa 4487 tx_ring->buffer_info[i].skb = skb;
9ed318d5
TH		 4488 tx_ring->buffer_info[i].segs = segs;
4489 tx_ring->buffer_info[i].bytecount = bytecount;
bc7f75fa
AK		 4490 tx_ring->buffer_info[first].next_to_watch = i;
4491
4492 return count;
03b1320d
AD		 4493
4494dma_error:
4495 dev_err(&pdev->dev, "TX DMA map failed\n");
4496 buffer_info->dma = 0;
c1fa347f 4497 if (count)
03b1320d 4498 count--;
c1fa347f
RK		 4499
4500 while (count--) {
4501 if (i==0)
03b1320d 4502 i += tx_ring->count;
c1fa347f 4503 i--;
03b1320d
AD		 4504 buffer_info = &tx_ring->buffer_info[i];
4505 e1000_put_txbuf(adapter, buffer_info);;
4506 }
4507
4508 return 0;
bc7f75fa
AK		 4509}
4510
4511static void e1000_tx_queue(struct e1000_adapter *adapter,
4512 int tx_flags, int count)
4513{
4514 struct e1000_ring *tx_ring = adapter->tx_ring;
4515 struct e1000_tx_desc *tx_desc = NULL;
4516 struct e1000_buffer *buffer_info;
4517 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
4518 unsigned int i;
4519
4520 if (tx_flags & E1000_TX_FLAGS_TSO) {
4521 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
4522 E1000_TXD_CMD_TSE;
4523 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
4524
4525 if (tx_flags & E1000_TX_FLAGS_IPV4)
4526 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
4527 }
4528
4529 if (tx_flags & E1000_TX_FLAGS_CSUM) {
4530 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
4531 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
4532 }
4533
4534 if (tx_flags & E1000_TX_FLAGS_VLAN) {
4535 txd_lower |= E1000_TXD_CMD_VLE;
4536 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
4537 }
4538
4539 i = tx_ring->next_to_use;
4540
4541 while (count--) {
4542 buffer_info = &tx_ring->buffer_info[i];
4543 tx_desc = E1000_TX_DESC(*tx_ring, i);
4544 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4545 tx_desc->lower.data =
4546 cpu_to_le32(txd_lower | buffer_info->length);
4547 tx_desc->upper.data = cpu_to_le32(txd_upper);
4548
4549 i++;
4550 if (i == tx_ring->count)
4551 i = 0;
4552 }
4553
4554 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
4555
ad68076e
BA		 4556 /*
4557 * Force memory writes to complete before letting h/w
bc7f75fa
AK		 4558 * know there are new descriptors to fetch. (Only
4559 * applicable for weak-ordered memory model archs,
ad68076e
BA		 4560 * such as IA-64).
4561 */
bc7f75fa
AK		 4562 wmb();
4563
4564 tx_ring->next_to_use = i;
4565 writel(i, adapter->hw.hw_addr + tx_ring->tail);
ad68076e
BA		 4566 /*
4567 * we need this if more than one processor can write to our tail
4568 * at a time, it synchronizes IO on IA64/Altix systems
4569 */
bc7f75fa
AK		 4570 mmiowb();
4571}
4572
4573#define MINIMUM_DHCP_PACKET_SIZE 282
4574static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
4575 struct sk_buff *skb)
4576{
4577 struct e1000_hw *hw = &adapter->hw;
4578 u16 length, offset;
4579
4580 if (vlan_tx_tag_present(skb)) {
8e95a202
JP		 4581 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
4582 (adapter->hw.mng_cookie.status &
bc7f75fa
AK		 4583 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
4584 return 0;
4585 }
4586
4587 if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
4588 return 0;
4589
4590 if (((struct ethhdr *) skb->data)->h_proto != htons(ETH_P_IP))
4591 return 0;
4592
4593 {
4594 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data+14);
4595 struct udphdr *udp;
4596
4597 if (ip->protocol != IPPROTO_UDP)
4598 return 0;
4599
4600 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
4601 if (ntohs(udp->dest) != 67)
4602 return 0;
4603
4604 offset = (u8 *)udp + 8 - skb->data;
4605 length = skb->len - offset;
4606 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
4607 }
4608
4609 return 0;
4610}
4611
4612static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
4613{
4614 struct e1000_adapter *adapter = netdev_priv(netdev);
4615
4616 netif_stop_queue(netdev);
ad68076e
BA		 4617 /*
4618 * Herbert's original patch had:
bc7f75fa 4619 * smp_mb__after_netif_stop_queue();
ad68076e
BA		 4620 * but since that doesn't exist yet, just open code it.
4621 */
bc7f75fa
AK		 4622 smp_mb();
4623
ad68076e
BA		 4624 /*
4625 * We need to check again in a case another CPU has just
4626 * made room available.
4627 */
bc7f75fa
AK		 4628 if (e1000_desc_unused(adapter->tx_ring) < size)
4629 return -EBUSY;
4630
4631 /* A reprieve! */
4632 netif_start_queue(netdev);
4633 ++adapter->restart_queue;
4634 return 0;
4635}
4636
4637static int e1000_maybe_stop_tx(struct net_device *netdev, int size)
4638{
4639 struct e1000_adapter *adapter = netdev_priv(netdev);
4640
4641 if (e1000_desc_unused(adapter->tx_ring) >= size)
4642 return 0;
4643 return __e1000_maybe_stop_tx(netdev, size);
4644}
4645
4646#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3b29a56d
SH		 4647static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
4648 struct net_device *netdev)
bc7f75fa
AK		 4649{
4650 struct e1000_adapter *adapter = netdev_priv(netdev);
4651 struct e1000_ring *tx_ring = adapter->tx_ring;
4652 unsigned int first;
4653 unsigned int max_per_txd = E1000_MAX_PER_TXD;
4654 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
4655 unsigned int tx_flags = 0;
e743d313 4656 unsigned int len = skb_headlen(skb);
4e6c709c
AK		 4657 unsigned int nr_frags;
4658 unsigned int mss;
bc7f75fa
AK		 4659 int count = 0;
4660 int tso;
4661 unsigned int f;
bc7f75fa
AK		 4662
4663 if (test_bit(__E1000_DOWN, &adapter->state)) {
4664 dev_kfree_skb_any(skb);
4665 return NETDEV_TX_OK;
4666 }
4667
4668 if (skb->len <= 0) {
4669 dev_kfree_skb_any(skb);
4670 return NETDEV_TX_OK;
4671 }
4672
4673 mss = skb_shinfo(skb)->gso_size;
ad68076e
BA		 4674 /*
4675 * The controller does a simple calculation to
bc7f75fa
AK		 4676 * make sure there is enough room in the FIFO before
4677 * initiating the DMA for each buffer. The calc is:
4678 * 4 = ceil(buffer len/mss). To make sure we don't
4679 * overrun the FIFO, adjust the max buffer len if mss
ad68076e
BA		 4680 * drops.
4681 */
bc7f75fa
AK		 4682 if (mss) {
4683 u8 hdr_len;
4684 max_per_txd = min(mss << 2, max_per_txd);
4685 max_txd_pwr = fls(max_per_txd) - 1;
4686
ad68076e
BA		 4687 /*
4688 * TSO Workaround for 82571/2/3 Controllers -- if skb->data
4689 * points to just header, pull a few bytes of payload from
4690 * frags into skb->data
4691 */
bc7f75fa 4692 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
ad68076e
BA		 4693 /*
4694 * we do this workaround for ES2LAN, but it is un-necessary,
4695 * avoiding it could save a lot of cycles
4696 */
4e6c709c 4697 if (skb->data_len && (hdr_len == len)) {
bc7f75fa
AK		 4698 unsigned int pull_size;
4699
4700 pull_size = min((unsigned int)4, skb->data_len);
4701 if (!__pskb_pull_tail(skb, pull_size)) {
44defeb3 4702 e_err("__pskb_pull_tail failed.\n");
bc7f75fa
AK		 4703 dev_kfree_skb_any(skb);
4704 return NETDEV_TX_OK;
4705 }
e743d313 4706 len = skb_headlen(skb);
bc7f75fa
AK		 4707 }
4708 }
4709
4710 /* reserve a descriptor for the offload context */
4711 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
4712 count++;
4713 count++;
4714
4715 count += TXD_USE_COUNT(len, max_txd_pwr);
4716
4717 nr_frags = skb_shinfo(skb)->nr_frags;
4718 for (f = 0; f < nr_frags; f++)
4719 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
4720 max_txd_pwr);
4721
4722 if (adapter->hw.mac.tx_pkt_filtering)
4723 e1000_transfer_dhcp_info(adapter, skb);
4724
ad68076e
BA		 4725 /*
4726 * need: count + 2 desc gap to keep tail from touching
4727 * head, otherwise try next time
4728 */
92af3e95 4729 if (e1000_maybe_stop_tx(netdev, count + 2))
bc7f75fa 4730 return NETDEV_TX_BUSY;
bc7f75fa
AK		 4731
4732 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
4733 tx_flags |= E1000_TX_FLAGS_VLAN;
4734 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
4735 }
4736
4737 first = tx_ring->next_to_use;
4738
4739 tso = e1000_tso(adapter, skb);
4740 if (tso < 0) {
4741 dev_kfree_skb_any(skb);
bc7f75fa
AK		 4742 return NETDEV_TX_OK;
4743 }
4744
4745 if (tso)
4746 tx_flags |= E1000_TX_FLAGS_TSO;
4747 else if (e1000_tx_csum(adapter, skb))
4748 tx_flags |= E1000_TX_FLAGS_CSUM;
4749
ad68076e
BA		 4750 /*
4751 * Old method was to assume IPv4 packet by default if TSO was enabled.
bc7f75fa 4752 * 82571 hardware supports TSO capabilities for IPv6 as well...
ad68076e
BA		 4753 * no longer assume, we must.
4754 */
bc7f75fa
AK		 4755 if (skb->protocol == htons(ETH_P_IP))
4756 tx_flags |= E1000_TX_FLAGS_IPV4;
4757
1b7719c4 4758 /* if count is 0 then mapping error has occured */
bc7f75fa 4759 count = e1000_tx_map(adapter, skb, first, max_per_txd, nr_frags, mss);
1b7719c4
AD		 4760 if (count) {
4761 e1000_tx_queue(adapter, tx_flags, count);
1b7719c4
AD		 4762 /* Make sure there is space in the ring for the next send. */
4763 e1000_maybe_stop_tx(netdev, MAX_SKB_FRAGS + 2);
4764
4765 } else {
bc7f75fa 4766 dev_kfree_skb_any(skb);
1b7719c4
AD		 4767 tx_ring->buffer_info[first].time_stamp = 0;
4768 tx_ring->next_to_use = first;
bc7f75fa
AK		 4769 }
4770
bc7f75fa
AK		 4771 return NETDEV_TX_OK;
4772}
4773
4774/**
4775 * e1000_tx_timeout - Respond to a Tx Hang
4776 * @netdev: network interface device structure
4777 **/
4778static void e1000_tx_timeout(struct net_device *netdev)
4779{
4780 struct e1000_adapter *adapter = netdev_priv(netdev);
4781
4782 /* Do the reset outside of interrupt context */
4783 adapter->tx_timeout_count++;
4784 schedule_work(&adapter->reset_task);
4785}
4786
4787static void e1000_reset_task(struct work_struct *work)
4788{
4789 struct e1000_adapter *adapter;
4790 adapter = container_of(work, struct e1000_adapter, reset_task);
4791
84f4ee90
TI		 4792 e1000e_dump(adapter);
4793 e_err("Reset adapter\n");
bc7f75fa
AK		 4794 e1000e_reinit_locked(adapter);
4795}
4796
4797/**
4798 * e1000_get_stats - Get System Network Statistics
4799 * @netdev: network interface device structure
4800 *
4801 * Returns the address of the device statistics structure.
4802 * The statistics are actually updated from the timer callback.
4803 **/
4804static struct net_device_stats *e1000_get_stats(struct net_device *netdev)
4805{
bc7f75fa 4806 /* only return the current stats */
7274c20f 4807 return &netdev->stats;
bc7f75fa
AK		 4808}
4809
4810/**
4811 * e1000_change_mtu - Change the Maximum Transfer Unit
4812 * @netdev: network interface device structure
4813 * @new_mtu: new value for maximum frame size
4814 *
4815 * Returns 0 on success, negative on failure
4816 **/
4817static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
4818{
4819 struct e1000_adapter *adapter = netdev_priv(netdev);
4820 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
4821
2adc55c9
BA		 4822 /* Jumbo frame support */
4823 if ((max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) &&
4824 !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
4825 e_err("Jumbo Frames not supported.\n");
bc7f75fa
AK		 4826 return -EINVAL;
4827 }
4828
2adc55c9
BA		 4829 /* Supported frame sizes */
4830 if ((new_mtu < ETH_ZLEN + ETH_FCS_LEN + VLAN_HLEN) ||
4831 (max_frame > adapter->max_hw_frame_size)) {
4832 e_err("Unsupported MTU setting\n");
bc7f75fa
AK		 4833 return -EINVAL;
4834 }
4835
6f461f6c
BA		 4836 /* 82573 Errata 17 */
4837 if (((adapter->hw.mac.type == e1000_82573) ||
4838 (adapter->hw.mac.type == e1000_82574)) &&
4839 (max_frame > ETH_FRAME_LEN + ETH_FCS_LEN)) {
4840 adapter->flags2 |= FLAG2_DISABLE_ASPM_L1;
4841 e1000e_disable_aspm(adapter->pdev, PCIE_LINK_STATE_L1);
4842 }
4843
bc7f75fa
AK		 4844 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
4845 msleep(1);
610c9928 4846 /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */
318a94d6 4847 adapter->max_frame_size = max_frame;
610c9928
BA		 4848 e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu);
4849 netdev->mtu = new_mtu;
bc7f75fa
AK		 4850 if (netif_running(netdev))
4851 e1000e_down(adapter);
4852
ad68076e
BA		 4853 /*
4854 * NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
bc7f75fa
AK		 4855 * means we reserve 2 more, this pushes us to allocate from the next
4856 * larger slab size.
ad68076e 4857 * i.e. RXBUFFER_2048 --> size-4096 slab
97ac8cae
BA		 4858 * However with the new *_jumbo_rx* routines, jumbo receives will use
4859 * fragmented skbs
ad68076e 4860 */
bc7f75fa 4861
9926146b 4862 if (max_frame <= 2048)
bc7f75fa
AK		 4863 adapter->rx_buffer_len = 2048;
4864 else
4865 adapter->rx_buffer_len = 4096;
4866
4867 /* adjust allocation if LPE protects us, and we aren't using SBP */
4868 if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
4869 (max_frame == ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN))
4870 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN
ad68076e 4871 + ETH_FCS_LEN;
bc7f75fa 4872
bc7f75fa
AK		 4873 if (netif_running(netdev))
4874 e1000e_up(adapter);
4875 else
4876 e1000e_reset(adapter);
4877
4878 clear_bit(__E1000_RESETTING, &adapter->state);
4879
4880 return 0;
4881}
4882
4883static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
4884 int cmd)
4885{
4886 struct e1000_adapter *adapter = netdev_priv(netdev);
4887 struct mii_ioctl_data *data = if_mii(ifr);
bc7f75fa 4888
318a94d6 4889 if (adapter->hw.phy.media_type != e1000_media_type_copper)
bc7f75fa
AK		 4890 return -EOPNOTSUPP;
4891
4892 switch (cmd) {
4893 case SIOCGMIIPHY:
4894 data->phy_id = adapter->hw.phy.addr;
4895 break;
4896 case SIOCGMIIREG:
b16a002e
BA		 4897 e1000_phy_read_status(adapter);
4898
7c25769f
BA		 4899 switch (data->reg_num & 0x1F) {
4900 case MII_BMCR:
4901 data->val_out = adapter->phy_regs.bmcr;
4902 break;
4903 case MII_BMSR:
4904 data->val_out = adapter->phy_regs.bmsr;
4905 break;
4906 case MII_PHYSID1:
4907 data->val_out = (adapter->hw.phy.id >> 16);
4908 break;
4909 case MII_PHYSID2:
4910 data->val_out = (adapter->hw.phy.id & 0xFFFF);
4911 break;
4912 case MII_ADVERTISE:
4913 data->val_out = adapter->phy_regs.advertise;
4914 break;
4915 case MII_LPA:
4916 data->val_out = adapter->phy_regs.lpa;
4917 break;
4918 case MII_EXPANSION:
4919 data->val_out = adapter->phy_regs.expansion;
4920 break;
4921 case MII_CTRL1000:
4922 data->val_out = adapter->phy_regs.ctrl1000;
4923 break;
4924 case MII_STAT1000:
4925 data->val_out = adapter->phy_regs.stat1000;
4926 break;
4927 case MII_ESTATUS:
4928 data->val_out = adapter->phy_regs.estatus;
4929 break;
4930 default:
bc7f75fa
AK		 4931 return -EIO;
4932 }
bc7f75fa
AK		 4933 break;
4934 case SIOCSMIIREG:
4935 default:
4936 return -EOPNOTSUPP;
4937 }
4938 return 0;
4939}
4940
4941static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4942{
4943 switch (cmd) {
4944 case SIOCGMIIPHY:
4945 case SIOCGMIIREG:
4946 case SIOCSMIIREG:
4947 return e1000_mii_ioctl(netdev, ifr, cmd);
4948 default:
4949 return -EOPNOTSUPP;
4950 }
4951}
4952
a4f58f54
BA		 4953static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc)
4954{
4955 struct e1000_hw *hw = &adapter->hw;
4956 u32 i, mac_reg;
4957 u16 phy_reg;
4958 int retval = 0;
4959
4960 /* copy MAC RARs to PHY RARs */
d3738bb8 4961 e1000_copy_rx_addrs_to_phy_ich8lan(hw);
a4f58f54
BA		 4962
4963 /* copy MAC MTA to PHY MTA */
4964 for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) {
4965 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);
4966 e1e_wphy(hw, BM_MTA(i), (u16)(mac_reg & 0xFFFF));
4967 e1e_wphy(hw, BM_MTA(i) + 1, (u16)((mac_reg >> 16) & 0xFFFF));
4968 }
4969
4970 /* configure PHY Rx Control register */
4971 e1e_rphy(&adapter->hw, BM_RCTL, &phy_reg);
4972 mac_reg = er32(RCTL);
4973 if (mac_reg & E1000_RCTL_UPE)
4974 phy_reg |= BM_RCTL_UPE;
4975 if (mac_reg & E1000_RCTL_MPE)
4976 phy_reg |= BM_RCTL_MPE;
4977 phy_reg &= ~(BM_RCTL_MO_MASK);
4978 if (mac_reg & E1000_RCTL_MO_3)
4979 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT)
4980 << BM_RCTL_MO_SHIFT);
4981 if (mac_reg & E1000_RCTL_BAM)
4982 phy_reg |= BM_RCTL_BAM;
4983 if (mac_reg & E1000_RCTL_PMCF)
4984 phy_reg |= BM_RCTL_PMCF;
4985 mac_reg = er32(CTRL);
4986 if (mac_reg & E1000_CTRL_RFCE)
4987 phy_reg |= BM_RCTL_RFCE;
4988 e1e_wphy(&adapter->hw, BM_RCTL, phy_reg);
4989
4990 /* enable PHY wakeup in MAC register */
4991 ew32(WUFC, wufc);
4992 ew32(WUC, E1000_WUC_PHY_WAKE | E1000_WUC_PME_EN);
4993
4994 /* configure and enable PHY wakeup in PHY registers */
4995 e1e_wphy(&adapter->hw, BM_WUFC, wufc);
4996 e1e_wphy(&adapter->hw, BM_WUC, E1000_WUC_PME_EN);
4997
4998 /* activate PHY wakeup */
94d8186a 4999 retval = hw->phy.ops.acquire(hw);
a4f58f54
BA		 5000 if (retval) {
5001 e_err("Could not acquire PHY\n");
5002 return retval;
5003 }
5004 e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
5005 (BM_WUC_ENABLE_PAGE << IGP_PAGE_SHIFT));
5006 retval = e1000e_read_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, &phy_reg);
5007 if (retval) {
5008 e_err("Could not read PHY page 769\n");
5009 goto out;
5010 }
5011 phy_reg |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT;
5012 retval = e1000e_write_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, phy_reg);
5013 if (retval)
5014 e_err("Could not set PHY Host Wakeup bit\n");
5015out:
94d8186a 5016 hw->phy.ops.release(hw);
a4f58f54
BA		 5017
5018 return retval;
5019}
5020
23606cf5
RW		 5021static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake,
5022 bool runtime)
bc7f75fa
AK		 5023{
5024 struct net_device *netdev = pci_get_drvdata(pdev);
5025 struct e1000_adapter *adapter = netdev_priv(netdev);
5026 struct e1000_hw *hw = &adapter->hw;
5027 u32 ctrl, ctrl_ext, rctl, status;
23606cf5
RW		 5028 /* Runtime suspend should only enable wakeup for link changes */
5029 u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
bc7f75fa
AK		 5030 int retval = 0;
5031
5032 netif_device_detach(netdev);
5033
5034 if (netif_running(netdev)) {
5035 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
5036 e1000e_down(adapter);
5037 e1000_free_irq(adapter);
5038 }
4662e82b 5039 e1000e_reset_interrupt_capability(adapter);
bc7f75fa
AK		 5040
5041 retval = pci_save_state(pdev);
5042 if (retval)
5043 return retval;
5044
5045 status = er32(STATUS);
5046 if (status & E1000_STATUS_LU)
5047 wufc &= ~E1000_WUFC_LNKC;
5048
5049 if (wufc) {
5050 e1000_setup_rctl(adapter);
5051 e1000_set_multi(netdev);
5052
5053 /* turn on all-multi mode if wake on multicast is enabled */
5054 if (wufc & E1000_WUFC_MC) {
5055 rctl = er32(RCTL);
5056 rctl |= E1000_RCTL_MPE;
5057 ew32(RCTL, rctl);
5058 }
5059
5060 ctrl = er32(CTRL);
5061 /* advertise wake from D3Cold */
5062 #define E1000_CTRL_ADVD3WUC 0x00100000
5063 /* phy power management enable */
5064 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
a4f58f54
BA		 5065 ctrl |= E1000_CTRL_ADVD3WUC;
5066 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP))
5067 ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT;
bc7f75fa
AK		 5068 ew32(CTRL, ctrl);
5069
318a94d6
JK		 5070 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
5071 adapter->hw.phy.media_type ==
5072 e1000_media_type_internal_serdes) {
bc7f75fa
AK		 5073 /* keep the laser running in D3 */
5074 ctrl_ext = er32(CTRL_EXT);
93a23f48 5075 ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA;
bc7f75fa
AK		 5076 ew32(CTRL_EXT, ctrl_ext);
5077 }
5078
97ac8cae
BA		 5079 if (adapter->flags & FLAG_IS_ICH)
5080 e1000e_disable_gig_wol_ich8lan(&adapter->hw);
5081
bc7f75fa
AK		 5082 /* Allow time for pending master requests to run */
5083 e1000e_disable_pcie_master(&adapter->hw);
5084
82776a4b 5085 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
a4f58f54
BA		 5086 /* enable wakeup by the PHY */
5087 retval = e1000_init_phy_wakeup(adapter, wufc);
5088 if (retval)
5089 return retval;
5090 } else {
5091 /* enable wakeup by the MAC */
5092 ew32(WUFC, wufc);
5093 ew32(WUC, E1000_WUC_PME_EN);
5094 }
bc7f75fa
AK		 5095 } else {
5096 ew32(WUC, 0);
5097 ew32(WUFC, 0);
bc7f75fa
AK		 5098 }
5099
4f9de721
RW		 5100 *enable_wake = !!wufc;
5101
bc7f75fa 5102 /* make sure adapter isn't asleep if manageability is enabled */
82776a4b
BA		 5103 if ((adapter->flags & FLAG_MNG_PT_ENABLED) ||
5104 (hw->mac.ops.check_mng_mode(hw)))
4f9de721 5105 *enable_wake = true;
bc7f75fa
AK		 5106
5107 if (adapter->hw.phy.type == e1000_phy_igp_3)
5108 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
5109
ad68076e
BA		 5110 /*
5111 * Release control of h/w to f/w. If f/w is AMT enabled, this
5112 * would have already happened in close and is redundant.
5113 */
bc7f75fa
AK		 5114 e1000_release_hw_control(adapter);
5115
5116 pci_disable_device(pdev);
5117
4f9de721
RW		 5118 return 0;
5119}
5120
5121static void e1000_power_off(struct pci_dev *pdev, bool sleep, bool wake)
5122{
5123 if (sleep && wake) {
5124 pci_prepare_to_sleep(pdev);
5125 return;
5126 }
5127
5128 pci_wake_from_d3(pdev, wake);
5129 pci_set_power_state(pdev, PCI_D3hot);
5130}
5131
5132static void e1000_complete_shutdown(struct pci_dev *pdev, bool sleep,
5133 bool wake)
5134{
5135 struct net_device *netdev = pci_get_drvdata(pdev);
5136 struct e1000_adapter *adapter = netdev_priv(netdev);
5137
005cbdfc
AD		 5138 /*
5139 * The pci-e switch on some quad port adapters will report a
5140 * correctable error when the MAC transitions from D0 to D3. To
5141 * prevent this we need to mask off the correctable errors on the
5142 * downstream port of the pci-e switch.
5143 */
5144 if (adapter->flags & FLAG_IS_QUAD_PORT) {
5145 struct pci_dev *us_dev = pdev->bus->self;
5146 int pos = pci_find_capability(us_dev, PCI_CAP_ID_EXP);
5147 u16 devctl;
5148
5149 pci_read_config_word(us_dev, pos + PCI_EXP_DEVCTL, &devctl);
5150 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL,
5151 (devctl & ~PCI_EXP_DEVCTL_CERE));
5152
4f9de721 5153 e1000_power_off(pdev, sleep, wake);
005cbdfc
AD		 5154
5155 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL, devctl);
5156 } else {
4f9de721 5157 e1000_power_off(pdev, sleep, wake);
005cbdfc 5158 }
bc7f75fa
AK		 5159}
5160
6f461f6c
BA		 5161#ifdef CONFIG_PCIEASPM
5162static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
5163{
5164 pci_disable_link_state(pdev, state);
5165}
5166#else
5167static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
1eae4eb2
AK		 5168{
5169 int pos;
6f461f6c 5170 u16 reg16;
1eae4eb2
AK		 5171
5172 /*
6f461f6c
BA		 5173 * Both device and parent should have the same ASPM setting.
5174 * Disable ASPM in downstream component first and then upstream.
1eae4eb2 5175 */
6f461f6c
BA		 5176 pos = pci_pcie_cap(pdev);
5177 pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, &reg16);
5178 reg16 &= ~state;
5179 pci_write_config_word(pdev, pos + PCI_EXP_LNKCTL, reg16);
5180
0c75ba22
AB		 5181 if (!pdev->bus->self)
5182 return;
5183
6f461f6c
BA		 5184 pos = pci_pcie_cap(pdev->bus->self);
5185 pci_read_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, &reg16);
5186 reg16 &= ~state;
5187 pci_write_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, reg16);
5188}
5189#endif
5190void e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
5191{
5192 dev_info(&pdev->dev, "Disabling ASPM %s %s\n",
5193 (state & PCIE_LINK_STATE_L0S) ? "L0s" : "",
5194 (state & PCIE_LINK_STATE_L1) ? "L1" : "");
5195
5196 __e1000e_disable_aspm(pdev, state);
1eae4eb2
AK		 5197}
5198
a0340162 5199#ifdef CONFIG_PM_OPS
23606cf5 5200static bool e1000e_pm_ready(struct e1000_adapter *adapter)
4f9de721 5201{
23606cf5 5202 return !!adapter->tx_ring->buffer_info;
4f9de721
RW		 5203}
5204
23606cf5 5205static int __e1000_resume(struct pci_dev *pdev)
bc7f75fa
AK		 5206{
5207 struct net_device *netdev = pci_get_drvdata(pdev);
5208 struct e1000_adapter *adapter = netdev_priv(netdev);
5209 struct e1000_hw *hw = &adapter->hw;
5210 u32 err;
5211
5212 pci_set_power_state(pdev, PCI_D0);
5213 pci_restore_state(pdev);
28b8f04a 5214 pci_save_state(pdev);
6f461f6c
BA		 5215 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
5216 e1000e_disable_aspm(pdev, PCIE_LINK_STATE_L1);
6e4f6f6b 5217
4662e82b 5218 e1000e_set_interrupt_capability(adapter);
bc7f75fa
AK		 5219 if (netif_running(netdev)) {
5220 err = e1000_request_irq(adapter);
5221 if (err)
5222 return err;
5223 }
5224
5225 e1000e_power_up_phy(adapter);
a4f58f54
BA		 5226
5227 /* report the system wakeup cause from S3/S4 */
5228 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
5229 u16 phy_data;
5230
5231 e1e_rphy(&adapter->hw, BM_WUS, &phy_data);
5232 if (phy_data) {
5233 e_info("PHY Wakeup cause - %s\n",
5234 phy_data & E1000_WUS_EX ? "Unicast Packet" :
5235 phy_data & E1000_WUS_MC ? "Multicast Packet" :
5236 phy_data & E1000_WUS_BC ? "Broadcast Packet" :
5237 phy_data & E1000_WUS_MAG ? "Magic Packet" :
5238 phy_data & E1000_WUS_LNKC ? "Link Status "
5239 " Change" : "other");
5240 }
5241 e1e_wphy(&adapter->hw, BM_WUS, ~0);
5242 } else {
5243 u32 wus = er32(WUS);
5244 if (wus) {
5245 e_info("MAC Wakeup cause - %s\n",
5246 wus & E1000_WUS_EX ? "Unicast Packet" :
5247 wus & E1000_WUS_MC ? "Multicast Packet" :
5248 wus & E1000_WUS_BC ? "Broadcast Packet" :
5249 wus & E1000_WUS_MAG ? "Magic Packet" :
5250 wus & E1000_WUS_LNKC ? "Link Status Change" :
5251 "other");
5252 }
5253 ew32(WUS, ~0);
5254 }
5255
bc7f75fa 5256 e1000e_reset(adapter);
bc7f75fa 5257
cd791618 5258 e1000_init_manageability_pt(adapter);
bc7f75fa
AK		 5259
5260 if (netif_running(netdev))
5261 e1000e_up(adapter);
5262
5263 netif_device_attach(netdev);
5264
ad68076e
BA		 5265 /*
5266 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 5267 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 5268 * under the control of the driver.
5269 */
c43bc57e 5270 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 5271 e1000_get_hw_control(adapter);
5272
5273 return 0;
5274}
23606cf5 5275
a0340162
RW		 5276#ifdef CONFIG_PM_SLEEP
5277static int e1000_suspend(struct device *dev)
5278{
5279 struct pci_dev *pdev = to_pci_dev(dev);
5280 int retval;
5281 bool wake;
5282
5283 retval = __e1000_shutdown(pdev, &wake, false);
5284 if (!retval)
5285 e1000_complete_shutdown(pdev, true, wake);
5286
5287 return retval;
5288}
5289
23606cf5
RW		 5290static int e1000_resume(struct device *dev)
5291{
5292 struct pci_dev *pdev = to_pci_dev(dev);
5293 struct net_device *netdev = pci_get_drvdata(pdev);
5294 struct e1000_adapter *adapter = netdev_priv(netdev);
5295
5296 if (e1000e_pm_ready(adapter))
5297 adapter->idle_check = true;
5298
5299 return __e1000_resume(pdev);
5300}
a0340162
RW		 5301#endif /* CONFIG_PM_SLEEP */
5302
5303#ifdef CONFIG_PM_RUNTIME
5304static int e1000_runtime_suspend(struct device *dev)
5305{
5306 struct pci_dev *pdev = to_pci_dev(dev);
5307 struct net_device *netdev = pci_get_drvdata(pdev);
5308 struct e1000_adapter *adapter = netdev_priv(netdev);
5309
5310 if (e1000e_pm_ready(adapter)) {
5311 bool wake;
5312
5313 __e1000_shutdown(pdev, &wake, true);
5314 }
5315
5316 return 0;
5317}
5318
5319static int e1000_idle(struct device *dev)
5320{
5321 struct pci_dev *pdev = to_pci_dev(dev);
5322 struct net_device *netdev = pci_get_drvdata(pdev);
5323 struct e1000_adapter *adapter = netdev_priv(netdev);
5324
5325 if (!e1000e_pm_ready(adapter))
5326 return 0;
5327
5328 if (adapter->idle_check) {
5329 adapter->idle_check = false;
5330 if (!e1000e_has_link(adapter))
5331 pm_schedule_suspend(dev, MSEC_PER_SEC);
5332 }
5333
5334 return -EBUSY;
5335}
23606cf5
RW		 5336
5337static int e1000_runtime_resume(struct device *dev)
5338{
5339 struct pci_dev *pdev = to_pci_dev(dev);
5340 struct net_device *netdev = pci_get_drvdata(pdev);
5341 struct e1000_adapter *adapter = netdev_priv(netdev);
5342
5343 if (!e1000e_pm_ready(adapter))
5344 return 0;
5345
5346 adapter->idle_check = !dev->power.runtime_auto;
5347 return __e1000_resume(pdev);
5348}
a0340162
RW		 5349#endif /* CONFIG_PM_RUNTIME */
5350#endif /* CONFIG_PM_OPS */
bc7f75fa
AK		 5351
5352static void e1000_shutdown(struct pci_dev *pdev)
5353{
4f9de721
RW		 5354 bool wake = false;
5355
23606cf5 5356 __e1000_shutdown(pdev, &wake, false);
4f9de721
RW		 5357
5358 if (system_state == SYSTEM_POWER_OFF)
5359 e1000_complete_shutdown(pdev, false, wake);
bc7f75fa
AK		 5360}
5361
5362#ifdef CONFIG_NET_POLL_CONTROLLER
5363/*
5364 * Polling 'interrupt' - used by things like netconsole to send skbs
5365 * without having to re-enable interrupts. It's not called while
5366 * the interrupt routine is executing.
5367 */
5368static void e1000_netpoll(struct net_device *netdev)
5369{
5370 struct e1000_adapter *adapter = netdev_priv(netdev);
5371
5372 disable_irq(adapter->pdev->irq);
5373 e1000_intr(adapter->pdev->irq, netdev);
5374
bc7f75fa
AK		 5375 enable_irq(adapter->pdev->irq);
5376}
5377#endif
5378
5379/**
5380 * e1000_io_error_detected - called when PCI error is detected
5381 * @pdev: Pointer to PCI device
5382 * @state: The current pci connection state
5383 *
5384 * This function is called after a PCI bus error affecting
5385 * this device has been detected.
5386 */
5387static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
5388 pci_channel_state_t state)
5389{
5390 struct net_device *netdev = pci_get_drvdata(pdev);
5391 struct e1000_adapter *adapter = netdev_priv(netdev);
5392
5393 netif_device_detach(netdev);
5394
c93b5a76
MM		 5395 if (state == pci_channel_io_perm_failure)
5396 return PCI_ERS_RESULT_DISCONNECT;
5397
bc7f75fa
AK		 5398 if (netif_running(netdev))
5399 e1000e_down(adapter);
5400 pci_disable_device(pdev);
5401
5402 /* Request a slot slot reset. */
5403 return PCI_ERS_RESULT_NEED_RESET;
5404}
5405
5406/**
5407 * e1000_io_slot_reset - called after the pci bus has been reset.
5408 * @pdev: Pointer to PCI device
5409 *
5410 * Restart the card from scratch, as if from a cold-boot. Implementation
5411 * resembles the first-half of the e1000_resume routine.
5412 */
5413static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
5414{
5415 struct net_device *netdev = pci_get_drvdata(pdev);
5416 struct e1000_adapter *adapter = netdev_priv(netdev);
5417 struct e1000_hw *hw = &adapter->hw;
6e4f6f6b 5418 int err;
111b9dc5 5419 pci_ers_result_t result;
bc7f75fa 5420
6f461f6c
BA		 5421 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
5422 e1000e_disable_aspm(pdev, PCIE_LINK_STATE_L1);
f0f422e5 5423 err = pci_enable_device_mem(pdev);
6e4f6f6b 5424 if (err) {
bc7f75fa
AK		 5425 dev_err(&pdev->dev,
5426 "Cannot re-enable PCI device after reset.\n");
111b9dc5
JB		 5427 result = PCI_ERS_RESULT_DISCONNECT;
5428 } else {
5429 pci_set_master(pdev);
23606cf5 5430 pdev->state_saved = true;
111b9dc5 5431 pci_restore_state(pdev);
bc7f75fa 5432
111b9dc5
JB		 5433 pci_enable_wake(pdev, PCI_D3hot, 0);
5434 pci_enable_wake(pdev, PCI_D3cold, 0);
bc7f75fa 5435
111b9dc5
JB		 5436 e1000e_reset(adapter);
5437 ew32(WUS, ~0);
5438 result = PCI_ERS_RESULT_RECOVERED;
5439 }
bc7f75fa 5440
111b9dc5
JB		 5441 pci_cleanup_aer_uncorrect_error_status(pdev);
5442
5443 return result;
bc7f75fa
AK		 5444}
5445
5446/**
5447 * e1000_io_resume - called when traffic can start flowing again.
5448 * @pdev: Pointer to PCI device
5449 *
5450 * This callback is called when the error recovery driver tells us that
5451 * its OK to resume normal operation. Implementation resembles the
5452 * second-half of the e1000_resume routine.
5453 */
5454static void e1000_io_resume(struct pci_dev *pdev)
5455{
5456 struct net_device *netdev = pci_get_drvdata(pdev);
5457 struct e1000_adapter *adapter = netdev_priv(netdev);
5458
cd791618 5459 e1000_init_manageability_pt(adapter);
bc7f75fa
AK		 5460
5461 if (netif_running(netdev)) {
5462 if (e1000e_up(adapter)) {
5463 dev_err(&pdev->dev,
5464 "can't bring device back up after reset\n");
5465 return;
5466 }
5467 }
5468
5469 netif_device_attach(netdev);
5470
ad68076e
BA		 5471 /*
5472 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 5473 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 5474 * under the control of the driver.
5475 */
c43bc57e 5476 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 5477 e1000_get_hw_control(adapter);
5478
5479}
5480
5481static void e1000_print_device_info(struct e1000_adapter *adapter)
5482{
5483 struct e1000_hw *hw = &adapter->hw;
5484 struct net_device *netdev = adapter->netdev;
69e3fd8c 5485 u32 pba_num;
bc7f75fa
AK		 5486
5487 /* print bus type/speed/width info */
7c510e4b 5488 e_info("(PCI Express:2.5GB/s:%s) %pM\n",
44defeb3
JK		 5489 /* bus width */
5490 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
5491 "Width x1"),
5492 /* MAC address */
7c510e4b 5493 netdev->dev_addr);
44defeb3
JK		 5494 e_info("Intel(R) PRO/%s Network Connection\n",
5495 (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
69e3fd8c 5496 e1000e_read_pba_num(hw, &pba_num);
44defeb3
JK		 5497 e_info("MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
5498 hw->mac.type, hw->phy.type, (pba_num >> 8), (pba_num & 0xff));
bc7f75fa
AK		 5499}
5500
10aa4c04
AK		 5501static void e1000_eeprom_checks(struct e1000_adapter *adapter)
5502{
5503 struct e1000_hw *hw = &adapter->hw;
5504 int ret_val;
5505 u16 buf = 0;
5506
5507 if (hw->mac.type != e1000_82573)
5508 return;
5509
5510 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
e243455d 5511 if (!ret_val && (!(le16_to_cpu(buf) & (1 << 0)))) {
10aa4c04 5512 /* Deep Smart Power Down (DSPD) */
6c2a9efa
FP		 5513 dev_warn(&adapter->pdev->dev,
5514 "Warning: detected DSPD enabled in EEPROM\n");
10aa4c04 5515 }
10aa4c04
AK		 5516}
5517
651c2466
SH		 5518static const struct net_device_ops e1000e_netdev_ops = {
5519 .ndo_open = e1000_open,
5520 .ndo_stop = e1000_close,
00829823 5521 .ndo_start_xmit = e1000_xmit_frame,
651c2466
SH		 5522 .ndo_get_stats = e1000_get_stats,
5523 .ndo_set_multicast_list = e1000_set_multi,
5524 .ndo_set_mac_address = e1000_set_mac,
5525 .ndo_change_mtu = e1000_change_mtu,
5526 .ndo_do_ioctl = e1000_ioctl,
5527 .ndo_tx_timeout = e1000_tx_timeout,
5528 .ndo_validate_addr = eth_validate_addr,
5529
5530 .ndo_vlan_rx_register = e1000_vlan_rx_register,
5531 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
5532 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
5533#ifdef CONFIG_NET_POLL_CONTROLLER
5534 .ndo_poll_controller = e1000_netpoll,
5535#endif
5536};
5537
bc7f75fa
AK		 5538/**
5539 * e1000_probe - Device Initialization Routine
5540 * @pdev: PCI device information struct
5541 * @ent: entry in e1000_pci_tbl
5542 *
5543 * Returns 0 on success, negative on failure
5544 *
5545 * e1000_probe initializes an adapter identified by a pci_dev structure.
5546 * The OS initialization, configuring of the adapter private structure,
5547 * and a hardware reset occur.
5548 **/
5549static int __devinit e1000_probe(struct pci_dev *pdev,
5550 const struct pci_device_id *ent)
5551{
5552 struct net_device *netdev;
5553 struct e1000_adapter *adapter;
5554 struct e1000_hw *hw;
5555 const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
f47e81fc
BB		 5556 resource_size_t mmio_start, mmio_len;
5557 resource_size_t flash_start, flash_len;
bc7f75fa
AK		 5558
5559 static int cards_found;
5560 int i, err, pci_using_dac;
5561 u16 eeprom_data = 0;
5562 u16 eeprom_apme_mask = E1000_EEPROM_APME;
5563
6f461f6c
BA		 5564 if (ei->flags2 & FLAG2_DISABLE_ASPM_L1)
5565 e1000e_disable_aspm(pdev, PCIE_LINK_STATE_L1);
6e4f6f6b 5566
f0f422e5 5567 err = pci_enable_device_mem(pdev);
bc7f75fa
AK		 5568 if (err)
5569 return err;
5570
5571 pci_using_dac = 0;
0be3f55f 5572 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));
bc7f75fa 5573 if (!err) {
0be3f55f 5574 err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
bc7f75fa
AK		 5575 if (!err)
5576 pci_using_dac = 1;
5577 } else {
0be3f55f 5578 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
bc7f75fa 5579 if (err) {
0be3f55f
NN		 5580 err = dma_set_coherent_mask(&pdev->dev,
5581 DMA_BIT_MASK(32));
bc7f75fa
AK		 5582 if (err) {
5583 dev_err(&pdev->dev, "No usable DMA "
5584 "configuration, aborting\n");
5585 goto err_dma;
5586 }
5587 }
5588 }
5589
e8de1481 5590 err = pci_request_selected_regions_exclusive(pdev,
f0f422e5
BA		 5591 pci_select_bars(pdev, IORESOURCE_MEM),
5592 e1000e_driver_name);
bc7f75fa
AK		 5593 if (err)
5594 goto err_pci_reg;
5595
68eac460 5596 /* AER (Advanced Error Reporting) hooks */
19d5afd4 5597 pci_enable_pcie_error_reporting(pdev);
68eac460 5598
bc7f75fa 5599 pci_set_master(pdev);
438b365a
BA		 5600 /* PCI config space info */
5601 err = pci_save_state(pdev);
5602 if (err)
5603 goto err_alloc_etherdev;
bc7f75fa
AK		 5604
5605 err = -ENOMEM;
5606 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
5607 if (!netdev)
5608 goto err_alloc_etherdev;
5609
bc7f75fa
AK		 5610 SET_NETDEV_DEV(netdev, &pdev->dev);
5611
f85e4dfa
TH		 5612 netdev->irq = pdev->irq;
5613
bc7f75fa
AK		 5614 pci_set_drvdata(pdev, netdev);
5615 adapter = netdev_priv(netdev);
5616 hw = &adapter->hw;
5617 adapter->netdev = netdev;
5618 adapter->pdev = pdev;
5619 adapter->ei = ei;
5620 adapter->pba = ei->pba;
5621 adapter->flags = ei->flags;
eb7c3adb 5622 adapter->flags2 = ei->flags2;
bc7f75fa
AK		 5623 adapter->hw.adapter = adapter;
5624 adapter->hw.mac.type = ei->mac;
2adc55c9 5625 adapter->max_hw_frame_size = ei->max_hw_frame_size;
bc7f75fa
AK		 5626 adapter->msg_enable = (1 << NETIF_MSG_DRV | NETIF_MSG_PROBE) - 1;
5627
5628 mmio_start = pci_resource_start(pdev, 0);
5629 mmio_len = pci_resource_len(pdev, 0);
5630
5631 err = -EIO;
5632 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
5633 if (!adapter->hw.hw_addr)
5634 goto err_ioremap;
5635
5636 if ((adapter->flags & FLAG_HAS_FLASH) &&
5637 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
5638 flash_start = pci_resource_start(pdev, 1);
5639 flash_len = pci_resource_len(pdev, 1);
5640 adapter->hw.flash_address = ioremap(flash_start, flash_len);
5641 if (!adapter->hw.flash_address)
5642 goto err_flashmap;
5643 }
5644
5645 /* construct the net_device struct */
651c2466 5646 netdev->netdev_ops = &e1000e_netdev_ops;
bc7f75fa 5647 e1000e_set_ethtool_ops(netdev);
bc7f75fa
AK		 5648 netdev->watchdog_timeo = 5 * HZ;
5649 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
bc7f75fa
AK		 5650 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
5651
5652 netdev->mem_start = mmio_start;
5653 netdev->mem_end = mmio_start + mmio_len;
5654
5655 adapter->bd_number = cards_found++;
5656
4662e82b
BA		 5657 e1000e_check_options(adapter);
5658
bc7f75fa
AK		 5659 /* setup adapter struct */
5660 err = e1000_sw_init(adapter);
5661 if (err)
5662 goto err_sw_init;
5663
bc7f75fa
AK		 5664 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
5665 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
5666 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
5667
69e3fd8c 5668 err = ei->get_variants(adapter);
bc7f75fa
AK		 5669 if (err)
5670 goto err_hw_init;
5671
4a770358
BA		 5672 if ((adapter->flags & FLAG_IS_ICH) &&
5673 (adapter->flags & FLAG_READ_ONLY_NVM))
5674 e1000e_write_protect_nvm_ich8lan(&adapter->hw);
5675
bc7f75fa
AK		 5676 hw->mac.ops.get_bus_info(&adapter->hw);
5677
318a94d6 5678 adapter->hw.phy.autoneg_wait_to_complete = 0;
bc7f75fa
AK		 5679
5680 /* Copper options */
318a94d6 5681 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
bc7f75fa
AK		 5682 adapter->hw.phy.mdix = AUTO_ALL_MODES;
5683 adapter->hw.phy.disable_polarity_correction = 0;
5684 adapter->hw.phy.ms_type = e1000_ms_hw_default;
5685 }
5686
5687 if (e1000_check_reset_block(&adapter->hw))
44defeb3 5688 e_info("PHY reset is blocked due to SOL/IDER session.\n");
bc7f75fa
AK		 5689
5690 netdev->features = NETIF_F_SG |
5691 NETIF_F_HW_CSUM |
5692 NETIF_F_HW_VLAN_TX |
5693 NETIF_F_HW_VLAN_RX;
5694
5695 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
5696 netdev->features |= NETIF_F_HW_VLAN_FILTER;
5697
5698 netdev->features |= NETIF_F_TSO;
5699 netdev->features |= NETIF_F_TSO6;
5700
a5136e23
JK		 5701 netdev->vlan_features |= NETIF_F_TSO;
5702 netdev->vlan_features |= NETIF_F_TSO6;
5703 netdev->vlan_features |= NETIF_F_HW_CSUM;
5704 netdev->vlan_features |= NETIF_F_SG;
5705
bc7f75fa
AK		 5706 if (pci_using_dac)
5707 netdev->features |= NETIF_F_HIGHDMA;
5708
bc7f75fa
AK		 5709 if (e1000e_enable_mng_pass_thru(&adapter->hw))
5710 adapter->flags |= FLAG_MNG_PT_ENABLED;
5711
ad68076e
BA		 5712 /*
5713 * before reading the NVM, reset the controller to
5714 * put the device in a known good starting state
5715 */
bc7f75fa
AK		 5716 adapter->hw.mac.ops.reset_hw(&adapter->hw);
5717
5718 /*
5719 * systems with ASPM and others may see the checksum fail on the first
5720 * attempt. Let's give it a few tries
5721 */
5722 for (i = 0;; i++) {
5723 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
5724 break;
5725 if (i == 2) {
44defeb3 5726 e_err("The NVM Checksum Is Not Valid\n");
bc7f75fa
AK		 5727 err = -EIO;
5728 goto err_eeprom;
5729 }
5730 }
5731
10aa4c04
AK		 5732 e1000_eeprom_checks(adapter);
5733
608f8a0d 5734 /* copy the MAC address */
bc7f75fa 5735 if (e1000e_read_mac_addr(&adapter->hw))
44defeb3 5736 e_err("NVM Read Error while reading MAC address\n");
bc7f75fa
AK		 5737
5738 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
5739 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len);
5740
5741 if (!is_valid_ether_addr(netdev->perm_addr)) {
7c510e4b 5742 e_err("Invalid MAC Address: %pM\n", netdev->perm_addr);
bc7f75fa
AK		 5743 err = -EIO;
5744 goto err_eeprom;
5745 }
5746
5747 init_timer(&adapter->watchdog_timer);
c061b18d 5748 adapter->watchdog_timer.function = e1000_watchdog;
bc7f75fa
AK		 5749 adapter->watchdog_timer.data = (unsigned long) adapter;
5750
5751 init_timer(&adapter->phy_info_timer);
c061b18d 5752 adapter->phy_info_timer.function = e1000_update_phy_info;
bc7f75fa
AK		 5753 adapter->phy_info_timer.data = (unsigned long) adapter;
5754
5755 INIT_WORK(&adapter->reset_task, e1000_reset_task);
5756 INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
a8f88ff5
JB		 5757 INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround);
5758 INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task);
41cec6f1 5759 INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang);
bc7f75fa 5760
bc7f75fa
AK		 5761 /* Initialize link parameters. User can change them with ethtool */
5762 adapter->hw.mac.autoneg = 1;
309af40b 5763 adapter->fc_autoneg = 1;
5c48ef3e
BA		 5764 adapter->hw.fc.requested_mode = e1000_fc_default;
5765 adapter->hw.fc.current_mode = e1000_fc_default;
bc7f75fa
AK		 5766 adapter->hw.phy.autoneg_advertised = 0x2f;
5767
5768 /* ring size defaults */
5769 adapter->rx_ring->count = 256;
5770 adapter->tx_ring->count = 256;
5771
5772 /*
5773 * Initial Wake on LAN setting - If APM wake is enabled in
5774 * the EEPROM, enable the ACPI Magic Packet filter
5775 */
5776 if (adapter->flags & FLAG_APME_IN_WUC) {
5777 /* APME bit in EEPROM is mapped to WUC.APME */
5778 eeprom_data = er32(WUC);
5779 eeprom_apme_mask = E1000_WUC_APME;
a4f58f54
BA		 5780 if (eeprom_data & E1000_WUC_PHY_WAKE)
5781 adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP;
bc7f75fa
AK		 5782 } else if (adapter->flags & FLAG_APME_IN_CTRL3) {
5783 if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
5784 (adapter->hw.bus.func == 1))
5785 e1000_read_nvm(&adapter->hw,
5786 NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
5787 else
5788 e1000_read_nvm(&adapter->hw,
5789 NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
5790 }
5791
5792 /* fetch WoL from EEPROM */
5793 if (eeprom_data & eeprom_apme_mask)
5794 adapter->eeprom_wol |= E1000_WUFC_MAG;
5795
5796 /*
5797 * now that we have the eeprom settings, apply the special cases
5798 * where the eeprom may be wrong or the board simply won't support
5799 * wake on lan on a particular port
5800 */
5801 if (!(adapter->flags & FLAG_HAS_WOL))
5802 adapter->eeprom_wol = 0;
5803
5804 /* initialize the wol settings based on the eeprom settings */
5805 adapter->wol = adapter->eeprom_wol;
6ff68026 5806 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
bc7f75fa 5807
84527590
BA		 5808 /* save off EEPROM version number */
5809 e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers);
5810
bc7f75fa
AK		 5811 /* reset the hardware with the new settings */
5812 e1000e_reset(adapter);
5813
ad68076e
BA		 5814 /*
5815 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 5816 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 5817 * under the control of the driver.
5818 */
c43bc57e 5819 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 5820 e1000_get_hw_control(adapter);
5821
bc7f75fa
AK		 5822 strcpy(netdev->name, "eth%d");
5823 err = register_netdev(netdev);
5824 if (err)
5825 goto err_register;
5826
9c563d20
JB		 5827 /* carrier off reporting is important to ethtool even BEFORE open */
5828 netif_carrier_off(netdev);
5829
bc7f75fa
AK		 5830 e1000_print_device_info(adapter);
5831
f3ec4f87
AS		 5832 if (pci_dev_run_wake(pdev))
5833 pm_runtime_put_noidle(&pdev->dev);
23606cf5 5834
bc7f75fa
AK		 5835 return 0;
5836
5837err_register:
c43bc57e
JB		 5838 if (!(adapter->flags & FLAG_HAS_AMT))
5839 e1000_release_hw_control(adapter);
bc7f75fa
AK		 5840err_eeprom:
5841 if (!e1000_check_reset_block(&adapter->hw))
5842 e1000_phy_hw_reset(&adapter->hw);
c43bc57e 5843err_hw_init:
bc7f75fa 5844
bc7f75fa
AK		 5845 kfree(adapter->tx_ring);
5846 kfree(adapter->rx_ring);
5847err_sw_init:
c43bc57e
JB		 5848 if (adapter->hw.flash_address)
5849 iounmap(adapter->hw.flash_address);
e82f54ba 5850 e1000e_reset_interrupt_capability(adapter);
c43bc57e 5851err_flashmap:
bc7f75fa
AK		 5852 iounmap(adapter->hw.hw_addr);
5853err_ioremap:
5854 free_netdev(netdev);
5855err_alloc_etherdev:
f0f422e5
BA		 5856 pci_release_selected_regions(pdev,
5857 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK		 5858err_pci_reg:
5859err_dma:
5860 pci_disable_device(pdev);
5861 return err;
5862}
5863
5864/**
5865 * e1000_remove - Device Removal Routine
5866 * @pdev: PCI device information struct
5867 *
5868 * e1000_remove is called by the PCI subsystem to alert the driver
5869 * that it should release a PCI device. The could be caused by a
5870 * Hot-Plug event, or because the driver is going to be removed from
5871 * memory.
5872 **/
5873static void __devexit e1000_remove(struct pci_dev *pdev)
5874{
5875 struct net_device *netdev = pci_get_drvdata(pdev);
5876 struct e1000_adapter *adapter = netdev_priv(netdev);
23606cf5
RW		 5877 bool down = test_bit(__E1000_DOWN, &adapter->state);
5878
ad68076e
BA		 5879 /*
5880 * flush_scheduled work may reschedule our watchdog task, so
5881 * explicitly disable watchdog tasks from being rescheduled
5882 */
23606cf5
RW		 5883 if (!down)
5884 set_bit(__E1000_DOWN, &adapter->state);
bc7f75fa
AK		 5885 del_timer_sync(&adapter->watchdog_timer);
5886 del_timer_sync(&adapter->phy_info_timer);
5887
41cec6f1
BA		 5888 cancel_work_sync(&adapter->reset_task);
5889 cancel_work_sync(&adapter->watchdog_task);
5890 cancel_work_sync(&adapter->downshift_task);
5891 cancel_work_sync(&adapter->update_phy_task);
5892 cancel_work_sync(&adapter->print_hang_task);
bc7f75fa
AK		 5893 flush_scheduled_work();
5894
17f208de
BA		 5895 if (!(netdev->flags & IFF_UP))
5896 e1000_power_down_phy(adapter);
5897
23606cf5
RW		 5898 /* Don't lie to e1000_close() down the road. */
5899 if (!down)
5900 clear_bit(__E1000_DOWN, &adapter->state);
17f208de
BA		 5901 unregister_netdev(netdev);
5902
f3ec4f87
AS		 5903 if (pci_dev_run_wake(pdev))
5904 pm_runtime_get_noresume(&pdev->dev);
23606cf5 5905
ad68076e
BA		 5906 /*
5907 * Release control of h/w to f/w. If f/w is AMT enabled, this
5908 * would have already happened in close and is redundant.
5909 */
bc7f75fa
AK		 5910 e1000_release_hw_control(adapter);
5911
4662e82b 5912 e1000e_reset_interrupt_capability(adapter);
bc7f75fa
AK		 5913 kfree(adapter->tx_ring);
5914 kfree(adapter->rx_ring);
5915
5916 iounmap(adapter->hw.hw_addr);
5917 if (adapter->hw.flash_address)
5918 iounmap(adapter->hw.flash_address);
f0f422e5
BA		 5919 pci_release_selected_regions(pdev,
5920 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK		 5921
5922 free_netdev(netdev);
5923
111b9dc5 5924 /* AER disable */
19d5afd4 5925 pci_disable_pcie_error_reporting(pdev);
111b9dc5 5926
bc7f75fa
AK		 5927 pci_disable_device(pdev);
5928}
5929
5930/* PCI Error Recovery (ERS) */
5931static struct pci_error_handlers e1000_err_handler = {
5932 .error_detected = e1000_io_error_detected,
5933 .slot_reset = e1000_io_slot_reset,
5934 .resume = e1000_io_resume,
5935};
5936
a3aa1884 5937static DEFINE_PCI_DEVICE_TABLE(e1000_pci_tbl) = {
bc7f75fa
AK		 5938 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
5939 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
5940 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
5941 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP), board_82571 },
5942 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
5943 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
040babf9
AK		 5944 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
5945 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
5946 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
ad68076e 5947
bc7f75fa
AK		 5948 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
5949 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
5950 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
5951 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
ad68076e 5952
bc7f75fa
AK		 5953 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
5954 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
5955 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
ad68076e 5956
4662e82b 5957 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
bef28b11 5958 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 },
8c81c9c3 5959 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 },
4662e82b 5960
bc7f75fa
AK		 5961 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
5962 board_80003es2lan },
5963 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
5964 board_80003es2lan },
5965 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
5966 board_80003es2lan },
5967 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
5968 board_80003es2lan },
ad68076e 5969
bc7f75fa
AK		 5970 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
5971 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
5972 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
5973 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
5974 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
5975 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
5976 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
9e135a2e 5977 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan },
ad68076e 5978
bc7f75fa
AK		 5979 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
5980 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
5981 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
5982 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
5983 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
2f15f9d6 5984 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
97ac8cae
BA		 5985 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
5986 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
5987 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
5988
5989 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
5990 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
5991 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
bc7f75fa 5992
f4187b56
BA		 5993 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
5994 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
10df0b91 5995 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_V), board_ich10lan },
f4187b56 5996
a4f58f54
BA		 5997 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan },
5998 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan },
5999 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan },
6000 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan },
6001
d3738bb8
BA		 6002 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_LM), board_pch2lan },
6003 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_V), board_pch2lan },
6004
bc7f75fa
AK		 6005 { } /* terminate list */
6006};
6007MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
6008
a0340162 6009#ifdef CONFIG_PM_OPS
23606cf5 6010static const struct dev_pm_ops e1000_pm_ops = {
a0340162
RW		 6011 SET_SYSTEM_SLEEP_PM_OPS(e1000_suspend, e1000_resume)
6012 SET_RUNTIME_PM_OPS(e1000_runtime_suspend,
6013 e1000_runtime_resume, e1000_idle)
23606cf5 6014};
e50208a0 6015#endif
23606cf5 6016
bc7f75fa
AK		 6017/* PCI Device API Driver */
6018static struct pci_driver e1000_driver = {
6019 .name = e1000e_driver_name,
6020 .id_table = e1000_pci_tbl,
6021 .probe = e1000_probe,
6022 .remove = __devexit_p(e1000_remove),
a0340162 6023#ifdef CONFIG_PM_OPS
23606cf5 6024 .driver.pm = &e1000_pm_ops,
bc7f75fa
AK		 6025#endif
6026 .shutdown = e1000_shutdown,
6027 .err_handler = &e1000_err_handler
6028};
6029
6030/**
6031 * e1000_init_module - Driver Registration Routine
6032 *
6033 * e1000_init_module is the first routine called when the driver is
6034 * loaded. All it does is register with the PCI subsystem.
6035 **/
6036static int __init e1000_init_module(void)
6037{
6038 int ret;
8544b9f7
BA		 6039 pr_info("Intel(R) PRO/1000 Network Driver - %s\n",
6040 e1000e_driver_version);
451152d9 6041 pr_info("Copyright (c) 1999 - 2010 Intel Corporation.\n");
bc7f75fa 6042 ret = pci_register_driver(&e1000_driver);
53ec5498 6043
bc7f75fa
AK		 6044 return ret;
6045}
6046module_init(e1000_init_module);
6047
6048/**
6049 * e1000_exit_module - Driver Exit Cleanup Routine
6050 *
6051 * e1000_exit_module is called just before the driver is removed
6052 * from memory.
6053 **/
6054static void __exit e1000_exit_module(void)
6055{
6056 pci_unregister_driver(&e1000_driver);
6057}
6058module_exit(e1000_exit_module);
6059
6060
6061MODULE_AUTHOR("Intel Corporation, <[email protected]>");
6062MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
6063MODULE_LICENSE("GPL");
6064MODULE_VERSION(DRV_VERSION);
6065
6066/* e1000_main.c */
Empty description
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