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Commit | Line | Data |
---|---|---|
2c2e6ecf DD |
1 | /* |
2 | * cpuidle-powernv - idle state cpuidle driver. | |
3 | * Adapted from drivers/cpuidle/cpuidle-pseries | |
4 | * | |
5 | */ | |
6 | ||
7 | #include <linux/kernel.h> | |
8 | #include <linux/module.h> | |
9 | #include <linux/init.h> | |
10 | #include <linux/moduleparam.h> | |
11 | #include <linux/cpuidle.h> | |
12 | #include <linux/cpu.h> | |
13 | #include <linux/notifier.h> | |
0d948730 | 14 | #include <linux/clockchips.h> |
0888839c | 15 | #include <linux/of.h> |
92c83ff5 | 16 | #include <linux/slab.h> |
2c2e6ecf DD |
17 | |
18 | #include <asm/machdep.h> | |
19 | #include <asm/firmware.h> | |
8eb8ac89 | 20 | #include <asm/opal.h> |
591ac0cb | 21 | #include <asm/runlatch.h> |
09206b60 | 22 | #include <asm/cpuidle.h> |
2c2e6ecf | 23 | |
9e9fc6f0 GS |
24 | /* |
25 | * Expose only those Hardware idle states via the cpuidle framework | |
26 | * that have latency value below POWERNV_THRESHOLD_LATENCY_NS. | |
27 | */ | |
3005c597 SP |
28 | #define POWERNV_THRESHOLD_LATENCY_NS 200000 |
29 | ||
ed61390b | 30 | static struct cpuidle_driver powernv_idle_driver = { |
2c2e6ecf DD |
31 | .name = "powernv_idle", |
32 | .owner = THIS_MODULE, | |
33 | }; | |
34 | ||
35 | static int max_idle_state; | |
36 | static struct cpuidle_state *cpuidle_state_table; | |
3005c597 | 37 | |
09206b60 GS |
38 | struct stop_psscr_table { |
39 | u64 val; | |
40 | u64 mask; | |
41 | }; | |
42 | ||
43 | static struct stop_psscr_table stop_psscr_table[CPUIDLE_STATE_MAX]; | |
3005c597 | 44 | |
78eaa10f SB |
45 | static u64 snooze_timeout; |
46 | static bool snooze_timeout_en; | |
2c2e6ecf DD |
47 | |
48 | static int snooze_loop(struct cpuidle_device *dev, | |
49 | struct cpuidle_driver *drv, | |
50 | int index) | |
51 | { | |
78eaa10f SB |
52 | u64 snooze_exit_time; |
53 | ||
2c2e6ecf DD |
54 | local_irq_enable(); |
55 | set_thread_flag(TIF_POLLING_NRFLAG); | |
56 | ||
78eaa10f | 57 | snooze_exit_time = get_tb() + snooze_timeout; |
591ac0cb | 58 | ppc64_runlatch_off(); |
2c2e6ecf DD |
59 | while (!need_resched()) { |
60 | HMT_low(); | |
61 | HMT_very_low(); | |
78eaa10f SB |
62 | if (snooze_timeout_en && get_tb() > snooze_exit_time) |
63 | break; | |
2c2e6ecf DD |
64 | } |
65 | ||
66 | HMT_medium(); | |
591ac0cb | 67 | ppc64_runlatch_on(); |
2c2e6ecf DD |
68 | clear_thread_flag(TIF_POLLING_NRFLAG); |
69 | smp_mb(); | |
70 | return index; | |
71 | } | |
72 | ||
73 | static int nap_loop(struct cpuidle_device *dev, | |
74 | struct cpuidle_driver *drv, | |
75 | int index) | |
76 | { | |
591ac0cb | 77 | ppc64_runlatch_off(); |
2c2e6ecf | 78 | power7_idle(); |
591ac0cb | 79 | ppc64_runlatch_on(); |
2c2e6ecf DD |
80 | return index; |
81 | } | |
82 | ||
cc5a2f7b | 83 | /* Register for fastsleep only in oneshot mode of broadcast */ |
84 | #ifdef CONFIG_TICK_ONESHOT | |
0d948730 PM |
85 | static int fastsleep_loop(struct cpuidle_device *dev, |
86 | struct cpuidle_driver *drv, | |
87 | int index) | |
88 | { | |
89 | unsigned long old_lpcr = mfspr(SPRN_LPCR); | |
90 | unsigned long new_lpcr; | |
91 | ||
92 | if (unlikely(system_state < SYSTEM_RUNNING)) | |
93 | return index; | |
94 | ||
95 | new_lpcr = old_lpcr; | |
9b6a68d9 MN |
96 | /* Do not exit powersave upon decrementer as we've setup the timer |
97 | * offload. | |
0d948730 | 98 | */ |
9b6a68d9 | 99 | new_lpcr &= ~LPCR_PECE1; |
0d948730 PM |
100 | |
101 | mtspr(SPRN_LPCR, new_lpcr); | |
102 | power7_sleep(); | |
103 | ||
104 | mtspr(SPRN_LPCR, old_lpcr); | |
105 | ||
106 | return index; | |
107 | } | |
cc5a2f7b | 108 | #endif |
3005c597 SP |
109 | |
110 | static int stop_loop(struct cpuidle_device *dev, | |
111 | struct cpuidle_driver *drv, | |
112 | int index) | |
113 | { | |
114 | ppc64_runlatch_off(); | |
09206b60 GS |
115 | power9_idle_stop(stop_psscr_table[index].val, |
116 | stop_psscr_table[index].mask); | |
3005c597 SP |
117 | ppc64_runlatch_on(); |
118 | return index; | |
119 | } | |
120 | ||
2c2e6ecf DD |
121 | /* |
122 | * States for dedicated partition case. | |
123 | */ | |
169f3fae | 124 | static struct cpuidle_state powernv_states[CPUIDLE_STATE_MAX] = { |
2c2e6ecf DD |
125 | { /* Snooze */ |
126 | .name = "snooze", | |
127 | .desc = "snooze", | |
2c2e6ecf DD |
128 | .exit_latency = 0, |
129 | .target_residency = 0, | |
957efced | 130 | .enter = snooze_loop }, |
2c2e6ecf DD |
131 | }; |
132 | ||
10fcca9d | 133 | static int powernv_cpuidle_cpu_online(unsigned int cpu) |
2c2e6ecf | 134 | { |
10fcca9d | 135 | struct cpuidle_device *dev = per_cpu(cpuidle_devices, cpu); |
2c2e6ecf DD |
136 | |
137 | if (dev && cpuidle_get_driver()) { | |
10fcca9d SAS |
138 | cpuidle_pause_and_lock(); |
139 | cpuidle_enable_device(dev); | |
140 | cpuidle_resume_and_unlock(); | |
141 | } | |
142 | return 0; | |
143 | } | |
2c2e6ecf | 144 | |
10fcca9d SAS |
145 | static int powernv_cpuidle_cpu_dead(unsigned int cpu) |
146 | { | |
147 | struct cpuidle_device *dev = per_cpu(cpuidle_devices, cpu); | |
2c2e6ecf | 148 | |
10fcca9d SAS |
149 | if (dev && cpuidle_get_driver()) { |
150 | cpuidle_pause_and_lock(); | |
151 | cpuidle_disable_device(dev); | |
152 | cpuidle_resume_and_unlock(); | |
2c2e6ecf | 153 | } |
10fcca9d | 154 | return 0; |
2c2e6ecf DD |
155 | } |
156 | ||
2c2e6ecf DD |
157 | /* |
158 | * powernv_cpuidle_driver_init() | |
159 | */ | |
160 | static int powernv_cpuidle_driver_init(void) | |
161 | { | |
162 | int idle_state; | |
163 | struct cpuidle_driver *drv = &powernv_idle_driver; | |
164 | ||
165 | drv->state_count = 0; | |
166 | ||
167 | for (idle_state = 0; idle_state < max_idle_state; ++idle_state) { | |
168 | /* Is the state not enabled? */ | |
169 | if (cpuidle_state_table[idle_state].enter == NULL) | |
170 | continue; | |
171 | ||
172 | drv->states[drv->state_count] = /* structure copy */ | |
173 | cpuidle_state_table[idle_state]; | |
174 | ||
175 | drv->state_count += 1; | |
176 | } | |
177 | ||
178 | return 0; | |
179 | } | |
180 | ||
9e9fc6f0 GS |
181 | static inline void add_powernv_state(int index, const char *name, |
182 | unsigned int flags, | |
183 | int (*idle_fn)(struct cpuidle_device *, | |
184 | struct cpuidle_driver *, | |
185 | int), | |
186 | unsigned int target_residency, | |
187 | unsigned int exit_latency, | |
09206b60 | 188 | u64 psscr_val, u64 psscr_mask) |
9e9fc6f0 GS |
189 | { |
190 | strlcpy(powernv_states[index].name, name, CPUIDLE_NAME_LEN); | |
191 | strlcpy(powernv_states[index].desc, name, CPUIDLE_NAME_LEN); | |
192 | powernv_states[index].flags = flags; | |
193 | powernv_states[index].target_residency = target_residency; | |
194 | powernv_states[index].exit_latency = exit_latency; | |
195 | powernv_states[index].enter = idle_fn; | |
09206b60 GS |
196 | stop_psscr_table[index].val = psscr_val; |
197 | stop_psscr_table[index].mask = psscr_mask; | |
9e9fc6f0 GS |
198 | } |
199 | ||
0888839c PM |
200 | static int powernv_add_idle_states(void) |
201 | { | |
202 | struct device_node *power_mgt; | |
0888839c PM |
203 | int nr_idle_states = 1; /* Snooze */ |
204 | int dt_idle_states; | |
957efced SP |
205 | u32 latency_ns[CPUIDLE_STATE_MAX]; |
206 | u32 residency_ns[CPUIDLE_STATE_MAX]; | |
207 | u32 flags[CPUIDLE_STATE_MAX]; | |
3005c597 | 208 | u64 psscr_val[CPUIDLE_STATE_MAX]; |
09206b60 | 209 | u64 psscr_mask[CPUIDLE_STATE_MAX]; |
3005c597 | 210 | const char *names[CPUIDLE_STATE_MAX]; |
09206b60 | 211 | u32 has_stop_states = 0; |
92c83ff5 | 212 | int i, rc; |
0888839c PM |
213 | |
214 | /* Currently we have snooze statically defined */ | |
215 | ||
216 | power_mgt = of_find_node_by_path("/ibm,opal/power-mgt"); | |
217 | if (!power_mgt) { | |
218 | pr_warn("opal: PowerMgmt Node not found\n"); | |
92c83ff5 | 219 | goto out; |
0888839c PM |
220 | } |
221 | ||
70734a78 PM |
222 | /* Read values of any property to determine the num of idle states */ |
223 | dt_idle_states = of_property_count_u32_elems(power_mgt, "ibm,cpu-idle-state-flags"); | |
224 | if (dt_idle_states < 0) { | |
225 | pr_warn("cpuidle-powernv: no idle states found in the DT\n"); | |
92c83ff5 | 226 | goto out; |
0888839c PM |
227 | } |
228 | ||
957efced SP |
229 | /* |
230 | * Since snooze is used as first idle state, max idle states allowed is | |
231 | * CPUIDLE_STATE_MAX -1 | |
232 | */ | |
233 | if (dt_idle_states > CPUIDLE_STATE_MAX - 1) { | |
234 | pr_warn("cpuidle-powernv: discovered idle states more than allowed"); | |
235 | dt_idle_states = CPUIDLE_STATE_MAX - 1; | |
236 | } | |
237 | ||
70734a78 PM |
238 | if (of_property_read_u32_array(power_mgt, |
239 | "ibm,cpu-idle-state-flags", flags, dt_idle_states)) { | |
240 | pr_warn("cpuidle-powernv : missing ibm,cpu-idle-state-flags in DT\n"); | |
957efced | 241 | goto out; |
70734a78 | 242 | } |
92c83ff5 | 243 | |
957efced SP |
244 | if (of_property_read_u32_array(power_mgt, |
245 | "ibm,cpu-idle-state-latencies-ns", latency_ns, | |
246 | dt_idle_states)) { | |
92c83ff5 | 247 | pr_warn("cpuidle-powernv: missing ibm,cpu-idle-state-latencies-ns in DT\n"); |
957efced | 248 | goto out; |
74aa51b5 | 249 | } |
3005c597 SP |
250 | if (of_property_read_string_array(power_mgt, |
251 | "ibm,cpu-idle-state-names", names, dt_idle_states) < 0) { | |
252 | pr_warn("cpuidle-powernv: missing ibm,cpu-idle-state-names in DT\n"); | |
253 | goto out; | |
254 | } | |
255 | ||
256 | /* | |
257 | * If the idle states use stop instruction, probe for psscr values | |
09206b60 | 258 | * and psscr mask which are necessary to specify required stop level. |
3005c597 | 259 | */ |
09206b60 GS |
260 | has_stop_states = (flags[0] & |
261 | (OPAL_PM_STOP_INST_FAST | OPAL_PM_STOP_INST_DEEP)); | |
262 | if (has_stop_states) { | |
3005c597 SP |
263 | if (of_property_read_u64_array(power_mgt, |
264 | "ibm,cpu-idle-state-psscr", psscr_val, dt_idle_states)) { | |
09206b60 | 265 | pr_warn("cpuidle-powernv: missing ibm,cpu-idle-state-psscr in DT\n"); |
3005c597 SP |
266 | goto out; |
267 | } | |
74aa51b5 | 268 | |
09206b60 GS |
269 | if (of_property_read_u64_array(power_mgt, |
270 | "ibm,cpu-idle-state-psscr-mask", | |
271 | psscr_mask, dt_idle_states)) { | |
272 | pr_warn("cpuidle-powernv:Missing ibm,cpu-idle-state-psscr-mask in DT\n"); | |
273 | goto out; | |
274 | } | |
275 | } | |
276 | ||
92c83ff5 PM |
277 | rc = of_property_read_u32_array(power_mgt, |
278 | "ibm,cpu-idle-state-residency-ns", residency_ns, dt_idle_states); | |
0888839c PM |
279 | |
280 | for (i = 0; i < dt_idle_states; i++) { | |
9e9fc6f0 | 281 | unsigned int exit_latency, target_residency; |
3005c597 SP |
282 | /* |
283 | * If an idle state has exit latency beyond | |
284 | * POWERNV_THRESHOLD_LATENCY_NS then don't use it | |
285 | * in cpu-idle. | |
286 | */ | |
287 | if (latency_ns[i] > POWERNV_THRESHOLD_LATENCY_NS) | |
288 | continue; | |
9e9fc6f0 GS |
289 | /* |
290 | * Firmware passes residency and latency values in ns. | |
291 | * cpuidle expects it in us. | |
292 | */ | |
293 | exit_latency = latency_ns[i] / 1000; | |
294 | if (!rc) | |
295 | target_residency = residency_ns[i] / 1000; | |
296 | else | |
297 | target_residency = 0; | |
0888839c | 298 | |
09206b60 GS |
299 | if (has_stop_states) { |
300 | int err = validate_psscr_val_mask(&psscr_val[i], | |
301 | &psscr_mask[i], | |
302 | flags[i]); | |
303 | if (err) { | |
304 | report_invalid_psscr_val(psscr_val[i], err); | |
305 | continue; | |
306 | } | |
307 | } | |
308 | ||
92c83ff5 | 309 | /* |
9e9fc6f0 GS |
310 | * For nap and fastsleep, use default target_residency |
311 | * values if f/w does not expose it. | |
74aa51b5 | 312 | */ |
70734a78 | 313 | if (flags[i] & OPAL_PM_NAP_ENABLED) { |
9e9fc6f0 GS |
314 | if (!rc) |
315 | target_residency = 100; | |
0888839c | 316 | /* Add NAP state */ |
9e9fc6f0 GS |
317 | add_powernv_state(nr_idle_states, "Nap", |
318 | CPUIDLE_FLAG_NONE, nap_loop, | |
09206b60 | 319 | target_residency, exit_latency, 0, 0); |
3005c597 SP |
320 | } else if ((flags[i] & OPAL_PM_STOP_INST_FAST) && |
321 | !(flags[i] & OPAL_PM_TIMEBASE_STOP)) { | |
9e9fc6f0 GS |
322 | add_powernv_state(nr_idle_states, names[i], |
323 | CPUIDLE_FLAG_NONE, stop_loop, | |
324 | target_residency, exit_latency, | |
09206b60 | 325 | psscr_val[i], psscr_mask[i]); |
cc5a2f7b | 326 | } |
327 | ||
328 | /* | |
329 | * All cpuidle states with CPUIDLE_FLAG_TIMER_STOP set must come | |
330 | * within this config dependency check. | |
331 | */ | |
332 | #ifdef CONFIG_TICK_ONESHOT | |
333 | if (flags[i] & OPAL_PM_SLEEP_ENABLED || | |
70734a78 | 334 | flags[i] & OPAL_PM_SLEEP_ENABLED_ER1) { |
9e9fc6f0 GS |
335 | if (!rc) |
336 | target_residency = 300000; | |
0888839c | 337 | /* Add FASTSLEEP state */ |
9e9fc6f0 GS |
338 | add_powernv_state(nr_idle_states, "FastSleep", |
339 | CPUIDLE_FLAG_TIMER_STOP, | |
340 | fastsleep_loop, | |
09206b60 | 341 | target_residency, exit_latency, 0, 0); |
3005c597 SP |
342 | } else if ((flags[i] & OPAL_PM_STOP_INST_DEEP) && |
343 | (flags[i] & OPAL_PM_TIMEBASE_STOP)) { | |
9e9fc6f0 GS |
344 | add_powernv_state(nr_idle_states, names[i], |
345 | CPUIDLE_FLAG_TIMER_STOP, stop_loop, | |
346 | target_residency, exit_latency, | |
09206b60 | 347 | psscr_val[i], psscr_mask[i]); |
0888839c | 348 | } |
cc5a2f7b | 349 | #endif |
92c83ff5 | 350 | nr_idle_states++; |
0888839c | 351 | } |
92c83ff5 | 352 | out: |
0888839c PM |
353 | return nr_idle_states; |
354 | } | |
355 | ||
2c2e6ecf DD |
356 | /* |
357 | * powernv_idle_probe() | |
358 | * Choose state table for shared versus dedicated partition | |
359 | */ | |
360 | static int powernv_idle_probe(void) | |
361 | { | |
2c2e6ecf DD |
362 | if (cpuidle_disable != IDLE_NO_OVERRIDE) |
363 | return -ENODEV; | |
364 | ||
e4d54f71 | 365 | if (firmware_has_feature(FW_FEATURE_OPAL)) { |
2c2e6ecf | 366 | cpuidle_state_table = powernv_states; |
0888839c PM |
367 | /* Device tree can indicate more idle states */ |
368 | max_idle_state = powernv_add_idle_states(); | |
78eaa10f SB |
369 | if (max_idle_state > 1) { |
370 | snooze_timeout_en = true; | |
371 | snooze_timeout = powernv_states[1].target_residency * | |
372 | tb_ticks_per_usec; | |
373 | } | |
2c2e6ecf DD |
374 | } else |
375 | return -ENODEV; | |
376 | ||
377 | return 0; | |
378 | } | |
379 | ||
380 | static int __init powernv_processor_idle_init(void) | |
381 | { | |
382 | int retval; | |
383 | ||
384 | retval = powernv_idle_probe(); | |
385 | if (retval) | |
386 | return retval; | |
387 | ||
388 | powernv_cpuidle_driver_init(); | |
389 | retval = cpuidle_register(&powernv_idle_driver, NULL); | |
390 | if (retval) { | |
391 | printk(KERN_DEBUG "Registration of powernv driver failed.\n"); | |
392 | return retval; | |
393 | } | |
394 | ||
10fcca9d SAS |
395 | retval = cpuhp_setup_state_nocalls(CPUHP_AP_ONLINE_DYN, |
396 | "cpuidle/powernv:online", | |
397 | powernv_cpuidle_cpu_online, NULL); | |
398 | WARN_ON(retval < 0); | |
399 | retval = cpuhp_setup_state_nocalls(CPUHP_CPUIDLE_DEAD, | |
400 | "cpuidle/powernv:dead", NULL, | |
401 | powernv_cpuidle_cpu_dead); | |
402 | WARN_ON(retval < 0); | |
2c2e6ecf DD |
403 | printk(KERN_DEBUG "powernv_idle_driver registered\n"); |
404 | return 0; | |
405 | } | |
406 | ||
407 | device_initcall(powernv_processor_idle_init); |