projects / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 9c1c21a0 A |
1 | /* |
| 2 | * DDR addressing details and AC timing parameters from JEDEC specs | |
| 3 | * | |
| 4 | * Copyright (C) 2012 Texas Instruments, Inc. | |
| 5 | * | |
| 6 | * Aneesh V <[email protected]> | |
| 7 | * | |
| 8 | * This program is free software; you can redistribute it and/or modify | |
| 9 | * it under the terms of the GNU General Public License version 2 as | |
| 10 | * published by the Free Software Foundation. | |
| 11 | */ | |
| 12 | ||
| 13 | #include <memory/jedec_ddr.h> | |
| 14 | #include <linux/module.h> | |
| 15 | ||
| 16 | /* LPDDR2 addressing details from JESD209-2 section 2.4 */ | |
| 17 | const struct lpddr2_addressing | |
| 18 | lpddr2_jedec_addressing_table[NUM_DDR_ADDR_TABLE_ENTRIES] = { | |
| 19 | {B4, T_REFI_15_6, T_RFC_90}, /* 64M */ | |
| 20 | {B4, T_REFI_15_6, T_RFC_90}, /* 128M */ | |
| 21 | {B4, T_REFI_7_8, T_RFC_90}, /* 256M */ | |
| 22 | {B4, T_REFI_7_8, T_RFC_90}, /* 512M */ | |
| 23 | {B8, T_REFI_7_8, T_RFC_130}, /* 1GS4 */ | |
| 24 | {B8, T_REFI_3_9, T_RFC_130}, /* 2GS4 */ | |
| 25 | {B8, T_REFI_3_9, T_RFC_130}, /* 4G */ | |
| 26 | {B8, T_REFI_3_9, T_RFC_210}, /* 8G */ | |
| 27 | {B4, T_REFI_7_8, T_RFC_130}, /* 1GS2 */ | |
| 28 | {B4, T_REFI_3_9, T_RFC_130}, /* 2GS2 */ | |
| 29 | }; | |
| 30 | EXPORT_SYMBOL_GPL(lpddr2_jedec_addressing_table); | |
| 31 | ||
| 32 | /* LPDDR2 AC timing parameters from JESD209-2 section 12 */ | |
| 33 | const struct lpddr2_timings | |
| 34 | lpddr2_jedec_timings[NUM_DDR_TIMING_TABLE_ENTRIES] = { | |
| 35 | /* Speed bin 400(200 MHz) */ | |
| 36 | [0] = { | |
| 37 | .max_freq = 200000000, | |
| 38 | .min_freq = 10000000, | |
| 39 | .tRPab = 21000, | |
| 40 | .tRCD = 18000, | |
| 41 | .tWR = 15000, | |
| 42 | .tRAS_min = 42000, | |
| 43 | .tRRD = 10000, | |
| 44 | .tWTR = 10000, | |
| 45 | .tXP = 7500, | |
| 46 | .tRTP = 7500, | |
| 47 | .tCKESR = 15000, | |
| 48 | .tDQSCK_max = 5500, | |
| 49 | .tFAW = 50000, | |
| 50 | .tZQCS = 90000, | |
| 51 | .tZQCL = 360000, | |
| 52 | .tZQinit = 1000000, | |
| 53 | .tRAS_max_ns = 70000, | |
| 54 | .tDQSCK_max_derated = 6000, | |
| 55 | }, | |
| 56 | /* Speed bin 533(266 MHz) */ | |
| 57 | [1] = { | |
| 58 | .max_freq = 266666666, | |
| 59 | .min_freq = 10000000, | |
| 60 | .tRPab = 21000, | |
| 61 | .tRCD = 18000, | |
| 62 | .tWR = 15000, | |
| 63 | .tRAS_min = 42000, | |
| 64 | .tRRD = 10000, | |
| 65 | .tWTR = 7500, | |
| 66 | .tXP = 7500, | |
| 67 | .tRTP = 7500, | |
| 68 | .tCKESR = 15000, | |
| 69 | .tDQSCK_max = 5500, | |
| 70 | .tFAW = 50000, | |
| 71 | .tZQCS = 90000, | |
| 72 | .tZQCL = 360000, | |
| 73 | .tZQinit = 1000000, | |
| 74 | .tRAS_max_ns = 70000, | |
| 75 | .tDQSCK_max_derated = 6000, | |
| 76 | }, | |
| 77 | /* Speed bin 800(400 MHz) */ | |
| 78 | [2] = { | |
| 79 | .max_freq = 400000000, | |
| 80 | .min_freq = 10000000, | |
| 81 | .tRPab = 21000, | |
| 82 | .tRCD = 18000, | |
| 83 | .tWR = 15000, | |
| 84 | .tRAS_min = 42000, | |
| 85 | .tRRD = 10000, | |
| 86 | .tWTR = 7500, | |
| 87 | .tXP = 7500, | |
| 88 | .tRTP = 7500, | |
| 89 | .tCKESR = 15000, | |
| 90 | .tDQSCK_max = 5500, | |
| 91 | .tFAW = 50000, | |
| 92 | .tZQCS = 90000, | |
| 93 | .tZQCL = 360000, | |
| 94 | .tZQinit = 1000000, | |
| 95 | .tRAS_max_ns = 70000, | |
| 96 | .tDQSCK_max_derated = 6000, | |
| 97 | }, | |
| 98 | /* Speed bin 1066(533 MHz) */ | |
| 99 | [3] = { | |
| 100 | .max_freq = 533333333, | |
| 101 | .min_freq = 10000000, | |
| 102 | .tRPab = 21000, | |
| 103 | .tRCD = 18000, | |
| 104 | .tWR = 15000, | |
| 105 | .tRAS_min = 42000, | |
| 106 | .tRRD = 10000, | |
| 107 | .tWTR = 7500, | |
| 108 | .tXP = 7500, | |
| 109 | .tRTP = 7500, | |
| 110 | .tCKESR = 15000, | |
| 111 | .tDQSCK_max = 5500, | |
| 112 | .tFAW = 50000, | |
| 113 | .tZQCS = 90000, | |
| 114 | .tZQCL = 360000, | |
| 115 | .tZQinit = 1000000, | |
| 116 | .tRAS_max_ns = 70000, | |
| 117 | .tDQSCK_max_derated = 5620, | |
| 118 | }, | |
| 119 | }; | |
| 120 | EXPORT_SYMBOL_GPL(lpddr2_jedec_timings); | |
| 121 | ||
| 122 | const struct lpddr2_min_tck lpddr2_jedec_min_tck = { | |
| 123 | .tRPab = 3, | |
| 124 | .tRCD = 3, | |
| 125 | .tWR = 3, | |
| 126 | .tRASmin = 3, | |
| 127 | .tRRD = 2, | |
| 128 | .tWTR = 2, | |
| 129 | .tXP = 2, | |
| 130 | .tRTP = 2, | |
| 131 | .tCKE = 3, | |
| 132 | .tCKESR = 3, | |
| 133 | .tFAW = 8 | |
| 134 | }; | |
| 135 | EXPORT_SYMBOL_GPL(lpddr2_jedec_min_tck); |