[linux.git] / drivers / gpio / gpio-vx855.c

/*
 * Linux GPIOlib driver for the VIA VX855 integrated southbridge GPIO
 *
 * Copyright (C) 2009 VIA Technologies, Inc.
 * Copyright (C) 2010 One Laptop per Child
 * Author: Harald Welte <[email protected]>
 * All rights reserved.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 *
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/gpio.h>
#include <linux/slab.h>
#include <linux/device.h>
#include <linux/platform_device.h>
#include <linux/pci.h>
#include <linux/io.h>

#define MODULE_NAME "vx855_gpio"

/* The VX855 south bridge has the following GPIO pins:
 *	GPI 0...13	General Purpose Input
 *	GPO 0...12	General Purpose Output
 *	GPIO 0...14	General Purpose I/O (Open-Drain)
 */

#define NR_VX855_GPI	14
#define NR_VX855_GPO	13
#define NR_VX855_GPIO	15

#define NR_VX855_GPInO	(NR_VX855_GPI + NR_VX855_GPO)
#define NR_VX855_GP	(NR_VX855_GPI + NR_VX855_GPO + NR_VX855_GPIO)

struct vx855_gpio {
	struct gpio_chip gpio;
	spinlock_t lock;
	u32 io_gpi;
	u32 io_gpo;
};

/* resolve a GPIx into the corresponding bit position */
static inline u_int32_t gpi_i_bit(int i)
{
	if (i < 10)
		return 1 << i;
	else
		return 1 << (i + 14);
}

static inline u_int32_t gpo_o_bit(int i)
{
	if (i < 11)
		return 1 << i;
	else
		return 1 << (i + 14);
}

static inline u_int32_t gpio_i_bit(int i)
{
	if (i < 14)
		return 1 << (i + 10);
	else
		return 1 << (i + 14);
}

static inline u_int32_t gpio_o_bit(int i)
{
	if (i < 14)
		return 1 << (i + 11);
	else
		return 1 << (i + 13);
}

/* Mapping betwee numeric GPIO ID and the actual GPIO hardware numbering:
 * 0..13	GPI 0..13
 * 14..26	GPO 0..12
 * 27..41	GPIO 0..14
 */

static int vx855gpio_direction_input(struct gpio_chip *gpio,
				     unsigned int nr)
{
	struct vx855_gpio *vg = gpiochip_get_data(gpio);
	unsigned long flags;
	u_int32_t reg_out;

	/* Real GPI bits are always in input direction */
	if (nr < NR_VX855_GPI)
		return 0;

	/* Real GPO bits cannot be put in output direction */
	if (nr < NR_VX855_GPInO)
		return -EINVAL;

	/* Open Drain GPIO have to be set to one */
	spin_lock_irqsave(&vg->lock, flags);
	reg_out = inl(vg->io_gpo);
	reg_out |= gpio_o_bit(nr - NR_VX855_GPInO);
	outl(reg_out, vg->io_gpo);
	spin_unlock_irqrestore(&vg->lock, flags);

	return 0;
}

static int vx855gpio_get(struct gpio_chip *gpio, unsigned int nr)
{
	struct vx855_gpio *vg = gpiochip_get_data(gpio);
	u_int32_t reg_in;
	int ret = 0;

	if (nr < NR_VX855_GPI) {
		reg_in = inl(vg->io_gpi);
		if (reg_in & gpi_i_bit(nr))
			ret = 1;
	} else if (nr < NR_VX855_GPInO) {
		/* GPO don't have an input bit, we need to read it
		 * back from the output register */
		reg_in = inl(vg->io_gpo);
		if (reg_in & gpo_o_bit(nr - NR_VX855_GPI))
			ret = 1;
	} else {
		reg_in = inl(vg->io_gpi);
		if (reg_in & gpio_i_bit(nr - NR_VX855_GPInO))
			ret = 1;
	}

	return ret;
}

static void vx855gpio_set(struct gpio_chip *gpio, unsigned int nr,
			  int val)
{
	struct vx855_gpio *vg = gpiochip_get_data(gpio);
	unsigned long flags;
	u_int32_t reg_out;

	/* True GPI cannot be switched to output mode */
	if (nr < NR_VX855_GPI)
		return;

	spin_lock_irqsave(&vg->lock, flags);
	reg_out = inl(vg->io_gpo);
	if (nr < NR_VX855_GPInO) {
		if (val)
			reg_out |= gpo_o_bit(nr - NR_VX855_GPI);
		else
			reg_out &= ~gpo_o_bit(nr - NR_VX855_GPI);
	} else {
		if (val)
			reg_out |= gpio_o_bit(nr - NR_VX855_GPInO);
		else
			reg_out &= ~gpio_o_bit(nr - NR_VX855_GPInO);
	}
	outl(reg_out, vg->io_gpo);
	spin_unlock_irqrestore(&vg->lock, flags);
}

static int vx855gpio_direction_output(struct gpio_chip *gpio,
				      unsigned int nr, int val)
{
	/* True GPI cannot be switched to output mode */
	if (nr < NR_VX855_GPI)
		return -EINVAL;

	/* True GPO don't need to be switched to output mode,
	 * and GPIO are open-drain, i.e. also need no switching,
	 * so all we do is set the level */
	vx855gpio_set(gpio, nr, val);

	return 0;
}

static int vx855gpio_set_single_ended(struct gpio_chip *gpio,
				      unsigned int nr,
				      enum single_ended_mode mode)
{
	/* The GPI cannot be single-ended */
	if (nr < NR_VX855_GPI)
		return -EINVAL;

	/* The GPO's are push-pull */
	if (nr < NR_VX855_GPInO) {
		if (mode != LINE_MODE_PUSH_PULL)
			return -ENOTSUPP;
		return 0;
	}

	/* The GPIO's are open drain */
	if (mode != LINE_MODE_OPEN_DRAIN)
		return -ENOTSUPP;

	return 0;
}

static const char *vx855gpio_names[NR_VX855_GP] = {
	"VX855_GPI0", "VX855_GPI1", "VX855_GPI2", "VX855_GPI3", "VX855_GPI4",
	"VX855_GPI5", "VX855_GPI6", "VX855_GPI7", "VX855_GPI8", "VX855_GPI9",
	"VX855_GPI10", "VX855_GPI11", "VX855_GPI12", "VX855_GPI13",
	"VX855_GPO0", "VX855_GPO1", "VX855_GPO2", "VX855_GPO3", "VX855_GPO4",
	"VX855_GPO5", "VX855_GPO6", "VX855_GPO7", "VX855_GPO8", "VX855_GPO9",
	"VX855_GPO10", "VX855_GPO11", "VX855_GPO12",
	"VX855_GPIO0", "VX855_GPIO1", "VX855_GPIO2", "VX855_GPIO3",
	"VX855_GPIO4", "VX855_GPIO5", "VX855_GPIO6", "VX855_GPIO7",
	"VX855_GPIO8", "VX855_GPIO9", "VX855_GPIO10", "VX855_GPIO11",
	"VX855_GPIO12", "VX855_GPIO13", "VX855_GPIO14"
};

static void vx855gpio_gpio_setup(struct vx855_gpio *vg)
{
	struct gpio_chip *c = &vg->gpio;

	c->label = "VX855 South Bridge";
	c->owner = THIS_MODULE;
	c->direction_input = vx855gpio_direction_input;
	c->direction_output = vx855gpio_direction_output;
	c->get = vx855gpio_get;
	c->set = vx855gpio_set;
	c->set_single_ended = vx855gpio_set_single_ended;
	c->dbg_show = NULL;
	c->base = 0;
	c->ngpio = NR_VX855_GP;
	c->can_sleep = false;
	c->names = vx855gpio_names;
}

/* This platform device is ordinarily registered by the vx855 mfd driver */
static int vx855gpio_probe(struct platform_device *pdev)
{
	struct resource *res_gpi;
	struct resource *res_gpo;
	struct vx855_gpio *vg;

	res_gpi = platform_get_resource(pdev, IORESOURCE_IO, 0);
	res_gpo = platform_get_resource(pdev, IORESOURCE_IO, 1);
	if (!res_gpi || !res_gpo)
		return -EBUSY;

	vg = devm_kzalloc(&pdev->dev, sizeof(*vg), GFP_KERNEL);
	if (!vg)
		return -ENOMEM;

	platform_set_drvdata(pdev, vg);

	dev_info(&pdev->dev, "found VX855 GPIO controller\n");
	vg->io_gpi = res_gpi->start;
	vg->io_gpo = res_gpo->start;
	spin_lock_init(&vg->lock);

	/*
	 * A single byte is used to control various GPIO ports on the VX855,
	 * and in the case of the OLPC XO-1.5, some of those ports are used
	 * for switches that are interpreted and exposed through ACPI. ACPI
	 * will have reserved the region, so our own reservation will not
	 * succeed. Ignore and continue.
	 */

	if (!devm_request_region(&pdev->dev, res_gpi->start,
				 resource_size(res_gpi), MODULE_NAME "_gpi"))
		dev_warn(&pdev->dev,
			"GPI I/O resource busy, probably claimed by ACPI\n");

	if (!devm_request_region(&pdev->dev, res_gpo->start,
				 resource_size(res_gpo), MODULE_NAME "_gpo"))
		dev_warn(&pdev->dev,
			"GPO I/O resource busy, probably claimed by ACPI\n");

	vx855gpio_gpio_setup(vg);

	return devm_gpiochip_add_data(&pdev->dev, &vg->gpio, vg);
}

static struct platform_driver vx855gpio_driver = {
	.driver = {
		.name	= MODULE_NAME,
	},
	.probe		= vx855gpio_probe,
};

module_platform_driver(vx855gpio_driver);

MODULE_LICENSE("GPL");
MODULE_AUTHOR("Harald Welte <[email protected]>");
MODULE_DESCRIPTION("GPIO driver for the VIA VX855 chipset");
MODULE_ALIAS("platform:vx855_gpio");
Commit	Line	Data
99ea2626 DD	1	/*
	2	* Linux GPIOlib driver for the VIA VX855 integrated southbridge GPIO
	3	*
	4	* Copyright (C) 2009 VIA Technologies, Inc.
	5	* Copyright (C) 2010 One Laptop per Child
	6	* Author: Harald Welte <[email protected]>
	7	* All rights reserved.
	8	*
	9	* This program is free software; you can redistribute it and/or
	10	* modify it under the terms of the GNU General Public License as
	11	* published by the Free Software Foundation; either version 2 of
	12	* the License, or (at your option) any later version.
	13	*
	14	* This program is distributed in the hope that it will be useful,
	15	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	* GNU General Public License for more details.
	18	*
	19	* You should have received a copy of the GNU General Public License
	20	* along with this program; if not, write to the Free Software
	21	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	22	* MA 02111-1307 USA
	23	*
	24	*/
	25
	26	#include <linux/kernel.h>
	27	#include <linux/module.h>
	28	#include <linux/gpio.h>
c5e7043e	29	#include <linux/slab.h>
99ea2626 DD	30	#include <linux/device.h>
	31	#include <linux/platform_device.h>
	32	#include <linux/pci.h>
	33	#include <linux/io.h>
	34
	35	#define MODULE_NAME "vx855_gpio"
	36
	37	/* The VX855 south bridge has the following GPIO pins:
	38	* GPI 0...13 General Purpose Input
	39	* GPO 0...12 General Purpose Output
	40	* GPIO 0...14 General Purpose I/O (Open-Drain)
	41	*/
	42
	43	#define NR_VX855_GPI 14
	44	#define NR_VX855_GPO 13
	45	#define NR_VX855_GPIO 15
	46
	47	#define NR_VX855_GPInO (NR_VX855_GPI + NR_VX855_GPO)
	48	#define NR_VX855_GP (NR_VX855_GPI + NR_VX855_GPO + NR_VX855_GPIO)
	49
	50	struct vx855_gpio {
	51	struct gpio_chip gpio;
	52	spinlock_t lock;
	53	u32 io_gpi;
	54	u32 io_gpo;
99ea2626 DD	55	};
	56
	57	/* resolve a GPIx into the corresponding bit position */
	58	static inline u_int32_t gpi_i_bit(int i)
	59	{
	60	if (i < 10)
	61	return 1 << i;
	62	else
	63	return 1 << (i + 14);
	64	}
	65
	66	static inline u_int32_t gpo_o_bit(int i)
	67	{
	68	if (i < 11)
	69	return 1 << i;
	70	else
	71	return 1 << (i + 14);
	72	}
	73
	74	static inline u_int32_t gpio_i_bit(int i)
	75	{
	76	if (i < 14)
	77	return 1 << (i + 10);
	78	else
	79	return 1 << (i + 14);
	80	}
	81
	82	static inline u_int32_t gpio_o_bit(int i)
	83	{
	84	if (i < 14)
	85	return 1 << (i + 11);
	86	else
	87	return 1 << (i + 13);
	88	}
	89
	90	/* Mapping betwee numeric GPIO ID and the actual GPIO hardware numbering:
	91	* 0..13 GPI 0..13
	92	* 14..26 GPO 0..12
	93	* 27..41 GPIO 0..14
	94	*/
	95
	96	static int vx855gpio_direction_input(struct gpio_chip *gpio,
	97	unsigned int nr)
	98	{
9355879e	99	struct vx855_gpio *vg = gpiochip_get_data(gpio);
99ea2626 DD	100	unsigned long flags;
	101	u_int32_t reg_out;
	102
	103	/* Real GPI bits are always in input direction */
	104	if (nr < NR_VX855_GPI)
	105	return 0;
	106
	107	/* Real GPO bits cannot be put in output direction */
	108	if (nr < NR_VX855_GPInO)
	109	return -EINVAL;
	110
	111	/* Open Drain GPIO have to be set to one */
	112	spin_lock_irqsave(&vg->lock, flags);
	113	reg_out = inl(vg->io_gpo);
	114	reg_out \|= gpio_o_bit(nr - NR_VX855_GPInO);
	115	outl(reg_out, vg->io_gpo);
	116	spin_unlock_irqrestore(&vg->lock, flags);
	117
	118	return 0;
	119	}
	120
	121	static int vx855gpio_get(struct gpio_chip *gpio, unsigned int nr)
	122	{
9355879e	123	struct vx855_gpio *vg = gpiochip_get_data(gpio);
99ea2626 DD	124	u_int32_t reg_in;
	125	int ret = 0;
	126
	127	if (nr < NR_VX855_GPI) {
	128	reg_in = inl(vg->io_gpi);
	129	if (reg_in & gpi_i_bit(nr))
	130	ret = 1;
	131	} else if (nr < NR_VX855_GPInO) {
	132	/* GPO don't have an input bit, we need to read it
	133	* back from the output register */
	134	reg_in = inl(vg->io_gpo);
	135	if (reg_in & gpo_o_bit(nr - NR_VX855_GPI))
	136	ret = 1;
	137	} else {
	138	reg_in = inl(vg->io_gpi);
	139	if (reg_in & gpio_i_bit(nr - NR_VX855_GPInO))
	140	ret = 1;
	141	}
	142
	143	return ret;
	144	}
	145
	146	static void vx855gpio_set(struct gpio_chip *gpio, unsigned int nr,
	147	int val)
	148	{
9355879e	149	struct vx855_gpio *vg = gpiochip_get_data(gpio);
99ea2626 DD	150	unsigned long flags;
	151	u_int32_t reg_out;
	152
	153	/* True GPI cannot be switched to output mode */
	154	if (nr < NR_VX855_GPI)
	155	return;
	156
	157	spin_lock_irqsave(&vg->lock, flags);
	158	reg_out = inl(vg->io_gpo);
	159	if (nr < NR_VX855_GPInO) {
	160	if (val)
	161	reg_out \|= gpo_o_bit(nr - NR_VX855_GPI);
	162	else
	163	reg_out &= ~gpo_o_bit(nr - NR_VX855_GPI);
	164	} else {
	165	if (val)
	166	reg_out \|= gpio_o_bit(nr - NR_VX855_GPInO);
	167	else
	168	reg_out &= ~gpio_o_bit(nr - NR_VX855_GPInO);
	169	}
	170	outl(reg_out, vg->io_gpo);
	171	spin_unlock_irqrestore(&vg->lock, flags);
	172	}
	173
	174	static int vx855gpio_direction_output(struct gpio_chip *gpio,
	175	unsigned int nr, int val)
	176	{
	177	/* True GPI cannot be switched to output mode */
	178	if (nr < NR_VX855_GPI)
	179	return -EINVAL;
	180
	181	/* True GPO don't need to be switched to output mode,
	182	* and GPIO are open-drain, i.e. also need no switching,
	183	* so all we do is set the level */
	184	vx855gpio_set(gpio, nr, val);
	185
	186	return 0;
	187	}
	188
640b9135 LW	189	static int vx855gpio_set_single_ended(struct gpio_chip *gpio,
	190	unsigned int nr,
	191	enum single_ended_mode mode)
	192	{
	193	/* The GPI cannot be single-ended */
	194	if (nr < NR_VX855_GPI)
	195	return -EINVAL;
	196
	197	/* The GPO's are push-pull */
	198	if (nr < NR_VX855_GPInO) {
	199	if (mode != LINE_MODE_PUSH_PULL)
	200	return -ENOTSUPP;
	201	return 0;
	202	}
	203
	204	/* The GPIO's are open drain */
	205	if (mode != LINE_MODE_OPEN_DRAIN)
	206	return -ENOTSUPP;
	207
	208	return 0;
	209	}
	210
99ea2626 DD	211	static const char *vx855gpio_names[NR_VX855_GP] = {
	212	"VX855_GPI0", "VX855_GPI1", "VX855_GPI2", "VX855_GPI3", "VX855_GPI4",
	213	"VX855_GPI5", "VX855_GPI6", "VX855_GPI7", "VX855_GPI8", "VX855_GPI9",
	214	"VX855_GPI10", "VX855_GPI11", "VX855_GPI12", "VX855_GPI13",
	215	"VX855_GPO0", "VX855_GPO1", "VX855_GPO2", "VX855_GPO3", "VX855_GPO4",
	216	"VX855_GPO5", "VX855_GPO6", "VX855_GPO7", "VX855_GPO8", "VX855_GPO9",
	217	"VX855_GPO10", "VX855_GPO11", "VX855_GPO12",
	218	"VX855_GPIO0", "VX855_GPIO1", "VX855_GPIO2", "VX855_GPIO3",
	219	"VX855_GPIO4", "VX855_GPIO5", "VX855_GPIO6", "VX855_GPIO7",
	220	"VX855_GPIO8", "VX855_GPIO9", "VX855_GPIO10", "VX855_GPIO11",
	221	"VX855_GPIO12", "VX855_GPIO13", "VX855_GPIO14"
	222	};
	223
	224	static void vx855gpio_gpio_setup(struct vx855_gpio *vg)
	225	{
	226	struct gpio_chip *c = &vg->gpio;
	227
	228	c->label = "VX855 South Bridge";
	229	c->owner = THIS_MODULE;
	230	c->direction_input = vx855gpio_direction_input;
	231	c->direction_output = vx855gpio_direction_output;
	232	c->get = vx855gpio_get;
	233	c->set = vx855gpio_set;
640b9135	234	c->set_single_ended = vx855gpio_set_single_ended;
99ea2626 DD	235	c->dbg_show = NULL;
	236	c->base = 0;
	237	c->ngpio = NR_VX855_GP;
9fb1f39e	238	c->can_sleep = false;
99ea2626 DD	239	c->names = vx855gpio_names;
	240	}
	241
	242	/* This platform device is ordinarily registered by the vx855 mfd driver */
3836309d	243	static int vx855gpio_probe(struct platform_device *pdev)
99ea2626 DD	244	{
	245	struct resource *res_gpi;
	246	struct resource *res_gpo;
	247	struct vx855_gpio *vg;
99ea2626 DD	248
	249	res_gpi = platform_get_resource(pdev, IORESOURCE_IO, 0);
	250	res_gpo = platform_get_resource(pdev, IORESOURCE_IO, 1);
	251	if (!res_gpi \|\| !res_gpo)
	252	return -EBUSY;
	253
5b6a342b	254	vg = devm_kzalloc(&pdev->dev, sizeof(*vg), GFP_KERNEL);
99ea2626 DD	255	if (!vg)
	256	return -ENOMEM;
	257
	258	platform_set_drvdata(pdev, vg);
	259
	260	dev_info(&pdev->dev, "found VX855 GPIO controller\n");
	261	vg->io_gpi = res_gpi->start;
	262	vg->io_gpo = res_gpo->start;
	263	spin_lock_init(&vg->lock);
	264
	265	/*
	266	* A single byte is used to control various GPIO ports on the VX855,
	267	* and in the case of the OLPC XO-1.5, some of those ports are used
	268	* for switches that are interpreted and exposed through ACPI. ACPI
	269	* will have reserved the region, so our own reservation will not
	270	* succeed. Ignore and continue.
	271	*/
	272
5b6a342b AL	273	if (!devm_request_region(&pdev->dev, res_gpi->start,
5b6a342b AL	274	resource_size(res_gpi), MODULE_NAME "_gpi"))
99ea2626 DD	275	dev_warn(&pdev->dev,
99ea2626 DD	276	"GPI I/O resource busy, probably claimed by ACPI\n");
99ea2626	277
5b6a342b AL	278	if (!devm_request_region(&pdev->dev, res_gpo->start,
5b6a342b AL	279	resource_size(res_gpo), MODULE_NAME "_gpo"))
99ea2626 DD	280	dev_warn(&pdev->dev,
99ea2626 DD	281	"GPO I/O resource busy, probably claimed by ACPI\n");
99ea2626 DD	282
	283	vx855gpio_gpio_setup(vg);
	284
55e3e1a7	285	return devm_gpiochip_add_data(&pdev->dev, &vg->gpio, vg);
99ea2626 DD	286	}
	287
	288	static struct platform_driver vx855gpio_driver = {
	289	.driver = {
	290	.name = MODULE_NAME,
99ea2626 DD	291	},
99ea2626 DD	292	.probe = vx855gpio_probe,
99ea2626 DD	293	};
99ea2626 DD	294
6f61415e	295	module_platform_driver(vx855gpio_driver);
99ea2626 DD	296
	297	MODULE_LICENSE("GPL");
	298	MODULE_AUTHOR("Harald Welte <[email protected]>");
	299	MODULE_DESCRIPTION("GPIO driver for the VIA VX855 chipset");
	300	MODULE_ALIAS("platform:vx855_gpio");