[linux.git] / drivers / gpio / gpio-adp5588.c

/*
 * GPIO Chip driver for Analog Devices
 * ADP5588/ADP5587 I/O Expander and QWERTY Keypad Controller
 *
 * Copyright 2009-2010 Analog Devices Inc.
 *
 * Licensed under the GPL-2 or later.
 */

#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/slab.h>
#include <linux/init.h>
#include <linux/i2c.h>
#include <linux/gpio.h>
#include <linux/interrupt.h>
#include <linux/irq.h>

#include <linux/i2c/adp5588.h>

#define DRV_NAME	"adp5588-gpio"

/*
 * Early pre 4.0 Silicon required to delay readout by at least 25ms,
 * since the Event Counter Register updated 25ms after the interrupt
 * asserted.
 */
#define WA_DELAYED_READOUT_REVID(rev)	((rev) < 4)

struct adp5588_gpio {
	struct i2c_client *client;
	struct gpio_chip gpio_chip;
	struct mutex lock;	/* protect cached dir, dat_out */
	/* protect serialized access to the interrupt controller bus */
	struct mutex irq_lock;
	unsigned gpio_start;
	unsigned irq_base;
	uint8_t dat_out[3];
	uint8_t dir[3];
	uint8_t int_lvl[3];
	uint8_t int_en[3];
	uint8_t irq_mask[3];
	uint8_t irq_stat[3];
};

static int adp5588_gpio_read(struct i2c_client *client, u8 reg)
{
	int ret = i2c_smbus_read_byte_data(client, reg);

	if (ret < 0)
		dev_err(&client->dev, "Read Error\n");

	return ret;
}

static int adp5588_gpio_write(struct i2c_client *client, u8 reg, u8 val)
{
	int ret = i2c_smbus_write_byte_data(client, reg, val);

	if (ret < 0)
		dev_err(&client->dev, "Write Error\n");

	return ret;
}

static int adp5588_gpio_get_value(struct gpio_chip *chip, unsigned off)
{
	struct adp5588_gpio *dev = gpiochip_get_data(chip);
	unsigned bank = ADP5588_BANK(off);
	unsigned bit = ADP5588_BIT(off);
	int val;

	mutex_lock(&dev->lock);

	if (dev->dir[bank] & bit)
		val = dev->dat_out[bank];
	else
		val = adp5588_gpio_read(dev->client, GPIO_DAT_STAT1 + bank);

	mutex_unlock(&dev->lock);

	return !!(val & bit);
}

static void adp5588_gpio_set_value(struct gpio_chip *chip,
				   unsigned off, int val)
{
	unsigned bank, bit;
	struct adp5588_gpio *dev = gpiochip_get_data(chip);

	bank = ADP5588_BANK(off);
	bit = ADP5588_BIT(off);

	mutex_lock(&dev->lock);
	if (val)
		dev->dat_out[bank] |= bit;
	else
		dev->dat_out[bank] &= ~bit;

	adp5588_gpio_write(dev->client, GPIO_DAT_OUT1 + bank,
			   dev->dat_out[bank]);
	mutex_unlock(&dev->lock);
}

static int adp5588_gpio_direction_input(struct gpio_chip *chip, unsigned off)
{
	int ret;
	unsigned bank;
	struct adp5588_gpio *dev = gpiochip_get_data(chip);

	bank = ADP5588_BANK(off);

	mutex_lock(&dev->lock);
	dev->dir[bank] &= ~ADP5588_BIT(off);
	ret = adp5588_gpio_write(dev->client, GPIO_DIR1 + bank, dev->dir[bank]);
	mutex_unlock(&dev->lock);

	return ret;
}

static int adp5588_gpio_direction_output(struct gpio_chip *chip,
					 unsigned off, int val)
{
	int ret;
	unsigned bank, bit;
	struct adp5588_gpio *dev = gpiochip_get_data(chip);

	bank = ADP5588_BANK(off);
	bit = ADP5588_BIT(off);

	mutex_lock(&dev->lock);
	dev->dir[bank] |= bit;

	if (val)
		dev->dat_out[bank] |= bit;
	else
		dev->dat_out[bank] &= ~bit;

	ret = adp5588_gpio_write(dev->client, GPIO_DAT_OUT1 + bank,
				 dev->dat_out[bank]);
	ret |= adp5588_gpio_write(dev->client, GPIO_DIR1 + bank,
				 dev->dir[bank]);
	mutex_unlock(&dev->lock);

	return ret;
}

#ifdef CONFIG_GPIO_ADP5588_IRQ
static int adp5588_gpio_to_irq(struct gpio_chip *chip, unsigned off)
{
	struct adp5588_gpio *dev = gpiochip_get_data(chip);

	return dev->irq_base + off;
}

static void adp5588_irq_bus_lock(struct irq_data *d)
{
	struct adp5588_gpio *dev = irq_data_get_irq_chip_data(d);

	mutex_lock(&dev->irq_lock);
}

 /*
  * genirq core code can issue chip->mask/unmask from atomic context.
  * This doesn't work for slow busses where an access needs to sleep.
  * bus_sync_unlock() is therefore called outside the atomic context,
  * syncs the current irq mask state with the slow external controller
  * and unlocks the bus.
  */

static void adp5588_irq_bus_sync_unlock(struct irq_data *d)
{
	struct adp5588_gpio *dev = irq_data_get_irq_chip_data(d);
	int i;

	for (i = 0; i <= ADP5588_BANK(ADP5588_MAXGPIO); i++)
		if (dev->int_en[i] ^ dev->irq_mask[i]) {
			dev->int_en[i] = dev->irq_mask[i];
			adp5588_gpio_write(dev->client, GPIO_INT_EN1 + i,
					   dev->int_en[i]);
		}

	mutex_unlock(&dev->irq_lock);
}

static void adp5588_irq_mask(struct irq_data *d)
{
	struct adp5588_gpio *dev = irq_data_get_irq_chip_data(d);
	unsigned gpio = d->irq - dev->irq_base;

	dev->irq_mask[ADP5588_BANK(gpio)] &= ~ADP5588_BIT(gpio);
}

static void adp5588_irq_unmask(struct irq_data *d)
{
	struct adp5588_gpio *dev = irq_data_get_irq_chip_data(d);
	unsigned gpio = d->irq - dev->irq_base;

	dev->irq_mask[ADP5588_BANK(gpio)] |= ADP5588_BIT(gpio);
}

static int adp5588_irq_set_type(struct irq_data *d, unsigned int type)
{
	struct adp5588_gpio *dev = irq_data_get_irq_chip_data(d);
	uint16_t gpio = d->irq - dev->irq_base;
	unsigned bank, bit;

	if ((type & IRQ_TYPE_EDGE_BOTH)) {
		dev_err(&dev->client->dev, "irq %d: unsupported type %d\n",
			d->irq, type);
		return -EINVAL;
	}

	bank = ADP5588_BANK(gpio);
	bit = ADP5588_BIT(gpio);

	if (type & IRQ_TYPE_LEVEL_HIGH)
		dev->int_lvl[bank] |= bit;
	else if (type & IRQ_TYPE_LEVEL_LOW)
		dev->int_lvl[bank] &= ~bit;
	else
		return -EINVAL;

	adp5588_gpio_direction_input(&dev->gpio_chip, gpio);
	adp5588_gpio_write(dev->client, GPIO_INT_LVL1 + bank,
			   dev->int_lvl[bank]);

	return 0;
}

static struct irq_chip adp5588_irq_chip = {
	.name			= "adp5588",
	.irq_mask		= adp5588_irq_mask,
	.irq_unmask		= adp5588_irq_unmask,
	.irq_bus_lock		= adp5588_irq_bus_lock,
	.irq_bus_sync_unlock	= adp5588_irq_bus_sync_unlock,
	.irq_set_type		= adp5588_irq_set_type,
};

static int adp5588_gpio_read_intstat(struct i2c_client *client, u8 *buf)
{
	int ret = i2c_smbus_read_i2c_block_data(client, GPIO_INT_STAT1, 3, buf);

	if (ret < 0)
		dev_err(&client->dev, "Read INT_STAT Error\n");

	return ret;
}

static irqreturn_t adp5588_irq_handler(int irq, void *devid)
{
	struct adp5588_gpio *dev = devid;
	unsigned status, bank, bit, pending;
	int ret;
	status = adp5588_gpio_read(dev->client, INT_STAT);

	if (status & ADP5588_GPI_INT) {
		ret = adp5588_gpio_read_intstat(dev->client, dev->irq_stat);
		if (ret < 0)
			memset(dev->irq_stat, 0, ARRAY_SIZE(dev->irq_stat));

		for (bank = 0, bit = 0; bank <= ADP5588_BANK(ADP5588_MAXGPIO);
			bank++, bit = 0) {
			pending = dev->irq_stat[bank] & dev->irq_mask[bank];

			while (pending) {
				if (pending & (1 << bit)) {
					handle_nested_irq(dev->irq_base +
							  (bank << 3) + bit);
					pending &= ~(1 << bit);

				}
				bit++;
			}
		}
	}

	adp5588_gpio_write(dev->client, INT_STAT, status); /* Status is W1C */

	return IRQ_HANDLED;
}

static int adp5588_irq_setup(struct adp5588_gpio *dev)
{
	struct i2c_client *client = dev->client;
	struct adp5588_gpio_platform_data *pdata =
			dev_get_platdata(&client->dev);
	unsigned gpio;
	int ret;

	adp5588_gpio_write(client, CFG, ADP5588_AUTO_INC);
	adp5588_gpio_write(client, INT_STAT, -1); /* status is W1C */
	adp5588_gpio_read_intstat(client, dev->irq_stat); /* read to clear */

	dev->irq_base = pdata->irq_base;
	mutex_init(&dev->irq_lock);

	for (gpio = 0; gpio < dev->gpio_chip.ngpio; gpio++) {
		int irq = gpio + dev->irq_base;
		irq_set_chip_data(irq, dev);
		irq_set_chip_and_handler(irq, &adp5588_irq_chip,
					 handle_level_irq);
		irq_set_nested_thread(irq, 1);
		irq_modify_status(irq, IRQ_NOREQUEST, IRQ_NOPROBE);
	}

	ret = request_threaded_irq(client->irq,
				   NULL,
				   adp5588_irq_handler,
				   IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
				   dev_name(&client->dev), dev);
	if (ret) {
		dev_err(&client->dev, "failed to request irq %d\n",
			client->irq);
		goto out;
	}

	dev->gpio_chip.to_irq = adp5588_gpio_to_irq;
	adp5588_gpio_write(client, CFG,
		ADP5588_AUTO_INC | ADP5588_INT_CFG | ADP5588_GPI_INT);

	return 0;

out:
	dev->irq_base = 0;
	return ret;
}

static void adp5588_irq_teardown(struct adp5588_gpio *dev)
{
	if (dev->irq_base)
		free_irq(dev->client->irq, dev);
}

#else
static int adp5588_irq_setup(struct adp5588_gpio *dev)
{
	struct i2c_client *client = dev->client;
	dev_warn(&client->dev, "interrupt support not compiled in\n");

	return 0;
}

static void adp5588_irq_teardown(struct adp5588_gpio *dev)
{
}
#endif /* CONFIG_GPIO_ADP5588_IRQ */

static int adp5588_gpio_probe(struct i2c_client *client,
					const struct i2c_device_id *id)
{
	struct adp5588_gpio_platform_data *pdata =
			dev_get_platdata(&client->dev);
	struct adp5588_gpio *dev;
	struct gpio_chip *gc;
	int ret, i, revid;

	if (!pdata) {
		dev_err(&client->dev, "missing platform data\n");
		return -ENODEV;
	}

	if (!i2c_check_functionality(client->adapter,
					I2C_FUNC_SMBUS_BYTE_DATA)) {
		dev_err(&client->dev, "SMBUS Byte Data not Supported\n");
		return -EIO;
	}

	dev = devm_kzalloc(&client->dev, sizeof(*dev), GFP_KERNEL);
	if (!dev)
		return -ENOMEM;

	dev->client = client;

	gc = &dev->gpio_chip;
	gc->direction_input = adp5588_gpio_direction_input;
	gc->direction_output = adp5588_gpio_direction_output;
	gc->get = adp5588_gpio_get_value;
	gc->set = adp5588_gpio_set_value;
	gc->can_sleep = true;

	gc->base = pdata->gpio_start;
	gc->ngpio = ADP5588_MAXGPIO;
	gc->label = client->name;
	gc->owner = THIS_MODULE;
	gc->names = pdata->names;

	mutex_init(&dev->lock);

	ret = adp5588_gpio_read(dev->client, DEV_ID);
	if (ret < 0)
		goto err;

	revid = ret & ADP5588_DEVICE_ID_MASK;

	for (i = 0, ret = 0; i <= ADP5588_BANK(ADP5588_MAXGPIO); i++) {
		dev->dat_out[i] = adp5588_gpio_read(client, GPIO_DAT_OUT1 + i);
		dev->dir[i] = adp5588_gpio_read(client, GPIO_DIR1 + i);
		ret |= adp5588_gpio_write(client, KP_GPIO1 + i, 0);
		ret |= adp5588_gpio_write(client, GPIO_PULL1 + i,
				(pdata->pullup_dis_mask >> (8 * i)) & 0xFF);
		ret |= adp5588_gpio_write(client, GPIO_INT_EN1 + i, 0);
		if (ret)
			goto err;
	}

	if (pdata->irq_base) {
		if (WA_DELAYED_READOUT_REVID(revid)) {
			dev_warn(&client->dev, "GPIO int not supported\n");
		} else {
			ret = adp5588_irq_setup(dev);
			if (ret)
				goto err;
		}
	}

	ret = devm_gpiochip_add_data(&client->dev, &dev->gpio_chip, dev);
	if (ret)
		goto err_irq;

	dev_info(&client->dev, "IRQ Base: %d Rev.: %d\n",
			pdata->irq_base, revid);

	if (pdata->setup) {
		ret = pdata->setup(client, gc->base, gc->ngpio, pdata->context);
		if (ret < 0)
			dev_warn(&client->dev, "setup failed, %d\n", ret);
	}

	i2c_set_clientdata(client, dev);

	return 0;

err_irq:
	adp5588_irq_teardown(dev);
err:
	return ret;
}

static int adp5588_gpio_remove(struct i2c_client *client)
{
	struct adp5588_gpio_platform_data *pdata =
			dev_get_platdata(&client->dev);
	struct adp5588_gpio *dev = i2c_get_clientdata(client);
	int ret;

	if (pdata->teardown) {
		ret = pdata->teardown(client,
				      dev->gpio_chip.base, dev->gpio_chip.ngpio,
				      pdata->context);
		if (ret < 0) {
			dev_err(&client->dev, "teardown failed %d\n", ret);
			return ret;
		}
	}

	if (dev->irq_base)
		free_irq(dev->client->irq, dev);

	return 0;
}

static const struct i2c_device_id adp5588_gpio_id[] = {
	{DRV_NAME, 0},
	{}
};

MODULE_DEVICE_TABLE(i2c, adp5588_gpio_id);

static struct i2c_driver adp5588_gpio_driver = {
	.driver = {
		   .name = DRV_NAME,
		   },
	.probe = adp5588_gpio_probe,
	.remove = adp5588_gpio_remove,
	.id_table = adp5588_gpio_id,
};

module_i2c_driver(adp5588_gpio_driver);

MODULE_AUTHOR("Michael Hennerich <[email protected]>");
MODULE_DESCRIPTION("GPIO ADP5588 Driver");
MODULE_LICENSE("GPL");
Commit	Line	Data
80884094 MH	1	/*
80884094 MH	2	* GPIO Chip driver for Analog Devices
459773ae	3	* ADP5588/ADP5587 I/O Expander and QWERTY Keypad Controller
80884094	4	*
459773ae	5	* Copyright 2009-2010 Analog Devices Inc.
80884094 MH	6	*
	7	* Licensed under the GPL-2 or later.
	8	*/
	9
	10	#include <linux/module.h>
	11	#include <linux/kernel.h>
5a0e3ad6	12	#include <linux/slab.h>
80884094 MH	13	#include <linux/init.h>
	14	#include <linux/i2c.h>
	15	#include <linux/gpio.h>
459773ae MH	16	#include <linux/interrupt.h>
459773ae MH	17	#include <linux/irq.h>
80884094 MH	18
	19	#include <linux/i2c/adp5588.h>
	20
459773ae MH	21	#define DRV_NAME "adp5588-gpio"
	22
	23	/*
	24	* Early pre 4.0 Silicon required to delay readout by at least 25ms,
	25	* since the Event Counter Register updated 25ms after the interrupt
	26	* asserted.
	27	*/
	28	#define WA_DELAYED_READOUT_REVID(rev) ((rev) < 4)
80884094 MH	29
	30	struct adp5588_gpio {
	31	struct i2c_client *client;
	32	struct gpio_chip gpio_chip;
	33	struct mutex lock; /* protect cached dir, dat_out */
459773ae MH	34	/* protect serialized access to the interrupt controller bus */
459773ae MH	35	struct mutex irq_lock;
80884094	36	unsigned gpio_start;
459773ae	37	unsigned irq_base;
80884094 MH	38	uint8_t dat_out[3];
80884094 MH	39	uint8_t dir[3];
459773ae MH	40	uint8_t int_lvl[3];
	41	uint8_t int_en[3];
	42	uint8_t irq_mask[3];
	43	uint8_t irq_stat[3];
80884094 MH	44	};
	45
	46	static int adp5588_gpio_read(struct i2c_client *client, u8 reg)
	47	{
	48	int ret = i2c_smbus_read_byte_data(client, reg);
	49
	50	if (ret < 0)
	51	dev_err(&client->dev, "Read Error\n");
	52
	53	return ret;
	54	}
	55
	56	static int adp5588_gpio_write(struct i2c_client *client, u8 reg, u8 val)
	57	{
	58	int ret = i2c_smbus_write_byte_data(client, reg, val);
	59
	60	if (ret < 0)
	61	dev_err(&client->dev, "Write Error\n");
	62
	63	return ret;
	64	}
	65
	66	static int adp5588_gpio_get_value(struct gpio_chip *chip, unsigned off)
	67	{
f69255ce	68	struct adp5588_gpio *dev = gpiochip_get_data(chip);
992196f2 JFD	69	unsigned bank = ADP5588_BANK(off);
	70	unsigned bit = ADP5588_BIT(off);
	71	int val;
80884094	72
992196f2 JFD	73	mutex_lock(&dev->lock);
	74
	75	if (dev->dir[bank] & bit)
	76	val = dev->dat_out[bank];
	77	else
	78	val = adp5588_gpio_read(dev->client, GPIO_DAT_STAT1 + bank);
	79
	80	mutex_unlock(&dev->lock);
	81
	82	return !!(val & bit);
80884094 MH	83	}
	84
	85	static void adp5588_gpio_set_value(struct gpio_chip *chip,
	86	unsigned off, int val)
	87	{
	88	unsigned bank, bit;
f69255ce	89	struct adp5588_gpio *dev = gpiochip_get_data(chip);
80884094	90
459773ae MH	91	bank = ADP5588_BANK(off);
459773ae MH	92	bit = ADP5588_BIT(off);
80884094 MH	93
	94	mutex_lock(&dev->lock);
	95	if (val)
	96	dev->dat_out[bank] \|= bit;
	97	else
	98	dev->dat_out[bank] &= ~bit;
	99
	100	adp5588_gpio_write(dev->client, GPIO_DAT_OUT1 + bank,
	101	dev->dat_out[bank]);
	102	mutex_unlock(&dev->lock);
	103	}
	104
	105	static int adp5588_gpio_direction_input(struct gpio_chip *chip, unsigned off)
	106	{
	107	int ret;
	108	unsigned bank;
f69255ce	109	struct adp5588_gpio *dev = gpiochip_get_data(chip);
80884094	110
459773ae	111	bank = ADP5588_BANK(off);
80884094 MH	112
80884094 MH	113	mutex_lock(&dev->lock);
459773ae	114	dev->dir[bank] &= ~ADP5588_BIT(off);
80884094 MH	115	ret = adp5588_gpio_write(dev->client, GPIO_DIR1 + bank, dev->dir[bank]);
	116	mutex_unlock(&dev->lock);
	117
	118	return ret;
	119	}
	120
	121	static int adp5588_gpio_direction_output(struct gpio_chip *chip,
	122	unsigned off, int val)
	123	{
	124	int ret;
	125	unsigned bank, bit;
f69255ce	126	struct adp5588_gpio *dev = gpiochip_get_data(chip);
80884094	127
459773ae MH	128	bank = ADP5588_BANK(off);
459773ae MH	129	bit = ADP5588_BIT(off);
80884094 MH	130
	131	mutex_lock(&dev->lock);
	132	dev->dir[bank] \|= bit;
	133
	134	if (val)
	135	dev->dat_out[bank] \|= bit;
	136	else
	137	dev->dat_out[bank] &= ~bit;
	138
	139	ret = adp5588_gpio_write(dev->client, GPIO_DAT_OUT1 + bank,
	140	dev->dat_out[bank]);
	141	ret \|= adp5588_gpio_write(dev->client, GPIO_DIR1 + bank,
	142	dev->dir[bank]);
	143	mutex_unlock(&dev->lock);
	144
	145	return ret;
	146	}
	147
459773ae MH	148	#ifdef CONFIG_GPIO_ADP5588_IRQ
	149	static int adp5588_gpio_to_irq(struct gpio_chip *chip, unsigned off)
	150	{
f69255ce LW	151	struct adp5588_gpio *dev = gpiochip_get_data(chip);
f69255ce LW	152
459773ae MH	153	return dev->irq_base + off;
	154	}
	155
12401eed	156	static void adp5588_irq_bus_lock(struct irq_data *d)
459773ae	157	{
12401eed LB	158	struct adp5588_gpio *dev = irq_data_get_irq_chip_data(d);
12401eed LB	159
459773ae MH	160	mutex_lock(&dev->irq_lock);
	161	}
	162
	163	/*
	164	* genirq core code can issue chip->mask/unmask from atomic context.
	165	* This doesn't work for slow busses where an access needs to sleep.
	166	* bus_sync_unlock() is therefore called outside the atomic context,
	167	* syncs the current irq mask state with the slow external controller
	168	* and unlocks the bus.
	169	*/
	170
12401eed	171	static void adp5588_irq_bus_sync_unlock(struct irq_data *d)
459773ae	172	{
12401eed	173	struct adp5588_gpio *dev = irq_data_get_irq_chip_data(d);
459773ae MH	174	int i;
	175
	176	for (i = 0; i <= ADP5588_BANK(ADP5588_MAXGPIO); i++)
	177	if (dev->int_en[i] ^ dev->irq_mask[i]) {
	178	dev->int_en[i] = dev->irq_mask[i];
	179	adp5588_gpio_write(dev->client, GPIO_INT_EN1 + i,
	180	dev->int_en[i]);
	181	}
	182
	183	mutex_unlock(&dev->irq_lock);
	184	}
	185
12401eed	186	static void adp5588_irq_mask(struct irq_data *d)
459773ae	187	{
12401eed LB	188	struct adp5588_gpio *dev = irq_data_get_irq_chip_data(d);
12401eed LB	189	unsigned gpio = d->irq - dev->irq_base;
459773ae MH	190
	191	dev->irq_mask[ADP5588_BANK(gpio)] &= ~ADP5588_BIT(gpio);
	192	}
	193
12401eed	194	static void adp5588_irq_unmask(struct irq_data *d)
459773ae	195	{
12401eed LB	196	struct adp5588_gpio *dev = irq_data_get_irq_chip_data(d);
12401eed LB	197	unsigned gpio = d->irq - dev->irq_base;
459773ae MH	198
	199	dev->irq_mask[ADP5588_BANK(gpio)] \|= ADP5588_BIT(gpio);
	200	}
	201
12401eed	202	static int adp5588_irq_set_type(struct irq_data *d, unsigned int type)
459773ae	203	{
12401eed LB	204	struct adp5588_gpio *dev = irq_data_get_irq_chip_data(d);
12401eed LB	205	uint16_t gpio = d->irq - dev->irq_base;
459773ae MH	206	unsigned bank, bit;
	207
	208	if ((type & IRQ_TYPE_EDGE_BOTH)) {
	209	dev_err(&dev->client->dev, "irq %d: unsupported type %d\n",
12401eed	210	d->irq, type);
459773ae MH	211	return -EINVAL;
	212	}
	213
	214	bank = ADP5588_BANK(gpio);
	215	bit = ADP5588_BIT(gpio);
	216
	217	if (type & IRQ_TYPE_LEVEL_HIGH)
	218	dev->int_lvl[bank] \|= bit;
	219	else if (type & IRQ_TYPE_LEVEL_LOW)
	220	dev->int_lvl[bank] &= ~bit;
	221	else
	222	return -EINVAL;
	223
	224	adp5588_gpio_direction_input(&dev->gpio_chip, gpio);
	225	adp5588_gpio_write(dev->client, GPIO_INT_LVL1 + bank,
	226	dev->int_lvl[bank]);
	227
	228	return 0;
	229	}
	230
	231	static struct irq_chip adp5588_irq_chip = {
	232	.name = "adp5588",
12401eed LB	233	.irq_mask = adp5588_irq_mask,
	234	.irq_unmask = adp5588_irq_unmask,
	235	.irq_bus_lock = adp5588_irq_bus_lock,
	236	.irq_bus_sync_unlock = adp5588_irq_bus_sync_unlock,
	237	.irq_set_type = adp5588_irq_set_type,
459773ae MH	238	};
	239
	240	static int adp5588_gpio_read_intstat(struct i2c_client client, u8 buf)
	241	{
	242	int ret = i2c_smbus_read_i2c_block_data(client, GPIO_INT_STAT1, 3, buf);
	243
	244	if (ret < 0)
	245	dev_err(&client->dev, "Read INT_STAT Error\n");
	246
	247	return ret;
	248	}
	249
	250	static irqreturn_t adp5588_irq_handler(int irq, void *devid)
	251	{
	252	struct adp5588_gpio *dev = devid;
	253	unsigned status, bank, bit, pending;
	254	int ret;
	255	status = adp5588_gpio_read(dev->client, INT_STAT);
	256
	257	if (status & ADP5588_GPI_INT) {
	258	ret = adp5588_gpio_read_intstat(dev->client, dev->irq_stat);
	259	if (ret < 0)
	260	memset(dev->irq_stat, 0, ARRAY_SIZE(dev->irq_stat));
	261
078dc65e	262	for (bank = 0, bit = 0; bank <= ADP5588_BANK(ADP5588_MAXGPIO);
459773ae MH	263	bank++, bit = 0) {
	264	pending = dev->irq_stat[bank] & dev->irq_mask[bank];
	265
	266	while (pending) {
	267	if (pending & (1 << bit)) {
	268	handle_nested_irq(dev->irq_base +
	269	(bank << 3) + bit);
	270	pending &= ~(1 << bit);
	271
	272	}
	273	bit++;
	274	}
	275	}
	276	}
	277
	278	adp5588_gpio_write(dev->client, INT_STAT, status); /* Status is W1C */
	279
	280	return IRQ_HANDLED;
	281	}
	282
	283	static int adp5588_irq_setup(struct adp5588_gpio *dev)
	284	{
	285	struct i2c_client *client = dev->client;
e56aee18 JH	286	struct adp5588_gpio_platform_data *pdata =
e56aee18 JH	287	dev_get_platdata(&client->dev);
459773ae MH	288	unsigned gpio;
	289	int ret;
	290
	291	adp5588_gpio_write(client, CFG, ADP5588_AUTO_INC);
	292	adp5588_gpio_write(client, INT_STAT, -1); /* status is W1C */
	293	adp5588_gpio_read_intstat(client, dev->irq_stat); /* read to clear */
	294
	295	dev->irq_base = pdata->irq_base;
	296	mutex_init(&dev->irq_lock);
	297
	298	for (gpio = 0; gpio < dev->gpio_chip.ngpio; gpio++) {
	299	int irq = gpio + dev->irq_base;
b51804bc TG	300	irq_set_chip_data(irq, dev);
b51804bc TG	301	irq_set_chip_and_handler(irq, &adp5588_irq_chip,
459773ae	302	handle_level_irq);
b51804bc	303	irq_set_nested_thread(irq, 1);
23393d49	304	irq_modify_status(irq, IRQ_NOREQUEST, IRQ_NOPROBE);
459773ae MH	305	}
	306
	307	ret = request_threaded_irq(client->irq,
	308	NULL,
	309	adp5588_irq_handler,
	310	IRQF_TRIGGER_FALLING \| IRQF_ONESHOT,
	311	dev_name(&client->dev), dev);
	312	if (ret) {
	313	dev_err(&client->dev, "failed to request irq %d\n",
	314	client->irq);
	315	goto out;
	316	}
	317
	318	dev->gpio_chip.to_irq = adp5588_gpio_to_irq;
	319	adp5588_gpio_write(client, CFG,
	320	ADP5588_AUTO_INC \| ADP5588_INT_CFG \| ADP5588_GPI_INT);
	321
	322	return 0;
	323
	324	out:
	325	dev->irq_base = 0;
	326	return ret;
	327	}
	328
	329	static void adp5588_irq_teardown(struct adp5588_gpio *dev)
	330	{
	331	if (dev->irq_base)
	332	free_irq(dev->client->irq, dev);
	333	}
	334
	335	#else
	336	static int adp5588_irq_setup(struct adp5588_gpio *dev)
	337	{
	338	struct i2c_client *client = dev->client;
	339	dev_warn(&client->dev, "interrupt support not compiled in\n");
	340
	341	return 0;
	342	}
	343
	344	static void adp5588_irq_teardown(struct adp5588_gpio *dev)
	345	{
	346	}
	347	#endif /* CONFIG_GPIO_ADP5588_IRQ */
	348
3836309d	349	static int adp5588_gpio_probe(struct i2c_client *client,
80884094 MH	350	const struct i2c_device_id *id)
80884094 MH	351	{
e56aee18 JH	352	struct adp5588_gpio_platform_data *pdata =
e56aee18 JH	353	dev_get_platdata(&client->dev);
80884094 MH	354	struct adp5588_gpio *dev;
	355	struct gpio_chip *gc;
	356	int ret, i, revid;
	357
afeb7b45	358	if (!pdata) {
80884094 MH	359	dev_err(&client->dev, "missing platform data\n");
	360	return -ENODEV;
	361	}
	362
	363	if (!i2c_check_functionality(client->adapter,
	364	I2C_FUNC_SMBUS_BYTE_DATA)) {
	365	dev_err(&client->dev, "SMBUS Byte Data not Supported\n");
	366	return -EIO;
	367	}
	368
7898b31e	369	dev = devm_kzalloc(&client->dev, sizeof(*dev), GFP_KERNEL);
afeb7b45	370	if (!dev)
80884094	371	return -ENOMEM;
80884094 MH	372
	373	dev->client = client;
	374
	375	gc = &dev->gpio_chip;
	376	gc->direction_input = adp5588_gpio_direction_input;
	377	gc->direction_output = adp5588_gpio_direction_output;
	378	gc->get = adp5588_gpio_get_value;
	379	gc->set = adp5588_gpio_set_value;
9fb1f39e	380	gc->can_sleep = true;
80884094 MH	381
80884094 MH	382	gc->base = pdata->gpio_start;
459773ae	383	gc->ngpio = ADP5588_MAXGPIO;
80884094 MH	384	gc->label = client->name;
80884094 MH	385	gc->owner = THIS_MODULE;
1163316e	386	gc->names = pdata->names;
80884094 MH	387
	388	mutex_init(&dev->lock);
	389
80884094 MH	390	ret = adp5588_gpio_read(dev->client, DEV_ID);
	391	if (ret < 0)
	392	goto err;
	393
	394	revid = ret & ADP5588_DEVICE_ID_MASK;
	395
459773ae	396	for (i = 0, ret = 0; i <= ADP5588_BANK(ADP5588_MAXGPIO); i++) {
80884094 MH	397	dev->dat_out[i] = adp5588_gpio_read(client, GPIO_DAT_OUT1 + i);
	398	dev->dir[i] = adp5588_gpio_read(client, GPIO_DIR1 + i);
	399	ret \|= adp5588_gpio_write(client, KP_GPIO1 + i, 0);
	400	ret \|= adp5588_gpio_write(client, GPIO_PULL1 + i,
	401	(pdata->pullup_dis_mask >> (8 * i)) & 0xFF);
459773ae	402	ret \|= adp5588_gpio_write(client, GPIO_INT_EN1 + i, 0);
80884094 MH	403	if (ret)
	404	goto err;
	405	}
	406
459773ae MH	407	if (pdata->irq_base) {
	408	if (WA_DELAYED_READOUT_REVID(revid)) {
	409	dev_warn(&client->dev, "GPIO int not supported\n");
	410	} else {
	411	ret = adp5588_irq_setup(dev);
	412	if (ret)
	413	goto err;
	414	}
	415	}
	416
7c263fe0	417	ret = devm_gpiochip_add_data(&client->dev, &dev->gpio_chip, dev);
80884094	418	if (ret)
459773ae	419	goto err_irq;
80884094	420
64842aad GL	421	dev_info(&client->dev, "IRQ Base: %d Rev.: %d\n",
64842aad GL	422	pdata->irq_base, revid);
80884094 MH	423
	424	if (pdata->setup) {
	425	ret = pdata->setup(client, gc->base, gc->ngpio, pdata->context);
	426	if (ret < 0)
	427	dev_warn(&client->dev, "setup failed, %d\n", ret);
	428	}
	429
	430	i2c_set_clientdata(client, dev);
459773ae	431
80884094 MH	432	return 0;
80884094 MH	433
459773ae MH	434	err_irq:
459773ae MH	435	adp5588_irq_teardown(dev);
80884094	436	err:
80884094 MH	437	return ret;
	438	}
	439
206210ce	440	static int adp5588_gpio_remove(struct i2c_client *client)
80884094	441	{
e56aee18 JH	442	struct adp5588_gpio_platform_data *pdata =
e56aee18 JH	443	dev_get_platdata(&client->dev);
80884094 MH	444	struct adp5588_gpio *dev = i2c_get_clientdata(client);
	445	int ret;
	446
	447	if (pdata->teardown) {
	448	ret = pdata->teardown(client,
	449	dev->gpio_chip.base, dev->gpio_chip.ngpio,
	450	pdata->context);
	451	if (ret < 0) {
	452	dev_err(&client->dev, "teardown failed %d\n", ret);
	453	return ret;
	454	}
	455	}
	456
459773ae MH	457	if (dev->irq_base)
	458	free_irq(dev->client->irq, dev);
	459
80884094 MH	460	return 0;
	461	}
	462
	463	static const struct i2c_device_id adp5588_gpio_id[] = {
	464	{DRV_NAME, 0},
	465	{}
	466	};
	467
	468	MODULE_DEVICE_TABLE(i2c, adp5588_gpio_id);
	469
	470	static struct i2c_driver adp5588_gpio_driver = {
	471	.driver = {
	472	.name = DRV_NAME,
	473	},
	474	.probe = adp5588_gpio_probe,
8283c4ff	475	.remove = adp5588_gpio_remove,
80884094 MH	476	.id_table = adp5588_gpio_id,
	477	};
	478
c8554d32	479	module_i2c_driver(adp5588_gpio_driver);
80884094 MH	480
	481	MODULE_AUTHOR("Michael Hennerich <[email protected]>");
	482	MODULE_DESCRIPTION("GPIO ADP5588 Driver");
	483	MODULE_LICENSE("GPL");