[linux.git] / drivers / gpio / gpio-104-idio-16.c

/*
 * GPIO driver for the ACCES 104-IDIO-16 family
 * Copyright (C) 2015 William Breathitt Gray
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License, version 2, as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * General Public License for more details.
 *
 * This driver supports the following ACCES devices: 104-IDIO-16,
 * 104-IDIO-16E, 104-IDO-16, 104-IDIO-8, 104-IDIO-8E, and 104-IDO-8.
 */
#include <linux/bitops.h>
#include <linux/device.h>
#include <linux/errno.h>
#include <linux/gpio/driver.h>
#include <linux/io.h>
#include <linux/ioport.h>
#include <linux/interrupt.h>
#include <linux/irqdesc.h>
#include <linux/isa.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/spinlock.h>

#define IDIO_16_EXTENT 8
#define MAX_NUM_IDIO_16 max_num_isa_dev(IDIO_16_EXTENT)

static unsigned int base[MAX_NUM_IDIO_16];
static unsigned int num_idio_16;
module_param_array(base, uint, &num_idio_16, 0);
MODULE_PARM_DESC(base, "ACCES 104-IDIO-16 base addresses");

static unsigned int irq[MAX_NUM_IDIO_16];
module_param_array(irq, uint, NULL, 0);
MODULE_PARM_DESC(irq, "ACCES 104-IDIO-16 interrupt line numbers");

/**
 * struct idio_16_gpio - GPIO device private data structure
 * @chip:	instance of the gpio_chip
 * @lock:	synchronization lock to prevent I/O race conditions
 * @irq_mask:	I/O bits affected by interrupts
 * @base:	base port address of the GPIO device
 * @irq:	Interrupt line number
 * @out_state:	output bits state
 */
struct idio_16_gpio {
	struct gpio_chip chip;
	spinlock_t lock;
	unsigned long irq_mask;
	unsigned base;
	unsigned irq;
	unsigned out_state;
};

static int idio_16_gpio_get_direction(struct gpio_chip *chip, unsigned offset)
{
	if (offset > 15)
		return 1;

	return 0;
}

static int idio_16_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
{
	return 0;
}

static int idio_16_gpio_direction_output(struct gpio_chip *chip,
	unsigned offset, int value)
{
	chip->set(chip, offset, value);
	return 0;
}

static int idio_16_gpio_get(struct gpio_chip *chip, unsigned offset)
{
	struct idio_16_gpio *const idio16gpio = gpiochip_get_data(chip);
	const unsigned mask = BIT(offset-16);

	if (offset < 16)
		return -EINVAL;

	if (offset < 24)
		return !!(inb(idio16gpio->base + 1) & mask);

	return !!(inb(idio16gpio->base + 5) & (mask>>8));
}

static void idio_16_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
{
	struct idio_16_gpio *const idio16gpio = gpiochip_get_data(chip);
	const unsigned mask = BIT(offset);
	unsigned long flags;

	if (offset > 15)
		return;

	spin_lock_irqsave(&idio16gpio->lock, flags);

	if (value)
		idio16gpio->out_state |= mask;
	else
		idio16gpio->out_state &= ~mask;

	if (offset > 7)
		outb(idio16gpio->out_state >> 8, idio16gpio->base + 4);
	else
		outb(idio16gpio->out_state, idio16gpio->base);

	spin_unlock_irqrestore(&idio16gpio->lock, flags);
}

static void idio_16_irq_ack(struct irq_data *data)
{
}

static void idio_16_irq_mask(struct irq_data *data)
{
	struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
	struct idio_16_gpio *const idio16gpio = gpiochip_get_data(chip);
	const unsigned long mask = BIT(irqd_to_hwirq(data));
	unsigned long flags;

	idio16gpio->irq_mask &= ~mask;

	if (!idio16gpio->irq_mask) {
		spin_lock_irqsave(&idio16gpio->lock, flags);

		outb(0, idio16gpio->base + 2);

		spin_unlock_irqrestore(&idio16gpio->lock, flags);
	}
}

static void idio_16_irq_unmask(struct irq_data *data)
{
	struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
	struct idio_16_gpio *const idio16gpio = gpiochip_get_data(chip);
	const unsigned long mask = BIT(irqd_to_hwirq(data));
	const unsigned long prev_irq_mask = idio16gpio->irq_mask;
	unsigned long flags;

	idio16gpio->irq_mask |= mask;

	if (!prev_irq_mask) {
		spin_lock_irqsave(&idio16gpio->lock, flags);

		inb(idio16gpio->base + 2);

		spin_unlock_irqrestore(&idio16gpio->lock, flags);
	}
}

static int idio_16_irq_set_type(struct irq_data *data, unsigned flow_type)
{
	/* The only valid irq types are none and both-edges */
	if (flow_type != IRQ_TYPE_NONE &&
		(flow_type & IRQ_TYPE_EDGE_BOTH) != IRQ_TYPE_EDGE_BOTH)
		return -EINVAL;

	return 0;
}

static struct irq_chip idio_16_irqchip = {
	.name = "104-idio-16",
	.irq_ack = idio_16_irq_ack,
	.irq_mask = idio_16_irq_mask,
	.irq_unmask = idio_16_irq_unmask,
	.irq_set_type = idio_16_irq_set_type
};

static irqreturn_t idio_16_irq_handler(int irq, void *dev_id)
{
	struct idio_16_gpio *const idio16gpio = dev_id;
	struct gpio_chip *const chip = &idio16gpio->chip;
	int gpio;

	for_each_set_bit(gpio, &idio16gpio->irq_mask, chip->ngpio)
		generic_handle_irq(irq_find_mapping(chip->irqdomain, gpio));

	spin_lock(&idio16gpio->lock);

	outb(0, idio16gpio->base + 1);

	spin_unlock(&idio16gpio->lock);

	return IRQ_HANDLED;
}

static int idio_16_probe(struct device *dev, unsigned int id)
{
	struct idio_16_gpio *idio16gpio;
	const char *const name = dev_name(dev);
	int err;

	idio16gpio = devm_kzalloc(dev, sizeof(*idio16gpio), GFP_KERNEL);
	if (!idio16gpio)
		return -ENOMEM;

	if (!devm_request_region(dev, base[id], IDIO_16_EXTENT, name)) {
		dev_err(dev, "Unable to lock port addresses (0x%X-0x%X)\n",
			base[id], base[id] + IDIO_16_EXTENT);
		return -EBUSY;
	}

	idio16gpio->chip.label = name;
	idio16gpio->chip.parent = dev;
	idio16gpio->chip.owner = THIS_MODULE;
	idio16gpio->chip.base = -1;
	idio16gpio->chip.ngpio = 32;
	idio16gpio->chip.get_direction = idio_16_gpio_get_direction;
	idio16gpio->chip.direction_input = idio_16_gpio_direction_input;
	idio16gpio->chip.direction_output = idio_16_gpio_direction_output;
	idio16gpio->chip.get = idio_16_gpio_get;
	idio16gpio->chip.set = idio_16_gpio_set;
	idio16gpio->base = base[id];
	idio16gpio->irq = irq[id];
	idio16gpio->out_state = 0xFFFF;

	spin_lock_init(&idio16gpio->lock);

	dev_set_drvdata(dev, idio16gpio);

	err = gpiochip_add_data(&idio16gpio->chip, idio16gpio);
	if (err) {
		dev_err(dev, "GPIO registering failed (%d)\n", err);
		return err;
	}

	/* Disable IRQ by default */
	outb(0, base[id] + 2);
	outb(0, base[id] + 1);

	err = gpiochip_irqchip_add(&idio16gpio->chip, &idio_16_irqchip, 0,
		handle_edge_irq, IRQ_TYPE_NONE);
	if (err) {
		dev_err(dev, "Could not add irqchip (%d)\n", err);
		goto err_gpiochip_remove;
	}

	err = request_irq(irq[id], idio_16_irq_handler, 0, name, idio16gpio);
	if (err) {
		dev_err(dev, "IRQ handler registering failed (%d)\n", err);
		goto err_gpiochip_remove;
	}

	return 0;

err_gpiochip_remove:
	gpiochip_remove(&idio16gpio->chip);
	return err;
}

static int idio_16_remove(struct device *dev, unsigned int id)
{
	struct idio_16_gpio *const idio16gpio = dev_get_drvdata(dev);

	free_irq(idio16gpio->irq, idio16gpio);
	gpiochip_remove(&idio16gpio->chip);

	return 0;
}

static struct isa_driver idio_16_driver = {
	.probe = idio_16_probe,
	.driver = {
		.name = "104-idio-16"
	},
	.remove = idio_16_remove
};

module_isa_driver(idio_16_driver, num_idio_16);

MODULE_AUTHOR("William Breathitt Gray <[email protected]>");
MODULE_DESCRIPTION("ACCES 104-IDIO-16 GPIO driver");
MODULE_LICENSE("GPL v2");
Commit	Line	Data
1ceacea2 WBG	1	/*
	2	* GPIO driver for the ACCES 104-IDIO-16 family
	3	* Copyright (C) 2015 William Breathitt Gray
	4	*
	5	* This program is free software; you can redistribute it and/or modify
	6	* it under the terms of the GNU General Public License, version 2, as
	7	* published by the Free Software Foundation.
	8	*
	9	* This program is distributed in the hope that it will be useful, but
	10	* WITHOUT ANY WARRANTY; without even the implied warranty of
	11	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	12	* General Public License for more details.
86ea8a95 WBG	13	*
	14	* This driver supports the following ACCES devices: 104-IDIO-16,
	15	* 104-IDIO-16E, 104-IDO-16, 104-IDIO-8, 104-IDIO-8E, and 104-IDO-8.
1ceacea2	16	*/
a1184147	17	#include <linux/bitops.h>
1ceacea2 WBG	18	#include <linux/device.h>
	19	#include <linux/errno.h>
	20	#include <linux/gpio/driver.h>
	21	#include <linux/io.h>
	22	#include <linux/ioport.h>
a1184147 WBG	23	#include <linux/interrupt.h>
a1184147 WBG	24	#include <linux/irqdesc.h>
86ea8a95	25	#include <linux/isa.h>
1ceacea2 WBG	26	#include <linux/kernel.h>
	27	#include <linux/module.h>
	28	#include <linux/moduleparam.h>
1ceacea2 WBG	29	#include <linux/spinlock.h>
1ceacea2 WBG	30
86ea8a95 WBG	31	#define IDIO_16_EXTENT 8
	32	#define MAX_NUM_IDIO_16 max_num_isa_dev(IDIO_16_EXTENT)
	33
	34	static unsigned int base[MAX_NUM_IDIO_16];
	35	static unsigned int num_idio_16;
	36	module_param_array(base, uint, &num_idio_16, 0);
	37	MODULE_PARM_DESC(base, "ACCES 104-IDIO-16 base addresses");
	38
	39	static unsigned int irq[MAX_NUM_IDIO_16];
	40	module_param_array(irq, uint, NULL, 0);
	41	MODULE_PARM_DESC(irq, "ACCES 104-IDIO-16 interrupt line numbers");
1ceacea2 WBG	42
	43	/**
	44	* struct idio_16_gpio - GPIO device private data structure
	45	* @chip: instance of the gpio_chip
a1184147 WBG	46	* @lock: synchronization lock to prevent I/O race conditions
a1184147 WBG	47	* @irq_mask: I/O bits affected by interrupts
1ceacea2	48	* @base: base port address of the GPIO device
a1184147	49	* @irq: Interrupt line number
1ceacea2 WBG	50	* @out_state: output bits state
	51	*/
	52	struct idio_16_gpio {
	53	struct gpio_chip chip;
	54	spinlock_t lock;
a1184147	55	unsigned long irq_mask;
1ceacea2	56	unsigned base;
a1184147	57	unsigned irq;
1ceacea2 WBG	58	unsigned out_state;
	59	};
	60
	61	static int idio_16_gpio_get_direction(struct gpio_chip *chip, unsigned offset)
	62	{
	63	if (offset > 15)
	64	return 1;
	65
	66	return 0;
	67	}
	68
	69	static int idio_16_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
	70	{
	71	return 0;
	72	}
	73
	74	static int idio_16_gpio_direction_output(struct gpio_chip *chip,
	75	unsigned offset, int value)
	76	{
	77	chip->set(chip, offset, value);
	78	return 0;
	79	}
	80
1ceacea2 WBG	81	static int idio_16_gpio_get(struct gpio_chip *chip, unsigned offset)
1ceacea2 WBG	82	{
d602ae90	83	struct idio_16_gpio *const idio16gpio = gpiochip_get_data(chip);
6e0171b4	84	const unsigned mask = BIT(offset-16);
1ceacea2 WBG	85
	86	if (offset < 16)
	87	return -EINVAL;
	88
	89	if (offset < 24)
6e0171b4	90	return !!(inb(idio16gpio->base + 1) & mask);
1ceacea2	91
6e0171b4	92	return !!(inb(idio16gpio->base + 5) & (mask>>8));
1ceacea2 WBG	93	}
	94
	95	static void idio_16_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
	96	{
d602ae90	97	struct idio_16_gpio *const idio16gpio = gpiochip_get_data(chip);
6e0171b4	98	const unsigned mask = BIT(offset);
1ceacea2 WBG	99	unsigned long flags;
	100
	101	if (offset > 15)
	102	return;
	103
	104	spin_lock_irqsave(&idio16gpio->lock, flags);
	105
	106	if (value)
6e0171b4	107	idio16gpio->out_state \|= mask;
1ceacea2	108	else
6e0171b4	109	idio16gpio->out_state &= ~mask;
1ceacea2 WBG	110
	111	if (offset > 7)
	112	outb(idio16gpio->out_state >> 8, idio16gpio->base + 4);
	113	else
	114	outb(idio16gpio->out_state, idio16gpio->base);
	115
	116	spin_unlock_irqrestore(&idio16gpio->lock, flags);
	117	}
	118
a1184147 WBG	119	static void idio_16_irq_ack(struct irq_data *data)
a1184147 WBG	120	{
a1184147 WBG	121	}
	122
	123	static void idio_16_irq_mask(struct irq_data *data)
	124	{
	125	struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
d602ae90	126	struct idio_16_gpio *const idio16gpio = gpiochip_get_data(chip);
a1184147 WBG	127	const unsigned long mask = BIT(irqd_to_hwirq(data));
	128	unsigned long flags;
	129
	130	idio16gpio->irq_mask &= ~mask;
	131
	132	if (!idio16gpio->irq_mask) {
	133	spin_lock_irqsave(&idio16gpio->lock, flags);
	134
	135	outb(0, idio16gpio->base + 2);
	136
	137	spin_unlock_irqrestore(&idio16gpio->lock, flags);
	138	}
	139	}
	140
	141	static void idio_16_irq_unmask(struct irq_data *data)
	142	{
	143	struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
d602ae90	144	struct idio_16_gpio *const idio16gpio = gpiochip_get_data(chip);
a1184147 WBG	145	const unsigned long mask = BIT(irqd_to_hwirq(data));
	146	const unsigned long prev_irq_mask = idio16gpio->irq_mask;
	147	unsigned long flags;
	148
	149	idio16gpio->irq_mask \|= mask;
	150
	151	if (!prev_irq_mask) {
	152	spin_lock_irqsave(&idio16gpio->lock, flags);
	153
a1184147 WBG	154	inb(idio16gpio->base + 2);
	155
	156	spin_unlock_irqrestore(&idio16gpio->lock, flags);
	157	}
	158	}
	159
	160	static int idio_16_irq_set_type(struct irq_data *data, unsigned flow_type)
	161	{
	162	/* The only valid irq types are none and both-edges */
	163	if (flow_type != IRQ_TYPE_NONE &&
	164	(flow_type & IRQ_TYPE_EDGE_BOTH) != IRQ_TYPE_EDGE_BOTH)
	165	return -EINVAL;
	166
	167	return 0;
	168	}
	169
	170	static struct irq_chip idio_16_irqchip = {
	171	.name = "104-idio-16",
	172	.irq_ack = idio_16_irq_ack,
	173	.irq_mask = idio_16_irq_mask,
	174	.irq_unmask = idio_16_irq_unmask,
	175	.irq_set_type = idio_16_irq_set_type
	176	};
	177
	178	static irqreturn_t idio_16_irq_handler(int irq, void *dev_id)
	179	{
	180	struct idio_16_gpio *const idio16gpio = dev_id;
	181	struct gpio_chip *const chip = &idio16gpio->chip;
	182	int gpio;
	183
	184	for_each_set_bit(gpio, &idio16gpio->irq_mask, chip->ngpio)
	185	generic_handle_irq(irq_find_mapping(chip->irqdomain, gpio));
	186
12b61c9d WBG	187	spin_lock(&idio16gpio->lock);
	188
	189	outb(0, idio16gpio->base + 1);
	190
	191	spin_unlock(&idio16gpio->lock);
	192
a1184147 WBG	193	return IRQ_HANDLED;
	194	}
	195
86ea8a95	196	static int idio_16_probe(struct device *dev, unsigned int id)
1ceacea2	197	{
1ceacea2	198	struct idio_16_gpio *idio16gpio;
6e0171b4	199	const char *const name = dev_name(dev);
1ceacea2	200	int err;
1ceacea2 WBG	201
	202	idio16gpio = devm_kzalloc(dev, sizeof(*idio16gpio), GFP_KERNEL);
	203	if (!idio16gpio)
	204	return -ENOMEM;
	205
86ea8a95	206	if (!devm_request_region(dev, base[id], IDIO_16_EXTENT, name)) {
cb32389c	207	dev_err(dev, "Unable to lock port addresses (0x%X-0x%X)\n",
86ea8a95	208	base[id], base[id] + IDIO_16_EXTENT);
cb32389c	209	return -EBUSY;
1ceacea2 WBG	210	}
1ceacea2 WBG	211
6e0171b4	212	idio16gpio->chip.label = name;
58383c78	213	idio16gpio->chip.parent = dev;
1ceacea2 WBG	214	idio16gpio->chip.owner = THIS_MODULE;
	215	idio16gpio->chip.base = -1;
	216	idio16gpio->chip.ngpio = 32;
	217	idio16gpio->chip.get_direction = idio_16_gpio_get_direction;
	218	idio16gpio->chip.direction_input = idio_16_gpio_direction_input;
	219	idio16gpio->chip.direction_output = idio_16_gpio_direction_output;
	220	idio16gpio->chip.get = idio_16_gpio_get;
	221	idio16gpio->chip.set = idio_16_gpio_set;
86ea8a95 WBG	222	idio16gpio->base = base[id];
86ea8a95 WBG	223	idio16gpio->irq = irq[id];
1ceacea2 WBG	224	idio16gpio->out_state = 0xFFFF;
	225
	226	spin_lock_init(&idio16gpio->lock);
	227
	228	dev_set_drvdata(dev, idio16gpio);
	229
d602ae90	230	err = gpiochip_add_data(&idio16gpio->chip, idio16gpio);
1ceacea2 WBG	231	if (err) {
1ceacea2 WBG	232	dev_err(dev, "GPIO registering failed (%d)\n", err);
cb32389c	233	return err;
1ceacea2 WBG	234	}
1ceacea2 WBG	235
fb50cdfe	236	/* Disable IRQ by default */
86ea8a95 WBG	237	outb(0, base[id] + 2);
86ea8a95 WBG	238	outb(0, base[id] + 1);
fb50cdfe	239
a1184147 WBG	240	err = gpiochip_irqchip_add(&idio16gpio->chip, &idio_16_irqchip, 0,
	241	handle_edge_irq, IRQ_TYPE_NONE);
	242	if (err) {
	243	dev_err(dev, "Could not add irqchip (%d)\n", err);
cb32389c	244	goto err_gpiochip_remove;
a1184147 WBG	245	}
a1184147 WBG	246
86ea8a95	247	err = request_irq(irq[id], idio_16_irq_handler, 0, name, idio16gpio);
a1184147 WBG	248	if (err) {
a1184147 WBG	249	dev_err(dev, "IRQ handler registering failed (%d)\n", err);
cb32389c	250	goto err_gpiochip_remove;
a1184147 WBG	251	}
a1184147 WBG	252
1ceacea2 WBG	253	return 0;
1ceacea2 WBG	254
cb32389c	255	err_gpiochip_remove:
a1184147	256	gpiochip_remove(&idio16gpio->chip);
1ceacea2 WBG	257	return err;
	258	}
	259
86ea8a95	260	static int idio_16_remove(struct device *dev, unsigned int id)
1ceacea2	261	{
86ea8a95	262	struct idio_16_gpio *const idio16gpio = dev_get_drvdata(dev);
1ceacea2	263
a1184147	264	free_irq(idio16gpio->irq, idio16gpio);
1ceacea2	265	gpiochip_remove(&idio16gpio->chip);
1ceacea2 WBG	266
	267	return 0;
	268	}
	269
86ea8a95 WBG	270	static struct isa_driver idio_16_driver = {
86ea8a95 WBG	271	.probe = idio_16_probe,
1ceacea2 WBG	272	.driver = {
	273	.name = "104-idio-16"
	274	},
	275	.remove = idio_16_remove
	276	};
	277
86ea8a95	278	module_isa_driver(idio_16_driver, num_idio_16);
1ceacea2 WBG	279
	280	MODULE_AUTHOR("William Breathitt Gray <[email protected]>");
	281	MODULE_DESCRIPTION("ACCES 104-IDIO-16 GPIO driver");
22aeddb5	282	MODULE_LICENSE("GPL v2");