[linux.git] / drivers / pcmcia / sa1111_neponset.c

// SPDX-License-Identifier: GPL-2.0
/*
 * linux/drivers/pcmcia/sa1100_neponset.c
 *
 * Neponset PCMCIA specific routines
 */
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/device.h>
#include <linux/errno.h>
#include <linux/init.h>

#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <mach/neponset.h>
#include <asm/hardware/sa1111.h>

#include "sa1111_generic.h"

/*
 * Neponset uses the Maxim MAX1600, with the following connections:
 *
 *   MAX1600      Neponset
 *
 *    A0VCC        SA-1111 GPIO A<1>
 *    A1VCC        SA-1111 GPIO A<0>
 *    A0VPP        CPLD NCR A0VPP
 *    A1VPP        CPLD NCR A1VPP
 *    B0VCC        SA-1111 GPIO A<2>
 *    B1VCC        SA-1111 GPIO A<3>
 *    B0VPP        ground (slot B is CF)
 *    B1VPP        ground (slot B is CF)
 *
 *     VX          VCC (5V)
 *     VY          VCC3_3 (3.3V)
 *     12INA       12V
 *     12INB       ground (slot B is CF)
 *
 * The MAX1600 CODE pin is tied to ground, placing the device in 
 * "Standard Intel code" mode. Refer to the Maxim data sheet for
 * the corresponding truth table.
 */

static int
neponset_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, const socket_state_t *state)
{
	struct sa1111_pcmcia_socket *s = to_skt(skt);
	unsigned int ncr_mask, ncr_set, pa_dwr_mask, pa_dwr_set;
	int ret;

	switch (skt->nr) {
	case 0:
		pa_dwr_mask = GPIO_A0 | GPIO_A1;
		ncr_mask = NCR_A0VPP | NCR_A1VPP;

		if (state->Vpp == 0)
			ncr_set = 0;
		else if (state->Vpp == 120)
			ncr_set = NCR_A1VPP;
		else if (state->Vpp == state->Vcc)
			ncr_set = NCR_A0VPP;
		else {
			printk(KERN_ERR "%s(): unrecognized VPP %u\n",
			       __func__, state->Vpp);
			return -1;
		}
		break;

	case 1:
		pa_dwr_mask = GPIO_A2 | GPIO_A3;
		ncr_mask = 0;
		ncr_set = 0;

		if (state->Vpp != state->Vcc && state->Vpp != 0) {
			printk(KERN_ERR "%s(): CF slot cannot support VPP %u\n",
			       __func__, state->Vpp);
			return -1;
		}
		break;

	default:
		return -1;
	}

	/*
	 * pa_dwr_set is the mask for selecting Vcc on both sockets.
	 * pa_dwr_mask selects which bits (and therefore socket) we change.
	 */
	switch (state->Vcc) {
	default:
	case 0:  pa_dwr_set = 0;		break;
	case 33: pa_dwr_set = GPIO_A1|GPIO_A2;	break;
	case 50: pa_dwr_set = GPIO_A0|GPIO_A3;	break;
	}

	ret = sa1111_pcmcia_configure_socket(skt, state);
	if (ret == 0) {
		neponset_ncr_frob(ncr_mask, ncr_set);
		sa1111_set_io(s->dev, pa_dwr_mask, pa_dwr_set);
	}

	return ret;
}

static struct pcmcia_low_level neponset_pcmcia_ops = {
	.owner			= THIS_MODULE,
	.configure_socket	= neponset_pcmcia_configure_socket,
	.first			= 0,
	.nr			= 2,
};

int pcmcia_neponset_init(struct sa1111_dev *sadev)
{
	/*
	 * Set GPIO_A<3:0> to be outputs for the MAX1600,
	 * and switch to standby mode.
	 */
	sa1111_set_io_dir(sadev, GPIO_A0|GPIO_A1|GPIO_A2|GPIO_A3, 0, 0);
	sa1111_set_io(sadev, GPIO_A0|GPIO_A1|GPIO_A2|GPIO_A3, 0);
	sa1111_set_sleep_io(sadev, GPIO_A0|GPIO_A1|GPIO_A2|GPIO_A3, 0);
	sa11xx_drv_pcmcia_ops(&neponset_pcmcia_ops);
	return sa1111_pcmcia_add(sadev, &neponset_pcmcia_ops,
				 sa11xx_drv_pcmcia_add_one);
}
Commit	Line	Data
b2441318	1	// SPDX-License-Identifier: GPL-2.0
1da177e4 LT	2	/*
	3	* linux/drivers/pcmcia/sa1100_neponset.c
	4	*
	5	* Neponset PCMCIA specific routines
	6	*/
	7	#include <linux/module.h>
	8	#include <linux/kernel.h>
1da177e4 LT	9	#include <linux/device.h>
	10	#include <linux/errno.h>
	11	#include <linux/init.h>
	12
a09e64fb	13	#include <mach/hardware.h>
1da177e4	14	#include <asm/mach-types.h>
a09e64fb	15	#include <mach/neponset.h>
1da177e4 LT	16	#include <asm/hardware/sa1111.h>
	17
	18	#include "sa1111_generic.h"
	19
	20	/*
	21	* Neponset uses the Maxim MAX1600, with the following connections:
	22	*
	23	* MAX1600 Neponset
	24	*
	25	* A0VCC SA-1111 GPIO A<1>
	26	* A1VCC SA-1111 GPIO A<0>
	27	* A0VPP CPLD NCR A0VPP
	28	* A1VPP CPLD NCR A1VPP
	29	* B0VCC SA-1111 GPIO A<2>
	30	* B1VCC SA-1111 GPIO A<3>
	31	* B0VPP ground (slot B is CF)
	32	* B1VPP ground (slot B is CF)
	33	*
	34	* VX VCC (5V)
	35	* VY VCC3_3 (3.3V)
	36	* 12INA 12V
	37	* 12INB ground (slot B is CF)
	38	*
	39	* The MAX1600 CODE pin is tied to ground, placing the device in
	40	* "Standard Intel code" mode. Refer to the Maxim data sheet for
	41	* the corresponding truth table.
	42	*/
	43
	44	static int
	45	neponset_pcmcia_configure_socket(struct soc_pcmcia_socket skt, const socket_state_t state)
	46	{
701a5dc0	47	struct sa1111_pcmcia_socket *s = to_skt(skt);
1da177e4 LT	48	unsigned int ncr_mask, ncr_set, pa_dwr_mask, pa_dwr_set;
	49	int ret;
	50
	51	switch (skt->nr) {
	52	case 0:
	53	pa_dwr_mask = GPIO_A0 \| GPIO_A1;
	54	ncr_mask = NCR_A0VPP \| NCR_A1VPP;
	55
	56	if (state->Vpp == 0)
	57	ncr_set = 0;
	58	else if (state->Vpp == 120)
	59	ncr_set = NCR_A1VPP;
	60	else if (state->Vpp == state->Vcc)
	61	ncr_set = NCR_A0VPP;
	62	else {
	63	printk(KERN_ERR "%s(): unrecognized VPP %u\n",
2e11cb4c	64	__func__, state->Vpp);
1da177e4 LT	65	return -1;
	66	}
	67	break;
	68
	69	case 1:
	70	pa_dwr_mask = GPIO_A2 \| GPIO_A3;
	71	ncr_mask = 0;
	72	ncr_set = 0;
	73
	74	if (state->Vpp != state->Vcc && state->Vpp != 0) {
	75	printk(KERN_ERR "%s(): CF slot cannot support VPP %u\n",
2e11cb4c	76	__func__, state->Vpp);
1da177e4 LT	77	return -1;
	78	}
	79	break;
	80
	81	default:
	82	return -1;
	83	}
	84
	85	/*
	86	* pa_dwr_set is the mask for selecting Vcc on both sockets.
	87	* pa_dwr_mask selects which bits (and therefore socket) we change.
	88	*/
	89	switch (state->Vcc) {
	90	default:
	91	case 0: pa_dwr_set = 0; break;
	92	case 33: pa_dwr_set = GPIO_A1\|GPIO_A2; break;
	93	case 50: pa_dwr_set = GPIO_A0\|GPIO_A3; break;
	94	}
	95
	96	ret = sa1111_pcmcia_configure_socket(skt, state);
	97	if (ret == 0) {
6ad1b614	98	neponset_ncr_frob(ncr_mask, ncr_set);
701a5dc0	99	sa1111_set_io(s->dev, pa_dwr_mask, pa_dwr_set);
1da177e4 LT	100	}
1da177e4 LT	101
65c77dca	102	return ret;
1da177e4 LT	103	}
1da177e4 LT	104
1da177e4 LT	105	static struct pcmcia_low_level neponset_pcmcia_ops = {
1da177e4 LT	106	.owner = THIS_MODULE,
1da177e4	107	.configure_socket = neponset_pcmcia_configure_socket,
701a5dc0 RKAL	108	.first = 0,
701a5dc0 RKAL	109	.nr = 2,
1da177e4 LT	110	};
1da177e4 LT	111
b29cf62c	112	int pcmcia_neponset_init(struct sa1111_dev *sadev)
1da177e4	113	{
3f8df892 RK	114	/*
	115	* Set GPIO_A<3:0> to be outputs for the MAX1600,
	116	* and switch to standby mode.
	117	*/
	118	sa1111_set_io_dir(sadev, GPIO_A0\|GPIO_A1\|GPIO_A2\|GPIO_A3, 0, 0);
	119	sa1111_set_io(sadev, GPIO_A0\|GPIO_A1\|GPIO_A2\|GPIO_A3, 0);
	120	sa1111_set_sleep_io(sadev, GPIO_A0\|GPIO_A1\|GPIO_A2\|GPIO_A3, 0);
	121	sa11xx_drv_pcmcia_ops(&neponset_pcmcia_ops);
	122	return sa1111_pcmcia_add(sadev, &neponset_pcmcia_ops,
	123	sa11xx_drv_pcmcia_add_one);
1da177e4	124	}