]> Git Repo - linux.git/blame - drivers/rtc/rtc-mcp795.c
rtc: mcp795: use bcd2bin/bin2bcd.
[linux.git] / drivers / rtc / rtc-mcp795.c
CommitLineData
1fcbe42c
JG
1/*
2 * SPI Driver for Microchip MCP795 RTC
3 *
4 * Copyright (C) Josef Gajdusek <[email protected]>
5 *
6 * based on other Linux RTC drivers
7 *
8 * Device datasheet:
9 * http://ww1.microchip.com/downloads/en/DeviceDoc/22280A.pdf
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 *
15 * */
16
17#include <linux/module.h>
18#include <linux/kernel.h>
19#include <linux/device.h>
20#include <linux/printk.h>
21#include <linux/spi/spi.h>
22#include <linux/rtc.h>
7f8a5892 23#include <linux/of.h>
bcf18d88 24#include <linux/bcd.h>
1fcbe42c
JG
25
26/* MCP795 Instructions, see datasheet table 3-1 */
27#define MCP795_EEREAD 0x03
28#define MCP795_EEWRITE 0x02
29#define MCP795_EEWRDI 0x04
30#define MCP795_EEWREN 0x06
31#define MCP795_SRREAD 0x05
32#define MCP795_SRWRITE 0x01
33#define MCP795_READ 0x13
34#define MCP795_WRITE 0x12
35#define MCP795_UNLOCK 0x14
36#define MCP795_IDWRITE 0x32
37#define MCP795_IDREAD 0x33
38#define MCP795_CLRWDT 0x44
39#define MCP795_CLRRAM 0x54
40
41#define MCP795_ST_BIT 0x80
42#define MCP795_24_BIT 0x40
43
44static int mcp795_rtcc_read(struct device *dev, u8 addr, u8 *buf, u8 count)
45{
46 struct spi_device *spi = to_spi_device(dev);
47 int ret;
48 u8 tx[2];
49
50 tx[0] = MCP795_READ;
51 tx[1] = addr;
52 ret = spi_write_then_read(spi, tx, sizeof(tx), buf, count);
53
54 if (ret)
55 dev_err(dev, "Failed reading %d bytes from address %x.\n",
56 count, addr);
57
58 return ret;
59}
60
61static int mcp795_rtcc_write(struct device *dev, u8 addr, u8 *data, u8 count)
62{
63 struct spi_device *spi = to_spi_device(dev);
64 int ret;
65 u8 tx[2 + count];
66
67 tx[0] = MCP795_WRITE;
68 tx[1] = addr;
69 memcpy(&tx[2], data, count);
70
71 ret = spi_write(spi, tx, 2 + count);
72
73 if (ret)
74 dev_err(dev, "Failed to write %d bytes to address %x.\n",
75 count, addr);
76
77 return ret;
78}
79
80static int mcp795_rtcc_set_bits(struct device *dev, u8 addr, u8 mask, u8 state)
81{
82 int ret;
83 u8 tmp;
84
85 ret = mcp795_rtcc_read(dev, addr, &tmp, 1);
86 if (ret)
87 return ret;
88
89 if ((tmp & mask) != state) {
90 tmp = (tmp & ~mask) | state;
91 ret = mcp795_rtcc_write(dev, addr, &tmp, 1);
92 }
93
94 return ret;
95}
96
97static int mcp795_set_time(struct device *dev, struct rtc_time *tim)
98{
99 int ret;
100 u8 data[7];
101
102 /* Read first, so we can leave config bits untouched */
103 ret = mcp795_rtcc_read(dev, 0x01, data, sizeof(data));
104
105 if (ret)
106 return ret;
107
bcf18d88
EB
108 data[0] = (data[0] & 0x80) | bin2bcd(tim->tm_sec);
109 data[1] = (data[1] & 0x80) | bin2bcd(tim->tm_min);
110 data[2] = bin2bcd(tim->tm_hour);
111 data[4] = bin2bcd(tim->tm_mday);
112 data[5] = (data[5] & 0x10) | bin2bcd(tim->tm_mon);
1fcbe42c
JG
113
114 if (tim->tm_year > 100)
115 tim->tm_year -= 100;
116
bcf18d88 117 data[6] = bin2bcd(tim->tm_year);
1fcbe42c
JG
118
119 ret = mcp795_rtcc_write(dev, 0x01, data, sizeof(data));
120
121 if (ret)
122 return ret;
123
124 dev_dbg(dev, "Set mcp795: %04d-%02d-%02d %02d:%02d:%02d\n",
125 tim->tm_year + 1900, tim->tm_mon, tim->tm_mday,
126 tim->tm_hour, tim->tm_min, tim->tm_sec);
127
128 return 0;
129}
130
131static int mcp795_read_time(struct device *dev, struct rtc_time *tim)
132{
133 int ret;
134 u8 data[7];
135
136 ret = mcp795_rtcc_read(dev, 0x01, data, sizeof(data));
137
138 if (ret)
139 return ret;
140
bcf18d88
EB
141 tim->tm_sec = bcd2bin(data[0] & 0x7F);
142 tim->tm_min = bcd2bin(data[1] & 0x7F);
143 tim->tm_hour = bcd2bin(data[2] & 0x3F);
144 tim->tm_mday = bcd2bin(data[4] & 0x3F);
145 tim->tm_mon = bcd2bin(data[5] & 0x1F);
146 tim->tm_year = bcd2bin(data[6]) + 100; /* Assume we are in 20xx */
1fcbe42c
JG
147
148 dev_dbg(dev, "Read from mcp795: %04d-%02d-%02d %02d:%02d:%02d\n",
149 tim->tm_year + 1900, tim->tm_mon, tim->tm_mday,
150 tim->tm_hour, tim->tm_min, tim->tm_sec);
151
152 return rtc_valid_tm(tim);
153}
154
34c7b3ac 155static const struct rtc_class_ops mcp795_rtc_ops = {
1fcbe42c
JG
156 .read_time = mcp795_read_time,
157 .set_time = mcp795_set_time
158};
159
160static int mcp795_probe(struct spi_device *spi)
161{
162 struct rtc_device *rtc;
163 int ret;
164
165 spi->mode = SPI_MODE_0;
166 spi->bits_per_word = 8;
167 ret = spi_setup(spi);
168 if (ret) {
169 dev_err(&spi->dev, "Unable to setup SPI\n");
170 return ret;
171 }
172
173 /* Start the oscillator */
174 mcp795_rtcc_set_bits(&spi->dev, 0x01, MCP795_ST_BIT, MCP795_ST_BIT);
175 /* Clear the 12 hour mode flag*/
176 mcp795_rtcc_set_bits(&spi->dev, 0x03, MCP795_24_BIT, 0);
177
178 rtc = devm_rtc_device_register(&spi->dev, "rtc-mcp795",
179 &mcp795_rtc_ops, THIS_MODULE);
180 if (IS_ERR(rtc))
181 return PTR_ERR(rtc);
182
183 spi_set_drvdata(spi, rtc);
184
185 return 0;
186}
187
7f8a5892
EB
188#ifdef CONFIG_OF
189static const struct of_device_id mcp795_of_match[] = {
190 { .compatible = "maxim,mcp795" },
191 { }
192};
193MODULE_DEVICE_TABLE(of, mcp795_of_match);
194#endif
195
1fcbe42c
JG
196static struct spi_driver mcp795_driver = {
197 .driver = {
198 .name = "rtc-mcp795",
7f8a5892 199 .of_match_table = of_match_ptr(mcp795_of_match),
1fcbe42c
JG
200 },
201 .probe = mcp795_probe,
202};
203
204module_spi_driver(mcp795_driver);
205
206MODULE_DESCRIPTION("MCP795 RTC SPI Driver");
207MODULE_AUTHOR("Josef Gajdusek <[email protected]>");
208MODULE_LICENSE("GPL");
209MODULE_ALIAS("spi:mcp795");
This page took 0.228337 seconds and 4 git commands to generate.