]> Git Repo - linux.git/blame - sound/soc/soc-generic-dmaengine-pcm.c
Merge tag 'for-5.8/drivers-2020-06-01' of git://git.kernel.dk/linux-block
[linux.git] / sound / soc / soc-generic-dmaengine-pcm.c
CommitLineData
1356a607
KM
1// SPDX-License-Identifier: GPL-2.0+
2//
3// Copyright (C) 2013, Analog Devices Inc.
4// Author: Lars-Peter Clausen <[email protected]>
5
28c4468b
LPC
6#include <linux/module.h>
7#include <linux/init.h>
8#include <linux/dmaengine.h>
9#include <linux/slab.h>
10#include <sound/pcm.h>
11#include <sound/pcm_params.h>
12#include <sound/soc.h>
13#include <linux/dma-mapping.h>
14#include <linux/of.h>
28c4468b
LPC
15
16#include <sound/dmaengine_pcm.h>
17
acde50a7
LPC
18/*
19 * The platforms dmaengine driver does not support reporting the amount of
20 * bytes that are still left to transfer.
21 */
22#define SND_DMAENGINE_PCM_FLAG_NO_RESIDUE BIT(31)
23
28c4468b 24struct dmaengine_pcm {
f82bf8e2 25 struct dma_chan *chan[SNDRV_PCM_STREAM_LAST + 1];
28c4468b 26 const struct snd_dmaengine_pcm_config *config;
be7ee5f3 27 struct snd_soc_component component;
d1e1406c 28 unsigned int flags;
28c4468b
LPC
29};
30
be7ee5f3 31static struct dmaengine_pcm *soc_component_to_pcm(struct snd_soc_component *p)
28c4468b 32{
be7ee5f3 33 return container_of(p, struct dmaengine_pcm, component);
28c4468b
LPC
34}
35
c0de42bf
LPC
36static struct device *dmaengine_dma_dev(struct dmaengine_pcm *pcm,
37 struct snd_pcm_substream *substream)
38{
39 if (!pcm->chan[substream->stream])
40 return NULL;
41
42 return pcm->chan[substream->stream]->device->dev;
43}
44
28c4468b
LPC
45/**
46 * snd_dmaengine_pcm_prepare_slave_config() - Generic prepare_slave_config callback
47 * @substream: PCM substream
48 * @params: hw_params
49 * @slave_config: DMA slave config to prepare
50 *
51 * This function can be used as a generic prepare_slave_config callback for
52 * platforms which make use of the snd_dmaengine_dai_dma_data struct for their
53 * DAI DMA data. Internally the function will first call
54 * snd_hwparams_to_dma_slave_config to fill in the slave config based on the
55 * hw_params, followed by snd_dmaengine_set_config_from_dai_data to fill in the
56 * remaining fields based on the DAI DMA data.
57 */
58int snd_dmaengine_pcm_prepare_slave_config(struct snd_pcm_substream *substream,
59 struct snd_pcm_hw_params *params, struct dma_slave_config *slave_config)
60{
61 struct snd_soc_pcm_runtime *rtd = substream->private_data;
62 struct snd_dmaengine_dai_dma_data *dma_data;
63 int ret;
64
6e1276a5
BL
65 if (rtd->num_cpus > 1) {
66 dev_err(rtd->dev,
67 "%s doesn't support Multi CPU yet\n", __func__);
68 return -EINVAL;
69 }
70
28c4468b
LPC
71 dma_data = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream);
72
73 ret = snd_hwparams_to_dma_slave_config(substream, params, slave_config);
74 if (ret)
75 return ret;
76
77 snd_dmaengine_pcm_set_config_from_dai_data(substream, dma_data,
78 slave_config);
79
80 return 0;
81}
82EXPORT_SYMBOL_GPL(snd_dmaengine_pcm_prepare_slave_config);
83
ece23171
KM
84static int dmaengine_pcm_hw_params(struct snd_soc_component *component,
85 struct snd_pcm_substream *substream,
86 struct snd_pcm_hw_params *params)
28c4468b 87{
be7ee5f3 88 struct dmaengine_pcm *pcm = soc_component_to_pcm(component);
28c4468b 89 struct dma_chan *chan = snd_dmaengine_pcm_get_chan(substream);
fa654e08
LPC
90 int (*prepare_slave_config)(struct snd_pcm_substream *substream,
91 struct snd_pcm_hw_params *params,
92 struct dma_slave_config *slave_config);
28c4468b
LPC
93 struct dma_slave_config slave_config;
94 int ret;
95
a894bd7f
LJ
96 memset(&slave_config, 0, sizeof(slave_config));
97
fa654e08
LPC
98 if (!pcm->config)
99 prepare_slave_config = snd_dmaengine_pcm_prepare_slave_config;
100 else
101 prepare_slave_config = pcm->config->prepare_slave_config;
102
103 if (prepare_slave_config) {
104 ret = prepare_slave_config(substream, params, &slave_config);
28c4468b
LPC
105 if (ret)
106 return ret;
107
108 ret = dmaengine_slave_config(chan, &slave_config);
109 if (ret)
110 return ret;
111 }
112
d708c2b3 113 return 0;
28c4468b
LPC
114}
115
ece23171
KM
116static int
117dmaengine_pcm_set_runtime_hwparams(struct snd_soc_component *component,
118 struct snd_pcm_substream *substream)
28c4468b
LPC
119{
120 struct snd_soc_pcm_runtime *rtd = substream->private_data;
be7ee5f3 121 struct dmaengine_pcm *pcm = soc_component_to_pcm(component);
c0de42bf 122 struct device *dma_dev = dmaengine_dma_dev(pcm, substream);
28c4468b 123 struct dma_chan *chan = pcm->chan[substream->stream];
c0de42bf 124 struct snd_dmaengine_dai_dma_data *dma_data;
c0de42bf 125 struct snd_pcm_hardware hw;
28c4468b 126
6e1276a5
BL
127 if (rtd->num_cpus > 1) {
128 dev_err(rtd->dev,
129 "%s doesn't support Multi CPU yet\n", __func__);
130 return -EINVAL;
131 }
132
fa654e08 133 if (pcm->config && pcm->config->pcm_hardware)
c0de42bf 134 return snd_soc_set_runtime_hwparams(substream,
28c4468b 135 pcm->config->pcm_hardware);
28c4468b 136
c0de42bf
LPC
137 dma_data = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream);
138
139 memset(&hw, 0, sizeof(hw));
140 hw.info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID |
141 SNDRV_PCM_INFO_INTERLEAVED;
142 hw.periods_min = 2;
143 hw.periods_max = UINT_MAX;
144 hw.period_bytes_min = 256;
145 hw.period_bytes_max = dma_get_max_seg_size(dma_dev);
146 hw.buffer_bytes_max = SIZE_MAX;
147 hw.fifo_size = dma_data->fifo_size;
148
a22f33b0
LPC
149 if (pcm->flags & SND_DMAENGINE_PCM_FLAG_NO_RESIDUE)
150 hw.info |= SNDRV_PCM_INFO_BATCH;
151
13012809
SW
152 /**
153 * FIXME: Remove the return value check to align with the code
154 * before adding snd_dmaengine_pcm_refine_runtime_hwparams
155 * function.
156 */
157 snd_dmaengine_pcm_refine_runtime_hwparams(substream,
158 dma_data,
159 &hw,
160 chan);
c0de42bf
LPC
161
162 return snd_soc_set_runtime_hwparams(substream, &hw);
28c4468b
LPC
163}
164
ece23171
KM
165static int dmaengine_pcm_open(struct snd_soc_component *component,
166 struct snd_pcm_substream *substream)
28c4468b 167{
be7ee5f3 168 struct dmaengine_pcm *pcm = soc_component_to_pcm(component);
c0de42bf
LPC
169 struct dma_chan *chan = pcm->chan[substream->stream];
170 int ret;
28c4468b 171
ece23171 172 ret = dmaengine_pcm_set_runtime_hwparams(component, substream);
c0de42bf
LPC
173 if (ret)
174 return ret;
175
176 return snd_dmaengine_pcm_open(substream, chan);
28c4468b
LPC
177}
178
ece23171
KM
179static int dmaengine_pcm_close(struct snd_soc_component *component,
180 struct snd_pcm_substream *substream)
181{
182 return snd_dmaengine_pcm_close(substream);
183}
184
ece23171
KM
185static int dmaengine_pcm_trigger(struct snd_soc_component *component,
186 struct snd_pcm_substream *substream, int cmd)
187{
188 return snd_dmaengine_pcm_trigger(substream, cmd);
189}
190
c999836d 191static struct dma_chan *dmaengine_pcm_compat_request_channel(
ece23171 192 struct snd_soc_component *component,
c999836d
LPC
193 struct snd_soc_pcm_runtime *rtd,
194 struct snd_pcm_substream *substream)
195{
be7ee5f3 196 struct dmaengine_pcm *pcm = soc_component_to_pcm(component);
90130d2e 197 struct snd_dmaengine_dai_dma_data *dma_data;
ec4f2857 198 dma_filter_fn fn = NULL;
90130d2e 199
6e1276a5
BL
200 if (rtd->num_cpus > 1) {
201 dev_err(rtd->dev,
202 "%s doesn't support Multi CPU yet\n", __func__);
203 return NULL;
204 }
205
90130d2e 206 dma_data = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream);
c999836d 207
d1e1406c
LPC
208 if ((pcm->flags & SND_DMAENGINE_PCM_FLAG_HALF_DUPLEX) && pcm->chan[0])
209 return pcm->chan[0];
210
ec4f2857 211 if (pcm->config && pcm->config->compat_request_channel)
c999836d
LPC
212 return pcm->config->compat_request_channel(rtd, substream);
213
ec4f2857
XL
214 if (pcm->config)
215 fn = pcm->config->compat_filter_fn;
216
217 return snd_dmaengine_pcm_request_channel(fn, dma_data->filter_data);
c999836d
LPC
218}
219
acde50a7
LPC
220static bool dmaengine_pcm_can_report_residue(struct device *dev,
221 struct dma_chan *chan)
478028e0
LPC
222{
223 struct dma_slave_caps dma_caps;
224 int ret;
225
226 ret = dma_get_slave_caps(chan, &dma_caps);
acde50a7
LPC
227 if (ret != 0) {
228 dev_warn(dev, "Failed to get DMA channel capabilities, falling back to period counting: %d\n",
229 ret);
230 return false;
231 }
478028e0
LPC
232
233 if (dma_caps.residue_granularity == DMA_RESIDUE_GRANULARITY_DESCRIPTOR)
234 return false;
235
236 return true;
237}
238
ece23171
KM
239static int dmaengine_pcm_new(struct snd_soc_component *component,
240 struct snd_soc_pcm_runtime *rtd)
28c4468b 241{
be7ee5f3 242 struct dmaengine_pcm *pcm = soc_component_to_pcm(component);
28c4468b 243 const struct snd_dmaengine_pcm_config *config = pcm->config;
be7ee5f3 244 struct device *dev = component->dev;
28c4468b 245 struct snd_pcm_substream *substream;
fa654e08
LPC
246 size_t prealloc_buffer_size;
247 size_t max_buffer_size;
28c4468b 248 unsigned int i;
28c4468b 249
fa654e08
LPC
250 if (config && config->prealloc_buffer_size) {
251 prealloc_buffer_size = config->prealloc_buffer_size;
252 max_buffer_size = config->pcm_hardware->buffer_bytes_max;
253 } else {
254 prealloc_buffer_size = 512 * 1024;
255 max_buffer_size = SIZE_MAX;
256 }
257
ee10fbe1 258 for_each_pcm_streams(i) {
28c4468b
LPC
259 substream = rtd->pcm->streams[i].substream;
260 if (!substream)
261 continue;
262
76d9c68b 263 if (!pcm->chan[i] && config && config->chan_names[i])
9bfa24e9 264 pcm->chan[i] = dma_request_slave_channel(dev,
76d9c68b 265 config->chan_names[i]);
9bfa24e9 266
d1e1406c 267 if (!pcm->chan[i] && (pcm->flags & SND_DMAENGINE_PCM_FLAG_COMPAT)) {
ece23171
KM
268 pcm->chan[i] = dmaengine_pcm_compat_request_channel(
269 component, rtd, substream);
c999836d
LPC
270 }
271
28c4468b 272 if (!pcm->chan[i]) {
be7ee5f3 273 dev_err(component->dev,
28c4468b 274 "Missing dma channel for stream: %d\n", i);
de7621e8 275 return -EINVAL;
28c4468b
LPC
276 }
277
d708c2b3 278 snd_pcm_set_managed_buffer(substream,
ca2b0295 279 SNDRV_DMA_TYPE_DEV_IRAM,
28c4468b 280 dmaengine_dma_dev(pcm, substream),
fa654e08
LPC
281 prealloc_buffer_size,
282 max_buffer_size);
478028e0 283
acde50a7 284 if (!dmaengine_pcm_can_report_residue(dev, pcm->chan[i]))
478028e0 285 pcm->flags |= SND_DMAENGINE_PCM_FLAG_NO_RESIDUE;
2ec42f31
PU
286
287 if (rtd->pcm->streams[i].pcm->name[0] == '\0') {
48118a93
PU
288 strscpy_pad(rtd->pcm->streams[i].pcm->name,
289 rtd->pcm->streams[i].pcm->id,
290 sizeof(rtd->pcm->streams[i].pcm->name));
2ec42f31 291 }
28c4468b
LPC
292 }
293
294 return 0;
28c4468b
LPC
295}
296
93b943ed 297static snd_pcm_uframes_t dmaengine_pcm_pointer(
ece23171 298 struct snd_soc_component *component,
93b943ed
LPC
299 struct snd_pcm_substream *substream)
300{
be7ee5f3 301 struct dmaengine_pcm *pcm = soc_component_to_pcm(component);
93b943ed
LPC
302
303 if (pcm->flags & SND_DMAENGINE_PCM_FLAG_NO_RESIDUE)
304 return snd_dmaengine_pcm_pointer_no_residue(substream);
305 else
306 return snd_dmaengine_pcm_pointer(substream);
307}
308
ece23171
KM
309static int dmaengine_copy_user(struct snd_soc_component *component,
310 struct snd_pcm_substream *substream,
78648092 311 int channel, unsigned long hwoff,
40d1299f 312 void __user *buf, unsigned long bytes)
78648092 313{
78648092
OM
314 struct snd_pcm_runtime *runtime = substream->runtime;
315 struct dmaengine_pcm *pcm = soc_component_to_pcm(component);
316 int (*process)(struct snd_pcm_substream *substream,
317 int channel, unsigned long hwoff,
318 void *buf, unsigned long bytes) = pcm->config->process;
319 bool is_playback = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
320 void *dma_ptr = runtime->dma_area + hwoff +
321 channel * (runtime->dma_bytes / runtime->channels);
322 int ret;
323
324 if (is_playback)
40d1299f 325 if (copy_from_user(dma_ptr, buf, bytes))
78648092
OM
326 return -EFAULT;
327
328 if (process) {
40d1299f 329 ret = process(substream, channel, hwoff, (__force void *)buf, bytes);
78648092
OM
330 if (ret < 0)
331 return ret;
332 }
333
334 if (!is_playback)
40d1299f 335 if (copy_to_user(buf, dma_ptr, bytes))
78648092
OM
336 return -EFAULT;
337
338 return 0;
339}
340
ece23171
KM
341static const struct snd_soc_component_driver dmaengine_pcm_component = {
342 .name = SND_DMAENGINE_PCM_DRV_NAME,
343 .probe_order = SND_SOC_COMP_ORDER_LATE,
28c4468b 344 .open = dmaengine_pcm_open,
ece23171 345 .close = dmaengine_pcm_close,
28c4468b 346 .hw_params = dmaengine_pcm_hw_params,
ece23171 347 .trigger = dmaengine_pcm_trigger,
93b943ed 348 .pointer = dmaengine_pcm_pointer,
ece23171 349 .pcm_construct = dmaengine_pcm_new,
28c4468b
LPC
350};
351
ece23171
KM
352static const struct snd_soc_component_driver dmaengine_pcm_component_process = {
353 .name = SND_DMAENGINE_PCM_DRV_NAME,
354 .probe_order = SND_SOC_COMP_ORDER_LATE,
78648092 355 .open = dmaengine_pcm_open,
ece23171 356 .close = dmaengine_pcm_close,
78648092 357 .hw_params = dmaengine_pcm_hw_params,
ece23171 358 .trigger = dmaengine_pcm_trigger,
78648092
OM
359 .pointer = dmaengine_pcm_pointer,
360 .copy_user = dmaengine_copy_user,
ece23171 361 .pcm_construct = dmaengine_pcm_new,
78648092
OM
362};
363
28c4468b
LPC
364static const char * const dmaengine_pcm_dma_channel_names[] = {
365 [SNDRV_PCM_STREAM_PLAYBACK] = "tx",
366 [SNDRV_PCM_STREAM_CAPTURE] = "rx",
367};
368
5eda87b8 369static int dmaengine_pcm_request_chan_of(struct dmaengine_pcm *pcm,
194c7dea 370 struct device *dev, const struct snd_dmaengine_pcm_config *config)
d1e1406c
LPC
371{
372 unsigned int i;
11b3a7ad 373 const char *name;
5eda87b8 374 struct dma_chan *chan;
d1e1406c 375
76d9c68b
SN
376 if ((pcm->flags & SND_DMAENGINE_PCM_FLAG_NO_DT) || (!dev->of_node &&
377 !(config && config->dma_dev && config->dma_dev->of_node)))
5eda87b8 378 return 0;
d1e1406c 379
2b67f8ba 380 if (config && config->dma_dev) {
194c7dea
SW
381 /*
382 * If this warning is seen, it probably means that your Linux
383 * device structure does not match your HW device structure.
384 * It would be best to refactor the Linux device structure to
385 * correctly match the HW structure.
386 */
387 dev_warn(dev, "DMA channels sourced from device %s",
388 dev_name(config->dma_dev));
389 dev = config->dma_dev;
390 }
391
ee10fbe1 392 for_each_pcm_streams(i) {
11b3a7ad
SW
393 if (pcm->flags & SND_DMAENGINE_PCM_FLAG_HALF_DUPLEX)
394 name = "rx-tx";
395 else
396 name = dmaengine_pcm_dma_channel_names[i];
2b67f8ba 397 if (config && config->chan_names[i])
194c7dea 398 name = config->chan_names[i];
de8cf952 399 chan = dma_request_chan(dev, name);
5eda87b8 400 if (IS_ERR(chan)) {
e9036c2a 401 if (PTR_ERR(chan) == -EPROBE_DEFER)
5eda87b8
SW
402 return -EPROBE_DEFER;
403 pcm->chan[i] = NULL;
404 } else {
405 pcm->chan[i] = chan;
406 }
11b3a7ad
SW
407 if (pcm->flags & SND_DMAENGINE_PCM_FLAG_HALF_DUPLEX)
408 break;
d1e1406c 409 }
11b3a7ad
SW
410
411 if (pcm->flags & SND_DMAENGINE_PCM_FLAG_HALF_DUPLEX)
412 pcm->chan[1] = pcm->chan[0];
5eda87b8
SW
413
414 return 0;
d1e1406c
LPC
415}
416
6b9f3e65
SW
417static void dmaengine_pcm_release_chan(struct dmaengine_pcm *pcm)
418{
419 unsigned int i;
420
ee10fbe1 421 for_each_pcm_streams(i) {
6b9f3e65
SW
422 if (!pcm->chan[i])
423 continue;
424 dma_release_channel(pcm->chan[i]);
425 if (pcm->flags & SND_DMAENGINE_PCM_FLAG_HALF_DUPLEX)
426 break;
427 }
428}
429
28c4468b
LPC
430/**
431 * snd_dmaengine_pcm_register - Register a dmaengine based PCM device
432 * @dev: The parent device for the PCM device
433 * @config: Platform specific PCM configuration
434 * @flags: Platform specific quirks
435 */
436int snd_dmaengine_pcm_register(struct device *dev,
437 const struct snd_dmaengine_pcm_config *config, unsigned int flags)
438{
439 struct dmaengine_pcm *pcm;
6b9f3e65 440 int ret;
28c4468b 441
28c4468b
LPC
442 pcm = kzalloc(sizeof(*pcm), GFP_KERNEL);
443 if (!pcm)
444 return -ENOMEM;
445
f0b3bdbd
FE
446#ifdef CONFIG_DEBUG_FS
447 pcm->component.debugfs_prefix = "dma";
448#endif
28c4468b 449 pcm->config = config;
d1e1406c 450 pcm->flags = flags;
28c4468b 451
5eda87b8
SW
452 ret = dmaengine_pcm_request_chan_of(pcm, dev, config);
453 if (ret)
b84acf44 454 goto err_free_dma;
28c4468b 455
78648092
OM
456 if (config && config->process)
457 ret = snd_soc_add_component(dev, &pcm->component,
458 &dmaengine_pcm_component_process,
459 NULL, 0);
460 else
461 ret = snd_soc_add_component(dev, &pcm->component,
462 &dmaengine_pcm_component, NULL, 0);
6b9f3e65
SW
463 if (ret)
464 goto err_free_dma;
465
466 return 0;
467
468err_free_dma:
469 dmaengine_pcm_release_chan(pcm);
470 kfree(pcm);
471 return ret;
28c4468b
LPC
472}
473EXPORT_SYMBOL_GPL(snd_dmaengine_pcm_register);
474
475/**
476 * snd_dmaengine_pcm_unregister - Removes a dmaengine based PCM device
477 * @dev: Parent device the PCM was register with
478 *
479 * Removes a dmaengine based PCM device previously registered with
480 * snd_dmaengine_pcm_register.
481 */
482void snd_dmaengine_pcm_unregister(struct device *dev)
483{
be7ee5f3 484 struct snd_soc_component *component;
28c4468b 485 struct dmaengine_pcm *pcm;
28c4468b 486
be7ee5f3
KM
487 component = snd_soc_lookup_component(dev, SND_DMAENGINE_PCM_DRV_NAME);
488 if (!component)
28c4468b
LPC
489 return;
490
be7ee5f3 491 pcm = soc_component_to_pcm(component);
28c4468b 492
be7ee5f3 493 snd_soc_unregister_component(dev);
6b9f3e65 494 dmaengine_pcm_release_chan(pcm);
28c4468b
LPC
495 kfree(pcm);
496}
497EXPORT_SYMBOL_GPL(snd_dmaengine_pcm_unregister);
498
499MODULE_LICENSE("GPL");
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