]>
Commit | Line | Data |
---|---|---|
6d803ba7 JCPV |
1 | |
2 | config CLKDEV_LOOKUP | |
3 | bool | |
4 | select HAVE_CLK | |
aa3831cf | 5 | |
5c77f560 SG |
6 | config HAVE_CLK_PREPARE |
7 | bool | |
8 | ||
8fb61e33 AB |
9 | config COMMON_CLK |
10 | bool | |
b2476490 | 11 | select HAVE_CLK_PREPARE |
01033be1 | 12 | select CLKDEV_LOOKUP |
83fe27ea | 13 | select SRCU |
0777591e | 14 | select RATIONAL |
b2476490 MT |
15 | ---help--- |
16 | The common clock framework is a single definition of struct | |
17 | clk, useful across many platforms, as well as an | |
18 | implementation of the clock API in include/linux/clk.h. | |
19 | Architectures utilizing the common struct clk should select | |
8fb61e33 | 20 | this option. |
b2476490 | 21 | |
8fb61e33 AB |
22 | menu "Common Clock Framework" |
23 | depends on COMMON_CLK | |
b2476490 | 24 | |
f05259a6 MB |
25 | config COMMON_CLK_WM831X |
26 | tristate "Clock driver for WM831x/2x PMICs" | |
27 | depends on MFD_WM831X | |
28 | ---help--- | |
29 | Supports the clocking subsystem of the WM831x/2x series of | |
fe4e4372 | 30 | PMICs from Wolfson Microelectronics. |
f05259a6 | 31 | |
5ee2b877 | 32 | source "drivers/clk/versatile/Kconfig" |
f9a6aa43 | 33 | |
daeeb438 EP |
34 | config CLK_HSDK |
35 | bool "PLL Driver for HSDK platform" | |
36 | depends on OF || COMPILE_TEST | |
37 | ---help--- | |
38 | This driver supports the HSDK core, system, ddr, tunnel and hdmi PLLs | |
39 | control. | |
40 | ||
73118e61 | 41 | config COMMON_CLK_MAX77686 |
5a227cd1 | 42 | tristate "Clock driver for Maxim 77620/77686/77802 MFD" |
9c1b305c | 43 | depends on MFD_MAX77686 || MFD_MAX77620 || COMPILE_TEST |
83ccf16c | 44 | ---help--- |
5a227cd1 LD |
45 | This driver supports Maxim 77620/77686/77802 crystal oscillator |
46 | clock. | |
83ccf16c | 47 | |
33f51046 DM |
48 | config COMMON_CLK_MAX9485 |
49 | tristate "Maxim 9485 Programmable Clock Generator" | |
50 | depends on I2C | |
51 | help | |
52 | This driver supports Maxim 9485 Programmable Audio Clock Generator | |
53 | ||
038b892a | 54 | config COMMON_CLK_RK808 |
65bc9d7f | 55 | tristate "Clock driver for RK805/RK808/RK818" |
038b892a CZ |
56 | depends on MFD_RK808 |
57 | ---help--- | |
65bc9d7f | 58 | This driver supports RK805, RK808 and RK818 crystal oscillator clock. These |
038b892a CZ |
59 | multi-function devices have two fixed-rate oscillators, |
60 | clocked at 32KHz each. Clkout1 is always on, Clkout2 can off | |
61 | by control register. | |
62 | ||
b68adc23 | 63 | config COMMON_CLK_HI655X |
3a49afb8 RV |
64 | tristate "Clock driver for Hi655x" if EXPERT |
65 | depends on (MFD_HI655X_PMIC || COMPILE_TEST) | |
66 | depends on REGMAP | |
67 | default MFD_HI655X_PMIC | |
b68adc23 DL |
68 | ---help--- |
69 | This driver supports the hi655x PMIC clock. This | |
70 | multi-function device has one fixed-rate oscillator, clocked | |
71 | at 32KHz. | |
72 | ||
6d6a1d82 SH |
73 | config COMMON_CLK_SCMI |
74 | tristate "Clock driver controlled via SCMI interface" | |
75 | depends on ARM_SCMI_PROTOCOL || COMPILE_TEST | |
76 | ---help--- | |
77 | This driver provides support for clocks that are controlled | |
78 | by firmware that implements the SCMI interface. | |
79 | ||
80 | This driver uses SCMI Message Protocol to interact with the | |
81 | firmware providing all the clock controls. | |
82 | ||
cd52c2a4 SH |
83 | config COMMON_CLK_SCPI |
84 | tristate "Clock driver controlled via SCPI interface" | |
85 | depends on ARM_SCPI_PROTOCOL || COMPILE_TEST | |
86 | ---help--- | |
87 | This driver provides support for clocks that are controlled | |
88 | by firmware that implements the SCPI interface. | |
89 | ||
90 | This driver uses SCPI Message Protocol to interact with the | |
91 | firmware providing all the clock controls. | |
92 | ||
9abd5f05 SH |
93 | config COMMON_CLK_SI5351 |
94 | tristate "Clock driver for SiLabs 5351A/B/C" | |
95 | depends on I2C | |
96 | select REGMAP_I2C | |
97 | select RATIONAL | |
98 | ---help--- | |
99 | This driver supports Silicon Labs 5351A/B/C programmable clock | |
100 | generators. | |
101 | ||
8ce20e66 ML |
102 | config COMMON_CLK_SI514 |
103 | tristate "Clock driver for SiLabs 514 devices" | |
104 | depends on I2C | |
105 | depends on OF | |
106 | select REGMAP_I2C | |
107 | help | |
108 | ---help--- | |
109 | This driver supports the Silicon Labs 514 programmable clock | |
110 | generator. | |
111 | ||
953cc3e8 ML |
112 | config COMMON_CLK_SI544 |
113 | tristate "Clock driver for SiLabs 544 devices" | |
114 | depends on I2C | |
115 | select REGMAP_I2C | |
116 | help | |
117 | ---help--- | |
118 | This driver supports the Silicon Labs 544 programmable clock | |
119 | generator. | |
8ce20e66 | 120 | |
1459c837 SB |
121 | config COMMON_CLK_SI570 |
122 | tristate "Clock driver for SiLabs 570 and compatible devices" | |
123 | depends on I2C | |
124 | depends on OF | |
125 | select REGMAP_I2C | |
126 | help | |
127 | ---help--- | |
128 | This driver supports Silicon Labs 570/571/598/599 programmable | |
129 | clock generators. | |
130 | ||
c7d5a46b ML |
131 | config COMMON_CLK_CDCE706 |
132 | tristate "Clock driver for TI CDCE706 clock synthesizer" | |
133 | depends on I2C | |
134 | select REGMAP_I2C | |
135 | select RATIONAL | |
136 | ---help--- | |
137 | This driver supports TI CDCE706 programmable 3-PLL clock synthesizer. | |
138 | ||
19fbbbbc | 139 | config COMMON_CLK_CDCE925 |
5508124c | 140 | tristate "Clock driver for TI CDCE913/925/937/949 devices" |
19fbbbbc ML |
141 | depends on I2C |
142 | depends on OF | |
143 | select REGMAP_I2C | |
144 | help | |
145 | ---help--- | |
5508124c AM |
146 | This driver supports the TI CDCE913/925/937/949 programmable clock |
147 | synthesizer. Each chip has different number of PLLs and outputs. | |
148 | For example, the CDCE925 contains two PLLs with spread-spectrum | |
149 | clocking support and five output dividers. The driver only supports | |
150 | the following setup, and uses a fixed setting for the output muxes. | |
19fbbbbc ML |
151 | Y1 is derived from the input clock |
152 | Y2 and Y3 derive from PLL1 | |
153 | Y4 and Y5 derive from PLL2 | |
154 | Given a target output frequency, the driver will set the PLL and | |
155 | divider to best approximate the desired output. | |
156 | ||
64dfbe24 KM |
157 | config COMMON_CLK_CS2000_CP |
158 | tristate "Clock driver for CS2000 Fractional-N Clock Synthesizer & Clock Multiplier" | |
159 | depends on I2C | |
160 | help | |
161 | If you say yes here you get support for the CS2000 clock multiplier. | |
162 | ||
846423f9 LW |
163 | config COMMON_CLK_GEMINI |
164 | bool "Clock driver for Cortina Systems Gemini SoC" | |
165 | depends on ARCH_GEMINI || COMPILE_TEST | |
166 | select MFD_SYSCON | |
167 | select RESET_CONTROLLER | |
168 | ---help--- | |
169 | This driver supports the SoC clocks on the Cortina Systems Gemini | |
170 | platform, also known as SL3516 or CS3516. | |
171 | ||
5eda5d79 JS |
172 | config COMMON_CLK_ASPEED |
173 | bool "Clock driver for Aspeed BMC SoCs" | |
174 | depends on ARCH_ASPEED || COMPILE_TEST | |
175 | default ARCH_ASPEED | |
176 | select MFD_SYSCON | |
177 | select RESET_CONTROLLER | |
178 | ---help--- | |
179 | This driver supports the SoC clocks on the Aspeed BMC platforms. | |
180 | ||
181 | The G4 and G5 series, including the ast2400 and ast2500, are supported | |
182 | by this driver. | |
183 | ||
7cc560de | 184 | config COMMON_CLK_S2MPS11 |
e8b60a45 | 185 | tristate "Clock driver for S2MPS1X/S5M8767 MFD" |
9c1b305c | 186 | depends on MFD_SEC_CORE || COMPILE_TEST |
7cc560de | 187 | ---help--- |
e8b60a45 KK |
188 | This driver supports S2MPS11/S2MPS14/S5M8767 crystal oscillator |
189 | clock. These multi-function devices have two (S2MPS14) or three | |
190 | (S2MPS11, S5M8767) fixed-rate oscillators, clocked at 32KHz each. | |
7cc560de | 191 | |
f9f8c043 PU |
192 | config CLK_TWL6040 |
193 | tristate "External McPDM functional clock from twl6040" | |
194 | depends on TWL6040_CORE | |
195 | ---help--- | |
196 | Enable the external functional clock support on OMAP4+ platforms for | |
197 | McPDM. McPDM module is using the external bit clock on the McPDM bus | |
198 | as functional clock. | |
199 | ||
0e646c52 LPC |
200 | config COMMON_CLK_AXI_CLKGEN |
201 | tristate "AXI clkgen driver" | |
4a7748c3 | 202 | depends on ARCH_ZYNQ || MICROBLAZE || COMPILE_TEST |
0e646c52 LPC |
203 | help |
204 | ---help--- | |
205 | Support for the Analog Devices axi-clkgen pcore clock generator for Xilinx | |
206 | FPGAs. It is commonly used in Analog Devices' reference designs. | |
207 | ||
93a17c05 TY |
208 | config CLK_QORIQ |
209 | bool "Clock driver for Freescale QorIQ platforms" | |
2f4bf528 | 210 | depends on (PPC_E500MC || ARM || ARM64 || COMPILE_TEST) && OF |
555eae97 | 211 | ---help--- |
93a17c05 TY |
212 | This adds the clock driver support for Freescale QorIQ platforms |
213 | using common clock framework. | |
555eae97 | 214 | |
308964ca LH |
215 | config COMMON_CLK_XGENE |
216 | bool "Clock driver for APM XGene SoC" | |
217 | default y | |
4a7748c3 | 218 | depends on ARM64 || COMPILE_TEST |
308964ca LH |
219 | ---help--- |
220 | Sypport for the APM X-Gene SoC reference, PLL, and device clocks. | |
221 | ||
f7c82a60 VZ |
222 | config COMMON_CLK_NXP |
223 | def_bool COMMON_CLK && (ARCH_LPC18XX || ARCH_LPC32XX) | |
224 | select REGMAP_MMIO if ARCH_LPC32XX | |
72ad679a | 225 | select MFD_SYSCON if ARCH_LPC18XX |
f7c82a60 VZ |
226 | ---help--- |
227 | Support for clock providers on NXP platforms. | |
228 | ||
942d1d67 PU |
229 | config COMMON_CLK_PALMAS |
230 | tristate "Clock driver for TI Palmas devices" | |
231 | depends on MFD_PALMAS | |
232 | ---help--- | |
233 | This driver supports TI Palmas devices 32KHz output KG and KG_AUDIO | |
234 | using common clock framework. | |
235 | ||
9a74ccdb PZ |
236 | config COMMON_CLK_PWM |
237 | tristate "Clock driver for PWMs used as clock outputs" | |
238 | depends on PWM | |
239 | ---help--- | |
240 | Adapter driver so that any PWM output can be (mis)used as clock signal | |
241 | at 50% duty cycle. | |
242 | ||
98d147f5 RJ |
243 | config COMMON_CLK_PXA |
244 | def_bool COMMON_CLK && ARCH_PXA | |
245 | ---help--- | |
048c58b4 | 246 | Support for the Marvell PXA SoC. |
98d147f5 | 247 | |
ce6e1188 PCM |
248 | config COMMON_CLK_PIC32 |
249 | def_bool COMMON_CLK && MACH_PIC32 | |
250 | ||
0bbd72b4 NA |
251 | config COMMON_CLK_OXNAS |
252 | bool "Clock driver for the OXNAS SoC Family" | |
821f9946 | 253 | depends on ARCH_OXNAS || COMPILE_TEST |
0bbd72b4 NA |
254 | select MFD_SYSCON |
255 | ---help--- | |
256 | Support for the OXNAS SoC Family clocks. | |
257 | ||
3e1aec4e | 258 | config COMMON_CLK_VC5 |
dbf6b16f | 259 | tristate "Clock driver for IDT VersaClock 5,6 devices" |
3e1aec4e MV |
260 | depends on I2C |
261 | depends on OF | |
262 | select REGMAP_I2C | |
263 | help | |
264 | ---help--- | |
dbf6b16f MV |
265 | This driver supports the IDT VersaClock 5 and VersaClock 6 |
266 | programmable clock generators. | |
3e1aec4e | 267 | |
9bee94e7 GF |
268 | config COMMON_CLK_STM32MP157 |
269 | def_bool COMMON_CLK && MACH_STM32MP157 | |
270 | help | |
271 | ---help--- | |
272 | Support for stm32mp157 SoC family clocks | |
273 | ||
da32d353 | 274 | config COMMON_CLK_STM32F |
9a160601 | 275 | def_bool COMMON_CLK && (MACH_STM32F429 || MACH_STM32F469 || MACH_STM32F746) |
da32d353 BG |
276 | help |
277 | ---help--- | |
278 | Support for stm32f4 and stm32f7 SoC families clocks | |
279 | ||
280 | config COMMON_CLK_STM32H7 | |
9a160601 | 281 | def_bool COMMON_CLK && MACH_STM32H743 |
da32d353 BG |
282 | help |
283 | ---help--- | |
284 | Support for stm32h7 SoC family clocks | |
285 | ||
3495e295 | 286 | source "drivers/clk/actions/Kconfig" |
64a12c56 | 287 | source "drivers/clk/bcm/Kconfig" |
72ea4861 | 288 | source "drivers/clk/hisilicon/Kconfig" |
6b0fd6c1 | 289 | source "drivers/clk/imgtec/Kconfig" |
0880fb86 | 290 | source "drivers/clk/ingenic/Kconfig" |
b745c079 | 291 | source "drivers/clk/keystone/Kconfig" |
2886c846 | 292 | source "drivers/clk/mediatek/Kconfig" |
cb7c47d7 | 293 | source "drivers/clk/meson/Kconfig" |
97fa4cf4 | 294 | source "drivers/clk/mvebu/Kconfig" |
b9e65ebc | 295 | source "drivers/clk/qcom/Kconfig" |
a5bd7f7a | 296 | source "drivers/clk/renesas/Kconfig" |
4ce9b85e | 297 | source "drivers/clk/samsung/Kconfig" |
d41f59fd | 298 | source "drivers/clk/sprd/Kconfig" |
1d80c142 | 299 | source "drivers/clk/sunxi-ng/Kconfig" |
31b52ba4 | 300 | source "drivers/clk/tegra/Kconfig" |
21330497 | 301 | source "drivers/clk/ti/Kconfig" |
734d82f4 | 302 | source "drivers/clk/uniphier/Kconfig" |
3fde0e16 | 303 | source "drivers/clk/zynqmp/Kconfig" |
b9e65ebc JL |
304 | |
305 | endmenu |