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8bd135ba MA |
1 | /* |
2 | STB0899 Multistandard Frontend driver | |
3 | Copyright (C) Manu Abraham ([email protected]) | |
4 | ||
5 | Copyright (C) ST Microelectronics | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2 of the License, or | |
10 | (at your option) any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program; if not, write to the Free Software | |
19 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
20 | */ | |
21 | ||
22 | #ifndef __STB0899_REG_H | |
23 | #define __STB0899_REG_H | |
24 | ||
25 | /* S1 */ | |
26 | #define STB0899_DEV_ID 0xf000 | |
27 | #define STB0899_CHIP_ID (0x0f << 4) | |
28 | #define STB0899_OFFST_CHIP_ID 4 | |
29 | #define STB0899_WIDTH_CHIP_ID 4 | |
30 | #define STB0899_CHIP_REL (0x0f << 0) | |
31 | #define STB0899_OFFST_CHIP_REL 0 | |
32 | #define STB0899_WIDTH_CHIP_REL 4 | |
33 | ||
34 | #define STB0899_DEMOD 0xf40e | |
35 | #define STB0899_MODECOEFF (0x01 << 0) | |
36 | #define STB0899_OFFST_MODECOEFF 0 | |
37 | #define STB0899_WIDTH_MODECOEFF 1 | |
38 | ||
39 | #define STB0899_RCOMPC 0xf410 | |
40 | #define STB0899_AGC1CN 0xf412 | |
41 | #define STB0899_AGC1REF 0xf413 | |
42 | #define STB0899_RTC 0xf417 | |
43 | #define STB0899_TMGCFG 0xf418 | |
44 | #define STB0899_AGC2REF 0xf419 | |
45 | #define STB0899_TLSR 0xf41a | |
46 | ||
47 | #define STB0899_CFD 0xf41b | |
48 | #define STB0899_CFD_ON (0x01 << 7) | |
49 | #define STB0899_OFFST_CFD_ON 7 | |
50 | #define STB0899_WIDTH_CFD_ON 1 | |
51 | ||
52 | #define STB0899_ACLC 0xf41c | |
53 | ||
54 | #define STB0899_BCLC 0xf41d | |
55 | #define STB0899_OFFST_ALGO 6 | |
56 | #define STB0899_WIDTH_ALGO_QPSK2 2 | |
57 | #define STB0899_ALGO_QPSK2 (2 << 6) | |
58 | #define STB0899_ALGO_QPSK1 (1 << 6) | |
59 | #define STB0899_ALGO_BPSK (0 << 6) | |
60 | #define STB0899_OFFST_BETA 0 | |
61 | #define STB0899_WIDTH_BETA 6 | |
62 | ||
63 | #define STB0899_EQON 0xf41e | |
64 | #define STB0899_LDT 0xf41f | |
65 | #define STB0899_LDT2 0xf420 | |
66 | #define STB0899_EQUALREF 0xf425 | |
67 | #define STB0899_TMGRAMP 0xf426 | |
68 | #define STB0899_TMGTHD 0xf427 | |
69 | #define STB0899_IDCCOMP 0xf428 | |
70 | #define STB0899_QDCCOMP 0xf429 | |
71 | #define STB0899_POWERI 0xf42a | |
72 | #define STB0899_POWERQ 0xf42b | |
73 | #define STB0899_RCOMP 0xf42c | |
74 | ||
75 | #define STB0899_AGCIQIN 0xf42e | |
76 | #define STB0899_AGCIQVALUE (0xff << 0) | |
77 | #define STB0899_OFFST_AGCIQVALUE 0 | |
78 | #define STB0899_WIDTH_AGCIQVALUE 8 | |
79 | ||
80 | #define STB0899_AGC2I1 0xf436 | |
81 | #define STB0899_AGC2I2 0xf437 | |
82 | ||
83 | #define STB0899_TLIR 0xf438 | |
84 | #define STB0899_TLIR_TMG_LOCK_IND (0xff << 0) | |
85 | #define STB0899_OFFST_TLIR_TMG_LOCK_IND 0 | |
86 | #define STB0899_WIDTH_TLIR_TMG_LOCK_IND 8 | |
87 | ||
88 | #define STB0899_RTF 0xf439 | |
89 | #define STB0899_RTF_TIMING_LOOP_FREQ (0xff << 0) | |
90 | #define STB0899_OFFST_RTF_TIMING_LOOP_FREQ 0 | |
91 | #define STB0899_WIDTH_RTF_TIMING_LOOP_FREQ 8 | |
92 | ||
93 | #define STB0899_DSTATUS 0xf43a | |
94 | #define STB0899_CARRIER_FOUND (0x01 << 7) | |
95 | #define STB0899_OFFST_CARRIER_FOUND 7 | |
96 | #define STB0899_WIDTH_CARRIER_FOUND 1 | |
97 | #define STB0899_TMG_LOCK (0x01 << 6) | |
98 | #define STB0899_OFFST_TMG_LOCK 6 | |
99 | #define STB0899_WIDTH_TMG_LOCK 1 | |
100 | #define STB0899_DEMOD_LOCK (0x01 << 5) | |
101 | #define STB0899_OFFST_DEMOD_LOCK 5 | |
102 | #define STB0899_WIDTH_DEMOD_LOCK 1 | |
103 | #define STB0899_TMG_AUTO (0x01 << 4) | |
104 | #define STB0899_OFFST_TMG_AUTO 4 | |
105 | #define STB0899_WIDTH_TMG_AUTO 1 | |
106 | #define STB0899_END_MAIN (0x01 << 3) | |
107 | #define STB0899_OFFST_END_MAIN 3 | |
108 | #define STB0899_WIDTH_END_MAIN 1 | |
109 | ||
110 | #define STB0899_LDI 0xf43b | |
111 | #define STB0899_OFFST_LDI 0 | |
112 | #define STB0899_WIDTH_LDI 8 | |
113 | ||
114 | #define STB0899_CFRM 0xf43e | |
115 | #define STB0899_OFFST_CFRM 0 | |
116 | #define STB0899_WIDTH_CFRM 8 | |
117 | ||
118 | #define STB0899_CFRL 0xf43f | |
119 | #define STB0899_OFFST_CFRL 0 | |
120 | #define STB0899_WIDTH_CFRL 8 | |
121 | ||
122 | #define STB0899_NIRM 0xf440 | |
123 | #define STB0899_OFFST_NIRM 0 | |
124 | #define STB0899_WIDTH_NIRM 8 | |
125 | ||
126 | #define STB0899_NIRL 0xf441 | |
127 | #define STB0899_OFFST_NIRL 0 | |
128 | #define STB0899_WIDTH_NIRL 8 | |
129 | ||
130 | #define STB0899_ISYMB 0xf444 | |
131 | #define STB0899_QSYMB 0xf445 | |
132 | ||
133 | #define STB0899_SFRH 0xf446 | |
134 | #define STB0899_OFFST_SFRH 0 | |
135 | #define STB0899_WIDTH_SFRH 8 | |
136 | ||
137 | #define STB0899_SFRM 0xf447 | |
138 | #define STB0899_OFFST_SFRM 0 | |
139 | #define STB0899_WIDTH_SFRM 8 | |
140 | ||
141 | #define STB0899_SFRL 0xf448 | |
142 | #define STB0899_OFFST_SFRL 4 | |
143 | #define STB0899_WIDTH_SFRL 4 | |
144 | ||
145 | #define STB0899_SFRUPH 0xf44c | |
146 | #define STB0899_SFRUPM 0xf44d | |
147 | #define STB0899_SFRUPL 0xf44e | |
148 | ||
149 | #define STB0899_EQUAI1 0xf4e0 | |
150 | #define STB0899_EQUAQ1 0xf4e1 | |
151 | #define STB0899_EQUAI2 0xf4e2 | |
152 | #define STB0899_EQUAQ2 0xf4e3 | |
153 | #define STB0899_EQUAI3 0xf4e4 | |
154 | #define STB0899_EQUAQ3 0xf4e5 | |
155 | #define STB0899_EQUAI4 0xf4e6 | |
156 | #define STB0899_EQUAQ4 0xf4e7 | |
157 | #define STB0899_EQUAI5 0xf4e8 | |
158 | #define STB0899_EQUAQ5 0xf4e9 | |
159 | ||
160 | #define STB0899_DSTATUS2 0xf50c | |
161 | #define STB0899_DS2_TMG_AUTOSRCH (0x01 << 7) | |
162 | #define STB8999_OFFST_DS2_TMG_AUTOSRCH 7 | |
163 | #define STB0899_WIDTH_DS2_TMG_AUTOSRCH 1 | |
164 | #define STB0899_DS2_END_MAINLOOP (0x01 << 6) | |
165 | #define STB0899_OFFST_DS2_END_MAINLOOP 6 | |
166 | #define STB0899_WIDTH_DS2_END_MAINLOOP 1 | |
167 | #define STB0899_DS2_CFSYNC (0x01 << 5) | |
168 | #define STB0899_OFFST_DS2_CFSYNC 5 | |
169 | #define STB0899_WIDTH_DS2_CFSYNC 1 | |
170 | #define STB0899_DS2_TMGLOCK (0x01 << 4) | |
171 | #define STB0899_OFFST_DS2_TMGLOCK 4 | |
172 | #define STB0899_WIDTH_DS2_TMGLOCK 1 | |
173 | #define STB0899_DS2_DEMODWAIT (0x01 << 3) | |
174 | #define STB0899_OFFST_DS2_DEMODWAIT 3 | |
175 | #define STB0899_WIDTH_DS2_DEMODWAIT 1 | |
176 | #define STB0899_DS2_FECON (0x01 << 1) | |
177 | #define STB0899_OFFST_DS2_FECON 1 | |
178 | #define STB0899_WIDTH_DS2_FECON 1 | |
179 | ||
180 | /* S1 FEC */ | |
181 | #define STB0899_VSTATUS 0xf50d | |
182 | #define STB0899_VSTATUS_VITERBI_ON (0x01 << 7) | |
183 | #define STB0899_OFFST_VSTATUS_VITERBI_ON 7 | |
184 | #define STB0899_WIDTH_VSTATUS_VITERBI_ON 1 | |
185 | #define STB0899_VSTATUS_END_LOOPVIT (0x01 << 6) | |
186 | #define STB0899_OFFST_VSTATUS_END_LOOPVIT 6 | |
187 | #define STB0899_WIDTH_VSTATUS_END_LOOPVIT 1 | |
188 | #define STB0899_VSTATUS_PRFVIT (0x01 << 4) | |
189 | #define STB0899_OFFST_VSTATUS_PRFVIT 4 | |
190 | #define STB0899_WIDTH_VSTATUS_PRFVIT 1 | |
191 | #define STB0899_VSTATUS_LOCKEDVIT (0x01 << 3) | |
192 | #define STB0899_OFFST_VSTATUS_LOCKEDVIT 3 | |
193 | #define STB0899_WIDTH_VSTATUS_LOCKEDVIT 1 | |
194 | ||
195 | #define STB0899_VERROR 0xf50f | |
196 | ||
197 | #define STB0899_IQSWAP 0xf523 | |
198 | #define STB0899_SYM (0x01 << 3) | |
199 | #define STB0899_OFFST_SYM 3 | |
200 | #define STB0899_WIDTH_SYM 1 | |
201 | ||
202 | #define STB0899_FECAUTO1 0xf530 | |
203 | #define STB0899_DSSSRCH (0x01 << 3) | |
204 | #define STB0899_OFFST_DSSSRCH 3 | |
205 | #define STB0899_WIDTH_DSSSRCH 1 | |
206 | #define STB0899_SYMSRCH (0x01 << 2) | |
207 | #define STB0899_OFFST_SYMSRCH 2 | |
208 | #define STB0899_WIDTH_SYMSRCH 1 | |
209 | #define STB0899_QPSKSRCH (0x01 << 1) | |
210 | #define STB0899_OFFST_QPSKSRCH 1 | |
211 | #define STB0899_WIDTH_QPSKSRCH 1 | |
212 | #define STB0899_BPSKSRCH (0x01 << 0) | |
213 | #define STB0899_OFFST_BPSKSRCH 0 | |
214 | #define STB0899_WIDTH_BPSKSRCH 1 | |
215 | ||
216 | #define STB0899_FECM 0xf533 | |
217 | #define STB0899_FECM_NOT_DVB (0x01 << 7) | |
218 | #define STB0899_OFFST_FECM_NOT_DVB 7 | |
219 | #define STB0899_WIDTH_FECM_NOT_DVB 1 | |
220 | #define STB0899_FECM_RSVD1 (0x07 << 4) | |
221 | #define STB0899_OFFST_FECM_RSVD1 4 | |
222 | #define STB0899_WIDTH_FECM_RSVD1 3 | |
223 | #define STB0899_FECM_VITERBI_ON (0x01 << 3) | |
224 | #define STB0899_OFFST_FECM_VITERBI_ON 3 | |
225 | #define STB0899_WIDTH_FECM_VITERBI_ON 1 | |
226 | #define STB0899_FECM_RSVD0 (0x01 << 2) | |
227 | #define STB0899_OFFST_FECM_RSVD0 2 | |
228 | #define STB0899_WIDTH_FECM_RSVD0 1 | |
229 | #define STB0899_FECM_SYNCDIS (0x01 << 1) | |
230 | #define STB0899_OFFST_FECM_SYNCDIS 1 | |
231 | #define STB0899_WIDTH_FECM_SYNCDIS 1 | |
232 | #define STB0899_FECM_SYMI (0x01 << 0) | |
43498ade | 233 | #define STB0899_OFFST_FECM_SYMI 0 |
8bd135ba MA |
234 | #define STB0899_WIDTH_FECM_SYMI 1 |
235 | ||
236 | #define STB0899_VTH12 0xf534 | |
237 | #define STB0899_VTH23 0xf535 | |
238 | #define STB0899_VTH34 0xf536 | |
239 | #define STB0899_VTH56 0xf537 | |
240 | #define STB0899_VTH67 0xf538 | |
241 | #define STB0899_VTH78 0xf539 | |
242 | ||
243 | #define STB0899_PRVIT 0xf53c | |
244 | #define STB0899_PR_7_8 (0x01 << 5) | |
245 | #define STB0899_OFFST_PR_7_8 5 | |
246 | #define STB0899_WIDTH_PR_7_8 1 | |
247 | #define STB0899_PR_6_7 (0x01 << 4) | |
248 | #define STB0899_OFFST_PR_6_7 4 | |
249 | #define STB0899_WIDTH_PR_6_7 1 | |
250 | #define STB0899_PR_5_6 (0x01 << 3) | |
251 | #define STB0899_OFFST_PR_5_6 3 | |
252 | #define STB0899_WIDTH_PR_5_6 1 | |
253 | #define STB0899_PR_3_4 (0x01 << 2) | |
254 | #define STB0899_OFFST_PR_3_4 2 | |
255 | #define STB0899_WIDTH_PR_3_4 1 | |
256 | #define STB0899_PR_2_3 (0x01 << 1) | |
257 | #define STB0899_OFFST_PR_2_3 1 | |
258 | #define STB0899_WIDTH_PR_2_3 1 | |
259 | #define STB0899_PR_1_2 (0x01 << 0) | |
260 | #define STB0899_OFFST_PR_1_2 0 | |
261 | #define STB0899_WIDTH_PR_1_2 1 | |
262 | ||
263 | #define STB0899_VITSYNC 0xf53d | |
264 | #define STB0899_AM (0x01 << 7) | |
265 | #define STB0899_OFFST_AM 7 | |
266 | #define STB0899_WIDTH_AM 1 | |
267 | #define STB0899_FREEZE (0x01 << 6) | |
268 | #define STB0899_OFFST_FREEZE 6 | |
269 | #define STB0899_WIDTH_FREEZE 1 | |
270 | #define STB0899_SN_65536 (0x03 << 4) | |
271 | #define STB0899_OFFST_SN_65536 4 | |
272 | #define STB0899_WIDTH_SN_65536 2 | |
273 | #define STB0899_SN_16384 (0x01 << 5) | |
274 | #define STB0899_OFFST_SN_16384 5 | |
275 | #define STB0899_WIDTH_SN_16384 1 | |
276 | #define STB0899_SN_4096 (0x01 << 4) | |
277 | #define STB0899_OFFST_SN_4096 4 | |
278 | #define STB0899_WIDTH_SN_4096 1 | |
279 | #define STB0899_SN_1024 (0x00 << 4) | |
280 | #define STB0899_OFFST_SN_1024 4 | |
281 | #define STB0899_WIDTH_SN_1024 0 | |
282 | #define STB0899_TO_128 (0x03 << 2) | |
283 | #define STB0899_OFFST_TO_128 2 | |
284 | #define STB0899_WIDTH_TO_128 2 | |
285 | #define STB0899_TO_64 (0x01 << 3) | |
286 | #define STB0899_OFFST_TO_64 3 | |
287 | #define STB0899_WIDTH_TO_64 1 | |
288 | #define STB0899_TO_32 (0x01 << 2) | |
289 | #define STB0899_OFFST_TO_32 2 | |
290 | #define STB0899_WIDTH_TO_32 1 | |
291 | #define STB0899_TO_16 (0x00 << 2) | |
292 | #define STB0899_OFFST_TO_16 2 | |
293 | #define STB0899_WIDTH_TO_16 0 | |
294 | #define STB0899_HYST_128 (0x03 << 1) | |
295 | #define STB0899_OFFST_HYST_128 1 | |
296 | #define STB0899_WIDTH_HYST_128 2 | |
297 | #define STB0899_HYST_64 (0x01 << 1) | |
298 | #define STB0899_OFFST_HYST_64 1 | |
299 | #define STB0899_WIDTH_HYST_64 1 | |
300 | #define STB0899_HYST_32 (0x01 << 0) | |
301 | #define STB0899_OFFST_HYST_32 0 | |
302 | #define STB0899_WIDTH_HYST_32 1 | |
303 | #define STB0899_HYST_16 (0x00 << 0) | |
304 | #define STB0899_OFFST_HYST_16 0 | |
305 | #define STB0899_WIDTH_HYST_16 0 | |
306 | ||
307 | #define STB0899_RSULC 0xf548 | |
308 | #define STB0899_ULDIL_ON (0x01 << 7) | |
309 | #define STB0899_OFFST_ULDIL_ON 7 | |
310 | #define STB0899_WIDTH_ULDIL_ON 1 | |
311 | #define STB0899_ULAUTO_ON (0x01 << 6) | |
312 | #define STB0899_OFFST_ULAUTO_ON 6 | |
313 | #define STB0899_WIDTH_ULAUTO_ON 1 | |
314 | #define STB0899_ULRS_ON (0x01 << 5) | |
315 | #define STB0899_OFFST_ULRS_ON 5 | |
316 | #define STB0899_WIDTH_ULRS_ON 1 | |
317 | #define STB0899_ULDESCRAM_ON (0x01 << 4) | |
318 | #define STB0899_OFFST_ULDESCRAM_ON 4 | |
319 | #define STB0899_WIDTH_ULDESCRAM_ON 1 | |
320 | #define STB0899_UL_DISABLE (0x01 << 2) | |
321 | #define STB0899_OFFST_UL_DISABLE 2 | |
322 | #define STB0899_WIDTH_UL_DISABLE 1 | |
323 | #define STB0899_NOFTHRESHOLD (0x01 << 0) | |
324 | #define STB0899_OFFST_NOFTHRESHOLD 0 | |
325 | #define STB0899_WIDTH_NOFTHRESHOLD 1 | |
326 | ||
327 | #define STB0899_RSLLC 0xf54a | |
328 | #define STB0899_DEMAPVIT 0xf583 | |
329 | #define STB0899_DEMAPVIT_RSVD (0x01 << 7) | |
330 | #define STB0899_OFFST_DEMAPVIT_RSVD 7 | |
331 | #define STB0899_WIDTH_DEMAPVIT_RSVD 1 | |
332 | #define STB0899_DEMAPVIT_KDIVIDER (0x7f << 0) | |
333 | #define STB0899_OFFST_DEMAPVIT_KDIVIDER 0 | |
334 | #define STB0899_WIDTH_DEMAPVIT_KDIVIDER 7 | |
335 | ||
336 | #define STB0899_PLPARM 0xf58c | |
337 | #define STB0899_VITMAPPING (0x07 << 5) | |
338 | #define STB0899_OFFST_VITMAPPING 5 | |
339 | #define STB0899_WIDTH_VITMAPPING 3 | |
340 | #define STB0899_VITMAPPING_BPSK (0x01 << 5) | |
341 | #define STB0899_OFFST_VITMAPPING_BPSK 5 | |
342 | #define STB0899_WIDTH_VITMAPPING_BPSK 1 | |
343 | #define STB0899_VITMAPPING_QPSK (0x00 << 5) | |
344 | #define STB0899_OFFST_VITMAPPING_QPSK 5 | |
345 | #define STB0899_WIDTH_VITMAPPING_QPSK 0 | |
346 | #define STB0899_VITCURPUN (0x1f << 0) | |
347 | #define STB0899_OFFST_VITCURPUN 0 | |
348 | #define STB0899_WIDTH_VITCURPUN 5 | |
349 | #define STB0899_VITCURPUN_1_2 (0x0d << 0) | |
350 | #define STB0899_VITCURPUN_2_3 (0x12 << 0) | |
351 | #define STB0899_VITCURPUN_3_4 (0x15 << 0) | |
352 | #define STB0899_VITCURPUN_5_6 (0x18 << 0) | |
353 | #define STB0899_VITCURPUN_6_7 (0x19 << 0) | |
354 | #define STB0899_VITCURPUN_7_8 (0x1a << 0) | |
355 | ||
356 | /* S2 DEMOD */ | |
357 | #define STB0899_OFF0_DMD_STATUS 0xf300 | |
358 | #define STB0899_BASE_DMD_STATUS 0x00000000 | |
9acfee56 | 359 | #define STB0899_IF_AGC_LOCK (0x01 << 8) |
8bd135ba MA |
360 | #define STB0899_OFFST_IF_AGC_LOCK 0 |
361 | #define STB0899_WIDTH_IF_AGC_LOCK 1 | |
362 | ||
363 | #define STB0899_OFF0_CRL_FREQ 0xf304 | |
364 | #define STB0899_BASE_CRL_FREQ 0x00000000 | |
9bb17eee | 365 | #define STB0899_CARR_FREQ (0x3fffffff << 0) |
8bd135ba MA |
366 | #define STB0899_OFFST_CARR_FREQ 0 |
367 | #define STB0899_WIDTH_CARR_FREQ 30 | |
368 | ||
369 | #define STB0899_OFF0_BTR_FREQ 0xf308 | |
370 | #define STB0899_BASE_BTR_FREQ 0x00000000 | |
371 | #define STB0899_BTR_FREQ (0xfffffff << 0) | |
372 | #define STB0899_OFFST_BTR_FREQ 0 | |
373 | #define STB0899_WIDTH_BTR_FREQ 28 | |
374 | ||
375 | #define STB0899_OFF0_IF_AGC_GAIN 0xf30c | |
376 | #define STB0899_BASE_IF_AGC_GAIN 0x00000000 | |
377 | #define STB0899_IF_AGC_GAIN (0x3fff < 0) | |
378 | #define STB0899_OFFST_IF_AGC_GAIN 0 | |
379 | #define STB0899_WIDTH_IF_AGC_GAIN 14 | |
380 | ||
381 | #define STB0899_OFF0_BB_AGC_GAIN 0xf310 | |
382 | #define STB0899_BASE_BB_AGC_GAIN 0x00000000 | |
383 | #define STB0899_BB_AGC_GAIN (0x3fff < 0) | |
384 | #define STB0899_OFFST_BB_AGC_GAIN 0 | |
385 | #define STB0899_WIDTH_BB_AGC_GAIN 14 | |
386 | ||
387 | #define STB0899_OFF0_DC_OFFSET 0xf314 | |
388 | #define STB0899_BASE_DC_OFFSET 0x00000000 | |
389 | #define STB0899_I (0xff < 8) | |
390 | #define STB0899_OFFST_I 8 | |
391 | #define STB0899_WIDTH_I 8 | |
392 | #define STB0899_Q (0xff < 0) | |
393 | #define STB0899_OFFST_Q 8 | |
394 | #define STB0899_WIDTH_Q 8 | |
395 | ||
396 | #define STB0899_OFF0_DMD_CNTRL 0xf31c | |
397 | #define STB0899_BASE_DMD_CNTRL 0x00000000 | |
398 | #define STB0899_ADC0_PINS1IN (0x01 << 6) | |
399 | #define STB0899_OFFST_ADC0_PINS1IN 6 | |
400 | #define STB0899_WIDTH_ADC0_PINS1IN 1 | |
401 | #define STB0899_IN2COMP1_OFFBIN0 (0x01 << 3) | |
402 | #define STB0899_OFFST_IN2COMP1_OFFBIN0 3 | |
403 | #define STB0899_WIDTH_IN2COMP1_OFFBIN0 1 | |
404 | #define STB0899_DC_COMP (0x01 << 2) | |
405 | #define STB0899_OFFST_DC_COMP 2 | |
406 | #define STB0899_WIDTH_DC_COMP 1 | |
407 | #define STB0899_MODMODE (0x03 << 0) | |
408 | #define STB0899_OFFST_MODMODE 0 | |
409 | #define STB0899_WIDTH_MODMODE 2 | |
410 | ||
411 | #define STB0899_OFF0_IF_AGC_CNTRL 0xf320 | |
412 | #define STB0899_BASE_IF_AGC_CNTRL 0x00000000 | |
413 | #define STB0899_IF_GAIN_INIT (0x3fff << 13) | |
414 | #define STB0899_OFFST_IF_GAIN_INIT 13 | |
415 | #define STB0899_WIDTH_IF_GAIN_INIT 14 | |
416 | #define STB0899_IF_GAIN_SENSE (0x01 << 12) | |
417 | #define STB0899_OFFST_IF_GAIN_SENSE 12 | |
418 | #define STB0899_WIDTH_IF_GAIN_SENSE 1 | |
419 | #define STB0899_IF_LOOP_GAIN (0x0f << 8) | |
420 | #define STB0899_OFFST_IF_LOOP_GAIN 8 | |
421 | #define STB0899_WIDTH_IF_LOOP_GAIN 4 | |
422 | #define STB0899_IF_LD_GAIN_INIT (0x01 << 7) | |
423 | #define STB0899_OFFST_IF_LD_GAIN_INIT 7 | |
424 | #define STB0899_WIDTH_IF_LD_GAIN_INIT 1 | |
425 | #define STB0899_IF_AGC_REF (0x7f << 0) | |
426 | #define STB0899_OFFST_IF_AGC_REF 0 | |
427 | #define STB0899_WIDTH_IF_AGC_REF 7 | |
428 | ||
429 | #define STB0899_OFF0_BB_AGC_CNTRL 0xf324 | |
430 | #define STB0899_BASE_BB_AGC_CNTRL 0x00000000 | |
431 | #define STB0899_BB_GAIN_INIT (0x3fff << 12) | |
432 | #define STB0899_OFFST_BB_GAIN_INIT 12 | |
433 | #define STB0899_WIDTH_BB_GAIN_INIT 14 | |
434 | #define STB0899_BB_LOOP_GAIN (0x0f << 8) | |
435 | #define STB0899_OFFST_BB_LOOP_GAIN 8 | |
436 | #define STB0899_WIDTH_BB_LOOP_GAIN 4 | |
437 | #define STB0899_BB_LD_GAIN_INIT (0x01 << 7) | |
438 | #define STB0899_OFFST_BB_LD_GAIN_INIT 7 | |
439 | #define STB0899_WIDTH_BB_LD_GAIN_INIT 1 | |
440 | #define STB0899_BB_AGC_REF (0x7f << 0) | |
441 | #define STB0899_OFFST_BB_AGC_REF 0 | |
442 | #define STB0899_WIDTH_BB_AGC_REF 7 | |
443 | ||
444 | #define STB0899_OFF0_CRL_CNTRL 0xf328 | |
445 | #define STB0899_BASE_CRL_CNTRL 0x00000000 | |
446 | #define STB0899_CRL_LOCK_CLEAR (0x01 << 5) | |
447 | #define STB0899_OFFST_CRL_LOCK_CLEAR 5 | |
448 | #define STB0899_WIDTH_CRL_LOCK_CLEAR 1 | |
449 | #define STB0899_CRL_SWPR_CLEAR (0x01 << 4) | |
450 | #define STB0899_OFFST_CRL_SWPR_CLEAR 4 | |
451 | #define STB0899_WIDTH_CRL_SWPR_CLEAR 1 | |
452 | #define STB0899_CRL_SWP_ENA (0x01 << 3) | |
453 | #define STB0899_OFFST_CRL_SWP_ENA 3 | |
454 | #define STB0899_WIDTH_CRL_SWP_ENA 1 | |
455 | #define STB0899_CRL_DET_SEL (0x01 << 2) | |
456 | #define STB0899_OFFST_CRL_DET_SEL 2 | |
457 | #define STB0899_WIDTH_CRL_DET_SEL 1 | |
458 | #define STB0899_CRL_SENSE (0x01 << 1) | |
459 | #define STB0899_OFFST_CRL_SENSE 1 | |
460 | #define STB0899_WIDTH_CRL_SENSE 1 | |
461 | #define STB0899_CRL_PHSERR_CLEAR (0x01 << 0) | |
462 | #define STB0899_OFFST_CRL_PHSERR_CLEAR 0 | |
463 | #define STB0899_WIDTH_CRL_PHSERR_CLEAR 1 | |
464 | ||
465 | #define STB0899_OFF0_CRL_PHS_INIT 0xf32c | |
466 | #define STB0899_BASE_CRL_PHS_INIT 0x00000000 | |
467 | #define STB0899_CRL_PHS_INIT_31 (0x1 << 30) | |
468 | #define STB0899_OFFST_CRL_PHS_INIT_31 30 | |
469 | #define STB0899_WIDTH_CRL_PHS_INIT_31 1 | |
470 | #define STB0899_CRL_LD_INIT_PHASE (0x1 << 24) | |
471 | #define STB0899_OFFST_CRL_LD_INIT_PHASE 24 | |
472 | #define STB0899_WIDTH_CRL_LD_INIT_PHASE 1 | |
473 | #define STB0899_CRL_INIT_PHASE (0xffffff << 0) | |
474 | #define STB0899_OFFST_CRL_INIT_PHASE 0 | |
475 | #define STB0899_WIDTH_CRL_INIT_PHASE 24 | |
476 | ||
477 | #define STB0899_OFF0_CRL_FREQ_INIT 0xf330 | |
478 | #define STB0899_BASE_CRL_FREQ_INIT 0x00000000 | |
479 | #define STB0899_CRL_FREQ_INIT_31 (0x1 << 30) | |
480 | #define STB0899_OFFST_CRL_FREQ_INIT_31 30 | |
481 | #define STB0899_WIDTH_CRL_FREQ_INIT_31 1 | |
482 | #define STB0899_CRL_LD_FREQ_INIT (0x1 << 24) | |
483 | #define STB0899_OFFST_CRL_LD_FREQ_INIT 24 | |
484 | #define STB0899_WIDTH_CRL_LD_FREQ_INIT 1 | |
485 | #define STB0899_CRL_FREQ_INIT (0xffffff << 0) | |
486 | #define STB0899_OFFST_CRL_FREQ_INIT 0 | |
487 | #define STB0899_WIDTH_CRL_FREQ_INIT 24 | |
488 | ||
489 | #define STB0899_OFF0_CRL_LOOP_GAIN 0xf334 | |
490 | #define STB0899_BASE_CRL_LOOP_GAIN 0x00000000 | |
491 | #define STB0899_KCRL2_RSHFT (0xf << 16) | |
492 | #define STB0899_OFFST_KCRL2_RSHFT 16 | |
493 | #define STB0899_WIDTH_KCRL2_RSHFT 4 | |
494 | #define STB0899_KCRL1 (0xf << 12) | |
495 | #define STB0899_OFFST_KCRL1 12 | |
496 | #define STB0899_WIDTH_KCRL1 4 | |
497 | #define STB0899_KCRL1_RSHFT (0xf << 8) | |
498 | #define STB0899_OFFST_KCRL1_RSHFT 8 | |
499 | #define STB0899_WIDTH_KCRL1_RSHFT 4 | |
500 | #define STB0899_KCRL0 (0xf << 4) | |
501 | #define STB0899_OFFST_KCRL0 4 | |
502 | #define STB0899_WIDTH_KCRL0 4 | |
503 | #define STB0899_KCRL0_RSHFT (0xf << 0) | |
504 | #define STB0899_OFFST_KCRL0_RSHFT 0 | |
505 | #define STB0899_WIDTH_KCRL0_RSHFT 4 | |
506 | ||
507 | #define STB0899_OFF0_CRL_NOM_FREQ 0xf338 | |
508 | #define STB0899_BASE_CRL_NOM_FREQ 0x00000000 | |
509 | #define STB0899_CRL_NOM_FREQ (0x3fffffff << 0) | |
510 | #define STB0899_OFFST_CRL_NOM_FREQ 0 | |
511 | #define STB0899_WIDTH_CRL_NOM_FREQ 30 | |
512 | ||
513 | #define STB0899_OFF0_CRL_SWP_RATE 0xf33c | |
514 | #define STB0899_BASE_CRL_SWP_RATE 0x00000000 | |
515 | #define STB0899_CRL_SWP_RATE (0x3fffffff << 0) | |
516 | #define STB0899_OFFST_CRL_SWP_RATE 0 | |
517 | #define STB0899_WIDTH_CRL_SWP_RATE 30 | |
518 | ||
519 | #define STB0899_OFF0_CRL_MAX_SWP 0xf340 | |
520 | #define STB0899_BASE_CRL_MAX_SWP 0x00000000 | |
521 | #define STB0899_CRL_MAX_SWP (0x3fffffff << 0) | |
522 | #define STB0899_OFFST_CRL_MAX_SWP 0 | |
523 | #define STB0899_WIDTH_CRL_MAX_SWP 30 | |
524 | ||
525 | #define STB0899_OFF0_CRL_LK_CNTRL 0xf344 | |
526 | #define STB0899_BASE_CRL_LK_CNTRL 0x00000000 | |
527 | ||
528 | #define STB0899_OFF0_DECIM_CNTRL 0xf348 | |
529 | #define STB0899_BASE_DECIM_CNTRL 0x00000000 | |
530 | #define STB0899_BAND_LIMIT_B (0x01 << 5) | |
531 | #define STB0899_OFFST_BAND_LIMIT_B 5 | |
532 | #define STB0899_WIDTH_BAND_LIMIT_B 1 | |
533 | #define STB0899_WIN_SEL (0x03 << 3) | |
534 | #define STB0899_OFFST_WIN_SEL 3 | |
535 | #define STB0899_WIDTH_WIN_SEL 2 | |
536 | #define STB0899_DECIM_RATE (0x07 << 0) | |
537 | #define STB0899_OFFST_DECIM_RATE 0 | |
538 | #define STB0899_WIDTH_DECIM_RATE 3 | |
539 | ||
540 | #define STB0899_OFF0_BTR_CNTRL 0xf34c | |
541 | #define STB0899_BASE_BTR_CNTRL 0x00000000 | |
542 | #define STB0899_BTR_FREQ_CORR (0x7ff << 4) | |
543 | #define STB0899_OFFST_BTR_FREQ_CORR 4 | |
544 | #define STB0899_WIDTH_BTR_FREQ_CORR 11 | |
545 | #define STB0899_BTR_CLR_LOCK (0x01 << 3) | |
546 | #define STB0899_OFFST_BTR_CLR_LOCK 3 | |
547 | #define STB0899_WIDTH_BTR_CLR_LOCK 1 | |
548 | #define STB0899_BTR_SENSE (0x01 << 2) | |
549 | #define STB0899_OFFST_BTR_SENSE 2 | |
550 | #define STB0899_WIDTH_BTR_SENSE 1 | |
551 | #define STB0899_BTR_ERR_ENA (0x01 << 1) | |
552 | #define STB0899_OFFST_BTR_ERR_ENA 1 | |
553 | #define STB0899_WIDTH_BTR_ERR_ENA 1 | |
554 | #define STB0899_INTRP_PHS_SENSE (0x01 << 0) | |
555 | #define STB0899_OFFST_INTRP_PHS_SENSE 0 | |
556 | #define STB0899_WIDTH_INTRP_PHS_SENSE 1 | |
557 | ||
558 | #define STB0899_OFF0_BTR_LOOP_GAIN 0xf350 | |
559 | #define STB0899_BASE_BTR_LOOP_GAIN 0x00000000 | |
560 | #define STB0899_KBTR2_RSHFT (0x0f << 16) | |
561 | #define STB0899_OFFST_KBTR2_RSHFT 16 | |
562 | #define STB0899_WIDTH_KBTR2_RSHFT 4 | |
563 | #define STB0899_KBTR1 (0x0f << 12) | |
564 | #define STB0899_OFFST_KBTR1 12 | |
565 | #define STB0899_WIDTH_KBTR1 4 | |
566 | #define STB0899_KBTR1_RSHFT (0x0f << 8) | |
567 | #define STB0899_OFFST_KBTR1_RSHFT 8 | |
568 | #define STB0899_WIDTH_KBTR1_RSHFT 4 | |
569 | #define STB0899_KBTR0 (0x0f << 4) | |
570 | #define STB0899_OFFST_KBTR0 4 | |
571 | #define STB0899_WIDTH_KBTR0 4 | |
572 | #define STB0899_KBTR0_RSHFT (0x0f << 0) | |
573 | #define STB0899_OFFST_KBTR0_RSHFT 0 | |
574 | #define STB0899_WIDTH_KBTR0_RSHFT 4 | |
575 | ||
576 | #define STB0899_OFF0_BTR_PHS_INIT 0xf354 | |
577 | #define STB0899_BASE_BTR_PHS_INIT 0x00000000 | |
578 | #define STB0899_BTR_LD_PHASE_INIT (0x01 << 28) | |
579 | #define STB0899_OFFST_BTR_LD_PHASE_INIT 28 | |
580 | #define STB0899_WIDTH_BTR_LD_PHASE_INIT 1 | |
581 | #define STB0899_BTR_INIT_PHASE (0xfffffff << 0) | |
582 | #define STB0899_OFFST_BTR_INIT_PHASE 0 | |
583 | #define STB0899_WIDTH_BTR_INIT_PHASE 28 | |
584 | ||
585 | #define STB0899_OFF0_BTR_FREQ_INIT 0xf358 | |
586 | #define STB0899_BASE_BTR_FREQ_INIT 0x00000000 | |
587 | #define STB0899_BTR_LD_FREQ_INIT (1 << 28) | |
588 | #define STB0899_OFFST_BTR_LD_FREQ_INIT 28 | |
589 | #define STB0899_WIDTH_BTR_LD_FREQ_INIT 1 | |
590 | #define STB0899_BTR_FREQ_INIT (0xfffffff << 0) | |
591 | #define STB0899_OFFST_BTR_FREQ_INIT 0 | |
592 | #define STB0899_WIDTH_BTR_FREQ_INIT 28 | |
593 | ||
594 | #define STB0899_OFF0_BTR_NOM_FREQ 0xf35c | |
595 | #define STB0899_BASE_BTR_NOM_FREQ 0x00000000 | |
596 | #define STB0899_BTR_NOM_FREQ (0xfffffff << 0) | |
597 | #define STB0899_OFFST_BTR_NOM_FREQ 0 | |
598 | #define STB0899_WIDTH_BTR_NOM_FREQ 28 | |
599 | ||
600 | #define STB0899_OFF0_BTR_LK_CNTRL 0xf360 | |
601 | #define STB0899_BASE_BTR_LK_CNTRL 0x00000000 | |
602 | #define STB0899_BTR_MIN_ENERGY (0x0f << 24) | |
603 | #define STB0899_OFFST_BTR_MIN_ENERGY 24 | |
604 | #define STB0899_WIDTH_BTR_MIN_ENERGY 4 | |
605 | #define STB0899_BTR_LOCK_TH_LO (0xff << 16) | |
606 | #define STB0899_OFFST_BTR_LOCK_TH_LO 16 | |
607 | #define STB0899_WIDTH_BTR_LOCK_TH_LO 8 | |
608 | #define STB0899_BTR_LOCK_TH_HI (0xff << 8) | |
609 | #define STB0899_OFFST_BTR_LOCK_TH_HI 8 | |
610 | #define STB0899_WIDTH_BTR_LOCK_TH_HI 8 | |
611 | #define STB0899_BTR_LOCK_GAIN (0x03 << 6) | |
612 | #define STB0899_OFFST_BTR_LOCK_GAIN 6 | |
613 | #define STB0899_WIDTH_BTR_LOCK_GAIN 2 | |
614 | #define STB0899_BTR_LOCK_LEAK (0x3f << 0) | |
615 | #define STB0899_OFFST_BTR_LOCK_LEAK 0 | |
616 | #define STB0899_WIDTH_BTR_LOCK_LEAK 6 | |
617 | ||
618 | #define STB0899_OFF0_DECN_CNTRL 0xf364 | |
619 | #define STB0899_BASE_DECN_CNTRL 0x00000000 | |
620 | ||
621 | #define STB0899_OFF0_TP_CNTRL 0xf368 | |
622 | #define STB0899_BASE_TP_CNTRL 0x00000000 | |
623 | ||
624 | #define STB0899_OFF0_TP_BUF_STATUS 0xf36c | |
625 | #define STB0899_BASE_TP_BUF_STATUS 0x00000000 | |
626 | #define STB0899_TP_BUFFER_FULL (1 << 0) | |
627 | ||
628 | #define STB0899_OFF0_DC_ESTIM 0xf37c | |
629 | #define STB0899_BASE_DC_ESTIM 0x0000 | |
630 | #define STB0899_I_DC_ESTIMATE (0xff << 8) | |
631 | #define STB0899_OFFST_I_DC_ESTIMATE 8 | |
632 | #define STB0899_WIDTH_I_DC_ESTIMATE 8 | |
633 | #define STB0899_Q_DC_ESTIMATE (0xff << 0) | |
634 | #define STB0899_OFFST_Q_DC_ESTIMATE 0 | |
635 | #define STB0899_WIDTH_Q_DC_ESTIMATE 8 | |
636 | ||
637 | #define STB0899_OFF0_FLL_CNTRL 0xf310 | |
638 | #define STB0899_BASE_FLL_CNTRL 0x00000020 | |
639 | #define STB0899_CRL_FLL_ACC (0x01 << 4) | |
640 | #define STB0899_OFFST_CRL_FLL_ACC 4 | |
641 | #define STB0899_WIDTH_CRL_FLL_ACC 1 | |
642 | #define STB0899_FLL_AVG_PERIOD (0x0f << 0) | |
643 | #define STB0899_OFFST_FLL_AVG_PERIOD 0 | |
644 | #define STB0899_WIDTH_FLL_AVG_PERIOD 4 | |
645 | ||
646 | #define STB0899_OFF0_FLL_FREQ_WD 0xf314 | |
647 | #define STB0899_BASE_FLL_FREQ_WD 0x00000020 | |
648 | #define STB0899_FLL_FREQ_WD (0xffffffff << 0) | |
649 | #define STB0899_OFFST_FLL_FREQ_WD 0 | |
650 | #define STB0899_WIDTH_FLL_FREQ_WD 32 | |
651 | ||
652 | #define STB0899_OFF0_ANTI_ALIAS_SEL 0xf358 | |
653 | #define STB0899_BASE_ANTI_ALIAS_SEL 0x00000020 | |
654 | #define STB0899_ANTI_ALIAS_SELB (0x03 << 0) | |
655 | #define STB0899_OFFST_ANTI_ALIAS_SELB 0 | |
656 | #define STB0899_WIDTH_ANTI_ALIAS_SELB 2 | |
657 | ||
658 | #define STB0899_OFF0_RRC_ALPHA 0xf35c | |
659 | #define STB0899_BASE_RRC_ALPHA 0x00000020 | |
660 | #define STB0899_RRC_ALPHA (0x03 << 0) | |
661 | #define STB0899_OFFST_RRC_ALPHA 0 | |
662 | #define STB0899_WIDTH_RRC_ALPHA 2 | |
663 | ||
664 | #define STB0899_OFF0_DC_ADAPT_LSHFT 0xf360 | |
665 | #define STB0899_BASE_DC_ADAPT_LSHFT 0x00000020 | |
666 | #define STB0899_DC_ADAPT_LSHFT (0x077 << 0) | |
667 | #define STB0899_OFFST_DC_ADAPT_LSHFT 0 | |
668 | #define STB0899_WIDTH_DC_ADAPT_LSHFT 3 | |
669 | ||
670 | #define STB0899_OFF0_IMB_OFFSET 0xf364 | |
671 | #define STB0899_BASE_IMB_OFFSET 0x00000020 | |
672 | #define STB0899_PHS_IMB_COMP (0xff << 8) | |
673 | #define STB0899_OFFST_PHS_IMB_COMP 8 | |
674 | #define STB0899_WIDTH_PHS_IMB_COMP 8 | |
675 | #define STB0899_AMPL_IMB_COMP (0xff << 0) | |
676 | #define STB0899_OFFST_AMPL_IMB_COMP 0 | |
677 | #define STB0899_WIDTH_AMPL_IMB_COMP 8 | |
678 | ||
679 | #define STB0899_OFF0_IMB_ESTIMATE 0xf368 | |
680 | #define STB0899_BASE_IMB_ESTIMATE 0x00000020 | |
681 | #define STB0899_PHS_IMB_ESTIMATE (0xff << 8) | |
682 | #define STB0899_OFFST_PHS_IMB_ESTIMATE 8 | |
683 | #define STB0899_WIDTH_PHS_IMB_ESTIMATE 8 | |
684 | #define STB0899_AMPL_IMB_ESTIMATE (0xff << 0) | |
685 | #define STB0899_OFFST_AMPL_IMB_ESTIMATE 0 | |
686 | #define STB0899_WIDTH_AMPL_IMB_ESTIMATE 8 | |
687 | ||
688 | #define STB0899_OFF0_IMB_CNTRL 0xf36c | |
689 | #define STB0899_BASE_IMB_CNTRL 0x00000020 | |
690 | #define STB0899_PHS_ADAPT_LSHFT (0x07 << 4) | |
691 | #define STB0899_OFFST_PHS_ADAPT_LSHFT 4 | |
692 | #define STB0899_WIDTH_PHS_ADAPT_LSHFT 3 | |
693 | #define STB0899_AMPL_ADAPT_LSHFT (0x07 << 1) | |
694 | #define STB0899_OFFST_AMPL_ADAPT_LSHFT 1 | |
695 | #define STB0899_WIDTH_AMPL_ADAPT_LSHFT 3 | |
696 | #define STB0899_IMB_COMP (0x01 << 0) | |
697 | #define STB0899_OFFST_IMB_COMP 0 | |
698 | #define STB0899_WIDTH_IMB_COMP 1 | |
699 | ||
700 | #define STB0899_OFF0_IF_AGC_CNTRL2 0xf374 | |
701 | #define STB0899_BASE_IF_AGC_CNTRL2 0x00000020 | |
702 | #define STB0899_IF_AGC_LOCK_TH (0xff << 11) | |
703 | #define STB0899_OFFST_IF_AGC_LOCK_TH 11 | |
704 | #define STB0899_WIDTH_IF_AGC_LOCK_TH 8 | |
705 | #define STB0899_IF_AGC_SD_DIV (0xff << 3) | |
706 | #define STB0899_OFFST_IF_AGC_SD_DIV 3 | |
707 | #define STB0899_WIDTH_IF_AGC_SD_DIV 8 | |
708 | #define STB0899_IF_AGC_DUMP_PER (0x07 << 0) | |
709 | #define STB0899_OFFST_IF_AGC_DUMP_PER 0 | |
710 | #define STB0899_WIDTH_IF_AGC_DUMP_PER 3 | |
711 | ||
712 | #define STB0899_OFF0_DMD_CNTRL2 0xf378 | |
713 | #define STB0899_BASE_DMD_CNTRL2 0x00000020 | |
714 | #define STB0899_SPECTRUM_INVERT (0x01 << 2) | |
715 | #define STB0899_OFFST_SPECTRUM_INVERT 2 | |
716 | #define STB0899_WIDTH_SPECTRUM_INVERT 1 | |
717 | #define STB0899_AGC_MODE (0x01 << 1) | |
718 | #define STB0899_OFFST_AGC_MODE 1 | |
719 | #define STB0899_WIDTH_AGC_MODE 1 | |
720 | #define STB0899_CRL_FREQ_ADJ (0x01 << 0) | |
721 | #define STB0899_OFFST_CRL_FREQ_ADJ 0 | |
722 | #define STB0899_WIDTH_CRL_FREQ_ADJ 1 | |
723 | ||
724 | #define STB0899_OFF0_TP_BUFFER 0xf300 | |
725 | #define STB0899_BASE_TP_BUFFER 0x00000040 | |
726 | #define STB0899_TP_BUFFER_IN (0xffff << 0) | |
727 | #define STB0899_OFFST_TP_BUFFER_IN 0 | |
728 | #define STB0899_WIDTH_TP_BUFFER_IN 16 | |
729 | ||
730 | #define STB0899_OFF0_TP_BUFFER1 0xf304 | |
731 | #define STB0899_BASE_TP_BUFFER1 0x00000040 | |
732 | #define STB0899_OFF0_TP_BUFFER2 0xf308 | |
733 | #define STB0899_BASE_TP_BUFFER2 0x00000040 | |
734 | #define STB0899_OFF0_TP_BUFFER3 0xf30c | |
735 | #define STB0899_BASE_TP_BUFFER3 0x00000040 | |
736 | #define STB0899_OFF0_TP_BUFFER4 0xf310 | |
737 | #define STB0899_BASE_TP_BUFFER4 0x00000040 | |
738 | #define STB0899_OFF0_TP_BUFFER5 0xf314 | |
739 | #define STB0899_BASE_TP_BUFFER5 0x00000040 | |
740 | #define STB0899_OFF0_TP_BUFFER6 0xf318 | |
741 | #define STB0899_BASE_TP_BUFFER6 0x00000040 | |
742 | #define STB0899_OFF0_TP_BUFFER7 0xf31c | |
743 | #define STB0899_BASE_TP_BUFFER7 0x00000040 | |
744 | #define STB0899_OFF0_TP_BUFFER8 0xf320 | |
745 | #define STB0899_BASE_TP_BUFFER8 0x00000040 | |
746 | #define STB0899_OFF0_TP_BUFFER9 0xf324 | |
747 | #define STB0899_BASE_TP_BUFFER9 0x00000040 | |
748 | #define STB0899_OFF0_TP_BUFFER10 0xf328 | |
749 | #define STB0899_BASE_TP_BUFFER10 0x00000040 | |
750 | #define STB0899_OFF0_TP_BUFFER11 0xf32c | |
751 | #define STB0899_BASE_TP_BUFFER11 0x00000040 | |
752 | #define STB0899_OFF0_TP_BUFFER12 0xf330 | |
753 | #define STB0899_BASE_TP_BUFFER12 0x00000040 | |
754 | #define STB0899_OFF0_TP_BUFFER13 0xf334 | |
755 | #define STB0899_BASE_TP_BUFFER13 0x00000040 | |
756 | #define STB0899_OFF0_TP_BUFFER14 0xf338 | |
757 | #define STB0899_BASE_TP_BUFFER14 0x00000040 | |
758 | #define STB0899_OFF0_TP_BUFFER15 0xf33c | |
759 | #define STB0899_BASE_TP_BUFFER15 0x00000040 | |
760 | #define STB0899_OFF0_TP_BUFFER16 0xf340 | |
761 | #define STB0899_BASE_TP_BUFFER16 0x00000040 | |
762 | #define STB0899_OFF0_TP_BUFFER17 0xf344 | |
763 | #define STB0899_BASE_TP_BUFFER17 0x00000040 | |
764 | #define STB0899_OFF0_TP_BUFFER18 0xf348 | |
765 | #define STB0899_BASE_TP_BUFFER18 0x00000040 | |
766 | #define STB0899_OFF0_TP_BUFFER19 0xf34c | |
767 | #define STB0899_BASE_TP_BUFFER19 0x00000040 | |
768 | #define STB0899_OFF0_TP_BUFFER20 0xf350 | |
769 | #define STB0899_BASE_TP_BUFFER20 0x00000040 | |
770 | #define STB0899_OFF0_TP_BUFFER21 0xf354 | |
771 | #define STB0899_BASE_TP_BUFFER21 0x00000040 | |
772 | #define STB0899_OFF0_TP_BUFFER22 0xf358 | |
773 | #define STB0899_BASE_TP_BUFFER22 0x00000040 | |
774 | #define STB0899_OFF0_TP_BUFFER23 0xf35c | |
775 | #define STB0899_BASE_TP_BUFFER23 0x00000040 | |
776 | #define STB0899_OFF0_TP_BUFFER24 0xf360 | |
777 | #define STB0899_BASE_TP_BUFFER24 0x00000040 | |
778 | #define STB0899_OFF0_TP_BUFFER25 0xf364 | |
779 | #define STB0899_BASE_TP_BUFFER25 0x00000040 | |
780 | #define STB0899_OFF0_TP_BUFFER26 0xf368 | |
781 | #define STB0899_BASE_TP_BUFFER26 0x00000040 | |
782 | #define STB0899_OFF0_TP_BUFFER27 0xf36c | |
783 | #define STB0899_BASE_TP_BUFFER27 0x00000040 | |
784 | #define STB0899_OFF0_TP_BUFFER28 0xf370 | |
785 | #define STB0899_BASE_TP_BUFFER28 0x00000040 | |
786 | #define STB0899_OFF0_TP_BUFFER29 0xf374 | |
787 | #define STB0899_BASE_TP_BUFFER29 0x00000040 | |
788 | #define STB0899_OFF0_TP_BUFFER30 0xf378 | |
789 | #define STB0899_BASE_TP_BUFFER30 0x00000040 | |
790 | #define STB0899_OFF0_TP_BUFFER31 0xf37c | |
791 | #define STB0899_BASE_TP_BUFFER31 0x00000040 | |
792 | #define STB0899_OFF0_TP_BUFFER32 0xf300 | |
793 | #define STB0899_BASE_TP_BUFFER32 0x00000060 | |
794 | #define STB0899_OFF0_TP_BUFFER33 0xf304 | |
795 | #define STB0899_BASE_TP_BUFFER33 0x00000060 | |
796 | #define STB0899_OFF0_TP_BUFFER34 0xf308 | |
797 | #define STB0899_BASE_TP_BUFFER34 0x00000060 | |
798 | #define STB0899_OFF0_TP_BUFFER35 0xf30c | |
799 | #define STB0899_BASE_TP_BUFFER35 0x00000060 | |
800 | #define STB0899_OFF0_TP_BUFFER36 0xf310 | |
801 | #define STB0899_BASE_TP_BUFFER36 0x00000060 | |
802 | #define STB0899_OFF0_TP_BUFFER37 0xf314 | |
803 | #define STB0899_BASE_TP_BUFFER37 0x00000060 | |
804 | #define STB0899_OFF0_TP_BUFFER38 0xf318 | |
805 | #define STB0899_BASE_TP_BUFFER38 0x00000060 | |
806 | #define STB0899_OFF0_TP_BUFFER39 0xf31c | |
807 | #define STB0899_BASE_TP_BUFFER39 0x00000060 | |
808 | #define STB0899_OFF0_TP_BUFFER40 0xf320 | |
809 | #define STB0899_BASE_TP_BUFFER40 0x00000060 | |
810 | #define STB0899_OFF0_TP_BUFFER41 0xf324 | |
811 | #define STB0899_BASE_TP_BUFFER41 0x00000060 | |
812 | #define STB0899_OFF0_TP_BUFFER42 0xf328 | |
813 | #define STB0899_BASE_TP_BUFFER42 0x00000060 | |
814 | #define STB0899_OFF0_TP_BUFFER43 0xf32c | |
815 | #define STB0899_BASE_TP_BUFFER43 0x00000060 | |
816 | #define STB0899_OFF0_TP_BUFFER44 0xf330 | |
817 | #define STB0899_BASE_TP_BUFFER44 0x00000060 | |
818 | #define STB0899_OFF0_TP_BUFFER45 0xf334 | |
819 | #define STB0899_BASE_TP_BUFFER45 0x00000060 | |
820 | #define STB0899_OFF0_TP_BUFFER46 0xf338 | |
821 | #define STB0899_BASE_TP_BUFFER46 0x00000060 | |
822 | #define STB0899_OFF0_TP_BUFFER47 0xf33c | |
823 | #define STB0899_BASE_TP_BUFFER47 0x00000060 | |
824 | #define STB0899_OFF0_TP_BUFFER48 0xf340 | |
825 | #define STB0899_BASE_TP_BUFFER48 0x00000060 | |
826 | #define STB0899_OFF0_TP_BUFFER49 0xf344 | |
827 | #define STB0899_BASE_TP_BUFFER49 0x00000060 | |
828 | #define STB0899_OFF0_TP_BUFFER50 0xf348 | |
829 | #define STB0899_BASE_TP_BUFFER50 0x00000060 | |
830 | #define STB0899_OFF0_TP_BUFFER51 0xf34c | |
831 | #define STB0899_BASE_TP_BUFFER51 0x00000060 | |
832 | #define STB0899_OFF0_TP_BUFFER52 0xf350 | |
833 | #define STB0899_BASE_TP_BUFFER52 0x00000060 | |
834 | #define STB0899_OFF0_TP_BUFFER53 0xf354 | |
835 | #define STB0899_BASE_TP_BUFFER53 0x00000060 | |
836 | #define STB0899_OFF0_TP_BUFFER54 0xf358 | |
837 | #define STB0899_BASE_TP_BUFFER54 0x00000060 | |
838 | #define STB0899_OFF0_TP_BUFFER55 0xf35c | |
839 | #define STB0899_BASE_TP_BUFFER55 0x00000060 | |
840 | #define STB0899_OFF0_TP_BUFFER56 0xf360 | |
841 | #define STB0899_BASE_TP_BUFFER56 0x00000060 | |
842 | #define STB0899_OFF0_TP_BUFFER57 0xf364 | |
843 | #define STB0899_BASE_TP_BUFFER57 0x00000060 | |
844 | #define STB0899_OFF0_TP_BUFFER58 0xf368 | |
845 | #define STB0899_BASE_TP_BUFFER58 0x00000060 | |
846 | #define STB0899_OFF0_TP_BUFFER59 0xf36c | |
847 | #define STB0899_BASE_TP_BUFFER59 0x00000060 | |
848 | #define STB0899_OFF0_TP_BUFFER60 0xf370 | |
849 | #define STB0899_BASE_TP_BUFFER60 0x00000060 | |
850 | #define STB0899_OFF0_TP_BUFFER61 0xf374 | |
851 | #define STB0899_BASE_TP_BUFFER61 0x00000060 | |
852 | #define STB0899_OFF0_TP_BUFFER62 0xf378 | |
853 | #define STB0899_BASE_TP_BUFFER62 0x00000060 | |
854 | #define STB0899_OFF0_TP_BUFFER63 0xf37c | |
855 | #define STB0899_BASE_TP_BUFFER63 0x00000060 | |
856 | ||
857 | #define STB0899_OFF0_RESET_CNTRL 0xf300 | |
858 | #define STB0899_BASE_RESET_CNTRL 0x00000400 | |
859 | #define STB0899_DVBS2_RESET (0x01 << 0) | |
860 | #define STB0899_OFFST_DVBS2_RESET 0 | |
861 | #define STB0899_WIDTH_DVBS2_RESET 1 | |
862 | ||
863 | #define STB0899_OFF0_ACM_ENABLE 0xf304 | |
864 | #define STB0899_BASE_ACM_ENABLE 0x00000400 | |
865 | #define STB0899_ACM_ENABLE 1 | |
866 | ||
867 | #define STB0899_OFF0_DESCR_CNTRL 0xf30c | |
868 | #define STB0899_BASE_DESCR_CNTRL 0x00000400 | |
869 | #define STB0899_OFFST_DESCR_CNTRL 0 | |
870 | #define STB0899_WIDTH_DESCR_CNTRL 16 | |
871 | ||
872 | #define STB0899_OFF0_UWP_CNTRL1 0xf320 | |
873 | #define STB0899_BASE_UWP_CNTRL1 0x00000400 | |
874 | #define STB0899_UWP_TH_SOF (0x7fff << 11) | |
875 | #define STB0899_OFFST_UWP_TH_SOF 11 | |
876 | #define STB0899_WIDTH_UWP_TH_SOF 15 | |
877 | #define STB0899_UWP_ESN0_QUANT (0xff << 3) | |
878 | #define STB0899_OFFST_UWP_ESN0_QUANT 3 | |
879 | #define STB0899_WIDTH_UWP_ESN0_QUANT 8 | |
880 | #define STB0899_UWP_ESN0_AVE (0x03 << 1) | |
881 | #define STB0899_OFFST_UWP_ESN0_AVE 1 | |
882 | #define STB0899_WIDTH_UWP_ESN0_AVE 2 | |
883 | #define STB0899_UWP_START (0x01 << 0) | |
884 | #define STB0899_OFFST_UWP_START 0 | |
885 | #define STB0899_WIDTH_UWP_START 1 | |
886 | ||
887 | #define STB0899_OFF0_UWP_CNTRL2 0xf324 | |
888 | #define STB0899_BASE_UWP_CNTRL2 0x00000400 | |
889 | #define STB0899_UWP_MISS_TH (0xff << 16) | |
890 | #define STB0899_OFFST_UWP_MISS_TH 16 | |
891 | #define STB0899_WIDTH_UWP_MISS_TH 8 | |
892 | #define STB0899_FE_FINE_TRK (0xff << 8) | |
893 | #define STB0899_OFFST_FE_FINE_TRK 8 | |
894 | #define STB0899_WIDTH_FE_FINE_TRK 8 | |
895 | #define STB0899_FE_COARSE_TRK (0xff << 0) | |
896 | #define STB0899_OFFST_FE_COARSE_TRK 0 | |
897 | #define STB0899_WIDTH_FE_COARSE_TRK 8 | |
898 | ||
899 | #define STB0899_OFF0_UWP_STAT1 0xf328 | |
900 | #define STB0899_BASE_UWP_STAT1 0x00000400 | |
901 | #define STB0899_UWP_STATE (0x03ff << 15) | |
902 | #define STB0899_OFFST_UWP_STATE 15 | |
903 | #define STB0899_WIDTH_UWP_STATE 10 | |
904 | #define STB0899_UW_MAX_PEAK (0x7fff << 0) | |
905 | #define STB0899_OFFST_UW_MAX_PEAK 0 | |
906 | #define STB0899_WIDTH_UW_MAX_PEAK 15 | |
907 | ||
908 | #define STB0899_OFF0_UWP_STAT2 0xf32c | |
909 | #define STB0899_BASE_UWP_STAT2 0x00000400 | |
910 | #define STB0899_ESNO_EST (0x07ffff << 7) | |
911 | #define STB0899_OFFST_ESN0_EST 7 | |
912 | #define STB0899_WIDTH_ESN0_EST 19 | |
913 | #define STB0899_UWP_DECODE_MOD (0x7f << 0) | |
914 | #define STB0899_OFFST_UWP_DECODE_MOD 0 | |
915 | #define STB0899_WIDTH_UWP_DECODE_MOD 7 | |
916 | ||
917 | #define STB0899_OFF0_DMD_CORE_ID 0xf334 | |
918 | #define STB0899_BASE_DMD_CORE_ID 0x00000400 | |
919 | #define STB0899_CORE_ID (0xffffffff << 0) | |
920 | #define STB0899_OFFST_CORE_ID 0 | |
921 | #define STB0899_WIDTH_CORE_ID 32 | |
922 | ||
923 | #define STB0899_OFF0_DMD_VERSION_ID 0xf33c | |
924 | #define STB0899_BASE_DMD_VERSION_ID 0x00000400 | |
925 | #define STB0899_VERSION_ID (0xff << 0) | |
926 | #define STB0899_OFFST_VERSION_ID 0 | |
927 | #define STB0899_WIDTH_VERSION_ID 8 | |
928 | ||
929 | #define STB0899_OFF0_DMD_STAT2 0xf340 | |
930 | #define STB0899_BASE_DMD_STAT2 0x00000400 | |
931 | #define STB0899_CSM_LOCK (0x01 << 1) | |
932 | #define STB0899_OFFST_CSM_LOCK 1 | |
933 | #define STB0899_WIDTH_CSM_LOCK 1 | |
934 | #define STB0899_UWP_LOCK (0x01 << 0) | |
935 | #define STB0899_OFFST_UWP_LOCK 0 | |
936 | #define STB0899_WIDTH_UWP_LOCK 1 | |
937 | ||
938 | #define STB0899_OFF0_FREQ_ADJ_SCALE 0xf344 | |
939 | #define STB0899_BASE_FREQ_ADJ_SCALE 0x00000400 | |
940 | #define STB0899_FREQ_ADJ_SCALE (0x0fff << 0) | |
941 | #define STB0899_OFFST_FREQ_ADJ_SCALE 0 | |
942 | #define STB0899_WIDTH_FREQ_ADJ_SCALE 12 | |
943 | ||
944 | #define STB0899_OFF0_UWP_CNTRL3 0xf34c | |
945 | #define STB0899_BASE_UWP_CNTRL3 0x00000400 | |
946 | #define STB0899_UWP_TH_TRACK (0x7fff << 15) | |
947 | #define STB0899_OFFST_UWP_TH_TRACK 15 | |
948 | #define STB0899_WIDTH_UWP_TH_TRACK 15 | |
949 | #define STB0899_UWP_TH_ACQ (0x7fff << 0) | |
950 | #define STB0899_OFFST_UWP_TH_ACQ 0 | |
951 | #define STB0899_WIDTH_UWP_TH_ACQ 15 | |
952 | ||
953 | #define STB0899_OFF0_SYM_CLK_SEL 0xf350 | |
954 | #define STB0899_BASE_SYM_CLK_SEL 0x00000400 | |
955 | #define STB0899_SYM_CLK_SEL (0x03 << 0) | |
956 | #define STB0899_OFFST_SYM_CLK_SEL 0 | |
957 | #define STB0899_WIDTH_SYM_CLK_SEL 2 | |
958 | ||
959 | #define STB0899_OFF0_SOF_SRCH_TO 0xf354 | |
960 | #define STB0899_BASE_SOF_SRCH_TO 0x00000400 | |
961 | #define STB0899_SOF_SEARCH_TIMEOUT (0x3fffff << 0) | |
962 | #define STB0899_OFFST_SOF_SEARCH_TIMEOUT 0 | |
963 | #define STB0899_WIDTH_SOF_SEARCH_TIMEOUT 22 | |
964 | ||
965 | #define STB0899_OFF0_ACQ_CNTRL1 0xf358 | |
966 | #define STB0899_BASE_ACQ_CNTRL1 0x00000400 | |
967 | #define STB0899_FE_FINE_ACQ (0xff << 8) | |
968 | #define STB0899_OFFST_FE_FINE_ACQ 8 | |
969 | #define STB0899_WIDTH_FE_FINE_ACQ 8 | |
970 | #define STB0899_FE_COARSE_ACQ (0xff << 0) | |
971 | #define STB0899_OFFST_FE_COARSE_ACQ 0 | |
972 | #define STB0899_WIDTH_FE_COARSE_ACQ 8 | |
973 | ||
974 | #define STB0899_OFF0_ACQ_CNTRL2 0xf35c | |
975 | #define STB0899_BASE_ACQ_CNTRL2 0x00000400 | |
976 | #define STB0899_ZIGZAG (0x01 << 25) | |
977 | #define STB0899_OFFST_ZIGZAG 25 | |
978 | #define STB0899_WIDTH_ZIGZAG 1 | |
979 | #define STB0899_NUM_STEPS (0xff << 17) | |
980 | #define STB0899_OFFST_NUM_STEPS 17 | |
981 | #define STB0899_WIDTH_NUM_STEPS 8 | |
982 | #define STB0899_FREQ_STEPSIZE (0x1ffff << 0) | |
983 | #define STB0899_OFFST_FREQ_STEPSIZE 0 | |
984 | #define STB0899_WIDTH_FREQ_STEPSIZE 17 | |
985 | ||
986 | #define STB0899_OFF0_ACQ_CNTRL3 0xf360 | |
987 | #define STB0899_BASE_ACQ_CNTRL3 0x00000400 | |
988 | #define STB0899_THRESHOLD_SCL (0x3f << 23) | |
989 | #define STB0899_OFFST_THRESHOLD_SCL 23 | |
990 | #define STB0899_WIDTH_THRESHOLD_SCL 6 | |
991 | #define STB0899_UWP_TH_SRCH (0x7fff << 8) | |
992 | #define STB0899_OFFST_UWP_TH_SRCH 8 | |
993 | #define STB0899_WIDTH_UWP_TH_SRCH 15 | |
994 | #define STB0899_AUTO_REACQUIRE (0x01 << 7) | |
995 | #define STB0899_OFFST_AUTO_REACQUIRE 7 | |
996 | #define STB0899_WIDTH_AUTO_REACQUIRE 1 | |
997 | #define STB0899_TRACK_LOCK_SEL (0x01 << 6) | |
998 | #define STB0899_OFFST_TRACK_LOCK_SEL 6 | |
999 | #define STB0899_WIDTH_TRACK_LOCK_SEL 1 | |
1000 | #define STB0899_ACQ_SEARCH_MODE (0x03 << 4) | |
1001 | #define STB0899_OFFST_ACQ_SEARCH_MODE 4 | |
1002 | #define STB0899_WIDTH_ACQ_SEARCH_MODE 2 | |
1003 | #define STB0899_CONFIRM_FRAMES (0x0f << 0) | |
1004 | #define STB0899_OFFST_CONFIRM_FRAMES 0 | |
1005 | #define STB0899_WIDTH_CONFIRM_FRAMES 4 | |
1006 | ||
1007 | #define STB0899_OFF0_FE_SETTLE 0xf364 | |
1008 | #define STB0899_BASE_FE_SETTLE 0x00000400 | |
1009 | #define STB0899_SETTLING_TIME (0x3fffff << 0) | |
1010 | #define STB0899_OFFST_SETTLING_TIME 0 | |
1011 | #define STB0899_WIDTH_SETTLING_TIME 22 | |
1012 | ||
1013 | #define STB0899_OFF0_AC_DWELL 0xf368 | |
1014 | #define STB0899_BASE_AC_DWELL 0x00000400 | |
1015 | #define STB0899_DWELL_TIME (0x3fffff << 0) | |
1016 | #define STB0899_OFFST_DWELL_TIME 0 | |
1017 | #define STB0899_WIDTH_DWELL_TIME 22 | |
1018 | ||
1019 | #define STB0899_OFF0_ACQUIRE_TRIG 0xf36c | |
1020 | #define STB0899_BASE_ACQUIRE_TRIG 0x00000400 | |
1021 | #define STB0899_ACQUIRE (0x01 << 0) | |
1022 | #define STB0899_OFFST_ACQUIRE 0 | |
1023 | #define STB0899_WIDTH_ACQUIRE 1 | |
1024 | ||
1025 | #define STB0899_OFF0_LOCK_LOST 0xf370 | |
1026 | #define STB0899_BASE_LOCK_LOST 0x00000400 | |
1027 | #define STB0899_LOCK_LOST (0x01 << 0) | |
1028 | #define STB0899_OFFST_LOCK_LOST 0 | |
1029 | #define STB0899_WIDTH_LOCK_LOST 1 | |
1030 | ||
1031 | #define STB0899_OFF0_ACQ_STAT1 0xf374 | |
1032 | #define STB0899_BASE_ACQ_STAT1 0x00000400 | |
1033 | #define STB0899_STEP_FREQ (0x1fffff << 11) | |
1034 | #define STB0899_OFFST_STEP_FREQ 11 | |
1035 | #define STB0899_WIDTH_STEP_FREQ 21 | |
1036 | #define STB0899_ACQ_STATE (0x07 << 8) | |
1037 | #define STB0899_OFFST_ACQ_STATE 8 | |
1038 | #define STB0899_WIDTH_ACQ_STATE 3 | |
1039 | #define STB0899_UW_DETECT_COUNT (0xff << 0) | |
1040 | #define STB0899_OFFST_UW_DETECT_COUNT 0 | |
1041 | #define STB0899_WIDTH_UW_DETECT_COUNT 8 | |
1042 | ||
1043 | #define STB0899_OFF0_ACQ_TIMEOUT 0xf378 | |
1044 | #define STB0899_BASE_ACQ_TIMEOUT 0x00000400 | |
1045 | #define STB0899_ACQ_TIMEOUT (0x3fffff << 0) | |
1046 | #define STB0899_OFFST_ACQ_TIMEOUT 0 | |
1047 | #define STB0899_WIDTH_ACQ_TIMEOUT 22 | |
1048 | ||
1049 | #define STB0899_OFF0_ACQ_TIME 0xf37c | |
1050 | #define STB0899_BASE_ACQ_TIME 0x00000400 | |
1051 | #define STB0899_ACQ_TIME_SYM (0xffffff << 0) | |
1052 | #define STB0899_OFFST_ACQ_TIME_SYM 0 | |
1053 | #define STB0899_WIDTH_ACQ_TIME_SYM 24 | |
1054 | ||
1055 | #define STB0899_OFF0_FINAL_AGC_CNTRL 0xf308 | |
1056 | #define STB0899_BASE_FINAL_AGC_CNTRL 0x00000440 | |
1057 | #define STB0899_FINAL_GAIN_INIT (0x3fff << 12) | |
1058 | #define STB0899_OFFST_FINAL_GAIN_INIT 12 | |
1059 | #define STB0899_WIDTH_FINAL_GAIN_INIT 14 | |
1060 | #define STB0899_FINAL_LOOP_GAIN (0x0f << 8) | |
1061 | #define STB0899_OFFST_FINAL_LOOP_GAIN 8 | |
1062 | #define STB0899_WIDTH_FINAL_LOOP_GAIN 4 | |
1063 | #define STB0899_FINAL_LD_GAIN_INIT (0x01 << 7) | |
1064 | #define STB0899_OFFST_FINAL_LD_GAIN_INIT 7 | |
1065 | #define STB0899_WIDTH_FINAL_LD_GAIN_INIT 1 | |
1066 | #define STB0899_FINAL_AGC_REF (0x7f << 0) | |
1067 | #define STB0899_OFFST_FINAL_AGC_REF 0 | |
1068 | #define STB0899_WIDTH_FINAL_AGC_REF 7 | |
1069 | ||
1070 | #define STB0899_OFF0_FINAL_AGC_GAIN 0xf30c | |
1071 | #define STB0899_BASE_FINAL_AGC_GAIN 0x00000440 | |
1072 | #define STB0899_FINAL_AGC_GAIN (0x3fff << 0) | |
1073 | #define STB0899_OFFST_FINAL_AGC_GAIN 0 | |
1074 | #define STB0899_WIDTH_FINAL_AGC_GAIN 14 | |
1075 | ||
1076 | #define STB0899_OFF0_EQUALIZER_INIT 0xf310 | |
1077 | #define STB0899_BASE_EQUALIZER_INIT 0x00000440 | |
1078 | #define STB0899_EQ_SRST (0x01 << 1) | |
1079 | #define STB0899_OFFST_EQ_SRST 1 | |
1080 | #define STB0899_WIDTH_EQ_SRST 1 | |
1081 | #define STB0899_EQ_INIT (0x01 << 0) | |
1082 | #define STB0899_OFFST_EQ_INIT 0 | |
1083 | #define STB0899_WIDTH_EQ_INIT 1 | |
1084 | ||
1085 | #define STB0899_OFF0_EQ_CNTRL 0xf314 | |
1086 | #define STB0899_BASE_EQ_CNTRL 0x00000440 | |
1087 | #define STB0899_EQ_ADAPT_MODE (0x01 << 18) | |
1088 | #define STB0899_OFFST_EQ_ADAPT_MODE 18 | |
1089 | #define STB0899_WIDTH_EQ_ADAPT_MODE 1 | |
1090 | #define STB0899_EQ_DELAY (0x0f << 14) | |
1091 | #define STB0899_OFFST_EQ_DELAY 14 | |
1092 | #define STB0899_WIDTH_EQ_DELAY 4 | |
1093 | #define STB0899_EQ_QUANT_LEVEL (0xff << 6) | |
1094 | #define STB0899_OFFST_EQ_QUANT_LEVEL 6 | |
1095 | #define STB0899_WIDTH_EQ_QUANT_LEVEL 8 | |
1096 | #define STB0899_EQ_DISABLE_UPDATE (0x01 << 5) | |
1097 | #define STB0899_OFFST_EQ_DISABLE_UPDATE 5 | |
1098 | #define STB0899_WIDTH_EQ_DISABLE_UPDATE 1 | |
1099 | #define STB0899_EQ_BYPASS (0x01 << 4) | |
1100 | #define STB0899_OFFST_EQ_BYPASS 4 | |
1101 | #define STB0899_WIDTH_EQ_BYPASS 1 | |
1102 | #define STB0899_EQ_SHIFT (0x0f << 0) | |
1103 | #define STB0899_OFFST_EQ_SHIFT 0 | |
1104 | #define STB0899_WIDTH_EQ_SHIFT 4 | |
1105 | ||
1106 | #define STB0899_OFF0_EQ_I_INIT_COEFF_0 0xf320 | |
1107 | #define STB0899_OFF1_EQ_I_INIT_COEFF_1 0xf324 | |
1108 | #define STB0899_OFF2_EQ_I_INIT_COEFF_2 0xf328 | |
1109 | #define STB0899_OFF3_EQ_I_INIT_COEFF_3 0xf32c | |
1110 | #define STB0899_OFF4_EQ_I_INIT_COEFF_4 0xf330 | |
1111 | #define STB0899_OFF5_EQ_I_INIT_COEFF_5 0xf334 | |
1112 | #define STB0899_OFF6_EQ_I_INIT_COEFF_6 0xf338 | |
1113 | #define STB0899_OFF7_EQ_I_INIT_COEFF_7 0xf33c | |
1114 | #define STB0899_OFF8_EQ_I_INIT_COEFF_8 0xf340 | |
1115 | #define STB0899_OFF9_EQ_I_INIT_COEFF_9 0xf344 | |
1116 | #define STB0899_OFFa_EQ_I_INIT_COEFF_10 0xf348 | |
1117 | #define STB0899_BASE_EQ_I_INIT_COEFF_N 0x00000440 | |
1118 | #define STB0899_EQ_I_INIT_COEFF_N (0x0fff << 0) | |
1119 | #define STB0899_OFFST_EQ_I_INIT_COEFF_N 0 | |
1120 | #define STB0899_WIDTH_EQ_I_INIT_COEFF_N 12 | |
1121 | ||
1122 | #define STB0899_OFF0_EQ_Q_INIT_COEFF_0 0xf350 | |
1123 | #define STB0899_OFF1_EQ_Q_INIT_COEFF_1 0xf354 | |
1124 | #define STB0899_OFF2_EQ_Q_INIT_COEFF_2 0xf358 | |
1125 | #define STB0899_OFF3_EQ_Q_INIT_COEFF_3 0xf35c | |
1126 | #define STB0899_OFF4_EQ_Q_INIT_COEFF_4 0xf360 | |
1127 | #define STB0899_OFF5_EQ_Q_INIT_COEFF_5 0xf364 | |
1128 | #define STB0899_OFF6_EQ_Q_INIT_COEFF_6 0xf368 | |
1129 | #define STB0899_OFF7_EQ_Q_INIT_COEFF_7 0xf36c | |
1130 | #define STB0899_OFF8_EQ_Q_INIT_COEFF_8 0xf370 | |
1131 | #define STB0899_OFF9_EQ_Q_INIT_COEFF_9 0xf374 | |
1132 | #define STB0899_OFFa_EQ_Q_INIT_COEFF_10 0xf378 | |
1133 | #define STB0899_BASE_EQ_Q_INIT_COEFF_N 0x00000440 | |
1134 | #define STB0899_EQ_Q_INIT_COEFF_N (0x0fff << 0) | |
1135 | #define STB0899_OFFST_EQ_Q_INIT_COEFF_N 0 | |
1136 | #define STB0899_WIDTH_EQ_Q_INIT_COEFF_N 12 | |
1137 | ||
1138 | #define STB0899_OFF0_EQ_I_OUT_COEFF_0 0xf300 | |
1139 | #define STB0899_OFF1_EQ_I_OUT_COEFF_1 0xf304 | |
1140 | #define STB0899_OFF2_EQ_I_OUT_COEFF_2 0xf308 | |
1141 | #define STB0899_OFF3_EQ_I_OUT_COEFF_3 0xf30c | |
1142 | #define STB0899_OFF4_EQ_I_OUT_COEFF_4 0xf310 | |
1143 | #define STB0899_OFF5_EQ_I_OUT_COEFF_5 0xf314 | |
1144 | #define STB0899_OFF6_EQ_I_OUT_COEFF_6 0xf318 | |
1145 | #define STB0899_OFF7_EQ_I_OUT_COEFF_7 0xf31c | |
1146 | #define STB0899_OFF8_EQ_I_OUT_COEFF_8 0xf320 | |
1147 | #define STB0899_OFF9_EQ_I_OUT_COEFF_9 0xf324 | |
1148 | #define STB0899_OFFa_EQ_I_OUT_COEFF_10 0xf328 | |
1149 | #define STB0899_BASE_EQ_I_OUT_COEFF_N 0x00000460 | |
1150 | #define STB0899_EQ_I_OUT_COEFF_N (0x0fff << 0) | |
1151 | #define STB0899_OFFST_EQ_I_OUT_COEFF_N 0 | |
1152 | #define STB0899_WIDTH_EQ_I_OUT_COEFF_N 12 | |
1153 | ||
1154 | #define STB0899_OFF0_EQ_Q_OUT_COEFF_0 0xf330 | |
1155 | #define STB0899_OFF1_EQ_Q_OUT_COEFF_1 0xf334 | |
1156 | #define STB0899_OFF2_EQ_Q_OUT_COEFF_2 0xf338 | |
1157 | #define STB0899_OFF3_EQ_Q_OUT_COEFF_3 0xf33c | |
1158 | #define STB0899_OFF4_EQ_Q_OUT_COEFF_4 0xf340 | |
1159 | #define STB0899_OFF5_EQ_Q_OUT_COEFF_5 0xf344 | |
1160 | #define STB0899_OFF6_EQ_Q_OUT_COEFF_6 0xf348 | |
1161 | #define STB0899_OFF7_EQ_Q_OUT_COEFF_7 0xf34c | |
1162 | #define STB0899_OFF8_EQ_Q_OUT_COEFF_8 0xf350 | |
1163 | #define STB0899_OFF9_EQ_Q_OUT_COEFF_9 0xf354 | |
1164 | #define STB0899_OFFa_EQ_Q_OUT_COEFF_10 0xf358 | |
1165 | #define STB0899_BASE_EQ_Q_OUT_COEFF_N 0x00000460 | |
1166 | #define STB0899_EQ_Q_OUT_COEFF_N (0x0fff << 0) | |
1167 | #define STB0899_OFFST_EQ_Q_OUT_COEFF_N 0 | |
1168 | #define STB0899_WIDTH_EQ_Q_OUT_COEFF_N 12 | |
1169 | ||
1170 | /* S2 FEC */ | |
1171 | #define STB0899_OFF0_BLOCK_LNGTH 0xfa04 | |
1172 | #define STB0899_BASE_BLOCK_LNGTH 0x00000000 | |
1173 | #define STB0899_BLOCK_LENGTH (0xff << 0) | |
1174 | #define STB0899_OFFST_BLOCK_LENGTH 0 | |
1175 | #define STB0899_WIDTH_BLOCK_LENGTH 8 | |
1176 | ||
1177 | #define STB0899_OFF0_ROW_STR 0xfa08 | |
1178 | #define STB0899_BASE_ROW_STR 0x00000000 | |
1179 | #define STB0899_ROW_STRIDE (0xff << 0) | |
1180 | #define STB0899_OFFST_ROW_STRIDE 0 | |
1181 | #define STB0899_WIDTH_ROW_STRIDE 8 | |
1182 | ||
1183 | #define STB0899_OFF0_MAX_ITER 0xfa0c | |
1184 | #define STB0899_BASE_MAX_ITER 0x00000000 | |
1185 | #define STB0899_MAX_ITERATIONS (0xff << 0) | |
1186 | #define STB0899_OFFST_MAX_ITERATIONS 0 | |
1187 | #define STB0899_WIDTH_MAX_ITERATIONS 8 | |
1188 | ||
1189 | #define STB0899_OFF0_BN_END_ADDR 0xfa10 | |
1190 | #define STB0899_BASE_BN_END_ADDR 0x00000000 | |
1191 | #define STB0899_BN_END_ADDR (0x0fff << 0) | |
1192 | #define STB0899_OFFST_BN_END_ADDR 0 | |
1193 | #define STB0899_WIDTH_BN_END_ADDR 12 | |
1194 | ||
1195 | #define STB0899_OFF0_CN_END_ADDR 0xfa14 | |
1196 | #define STB0899_BASE_CN_END_ADDR 0x00000000 | |
1197 | #define STB0899_CN_END_ADDR (0x0fff << 0) | |
1198 | #define STB0899_OFFST_CN_END_ADDR 0 | |
1199 | #define STB0899_WIDTH_CN_END_ADDR 12 | |
1200 | ||
1201 | #define STB0899_OFF0_INFO_LENGTH 0xfa1c | |
1202 | #define STB0899_BASE_INFO_LENGTH 0x00000000 | |
1203 | #define STB0899_INFO_LENGTH (0xff << 0) | |
1204 | #define STB0899_OFFST_INFO_LENGTH 0 | |
1205 | #define STB0899_WIDTH_INFO_LENGTH 8 | |
1206 | ||
1207 | #define STB0899_OFF0_BOT_ADDR 0xfa20 | |
1208 | #define STB0899_BASE_BOT_ADDR 0x00000000 | |
1209 | #define STB0899_BOTTOM_BASE_ADDR (0x03ff << 0) | |
1210 | #define STB0899_OFFST_BOTTOM_BASE_ADDR 0 | |
1211 | #define STB0899_WIDTH_BOTTOM_BASE_ADDR 10 | |
1212 | ||
1213 | #define STB0899_OFF0_BCH_BLK_LN 0xfa24 | |
1214 | #define STB0899_BASE_BCH_BLK_LN 0x00000000 | |
1215 | #define STB0899_BCH_BLOCK_LENGTH (0xffff << 0) | |
1216 | #define STB0899_OFFST_BCH_BLOCK_LENGTH 0 | |
1217 | #define STB0899_WIDTH_BCH_BLOCK_LENGTH 16 | |
1218 | ||
1219 | #define STB0899_OFF0_BCH_T 0xfa28 | |
1220 | #define STB0899_BASE_BCH_T 0x00000000 | |
1221 | #define STB0899_BCH_T (0x0f << 0) | |
1222 | #define STB0899_OFFST_BCH_T 0 | |
1223 | #define STB0899_WIDTH_BCH_T 4 | |
1224 | ||
1225 | #define STB0899_OFF0_CNFG_MODE 0xfa00 | |
1226 | #define STB0899_BASE_CNFG_MODE 0x00000800 | |
1227 | #define STB0899_MODCOD (0x1f << 2) | |
1228 | #define STB0899_OFFST_MODCOD 2 | |
1229 | #define STB0899_WIDTH_MODCOD 5 | |
1230 | #define STB0899_MODCOD_SEL (0x01 << 1) | |
1231 | #define STB0899_OFFST_MODCOD_SEL 1 | |
1232 | #define STB0899_WIDTH_MODCOD_SEL 1 | |
1233 | #define STB0899_CONFIG_MODE (0x01 << 0) | |
1234 | #define STB0899_OFFST_CONFIG_MODE 0 | |
1235 | #define STB0899_WIDTH_CONFIG_MODE 1 | |
1236 | ||
1237 | #define STB0899_OFF0_LDPC_STAT 0xfa04 | |
1238 | #define STB0899_BASE_LDPC_STAT 0x00000800 | |
1239 | #define STB0899_ITERATION (0xff << 3) | |
1240 | #define STB0899_OFFST_ITERATION 3 | |
1241 | #define STB0899_WIDTH_ITERATION 8 | |
1242 | #define STB0899_LDPC_DEC_STATE (0x07 << 0) | |
1243 | #define STB0899_OFFST_LDPC_DEC_STATE 0 | |
1244 | #define STB0899_WIDTH_LDPC_DEC_STATE 3 | |
1245 | ||
1246 | #define STB0899_OFF0_ITER_SCALE 0xfa08 | |
1247 | #define STB0899_BASE_ITER_SCALE 0x00000800 | |
1248 | #define STB0899_ITERATION_SCALE (0xff << 0) | |
1249 | #define STB0899_OFFST_ITERATION_SCALE 0 | |
1250 | #define STB0899_WIDTH_ITERATION_SCALE 8 | |
1251 | ||
1252 | #define STB0899_OFF0_INPUT_MODE 0xfa0c | |
1253 | #define STB0899_BASE_INPUT_MODE 0x00000800 | |
1254 | #define STB0899_SD_BLOCK1_STREAM0 (0x01 << 0) | |
1255 | #define STB0899_OFFST_SD_BLOCK1_STREAM0 0 | |
1256 | #define STB0899_WIDTH_SD_BLOCK1_STREAM0 1 | |
1257 | ||
1258 | #define STB0899_OFF0_LDPCDECRST 0xfa10 | |
1259 | #define STB0899_BASE_LDPCDECRST 0x00000800 | |
1260 | #define STB0899_LDPC_DEC_RST (0x01 << 0) | |
1261 | #define STB0899_OFFST_LDPC_DEC_RST 0 | |
1262 | #define STB0899_WIDTH_LDPC_DEC_RST 1 | |
1263 | ||
1264 | #define STB0899_OFF0_CLK_PER_BYTE_RW 0xfa14 | |
1265 | #define STB0899_BASE_CLK_PER_BYTE_RW 0x00000800 | |
1266 | #define STB0899_CLKS_PER_BYTE (0x0f << 0) | |
1267 | #define STB0899_OFFST_CLKS_PER_BYTE 0 | |
1268 | #define STB0899_WIDTH_CLKS_PER_BYTE 5 | |
1269 | ||
1270 | #define STB0899_OFF0_BCH_ERRORS 0xfa18 | |
1271 | #define STB0899_BASE_BCH_ERRORS 0x00000800 | |
1272 | #define STB0899_BCH_ERRORS (0x0f << 0) | |
1273 | #define STB0899_OFFST_BCH_ERRORS 0 | |
1274 | #define STB0899_WIDTH_BCH_ERRORS 4 | |
1275 | ||
1276 | #define STB0899_OFF0_LDPC_ERRORS 0xfa1c | |
1277 | #define STB0899_BASE_LDPC_ERRORS 0x00000800 | |
1278 | #define STB0899_LDPC_ERRORS (0xffff << 0) | |
1279 | #define STB0899_OFFST_LDPC_ERRORS 0 | |
1280 | #define STB0899_WIDTH_LDPC_ERRORS 16 | |
1281 | ||
1282 | #define STB0899_OFF0_BCH_MODE 0xfa20 | |
1283 | #define STB0899_BASE_BCH_MODE 0x00000800 | |
1284 | #define STB0899_BCH_CORRECT_N (0x01 << 1) | |
1285 | #define STB0899_OFFST_BCH_CORRECT_N 1 | |
1286 | #define STB0899_WIDTH_BCH_CORRECT_N 1 | |
1287 | #define STB0899_FULL_BYPASS (0x01 << 0) | |
1288 | #define STB0899_OFFST_FULL_BYPASS 0 | |
1289 | #define STB0899_WIDTH_FULL_BYPASS 1 | |
1290 | ||
1291 | #define STB0899_OFF0_ERR_ACC_PER 0xfa24 | |
1292 | #define STB0899_BASE_ERR_ACC_PER 0x00000800 | |
1293 | #define STB0899_BCH_ERR_ACC_PERIOD (0x0f << 0) | |
1294 | #define STB0899_OFFST_BCH_ERR_ACC_PERIOD 0 | |
1295 | #define STB0899_WIDTH_BCH_ERR_ACC_PERIOD 4 | |
1296 | ||
1297 | #define STB0899_OFF0_BCH_ERR_ACC 0xfa28 | |
1298 | #define STB0899_BASE_BCH_ERR_ACC 0x00000800 | |
1299 | #define STB0899_BCH_ERR_ACCUM (0xff << 0) | |
1300 | #define STB0899_OFFST_BCH_ERR_ACCUM 0 | |
1301 | #define STB0899_WIDTH_BCH_ERR_ACCUM 8 | |
1302 | ||
1303 | #define STB0899_OFF0_FEC_CORE_ID_REG 0xfa2c | |
1304 | #define STB0899_BASE_FEC_CORE_ID_REG 0x00000800 | |
1305 | #define STB0899_FEC_CORE_ID (0xffffffff << 0) | |
1306 | #define STB0899_OFFST_FEC_CORE_ID 0 | |
1307 | #define STB0899_WIDTH_FEC_CORE_ID 32 | |
1308 | ||
1309 | #define STB0899_OFF0_FEC_VER_ID_REG 0xfa34 | |
1310 | #define STB0899_BASE_FEC_VER_ID_REG 0x00000800 | |
1311 | #define STB0899_FEC_VER_ID (0xff << 0) | |
1312 | #define STB0899_OFFST_FEC_VER_ID 0 | |
1313 | #define STB0899_WIDTH_FEC_VER_ID 8 | |
1314 | ||
1315 | #define STB0899_OFF0_FEC_TP_SEL 0xfa38 | |
1316 | #define STB0899_BASE_FEC_TP_SEL 0x00000800 | |
1317 | ||
1318 | #define STB0899_OFF0_CSM_CNTRL1 0xf310 | |
1319 | #define STB0899_BASE_CSM_CNTRL1 0x00000400 | |
1320 | #define STB0899_CSM_FORCE_FREQLOCK (0x01 << 19) | |
1321 | #define STB0899_OFFST_CSM_FORCE_FREQLOCK 19 | |
1322 | #define STB0899_WIDTH_CSM_FORCE_FREQLOCK 1 | |
1323 | #define STB0899_CSM_FREQ_LOCKSTATE (0x01 << 18) | |
1324 | #define STB0899_OFFST_CSM_FREQ_LOCKSTATE 18 | |
1325 | #define STB0899_WIDTH_CSM_FREQ_LOCKSTATE 1 | |
1326 | #define STB0899_CSM_AUTO_PARAM (0x01 << 17) | |
1327 | #define STB0899_OFFST_CSM_AUTO_PARAM 17 | |
1328 | #define STB0899_WIDTH_CSM_AUTO_PARAM 1 | |
1329 | #define STB0899_FE_LOOP_SHIFT (0x07 << 14) | |
1330 | #define STB0899_OFFST_FE_LOOP_SHIFT 14 | |
1331 | #define STB0899_WIDTH_FE_LOOP_SHIFT 3 | |
1332 | #define STB0899_CSM_AGC_SHIFT (0x07 << 11) | |
1333 | #define STB0899_OFFST_CSM_AGC_SHIFT 11 | |
1334 | #define STB0899_WIDTH_CSM_AGC_SHIFT 3 | |
43498ade | 1335 | #define STB0899_CSM_AGC_GAIN (0x1ff << 2) |
8bd135ba MA |
1336 | #define STB0899_OFFST_CSM_AGC_GAIN 2 |
1337 | #define STB0899_WIDTH_CSM_AGC_GAIN 9 | |
1338 | #define STB0899_CSM_TWO_PASS (0x01 << 1) | |
1339 | #define STB0899_OFFST_CSM_TWO_PASS 1 | |
1340 | #define STB0899_WIDTH_CSM_TWO_PASS 1 | |
1341 | #define STB0899_CSM_DVT_TABLE (0x01 << 0) | |
1342 | #define STB0899_OFFST_CSM_DVT_TABLE 0 | |
1343 | #define STB0899_WIDTH_CSM_DVT_TABLE 1 | |
1344 | ||
1345 | #define STB0899_OFF0_CSM_CNTRL2 0xf314 | |
1346 | #define STB0899_BASE_CSM_CNTRL2 0x00000400 | |
43498ade | 1347 | #define STB0899_CSM_GAMMA_RHO_ACQ (0x1ff << 9) |
8bd135ba MA |
1348 | #define STB0899_OFFST_CSM_GAMMA_RHOACQ 9 |
1349 | #define STB0899_WIDTH_CSM_GAMMA_RHOACQ 9 | |
43498ade | 1350 | #define STB0899_CSM_GAMMA_ACQ (0x1ff << 0) |
8bd135ba MA |
1351 | #define STB0899_OFFST_CSM_GAMMA_ACQ 0 |
1352 | #define STB0899_WIDTH_CSM_GAMMA_ACQ 9 | |
1353 | ||
aa912921 | 1354 | #define STB0899_OFF0_CSM_CNTRL3 0xf318 |
8bd135ba | 1355 | #define STB0899_BASE_CSM_CNTRL3 0x00000400 |
43498ade | 1356 | #define STB0899_CSM_GAMMA_RHO_TRACK (0x1ff << 9) |
8bd135ba MA |
1357 | #define STB0899_OFFST_CSM_GAMMA_RHOTRACK 9 |
1358 | #define STB0899_WIDTH_CSM_GAMMA_RHOTRACK 9 | |
43498ade | 1359 | #define STB0899_CSM_GAMMA_TRACK (0x1ff << 0) |
8bd135ba MA |
1360 | #define STB0899_OFFST_CSM_GAMMA_TRACK 0 |
1361 | #define STB0899_WIDTH_CSM_GAMMA_TRACK 9 | |
1362 | ||
aa912921 | 1363 | #define STB0899_OFF0_CSM_CNTRL4 0xf31c |
8bd135ba MA |
1364 | #define STB0899_BASE_CSM_CNTRL4 0x00000400 |
1365 | #define STB0899_CSM_PHASEDIFF_THRESH (0x0f << 8) | |
1366 | #define STB0899_OFFST_CSM_PHASEDIFF_THRESH 8 | |
1367 | #define STB0899_WIDTH_CSM_PHASEDIFF_THRESH 4 | |
1368 | #define STB0899_CSM_LOCKCOUNT_THRESH (0xff << 0) | |
1369 | #define STB0899_OFFST_CSM_LOCKCOUNT_THRESH 0 | |
1370 | #define STB0899_WIDTH_CSM_LOCKCOUNT_THRESH 8 | |
1371 | ||
1372 | /* Check on chapter 8 page 42 */ | |
1373 | #define STB0899_ERRCTRL1 0xf574 | |
1374 | #define STB0899_ERRCTRL2 0xf575 | |
1375 | #define STB0899_ERRCTRL3 0xf576 | |
1376 | #define STB0899_ERR_SRC_S1 (0x1f << 3) | |
1377 | #define STB0899_OFFST_ERR_SRC_S1 3 | |
1378 | #define STB0899_WIDTH_ERR_SRC_S1 5 | |
1379 | #define STB0899_ERR_SRC_S2 (0x0f << 0) | |
1380 | #define STB0899_OFFST_ERR_SRC_S2 0 | |
1381 | #define STB0899_WIDTH_ERR_SRC_S2 4 | |
1382 | #define STB0899_NOE (0x07 << 0) | |
1383 | #define STB0899_OFFST_NOE 0 | |
1384 | #define STB0899_WIDTH_NOE 3 | |
1385 | ||
1386 | #define STB0899_ECNT1M 0xf524 | |
1387 | #define STB0899_ECNT1L 0xf525 | |
1388 | #define STB0899_ECNT2M 0xf526 | |
1389 | #define STB0899_ECNT2L 0xf527 | |
1390 | #define STB0899_ECNT3M 0xf528 | |
1391 | #define STB0899_ECNT3L 0xf529 | |
1392 | ||
1393 | #define STB0899_DMONMSK1 0xf57b | |
1394 | #define STB0899_DMONMSK1_WAIT_1STEP (1 << 7) | |
1395 | #define STB0899_DMONMSK1_FREE_14 (1 << 6) | |
1396 | #define STB0899_DMONMSK1_AVRGVIT_CALC (1 << 5) | |
1397 | #define STB0899_DMONMSK1_FREE_12 (1 << 4) | |
1398 | #define STB0899_DMONMSK1_FREE_11 (1 << 3) | |
1399 | #define STB0899_DMONMSK1_B0DIV_CALC (1 << 2) | |
1400 | #define STB0899_DMONMSK1_KDIVB1_CALC (1 << 1) | |
1401 | #define STB0899_DMONMSK1_KDIVB2_CALC (1 << 0) | |
1402 | ||
1403 | #define STB0899_DMONMSK0 0xf57c | |
1404 | #define STB0899_DMONMSK0_SMOTTH_CALC (1 << 7) | |
1405 | #define STB0899_DMONMSK0_FREE_6 (1 << 6) | |
1406 | #define STB0899_DMONMSK0_SIGPOWER_CALC (1 << 5) | |
1407 | #define STB0899_DMONMSK0_QSEUIL_CALC (1 << 4) | |
1408 | #define STB0899_DMONMSK0_FREE_3 (1 << 3) | |
1409 | #define STB0899_DMONMSK0_FREE_2 (1 << 2) | |
1410 | #define STB0899_DMONMSK0_KVDIVB1_CALC (1 << 1) | |
1411 | #define STB0899_DMONMSK0_KVDIVB2_CALC (1 << 0) | |
1412 | ||
1413 | #define STB0899_TSULC 0xf549 | |
1414 | #define STB0899_ULNOSYNCBYTES (0x01 << 7) | |
1415 | #define STB0899_OFFST_ULNOSYNCBYTES 7 | |
1416 | #define STB0899_WIDTH_ULNOSYNCBYTES 1 | |
1417 | #define STB0899_ULPARITY_ON (0x01 << 6) | |
1418 | #define STB0899_OFFST_ULPARITY_ON 6 | |
1419 | #define STB0899_WIDTH_ULPARITY_ON 1 | |
1420 | #define STB0899_ULSYNCOUTRS (0x01 << 5) | |
1421 | #define STB0899_OFFST_ULSYNCOUTRS 5 | |
1422 | #define STB0899_WIDTH_ULSYNCOUTRS 1 | |
1423 | #define STB0899_ULDSS_PACKETS (0x01 << 0) | |
1424 | #define STB0899_OFFST_ULDSS_PACKETS 0 | |
1425 | #define STB0899_WIDTH_ULDSS_PACKETS 1 | |
1426 | ||
1427 | #define STB0899_TSLPL 0xf54b | |
1428 | #define STB0899_LLDVBS2_MODE (0x01 << 4) | |
1429 | #define STB0899_OFFST_LLDVBS2_MODE 4 | |
1430 | #define STB0899_WIDTH_LLDVBS2_MODE 1 | |
1431 | #define STB0899_LLISSYI_ON (0x01 << 3) | |
1432 | #define STB0899_OFFST_LLISSYI_ON 3 | |
1433 | #define STB0899_WIDTH_LLISSYI_ON 1 | |
1434 | #define STB0899_LLNPD_ON (0x01 << 2) | |
1435 | #define STB0899_OFFST_LLNPD_ON 2 | |
1436 | #define STB0899_WIDTH_LLNPD_ON 1 | |
1437 | #define STB0899_LLCRC8_ON (0x01 << 1) | |
1438 | #define STB0899_OFFST_LLCRC8_ON 1 | |
1439 | #define STB0899_WIDTH_LLCRC8_ON 1 | |
1440 | ||
1441 | #define STB0899_TSCFGH 0xf54c | |
1442 | #define STB0899_OUTRS_PS (0x01 << 6) | |
1443 | #define STB0899_OFFST_OUTRS_PS 6 | |
1444 | #define STB0899_WIDTH_OUTRS_PS 1 | |
1445 | #define STB0899_SYNCBYTE (0x01 << 5) | |
1446 | #define STB0899_OFFST_SYNCBYTE 5 | |
1447 | #define STB0899_WIDTH_SYNCBYTE 1 | |
1448 | #define STB0899_PFBIT (0x01 << 4) | |
1449 | #define STB0899_OFFST_PFBIT 4 | |
1450 | #define STB0899_WIDTH_PFBIT 1 | |
1451 | #define STB0899_ERR_BIT (0x01 << 3) | |
1452 | #define STB0899_OFFST_ERR_BIT 3 | |
1453 | #define STB0899_WIDTH_ERR_BIT 1 | |
1454 | #define STB0899_MPEG (0x01 << 2) | |
1455 | #define STB0899_OFFST_MPEG 2 | |
1456 | #define STB0899_WIDTH_MPEG 1 | |
1457 | #define STB0899_CLK_POL (0x01 << 1) | |
1458 | #define STB0899_OFFST_CLK_POL 1 | |
1459 | #define STB0899_WIDTH_CLK_POL 1 | |
1460 | #define STB0899_FORCE0 (0x01 << 0) | |
1461 | #define STB0899_OFFST_FORCE0 0 | |
1462 | #define STB0899_WIDTH_FORCE0 1 | |
1463 | ||
1464 | #define STB0899_TSCFGM 0xf54d | |
1465 | #define STB0899_LLPRIORITY (0x01 << 3) | |
1466 | #define STB0899_OFFST_LLPRIORIY 3 | |
1467 | #define STB0899_WIDTH_LLPRIORITY 1 | |
1468 | #define STB0899_EN188 (0x01 << 2) | |
1469 | #define STB0899_OFFST_EN188 2 | |
1470 | #define STB0899_WIDTH_EN188 1 | |
1471 | ||
1472 | #define STB0899_TSCFGL 0xf54e | |
1473 | #define STB0899_DEL_ERRPCK (0x01 << 7) | |
1474 | #define STB0899_OFFST_DEL_ERRPCK 7 | |
1475 | #define STB0899_WIDTH_DEL_ERRPCK 1 | |
1476 | #define STB0899_ERRFLAGSTD (0x01 << 5) | |
1477 | #define STB0899_OFFST_ERRFLAGSTD 5 | |
1478 | #define STB0899_WIDTH_ERRFLAGSTD 1 | |
1479 | #define STB0899_MPEGERR (0x01 << 4) | |
1480 | #define STB0899_OFFST_MPEGERR 4 | |
1481 | #define STB0899_WIDTH_MPEGERR 1 | |
1482 | #define STB0899_BCH_CHK (0x01 << 3) | |
1483 | #define STB0899_OFFST_BCH_CHK 5 | |
1484 | #define STB0899_WIDTH_BCH_CHK 1 | |
1485 | #define STB0899_CRC8CHK (0x01 << 2) | |
1486 | #define STB0899_OFFST_CRC8CHK 2 | |
1487 | #define STB0899_WIDTH_CRC8CHK 1 | |
1488 | #define STB0899_SPEC_INFO (0x01 << 1) | |
1489 | #define STB0899_OFFST_SPEC_INFO 1 | |
1490 | #define STB0899_WIDTH_SPEC_INFO 1 | |
1491 | #define STB0899_LOW_PRIO_CLK (0x01 << 0) | |
1492 | #define STB0899_OFFST_LOW_PRIO_CLK 0 | |
1493 | #define STB0899_WIDTH_LOW_PRIO_CLK 1 | |
1494 | #define STB0899_ERROR_NORM (0x00 << 0) | |
1495 | #define STB0899_OFFST_ERROR_NORM 0 | |
1496 | #define STB0899_WIDTH_ERROR_NORM 0 | |
1497 | ||
1498 | #define STB0899_TSOUT 0xf54f | |
1499 | #define STB0899_RSSYNCDEL 0xf550 | |
1500 | #define STB0899_TSINHDELH 0xf551 | |
1501 | #define STB0899_TSINHDELM 0xf552 | |
1502 | #define STB0899_TSINHDELL 0xf553 | |
1503 | #define STB0899_TSLLSTKM 0xf55a | |
1504 | #define STB0899_TSLLSTKL 0xf55b | |
1505 | #define STB0899_TSULSTKM 0xf55c | |
1506 | #define STB0899_TSULSTKL 0xf55d | |
1507 | #define STB0899_TSSTATUS 0xf561 | |
1508 | ||
1509 | #define STB0899_PDELCTRL 0xf600 | |
1510 | #define STB0899_INVERT_RES (0x01 << 7) | |
1511 | #define STB0899_OFFST_INVERT_RES 7 | |
1512 | #define STB0899_WIDTH_INVERT_RES 1 | |
1513 | #define STB0899_FORCE_ACCEPTED (0x01 << 6) | |
1514 | #define STB0899_OFFST_FORCE_ACCEPTED 6 | |
1515 | #define STB0899_WIDTH_FORCE_ACCEPTED 1 | |
1516 | #define STB0899_FILTER_EN (0x01 << 5) | |
1517 | #define STB0899_OFFST_FILTER_EN 5 | |
1518 | #define STB0899_WIDTH_FILTER_EN 1 | |
1519 | #define STB0899_LOCKFALL_THRESH (0x01 << 4) | |
1520 | #define STB0899_OFFST_LOCKFALL_THRESH 4 | |
1521 | #define STB0899_WIDTH_LOCKFALL_THRESH 1 | |
1522 | #define STB0899_HYST_EN (0x01 << 3) | |
1523 | #define STB0899_OFFST_HYST_EN 3 | |
1524 | #define STB0899_WIDTH_HYST_EN 1 | |
1525 | #define STB0899_HYST_SWRST (0x01 << 2) | |
1526 | #define STB0899_OFFST_HYST_SWRST 2 | |
1527 | #define STB0899_WIDTH_HYST_SWRST 1 | |
1528 | #define STB0899_ALGO_EN (0x01 << 1) | |
1529 | #define STB0899_OFFST_ALGO_EN 1 | |
1530 | #define STB0899_WIDTH_ALGO_EN 1 | |
1531 | #define STB0899_ALGO_SWRST (0x01 << 0) | |
1532 | #define STB0899_OFFST_ALGO_SWRST 0 | |
1533 | #define STB0899_WIDTH_ALGO_SWRST 1 | |
1534 | ||
1535 | #define STB0899_PDELCTRL2 0xf601 | |
1536 | #define STB0899_BBHCTRL1 0xf602 | |
1537 | #define STB0899_BBHCTRL2 0xf603 | |
1538 | #define STB0899_HYSTTHRESH 0xf604 | |
1539 | ||
1540 | #define STB0899_MATCSTM 0xf605 | |
1541 | #define STB0899_MATCSTL 0xf606 | |
1542 | #define STB0899_UPLCSTM 0xf607 | |
1543 | #define STB0899_UPLCSTL 0xf608 | |
1544 | #define STB0899_DFLCSTM 0xf609 | |
1545 | #define STB0899_DFLCSTL 0xf60a | |
1546 | #define STB0899_SYNCCST 0xf60b | |
1547 | #define STB0899_SYNCDCSTM 0xf60c | |
1548 | #define STB0899_SYNCDCSTL 0xf60d | |
1549 | #define STB0899_ISI_ENTRY 0xf60e | |
1550 | #define STB0899_ISI_BIT_EN 0xf60f | |
1551 | #define STB0899_MATSTRM 0xf610 | |
1552 | #define STB0899_MATSTRL 0xf611 | |
1553 | #define STB0899_UPLSTRM 0xf612 | |
1554 | #define STB0899_UPLSTRL 0xf613 | |
1555 | #define STB0899_DFLSTRM 0xf614 | |
1556 | #define STB0899_DFLSTRL 0xf615 | |
1557 | #define STB0899_SYNCSTR 0xf616 | |
1558 | #define STB0899_SYNCDSTRM 0xf617 | |
1559 | #define STB0899_SYNCDSTRL 0xf618 | |
1560 | ||
1561 | #define STB0899_CFGPDELSTATUS1 0xf619 | |
1562 | #define STB0899_BADDFL (0x01 << 6) | |
1563 | #define STB0899_OFFST_BADDFL 6 | |
1564 | #define STB0899_WIDTH_BADDFL 1 | |
1565 | #define STB0899_CONTINUOUS_STREAM (0x01 << 5) | |
1566 | #define STB0899_OFFST_CONTINUOUS_STREAM 5 | |
1567 | #define STB0899_WIDTH_CONTINUOUS_STREAM 1 | |
1568 | #define STB0899_ACCEPTED_STREAM (0x01 << 4) | |
1569 | #define STB0899_OFFST_ACCEPTED_STREAM 4 | |
1570 | #define STB0899_WIDTH_ACCEPTED_STREAM 1 | |
1571 | #define STB0899_BCH_ERRFLAG (0x01 << 3) | |
1572 | #define STB0899_OFFST_BCH_ERRFLAG 3 | |
1573 | #define STB0899_WIDTH_BCH_ERRFLAG 1 | |
1574 | #define STB0899_CRCRES (0x01 << 2) | |
1575 | #define STB0899_OFFST_CRCRES 2 | |
1576 | #define STB0899_WIDTH_CRCRES 1 | |
1577 | #define STB0899_CFGPDELSTATUS_LOCK (0x01 << 1) | |
1578 | #define STB0899_OFFST_CFGPDELSTATUS_LOCK 1 | |
1579 | #define STB0899_WIDTH_CFGPDELSTATUS_LOCK 1 | |
1580 | #define STB0899_1STLOCK (0x01 << 0) | |
1581 | #define STB0899_OFFST_1STLOCK 0 | |
1582 | #define STB0899_WIDTH_1STLOCK 1 | |
1583 | ||
1584 | #define STB0899_CFGPDELSTATUS2 0xf61a | |
1585 | #define STB0899_BBFERRORM 0xf61b | |
1586 | #define STB0899_BBFERRORL 0xf61c | |
1587 | #define STB0899_UPKTERRORM 0xf61d | |
1588 | #define STB0899_UPKTERRORL 0xf61e | |
1589 | ||
1590 | #define STB0899_TSTCK 0xff10 | |
1591 | ||
1592 | #define STB0899_TSTRES 0xff11 | |
1593 | #define STB0899_FRESLDPC (0x01 << 7) | |
1594 | #define STB0899_OFFST_FRESLDPC 7 | |
1595 | #define STB0899_WIDTH_FRESLDPC 1 | |
1596 | #define STB0899_FRESRS (0x01 << 6) | |
1597 | #define STB0899_OFFST_FRESRS 6 | |
1598 | #define STB0899_WIDTH_FRESRS 1 | |
1599 | #define STB0899_FRESVIT (0x01 << 5) | |
1600 | #define STB0899_OFFST_FRESVIT 5 | |
1601 | #define STB0899_WIDTH_FRESVIT 1 | |
1602 | #define STB0899_FRESMAS1_2 (0x01 << 4) | |
1603 | #define STB0899_OFFST_FRESMAS1_2 4 | |
1604 | #define STB0899_WIDTH_FRESMAS1_2 1 | |
1605 | #define STB0899_FRESACS (0x01 << 3) | |
1606 | #define STB0899_OFFST_FRESACS 3 | |
1607 | #define STB0899_WIDTH_FRESACS 1 | |
1608 | #define STB0899_FRESSYM (0x01 << 2) | |
1609 | #define STB0899_OFFST_FRESSYM 2 | |
1610 | #define STB0899_WIDTH_FRESSYM 1 | |
1611 | #define STB0899_FRESMAS (0x01 << 1) | |
1612 | #define STB0899_OFFST_FRESMAS 1 | |
1613 | #define STB0899_WIDTH_FRESMAS 1 | |
1614 | #define STB0899_FRESINT (0x01 << 0) | |
1615 | #define STB0899_OFFST_FRESINIT 0 | |
1616 | #define STB0899_WIDTH_FRESINIT 1 | |
1617 | ||
1618 | #define STB0899_TSTOUT 0xff12 | |
1619 | #define STB0899_EN_SIGNATURE (0x01 << 7) | |
1620 | #define STB0899_OFFST_EN_SIGNATURE 7 | |
1621 | #define STB0899_WIDTH_EN_SIGNATURE 1 | |
1622 | #define STB0899_BCLK_CLK (0x01 << 6) | |
1623 | #define STB0899_OFFST_BCLK_CLK 6 | |
1624 | #define STB0899_WIDTH_BCLK_CLK 1 | |
1625 | #define STB0899_SGNL_OUT (0x01 << 5) | |
1626 | #define STB0899_OFFST_SGNL_OUT 5 | |
1627 | #define STB0899_WIDTH_SGNL_OUT 1 | |
1628 | #define STB0899_TS (0x01 << 4) | |
1629 | #define STB0899_OFFST_TS 4 | |
1630 | #define STB0899_WIDTH_TS 1 | |
1631 | #define STB0899_CTEST (0x01 << 0) | |
1632 | #define STB0899_OFFST_CTEST 0 | |
1633 | #define STB0899_WIDTH_CTEST 1 | |
1634 | ||
1635 | #define STB0899_TSTIN 0xff13 | |
1636 | #define STB0899_TEST_IN (0x01 << 7) | |
1637 | #define STB0899_OFFST_TEST_IN 7 | |
1638 | #define STB0899_WIDTH_TEST_IN 1 | |
1639 | #define STB0899_EN_ADC (0x01 << 6) | |
1640 | #define STB0899_OFFST_EN_ADC 6 | |
1641 | #define STB0899_WIDTH_ENADC 1 | |
1642 | #define STB0899_SGN_ADC (0x01 << 5) | |
1643 | #define STB0899_OFFST_SGN_ADC 5 | |
1644 | #define STB0899_WIDTH_SGN_ADC 1 | |
1645 | #define STB0899_BCLK_IN (0x01 << 4) | |
1646 | #define STB0899_OFFST_BCLK_IN 4 | |
1647 | #define STB0899_WIDTH_BCLK_IN 1 | |
1648 | #define STB0899_JETONIN_MODE (0x01 << 3) | |
1649 | #define STB0899_OFFST_JETONIN_MODE 3 | |
1650 | #define STB0899_WIDTH_JETONIN_MODE 1 | |
1651 | #define STB0899_BCLK_VALUE (0x01 << 2) | |
1652 | #define STB0899_OFFST_BCLK_VALUE 2 | |
1653 | #define STB0899_WIDTH_BCLK_VALUE 1 | |
1654 | #define STB0899_SGNRST_T12 (0x01 << 1) | |
1655 | #define STB0899_OFFST_SGNRST_T12 1 | |
1656 | #define STB0899_WIDTH_SGNRST_T12 1 | |
1657 | #define STB0899_LOWSP_ENAX (0x01 << 0) | |
1658 | #define STB0899_OFFST_LOWSP_ENAX 0 | |
1659 | #define STB0899_WIDTH_LOWSP_ENAX 1 | |
1660 | ||
1661 | #define STB0899_TSTSYS 0xff14 | |
1662 | #define STB0899_TSTCHIP 0xff15 | |
1663 | #define STB0899_TSTFREE 0xff16 | |
1664 | #define STB0899_TSTI2C 0xff17 | |
1665 | #define STB0899_BITSPEEDM 0xff1c | |
1666 | #define STB0899_BITSPEEDL 0xff1d | |
1667 | #define STB0899_TBUSBIT 0xff1e | |
1668 | #define STB0899_TSTDIS 0xff24 | |
1669 | #define STB0899_TSTDISRX 0xff25 | |
1670 | #define STB0899_TSTJETON 0xff28 | |
1671 | #define STB0899_TSTDCADJ 0xff40 | |
1672 | #define STB0899_TSTAGC1 0xff41 | |
1673 | #define STB0899_TSTAGC1N 0xff42 | |
1674 | #define STB0899_TSTPOLYPH 0xff48 | |
1675 | #define STB0899_TSTR 0xff49 | |
1676 | #define STB0899_TSTAGC2 0xff4a | |
1677 | #define STB0899_TSTCTL1 0xff4b | |
1678 | #define STB0899_TSTCTL2 0xff4c | |
1679 | #define STB0899_TSTCTL3 0xff4d | |
1680 | #define STB0899_TSTDEMAP 0xff50 | |
1681 | #define STB0899_TSTDEMAP2 0xff51 | |
1682 | #define STB0899_TSTDEMMON 0xff52 | |
1683 | #define STB0899_TSTRATE 0xff53 | |
1684 | #define STB0899_TSTSELOUT 0xff54 | |
1685 | #define STB0899_TSYNC 0xff55 | |
1686 | #define STB0899_TSTERR 0xff56 | |
1687 | #define STB0899_TSTRAM1 0xff58 | |
1688 | #define STB0899_TSTVSELOUT 0xff59 | |
1689 | #define STB0899_TSTFORCEIN 0xff5a | |
1690 | #define STB0899_TSTRS1 0xff5c | |
1691 | #define STB0899_TSTRS2 0xff5d | |
1692 | #define STB0899_TSTRS3 0xff53 | |
1693 | ||
1694 | #define STB0899_INTBUFSTATUS 0xf200 | |
1695 | #define STB0899_INTBUFCTRL 0xf201 | |
1696 | #define STB0899_PCKLENUL 0xf55e | |
1697 | #define STB0899_PCKLENLL 0xf55f | |
1698 | #define STB0899_RSPCKLEN 0xf560 | |
1699 | ||
1700 | /* 2 registers */ | |
1701 | #define STB0899_SYNCDCST 0xf60c | |
1702 | ||
1703 | /* DiSEqC */ | |
1704 | #define STB0899_DISCNTRL1 0xf0a0 | |
1705 | #define STB0899_TIMOFF (0x01 << 7) | |
1706 | #define STB0899_OFFST_TIMOFF 7 | |
1707 | #define STB0899_WIDTH_TIMOFF 1 | |
1708 | #define STB0899_DISEQCRESET (0x01 << 6) | |
1709 | #define STB0899_OFFST_DISEQCRESET 6 | |
1710 | #define STB0899_WIDTH_DISEQCRESET 1 | |
1711 | #define STB0899_TIMCMD (0x03 << 4) | |
1712 | #define STB0899_OFFST_TIMCMD 4 | |
1713 | #define STB0899_WIDTH_TIMCMD 2 | |
1714 | #define STB0899_DISPRECHARGE (0x01 << 2) | |
1715 | #define STB0899_OFFST_DISPRECHARGE 2 | |
1716 | #define STB0899_WIDTH_DISPRECHARGE 1 | |
43498ade | 1717 | #define STB0899_DISEQCMODE (0x03 << 0) |
8bd135ba MA |
1718 | #define STB0899_OFFST_DISEQCMODE 0 |
1719 | #define STB0899_WIDTH_DISEQCMODE 2 | |
1720 | ||
1721 | #define STB0899_DISCNTRL2 0xf0a1 | |
1722 | #define STB0899_RECEIVER_ON (0x01 << 7) | |
1723 | #define STB0899_OFFST_RECEIVER_ON 7 | |
1724 | #define STB0899_WIDTH_RECEIVER_ON 1 | |
1725 | #define STB0899_IGNO_SHORT_22K (0x01 << 6) | |
1726 | #define STB0899_OFFST_IGNO_SHORT_22K 6 | |
1727 | #define STB0899_WIDTH_IGNO_SHORT_22K 1 | |
1728 | #define STB0899_ONECHIP_TRX (0x01 << 5) | |
1729 | #define STB0899_OFFST_ONECHIP_TRX 5 | |
1730 | #define STB0899_WIDTH_ONECHIP_TRX 1 | |
1731 | #define STB0899_EXT_ENVELOP (0x01 << 4) | |
1732 | #define STB0899_OFFST_EXT_ENVELOP 4 | |
1733 | #define STB0899_WIDTH_EXT_ENVELOP 1 | |
1734 | #define STB0899_PIN_SELECT (0x03 << 2) | |
1735 | #define STB0899_OFFST_PIN_SELCT 2 | |
1736 | #define STB0899_WIDTH_PIN_SELCT 2 | |
1737 | #define STB0899_IRQ_RXEND (0x01 << 1) | |
1738 | #define STB0899_OFFST_IRQ_RXEND 1 | |
1739 | #define STB0899_WIDTH_IRQ_RXEND 1 | |
1740 | #define STB0899_IRQ_4NBYTES (0x01 << 0) | |
1741 | #define STB0899_OFFST_IRQ_4NBYTES 0 | |
1742 | #define STB0899_WIDTH_IRQ_4NBYTES 1 | |
1743 | ||
1744 | #define STB0899_DISRX_ST0 0xf0a4 | |
1745 | #define STB0899_RXEND (0x01 << 7) | |
1746 | #define STB0899_OFFST_RXEND 7 | |
1747 | #define STB0899_WIDTH_RXEND 1 | |
1748 | #define STB0899_RXACTIVE (0x01 << 6) | |
1749 | #define STB0899_OFFST_RXACTIVE 6 | |
1750 | #define STB0899_WIDTH_RXACTIVE 1 | |
1751 | #define STB0899_SHORT22K (0x01 << 5) | |
1752 | #define STB0899_OFFST_SHORT22K 5 | |
1753 | #define STB0899_WIDTH_SHORT22K 1 | |
1754 | #define STB0899_CONTTONE (0x01 << 4) | |
1755 | #define STB0899_OFFST_CONTTONE 4 | |
1756 | #define STB0899_WIDTH_CONTONE 1 | |
1757 | #define STB0899_4BFIFOREDY (0x01 << 3) | |
1758 | #define STB0899_OFFST_4BFIFOREDY 3 | |
1759 | #define STB0899_WIDTH_4BFIFOREDY 1 | |
1760 | #define STB0899_FIFOEMPTY (0x01 << 2) | |
1761 | #define STB0899_OFFST_FIFOEMPTY 2 | |
1762 | #define STB0899_WIDTH_FIFOEMPTY 1 | |
1763 | #define STB0899_ABORTTRX (0x01 << 0) | |
1764 | #define STB0899_OFFST_ABORTTRX 0 | |
1765 | #define STB0899_WIDTH_ABORTTRX 1 | |
1766 | ||
1767 | #define STB0899_DISRX_ST1 0xf0a5 | |
1768 | #define STB0899_RXFAIL (0x01 << 7) | |
1769 | #define STB0899_OFFST_RXFAIL 7 | |
1770 | #define STB0899_WIDTH_RXFAIL 1 | |
1771 | #define STB0899_FIFOPFAIL (0x01 << 6) | |
1772 | #define STB0899_OFFST_FIFOPFAIL 6 | |
1773 | #define STB0899_WIDTH_FIFOPFAIL 1 | |
1774 | #define STB0899_RXNONBYTES (0x01 << 5) | |
1775 | #define STB0899_OFFST_RXNONBYTES 5 | |
1776 | #define STB0899_WIDTH_RXNONBYTES 1 | |
1777 | #define STB0899_FIFOOVF (0x01 << 4) | |
1778 | #define STB0899_OFFST_FIFOOVF 4 | |
1779 | #define STB0899_WIDTH_FIFOOVF 1 | |
1780 | #define STB0899_FIFOBYTENBR (0x0f << 0) | |
1781 | #define STB0899_OFFST_FIFOBYTENBR 0 | |
1782 | #define STB0899_WIDTH_FIFOBYTENBR 4 | |
1783 | ||
1784 | #define STB0899_DISPARITY 0xf0a6 | |
1785 | ||
1786 | #define STB0899_DISFIFO 0xf0a7 | |
1787 | ||
1788 | #define STB0899_DISSTATUS 0xf0a8 | |
1789 | #define STB0899_FIFOFULL (0x01 << 6) | |
1790 | #define STB0899_OFFST_FIFOFULL 6 | |
1791 | #define STB0899_WIDTH_FIFOFULL 1 | |
1792 | #define STB0899_TXIDLE (0x01 << 5) | |
1793 | #define STB0899_OFFST_TXIDLE 5 | |
1794 | #define STB0899_WIDTH_TXIDLE 1 | |
1795 | #define STB0899_GAPBURST (0x01 << 4) | |
1796 | #define STB0899_OFFST_GAPBURST 4 | |
1797 | #define STB0899_WIDTH_GAPBURST 1 | |
1798 | #define STB0899_TXFIFOBYTES (0x0f << 0) | |
1799 | #define STB0899_OFFST_TXFIFOBYTES 0 | |
1800 | #define STB0899_WIDTH_TXFIFOBYTES 4 | |
1801 | #define STB0899_DISF22 0xf0a9 | |
1802 | ||
1803 | #define STB0899_DISF22RX 0xf0aa | |
1804 | ||
1805 | /* General Purpose */ | |
1806 | #define STB0899_SYSREG 0xf101 | |
1807 | #define STB0899_ACRPRESC 0xf110 | |
baa40e48 MA |
1808 | #define STB0899_OFFST_RSVD2 7 |
1809 | #define STB0899_WIDTH_RSVD2 1 | |
1810 | #define STB0899_OFFST_ACRPRESC 4 | |
1811 | #define STB0899_WIDTH_ACRPRESC 3 | |
1812 | #define STB0899_OFFST_RSVD1 3 | |
1813 | #define STB0899_WIDTH_RSVD1 1 | |
1814 | #define STB0899_OFFST_ACRPRESC2 0 | |
1815 | #define STB0899_WIDTH_ACRPRESC2 3 | |
1816 | ||
8bd135ba MA |
1817 | #define STB0899_ACRDIV1 0xf111 |
1818 | #define STB0899_ACRDIV2 0xf112 | |
1819 | #define STB0899_DACR1 0xf113 | |
1820 | #define STB0899_DACR2 0xf114 | |
1821 | #define STB0899_OUTCFG 0xf11c | |
1822 | #define STB0899_MODECFG 0xf11d | |
1823 | #define STB0899_NCOARSE 0xf1b3 | |
1824 | ||
1825 | #define STB0899_SYNTCTRL 0xf1b6 | |
1826 | #define STB0899_STANDBY (0x01 << 7) | |
1827 | #define STB0899_OFFST_STANDBY 7 | |
1828 | #define STB0899_WIDTH_STANDBY 1 | |
1829 | #define STB0899_BYPASSPLL (0x01 << 6) | |
1830 | #define STB0899_OFFST_BYPASSPLL 6 | |
1831 | #define STB0899_WIDTH_BYPASSPLL 1 | |
1832 | #define STB0899_SEL1XRATIO (0x01 << 5) | |
1833 | #define STB0899_OFFST_SEL1XRATIO 5 | |
1834 | #define STB0899_WIDTH_SEL1XRATIO 1 | |
1835 | #define STB0899_SELOSCI (0x01 << 1) | |
1836 | #define STB0899_OFFST_SELOSCI 1 | |
1837 | #define STB0899_WIDTH_SELOSCI 1 | |
1838 | ||
1839 | #define STB0899_FILTCTRL 0xf1b7 | |
1840 | #define STB0899_SYSCTRL 0xf1b8 | |
1841 | ||
1842 | #define STB0899_STOPCLK1 0xf1c2 | |
1843 | #define STB0899_STOP_CKINTBUF108 (0x01 << 7) | |
1844 | #define STB0899_OFFST_STOP_CKINTBUF108 7 | |
1845 | #define STB0899_WIDTH_STOP_CKINTBUF108 1 | |
1846 | #define STB0899_STOP_CKINTBUF216 (0x01 << 6) | |
1847 | #define STB0899_OFFST_STOP_CKINTBUF216 6 | |
1848 | #define STB0899_WIDTH_STOP_CKINTBUF216 1 | |
1849 | #define STB0899_STOP_CHK8PSK (0x01 << 5) | |
1850 | #define STB0899_OFFST_STOP_CHK8PSK 5 | |
1851 | #define STB0899_WIDTH_STOP_CHK8PSK 1 | |
1852 | #define STB0899_STOP_CKFEC108 (0x01 << 4) | |
1853 | #define STB0899_OFFST_STOP_CKFEC108 4 | |
1854 | #define STB0899_WIDTH_STOP_CKFEC108 1 | |
1855 | #define STB0899_STOP_CKFEC216 (0x01 << 3) | |
1856 | #define STB0899_OFFST_STOP_CKFEC216 3 | |
1857 | #define STB0899_WIDTH_STOP_CKFEC216 1 | |
1858 | #define STB0899_STOP_CKCORE216 (0x01 << 2) | |
1859 | #define STB0899_OFFST_STOP_CKCORE216 2 | |
1860 | #define STB0899_WIDTH_STOP_CKCORE216 1 | |
1861 | #define STB0899_STOP_CKADCI108 (0x01 << 1) | |
1862 | #define STB0899_OFFST_STOP_CKADCI108 1 | |
1863 | #define STB0899_WIDTH_STOP_CKADCI108 1 | |
1864 | #define STB0899_STOP_INVCKADCI108 (0x01 << 0) | |
1865 | #define STB0899_OFFST_STOP_INVCKADCI108 0 | |
1866 | #define STB0899_WIDTH_STOP_INVCKADCI108 1 | |
1867 | ||
1868 | #define STB0899_STOPCLK2 0xf1c3 | |
1869 | #define STB0899_STOP_CKS2DMD108 (0x01 << 2) | |
1870 | #define STB0899_OFFST_STOP_CKS2DMD108 2 | |
1871 | #define STB0899_WIDTH_STOP_CKS2DMD108 1 | |
1872 | #define STB0899_STOP_CKPKDLIN108 (0x01 << 1) | |
1873 | #define STB0899_OFFST_STOP_CKPKDLIN108 1 | |
1874 | #define STB0899_WIDTH_STOP_CKPKDLIN108 1 | |
1875 | #define STB0899_STOP_CKPKDLIN216 (0x01 << 0) | |
1876 | #define STB0899_OFFST_STOP_CKPKDLIN216 0 | |
1877 | #define STB0899_WIDTH_STOP_CKPKDLIN216 1 | |
1878 | ||
1879 | #define STB0899_TSTTNR1 0xf1e0 | |
1880 | #define STB0899_BYPASS_ADC (0x01 << 7) | |
1881 | #define STB0899_OFFST_BYPASS_ADC 7 | |
1882 | #define STB0899_WIDTH_BYPASS_ADC 1 | |
1883 | #define STB0899_INVADCICKOUT (0x01 << 6) | |
1884 | #define STB0899_OFFST_INVADCICKOUT 6 | |
1885 | #define STB0899_WIDTH_INVADCICKOUT 1 | |
1886 | #define STB0899_ADCTEST_VOLTAGE (0x03 << 4) | |
1887 | #define STB0899_OFFST_ADCTEST_VOLTAGE 4 | |
1888 | #define STB0899_WIDTH_ADCTEST_VOLTAGE 1 | |
1889 | #define STB0899_ADC_RESET (0x01 << 3) | |
1890 | #define STB0899_OFFST_ADC_RESET 3 | |
1891 | #define STB0899_WIDTH_ADC_RESET 1 | |
1892 | #define STB0899_TSTTNR1_2 (0x01 << 2) | |
1893 | #define STB0899_OFFST_TSTTNR1_2 2 | |
1894 | #define STB0899_WIDTH_TSTTNR1_2 1 | |
1895 | #define STB0899_ADCPON (0x01 << 1) | |
1896 | #define STB0899_OFFST_ADCPON 1 | |
1897 | #define STB0899_WIDTH_ADCPON 1 | |
1898 | #define STB0899_ADCIN_MODE (0x01 << 0) | |
1899 | #define STB0899_OFFST_ADCIN_MODE 0 | |
1900 | #define STB0899_WIDTH_ADCIN_MODE 1 | |
1901 | ||
1902 | #define STB0899_TSTTNR2 0xf1e1 | |
1903 | #define STB0899_TSTTNR2_7 (0x01 << 7) | |
1904 | #define STB0899_OFFST_TSTTNR2_7 7 | |
1905 | #define STB0899_WIDTH_TSTTNR2_7 1 | |
1906 | #define STB0899_NOT_DISRX_WIRED (0x01 << 6) | |
1907 | #define STB0899_OFFST_NOT_DISRX_WIRED 6 | |
1908 | #define STB0899_WIDTH_NOT_DISRX_WIRED 1 | |
1909 | #define STB0899_DISEQC_DCURRENT (0x01 << 5) | |
1910 | #define STB0899_OFFST_DISEQC_DCURRENT 5 | |
1911 | #define STB0899_WIDTH_DISEQC_DCURRENT 1 | |
1912 | #define STB0899_DISEQC_ZCURRENT (0x01 << 4) | |
1913 | #define STB0899_OFFST_DISEQC_ZCURRENT 4 | |
1914 | #define STB0899_WIDTH_DISEQC_ZCURRENT 1 | |
1915 | #define STB0899_DISEQC_SINC_SOURCE (0x03 << 2) | |
1916 | #define STB0899_OFFST_DISEQC_SINC_SOURCE 2 | |
1917 | #define STB0899_WIDTH_DISEQC_SINC_SOURCE 2 | |
1918 | #define STB0899_SELIQSRC (0x03 << 0) | |
1919 | #define STB0899_OFFST_SELIQSRC 0 | |
1920 | #define STB0899_WIDTH_SELIQSRC 2 | |
1921 | ||
1922 | #define STB0899_TSTTNR3 0xf1e2 | |
1923 | ||
1924 | #define STB0899_I2CCFG 0xf129 | |
1925 | #define STB0899_I2CCFGRSVD (0x0f << 4) | |
1926 | #define STB0899_OFFST_I2CCFGRSVD 4 | |
1927 | #define STB0899_WIDTH_I2CCFGRSVD 4 | |
1928 | #define STB0899_I2CFASTMODE (0x01 << 3) | |
1929 | #define STB0899_OFFST_I2CFASTMODE 3 | |
1930 | #define STB0899_WIDTH_I2CFASTMODE 1 | |
1931 | #define STB0899_STATUSWR (0x01 << 2) | |
1932 | #define STB0899_OFFST_STATUSWR 2 | |
1933 | #define STB0899_WIDTH_STATUSWR 1 | |
1934 | #define STB0899_I2CADDRINC (0x03 << 0) | |
1935 | #define STB0899_OFFST_I2CADDRINC 0 | |
1936 | #define STB0899_WIDTH_I2CADDRINC 2 | |
1937 | ||
1938 | #define STB0899_I2CRPT 0xf12a | |
1939 | #define STB0899_I2CTON (0x01 << 7) | |
1940 | #define STB0899_OFFST_I2CTON 7 | |
1941 | #define STB0899_WIDTH_I2CTON 1 | |
1942 | #define STB0899_ENARPTLEVEL (0x01 << 6) | |
1943 | #define STB0899_OFFST_ENARPTLEVEL 6 | |
1944 | #define STB0899_WIDTH_ENARPTLEVEL 2 | |
1945 | #define STB0899_SCLTDELAY (0x01 << 3) | |
1946 | #define STB0899_OFFST_SCLTDELAY 3 | |
1947 | #define STB0899_WIDTH_SCLTDELAY 1 | |
1948 | #define STB0899_STOPENA (0x01 << 2) | |
1949 | #define STB0899_OFFST_STOPENA 2 | |
1950 | #define STB0899_WIDTH_STOPENA 1 | |
1951 | #define STB0899_STOPSDAT2SDA (0x01 << 1) | |
1952 | #define STB0899_OFFST_STOPSDAT2SDA 1 | |
1953 | #define STB0899_WIDTH_STOPSDAT2SDA 1 | |
1954 | ||
1955 | #define STB0899_IOPVALUE8 0xf136 | |
1956 | #define STB0899_IOPVALUE7 0xf137 | |
1957 | #define STB0899_IOPVALUE6 0xf138 | |
1958 | #define STB0899_IOPVALUE5 0xf139 | |
1959 | #define STB0899_IOPVALUE4 0xf13a | |
1960 | #define STB0899_IOPVALUE3 0xf13b | |
1961 | #define STB0899_IOPVALUE2 0xf13c | |
1962 | #define STB0899_IOPVALUE1 0xf13d | |
1963 | #define STB0899_IOPVALUE0 0xf13e | |
1964 | ||
1965 | #define STB0899_GPIO00CFG 0xf140 | |
1966 | ||
1967 | #define STB0899_GPIO01CFG 0xf141 | |
1968 | #define STB0899_GPIO02CFG 0xf142 | |
1969 | #define STB0899_GPIO03CFG 0xf143 | |
1970 | #define STB0899_GPIO04CFG 0xf144 | |
1971 | #define STB0899_GPIO05CFG 0xf145 | |
1972 | #define STB0899_GPIO06CFG 0xf146 | |
1973 | #define STB0899_GPIO07CFG 0xf147 | |
1974 | #define STB0899_GPIO08CFG 0xf148 | |
1975 | #define STB0899_GPIO09CFG 0xf149 | |
1976 | #define STB0899_GPIO10CFG 0xf14a | |
1977 | #define STB0899_GPIO11CFG 0xf14b | |
1978 | #define STB0899_GPIO12CFG 0xf14c | |
1979 | #define STB0899_GPIO13CFG 0xf14d | |
1980 | #define STB0899_GPIO14CFG 0xf14e | |
1981 | #define STB0899_GPIO15CFG 0xf14f | |
1982 | #define STB0899_GPIO16CFG 0xf150 | |
1983 | #define STB0899_GPIO17CFG 0xf151 | |
1984 | #define STB0899_GPIO18CFG 0xf152 | |
1985 | #define STB0899_GPIO19CFG 0xf153 | |
1986 | #define STB0899_GPIO20CFG 0xf154 | |
1987 | ||
1988 | #define STB0899_SDATCFG 0xf155 | |
1989 | #define STB0899_SCLTCFG 0xf156 | |
1990 | #define STB0899_AGCRFCFG 0xf157 | |
1991 | #define STB0899_GPIO22 0xf158 /* AGCBB2CFG */ | |
1992 | #define STB0899_GPIO21 0xf159 /* AGCBB1CFG */ | |
1993 | #define STB0899_DIRCLKCFG 0xf15a | |
1994 | #define STB0899_CLKOUT27CFG 0xf15b | |
1995 | #define STB0899_STDBYCFG 0xf15c | |
1996 | #define STB0899_CS0CFG 0xf15d | |
1997 | #define STB0899_CS1CFG 0xf15e | |
1998 | #define STB0899_DISEQCOCFG 0xf15f | |
1999 | ||
2000 | #define STB0899_GPIO32CFG 0xf160 | |
2001 | #define STB0899_GPIO33CFG 0xf161 | |
2002 | #define STB0899_GPIO34CFG 0xf162 | |
2003 | #define STB0899_GPIO35CFG 0xf163 | |
2004 | #define STB0899_GPIO36CFG 0xf164 | |
2005 | #define STB0899_GPIO37CFG 0xf165 | |
2006 | #define STB0899_GPIO38CFG 0xf166 | |
2007 | #define STB0899_GPIO39CFG 0xf167 | |
2008 | ||
2009 | #define STB0899_IRQSTATUS_3 0xf120 | |
2010 | #define STB0899_IRQSTATUS_2 0xf121 | |
2011 | #define STB0899_IRQSTATUS_1 0xf122 | |
2012 | #define STB0899_IRQSTATUS_0 0xf123 | |
2013 | ||
2014 | #define STB0899_IRQMSK_3 0xf124 | |
2015 | #define STB0899_IRQMSK_2 0xf125 | |
2016 | #define STB0899_IRQMSK_1 0xf126 | |
2017 | #define STB0899_IRQMSK_0 0xf127 | |
2018 | ||
2019 | #define STB0899_IRQCFG 0xf128 | |
2020 | ||
2021 | #define STB0899_GHOSTREG 0xf000 | |
2022 | ||
2023 | #define STB0899_S2DEMOD 0xf3fc | |
2024 | #define STB0899_S2FEC 0xfafc | |
2025 | ||
2026 | ||
2027 | #endif |