]> Git Repo - linux.git/blame - drivers/hwmon/f71882fg.c
projects / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
hwmon: (emc6w201) Properly handle all errors
[linux.git] / drivers / hwmon / f71882fg.c
CommitLineData
45fb3669
HG		 1/***************************************************************************
2 * Copyright (C) 2006 by Hans Edgington <[email protected]> *
44c4dc52 3 * Copyright (C) 2007-2011 Hans de Goede <[email protected]> *
45fb3669
HG		 4 * *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
9 * *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
14 * *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program; if not, write to the *
17 * Free Software Foundation, Inc., *
18 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
19 ***************************************************************************/
20
22d3b412
JP		 21#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
22
45fb3669
HG		 23#include <linux/module.h>
24#include <linux/init.h>
25#include <linux/slab.h>
26#include <linux/jiffies.h>
27#include <linux/platform_device.h>
28#include <linux/hwmon.h>
29#include <linux/hwmon-sysfs.h>
30#include <linux/err.h>
31#include <linux/mutex.h>
77a4a3e2 32#include <linux/io.h>
b9acb64a 33#include <linux/acpi.h>
45fb3669
HG		 34
35#define DRVNAME "f71882fg"
36
09475d32 37#define SIO_F71858FG_LD_HWM 0x02 /* Hardware monitor logical device */
77a4a3e2 38#define SIO_F71882FG_LD_HWM 0x04 /* Hardware monitor logical device */
45fb3669 39#define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */
14a4019d 40#define SIO_LOCK_KEY 0xAA /* Key to disable Super-I/O */
45fb3669
HG		 41
42#define SIO_REG_LDSEL 0x07 /* Logical device select */
43#define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
44#define SIO_REG_DEVREV 0x22 /* Device revision */
45#define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */
46#define SIO_REG_ENABLE 0x30 /* Logical device enable */
47#define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
48
49#define SIO_FINTEK_ID 0x1934 /* Manufacturers ID */
e5e713cb 50#define SIO_F71808E_ID 0x0901 /* Chipset ID */
629c58ba 51#define SIO_F71808A_ID 0x1001 /* Chipset ID */
09475d32 52#define SIO_F71858_ID 0x0507 /* Chipset ID */
498be968 53#define SIO_F71862_ID 0x0601 /* Chipset ID */
c11bb993 54#define SIO_F71869_ID 0x0814 /* Chipset ID */
45fb3669 55#define SIO_F71882_ID 0x0541 /* Chipset ID */
7669896f 56#define SIO_F71889_ID 0x0723 /* Chipset ID */
3cad4022 57#define SIO_F71889E_ID 0x0909 /* Chipset ID */
a66c1088 58#define SIO_F71889A_ID 0x1005 /* Chipset ID */
ed4f7c20 59#define SIO_F8000_ID 0x0581 /* Chipset ID */
383586b1 60#define SIO_F81865_ID 0x0704 /* Chipset ID */
45fb3669
HG		 61
62#define REGION_LENGTH 8
63#define ADDR_REG_OFFSET 5
64#define DATA_REG_OFFSET 6
65
3cad4022
HG		 66#define F71882FG_REG_IN_STATUS 0x12 /* f7188x only */
67#define F71882FG_REG_IN_BEEP 0x13 /* f7188x only */
45fb3669 68#define F71882FG_REG_IN(nr) (0x20 + (nr))
3cad4022 69#define F71882FG_REG_IN1_HIGH 0x32 /* f7188x only */
45fb3669
HG		 70
71#define F71882FG_REG_FAN(nr) (0xA0 + (16 * (nr)))
9ab796eb
MD		 72#define F71882FG_REG_FAN_TARGET(nr) (0xA2 + (16 * (nr)))
73#define F71882FG_REG_FAN_FULL_SPEED(nr) (0xA4 + (16 * (nr)))
45fb3669
HG		 74#define F71882FG_REG_FAN_STATUS 0x92
75#define F71882FG_REG_FAN_BEEP 0x93
76
7567a043
HG		 77#define F71882FG_REG_TEMP(nr) (0x70 + 2 * (nr))
78#define F71882FG_REG_TEMP_OVT(nr) (0x80 + 2 * (nr))
79#define F71882FG_REG_TEMP_HIGH(nr) (0x81 + 2 * (nr))
45fb3669
HG		 80#define F71882FG_REG_TEMP_STATUS 0x62
81#define F71882FG_REG_TEMP_BEEP 0x63
09475d32 82#define F71882FG_REG_TEMP_CONFIG 0x69
bc27490f 83#define F71882FG_REG_TEMP_HYST(nr) (0x6C + (nr))
45fb3669
HG		 84#define F71882FG_REG_TEMP_TYPE 0x6B
85#define F71882FG_REG_TEMP_DIODE_OPEN 0x6F
86
9ab796eb
MD		 87#define F71882FG_REG_PWM(nr) (0xA3 + (16 * (nr)))
88#define F71882FG_REG_PWM_TYPE 0x94
89#define F71882FG_REG_PWM_ENABLE 0x96
90
bc27490f 91#define F71882FG_REG_FAN_HYST(nr) (0x98 + (nr))
9ab796eb 92
98f7ba19
HG		 93#define F71882FG_REG_FAN_FAULT_T 0x9F
94#define F71882FG_FAN_NEG_TEMP_EN 0x20
3cad4022 95#define F71882FG_FAN_PROG_SEL 0x80
98f7ba19 96
9ab796eb
MD		 97#define F71882FG_REG_POINT_PWM(pwm, point) (0xAA + (point) + (16 * (pwm)))
98#define F71882FG_REG_POINT_TEMP(pwm, point) (0xA6 + (point) + (16 * (pwm)))
99#define F71882FG_REG_POINT_MAPPING(nr) (0xAF + 16 * (nr))
100
45fb3669
HG		 101#define F71882FG_REG_START 0x01
102
0bae6400
HG		 103#define F71882FG_MAX_INS 9
104
45fb3669
HG		 105#define FAN_MIN_DETECT 366 /* Lowest detectable fanspeed */
106
67b671bc
JD		 107static unsigned short force_id;
108module_param(force_id, ushort, 0);
109MODULE_PARM_DESC(force_id, "Override the detected device ID");
110
629c58ba 111enum chips { f71808e, f71808a, f71858fg, f71862fg, f71869, f71882fg, f71889fg,
a66c1088 112 f71889ed, f71889a, f8000, f81865f };
498be968
HG		 113
114static const char *f71882fg_names[] = {
e5e713cb 115 "f71808e",
629c58ba 116 "f71808a",
09475d32 117 "f71858fg",
498be968 118 "f71862fg",
c11bb993 119 "f71869", /* Both f71869f and f71869e, reg. compatible and same id */
498be968 120 "f71882fg",
5d7f77bf 121 "f71889fg", /* f81801u too, same id */
3cad4022 122 "f71889ed",
a66c1088 123 "f71889a",
ed4f7c20 124 "f8000",
383586b1 125 "f81865f",
498be968
HG		 126};
127
2740c60c
JD		 128static const char f71882fg_has_in[][F71882FG_MAX_INS] = {
129 [f71808e] = { 1, 1, 1, 1, 1, 1, 0, 1, 1 },
629c58ba 130 [f71808a] = { 1, 1, 1, 1, 0, 0, 0, 1, 1 },
2740c60c
JD		 131 [f71858fg] = { 1, 1, 1, 0, 0, 0, 0, 0, 0 },
132 [f71862fg] = { 1, 1, 1, 1, 1, 1, 1, 1, 1 },
133 [f71869] = { 1, 1, 1, 1, 1, 1, 1, 1, 1 },
134 [f71882fg] = { 1, 1, 1, 1, 1, 1, 1, 1, 1 },
135 [f71889fg] = { 1, 1, 1, 1, 1, 1, 1, 1, 1 },
136 [f71889ed] = { 1, 1, 1, 1, 1, 1, 1, 1, 1 },
a66c1088 137 [f71889a] = { 1, 1, 1, 1, 1, 1, 1, 1, 1 },
2740c60c 138 [f8000] = { 1, 1, 1, 0, 0, 0, 0, 0, 0 },
383586b1 139 [f81865f] = { 1, 1, 1, 1, 1, 1, 1, 0, 0 },
0bae6400
HG		 140};
141
2740c60c
JD		 142static const char f71882fg_has_in1_alarm[] = {
143 [f71808e] = 0,
629c58ba 144 [f71808a] = 0,
2740c60c
JD		 145 [f71858fg] = 0,
146 [f71862fg] = 0,
147 [f71869] = 0,
148 [f71882fg] = 1,
149 [f71889fg] = 1,
150 [f71889ed] = 1,
a66c1088 151 [f71889a] = 1,
2740c60c 152 [f8000] = 0,
383586b1 153 [f81865f] = 1,
0bae6400
HG		 154};
155
4d53811a 156static const char f71882fg_fan_has_beep[] = {
2740c60c 157 [f71808e] = 0,
629c58ba 158 [f71808a] = 0,
2740c60c
JD		 159 [f71858fg] = 0,
160 [f71862fg] = 1,
161 [f71869] = 1,
162 [f71882fg] = 1,
163 [f71889fg] = 1,
164 [f71889ed] = 1,
a66c1088 165 [f71889a] = 1,
2740c60c 166 [f8000] = 0,
383586b1 167 [f81865f] = 1,
78aa4f72
HG		 168};
169
f27def07
JD		 170static const char f71882fg_nr_fans[] = {
171 [f71808e] = 3,
629c58ba 172 [f71808a] = 2, /* +1 fan which is monitor + simple pwm only */
f27def07
JD		 173 [f71858fg] = 3,
174 [f71862fg] = 3,
175 [f71869] = 3,
176 [f71882fg] = 4,
177 [f71889fg] = 3,
178 [f71889ed] = 3,
a66c1088 179 [f71889a] = 3,
629c58ba 180 [f8000] = 3, /* +1 fan which is monitor only */
383586b1 181 [f81865f] = 2,
f27def07
JD		 182};
183
4d53811a
HG		 184static const char f71882fg_temp_has_beep[] = {
185 [f71808e] = 0,
629c58ba 186 [f71808a] = 1,
4d53811a
HG		 187 [f71858fg] = 0,
188 [f71862fg] = 1,
189 [f71869] = 1,
190 [f71882fg] = 1,
191 [f71889fg] = 1,
192 [f71889ed] = 1,
193 [f71889a] = 1,
194 [f8000] = 0,
195 [f81865f] = 1,
196};
197
f27def07
JD		 198static const char f71882fg_nr_temps[] = {
199 [f71808e] = 2,
629c58ba 200 [f71808a] = 2,
f27def07
JD		 201 [f71858fg] = 3,
202 [f71862fg] = 3,
203 [f71869] = 3,
204 [f71882fg] = 3,
205 [f71889fg] = 3,
206 [f71889ed] = 3,
a66c1088 207 [f71889a] = 3,
f27def07 208 [f8000] = 3,
383586b1 209 [f81865f] = 2,
f27def07
JD		 210};
211
77a4a3e2 212static struct platform_device *f71882fg_pdev;
45fb3669
HG		 213
214/* Super-I/O Function prototypes */
215static inline int superio_inb(int base, int reg);
216static inline int superio_inw(int base, int reg);
cadb8657 217static inline int superio_enter(int base);
45fb3669
HG		 218static inline void superio_select(int base, int ld);
219static inline void superio_exit(int base);
220
498be968
HG		 221struct f71882fg_sio_data {
222 enum chips type;
223};
224
45fb3669
HG		 225struct f71882fg_data {
226 unsigned short addr;
498be968 227 enum chips type;
1beeffe4 228 struct device *hwmon_dev;
45fb3669
HG		 229
230 struct mutex update_lock;
09475d32 231 int temp_start; /* temp numbering start (0 or 1) */
45fb3669 232 char valid; /* !=0 if following fields are valid */
98f7ba19 233 char auto_point_temp_signed;
45fb3669
HG		 234 unsigned long last_updated; /* In jiffies */
235 unsigned long last_limits; /* In jiffies */
236
237 /* Register Values */
0bae6400 238 u8 in[F71882FG_MAX_INS];
45fb3669
HG		 239 u8 in1_max;
240 u8 in_status;
241 u8 in_beep;
242 u16 fan[4];
9ab796eb
MD		 243 u16 fan_target[4];
244 u16 fan_full_speed[4];
45fb3669
HG		 245 u8 fan_status;
246 u8 fan_beep;
e5e713cb 247 /* Note: all models have max 3 temperature channels, but on some
7567a043
HG		 248 they are addressed as 0-2 and on others as 1-3, so for coding
249 convenience we reserve space for 4 channels */
09475d32 250 u16 temp[4];
7567a043
HG		 251 u8 temp_ovt[4];
252 u8 temp_high[4];
bc27490f 253 u8 temp_hyst[2]; /* 2 hysts stored per reg */
7567a043 254 u8 temp_type[4];
45fb3669
HG		 255 u8 temp_status;
256 u8 temp_beep;
257 u8 temp_diode_open;
09475d32 258 u8 temp_config;
9ab796eb
MD		 259 u8 pwm[4];
260 u8 pwm_enable;
261 u8 pwm_auto_point_hyst[2];
262 u8 pwm_auto_point_mapping[4];
263 u8 pwm_auto_point_pwm[4][5];
7669896f 264 s8 pwm_auto_point_temp[4][4];
45fb3669
HG		 265};
266
77a4a3e2 267/* Sysfs in */
45fb3669
HG		 268static ssize_t show_in(struct device *dev, struct device_attribute *devattr,
269 char *buf);
270static ssize_t show_in_max(struct device *dev, struct device_attribute
271 *devattr, char *buf);
272static ssize_t store_in_max(struct device *dev, struct device_attribute
273 *devattr, const char *buf, size_t count);
274static ssize_t show_in_beep(struct device *dev, struct device_attribute
275 *devattr, char *buf);
276static ssize_t store_in_beep(struct device *dev, struct device_attribute
277 *devattr, const char *buf, size_t count);
278static ssize_t show_in_alarm(struct device *dev, struct device_attribute
279 *devattr, char *buf);
280/* Sysfs Fan */
281static ssize_t show_fan(struct device *dev, struct device_attribute *devattr,
282 char *buf);
9ab796eb
MD		 283static ssize_t show_fan_full_speed(struct device *dev,
284 struct device_attribute *devattr, char *buf);
285static ssize_t store_fan_full_speed(struct device *dev,
286 struct device_attribute *devattr, const char *buf, size_t count);
45fb3669
HG		 287static ssize_t show_fan_beep(struct device *dev, struct device_attribute
288 *devattr, char *buf);
289static ssize_t store_fan_beep(struct device *dev, struct device_attribute
290 *devattr, const char *buf, size_t count);
291static ssize_t show_fan_alarm(struct device *dev, struct device_attribute
292 *devattr, char *buf);
293/* Sysfs Temp */
294static ssize_t show_temp(struct device *dev, struct device_attribute
295 *devattr, char *buf);
296static ssize_t show_temp_max(struct device *dev, struct device_attribute
297 *devattr, char *buf);
298static ssize_t store_temp_max(struct device *dev, struct device_attribute
299 *devattr, const char *buf, size_t count);
300static ssize_t show_temp_max_hyst(struct device *dev, struct device_attribute
301 *devattr, char *buf);
302static ssize_t store_temp_max_hyst(struct device *dev, struct device_attribute
303 *devattr, const char *buf, size_t count);
304static ssize_t show_temp_crit(struct device *dev, struct device_attribute
305 *devattr, char *buf);
306static ssize_t store_temp_crit(struct device *dev, struct device_attribute
307 *devattr, const char *buf, size_t count);
308static ssize_t show_temp_crit_hyst(struct device *dev, struct device_attribute
309 *devattr, char *buf);
310static ssize_t show_temp_type(struct device *dev, struct device_attribute
311 *devattr, char *buf);
312static ssize_t show_temp_beep(struct device *dev, struct device_attribute
313 *devattr, char *buf);
314static ssize_t store_temp_beep(struct device *dev, struct device_attribute
315 *devattr, const char *buf, size_t count);
316static ssize_t show_temp_alarm(struct device *dev, struct device_attribute
317 *devattr, char *buf);
318static ssize_t show_temp_fault(struct device *dev, struct device_attribute
319 *devattr, char *buf);
9ab796eb
MD		 320/* PWM and Auto point control */
321static ssize_t show_pwm(struct device *dev, struct device_attribute *devattr,
322 char *buf);
323static ssize_t store_pwm(struct device *dev, struct device_attribute *devattr,
324 const char *buf, size_t count);
629c58ba
HG		 325static ssize_t show_simple_pwm(struct device *dev,
326 struct device_attribute *devattr, char *buf);
327static ssize_t store_simple_pwm(struct device *dev,
328 struct device_attribute *devattr, const char *buf, size_t count);
9ab796eb
MD		 329static ssize_t show_pwm_enable(struct device *dev,
330 struct device_attribute *devattr, char *buf);
331static ssize_t store_pwm_enable(struct device *dev,
332 struct device_attribute *devattr, const char *buf, size_t count);
333static ssize_t show_pwm_interpolate(struct device *dev,
334 struct device_attribute *devattr, char *buf);
335static ssize_t store_pwm_interpolate(struct device *dev,
336 struct device_attribute *devattr, const char *buf, size_t count);
337static ssize_t show_pwm_auto_point_channel(struct device *dev,
338 struct device_attribute *devattr, char *buf);
339static ssize_t store_pwm_auto_point_channel(struct device *dev,
340 struct device_attribute *devattr, const char *buf, size_t count);
341static ssize_t show_pwm_auto_point_temp_hyst(struct device *dev,
342 struct device_attribute *devattr, char *buf);
343static ssize_t store_pwm_auto_point_temp_hyst(struct device *dev,
344 struct device_attribute *devattr, const char *buf, size_t count);
345static ssize_t show_pwm_auto_point_pwm(struct device *dev,
346 struct device_attribute *devattr, char *buf);
347static ssize_t store_pwm_auto_point_pwm(struct device *dev,
348 struct device_attribute *devattr, const char *buf, size_t count);
349static ssize_t show_pwm_auto_point_temp(struct device *dev,
350 struct device_attribute *devattr, char *buf);
351static ssize_t store_pwm_auto_point_temp(struct device *dev,
352 struct device_attribute *devattr, const char *buf, size_t count);
45fb3669
HG		 353/* Sysfs misc */
354static ssize_t show_name(struct device *dev, struct device_attribute *devattr,
355 char *buf);
356
357static int __devinit f71882fg_probe(struct platform_device * pdev);
c13548c5 358static int f71882fg_remove(struct platform_device *pdev);
45fb3669
HG		 359
360static struct platform_driver f71882fg_driver = {
361 .driver = {
362 .owner = THIS_MODULE,
363 .name = DRVNAME,
364 },
365 .probe = f71882fg_probe,
cd659fd0 366 .remove = f71882fg_remove,
45fb3669
HG		 367};
368
c13548c5 369static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
45fb3669 370
0bae6400
HG		 371/* Temp attr for the f71858fg, the f71858fg is special as it has its
372 temperature indexes start at 0 (the others start at 1) */
373static struct sensor_device_attribute_2 f71858fg_temp_attr[] = {
09475d32
HG		 374 SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0),
375 SENSOR_ATTR_2(temp1_max, S_IRUGO|S_IWUSR, show_temp_max,
376 store_temp_max, 0, 0),
377 SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
378 store_temp_max_hyst, 0, 0),
379 SENSOR_ATTR_2(temp1_max_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 0),
380 SENSOR_ATTR_2(temp1_crit, S_IRUGO|S_IWUSR, show_temp_crit,
381 store_temp_crit, 0, 0),
382 SENSOR_ATTR_2(temp1_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
383 0, 0),
384 SENSOR_ATTR_2(temp1_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 4),
385 SENSOR_ATTR_2(temp1_fault, S_IRUGO, show_temp_fault, NULL, 0, 0),
386 SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 0, 1),
387 SENSOR_ATTR_2(temp2_max, S_IRUGO|S_IWUSR, show_temp_max,
388 store_temp_max, 0, 1),
389 SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
390 store_temp_max_hyst, 0, 1),
391 SENSOR_ATTR_2(temp2_max_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 1),
392 SENSOR_ATTR_2(temp2_crit, S_IRUGO|S_IWUSR, show_temp_crit,
393 store_temp_crit, 0, 1),
394 SENSOR_ATTR_2(temp2_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
395 0, 1),
396 SENSOR_ATTR_2(temp2_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 5),
09475d32
HG		 397 SENSOR_ATTR_2(temp2_fault, S_IRUGO, show_temp_fault, NULL, 0, 1),
398 SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 0, 2),
399 SENSOR_ATTR_2(temp3_max, S_IRUGO|S_IWUSR, show_temp_max,
400 store_temp_max, 0, 2),
401 SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
402 store_temp_max_hyst, 0, 2),
403 SENSOR_ATTR_2(temp3_max_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 2),
404 SENSOR_ATTR_2(temp3_crit, S_IRUGO|S_IWUSR, show_temp_crit,
405 store_temp_crit, 0, 2),
406 SENSOR_ATTR_2(temp3_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
407 0, 2),
408 SENSOR_ATTR_2(temp3_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 6),
409 SENSOR_ATTR_2(temp3_fault, S_IRUGO, show_temp_fault, NULL, 0, 2),
410};
411
0bae6400 412/* Temp attr for the standard models */
78aa4f72 413static struct sensor_device_attribute_2 fxxxx_temp_attr[3][9] = { {
7567a043 414 SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 1),
bc37ae71 415 SENSOR_ATTR_2(temp1_max, S_IRUGO|S_IWUSR, show_temp_max,
7567a043 416 store_temp_max, 0, 1),
bc37ae71 417 SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
7567a043 418 store_temp_max_hyst, 0, 1),
754a5907
HG		 419 /* Should really be temp1_max_alarm, but older versions did not handle
420 the max and crit alarms separately and lm_sensors v2 depends on the
421 presence of temp#_alarm files. The same goes for temp2/3 _alarm. */
422 SENSOR_ATTR_2(temp1_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 1),
bc37ae71 423 SENSOR_ATTR_2(temp1_crit, S_IRUGO|S_IWUSR, show_temp_crit,
7567a043 424 store_temp_crit, 0, 1),
bc37ae71 425 SENSOR_ATTR_2(temp1_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
7567a043 426 0, 1),
754a5907 427 SENSOR_ATTR_2(temp1_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 5),
7567a043 428 SENSOR_ATTR_2(temp1_type, S_IRUGO, show_temp_type, NULL, 0, 1),
7567a043 429 SENSOR_ATTR_2(temp1_fault, S_IRUGO, show_temp_fault, NULL, 0, 1),
60d2b378 430}, {
7567a043 431 SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 0, 2),
bc37ae71 432 SENSOR_ATTR_2(temp2_max, S_IRUGO|S_IWUSR, show_temp_max,
7567a043 433 store_temp_max, 0, 2),
bc37ae71 434 SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
7567a043 435 store_temp_max_hyst, 0, 2),
754a5907
HG		 436 /* Should be temp2_max_alarm, see temp1_alarm note */
437 SENSOR_ATTR_2(temp2_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 2),
bc37ae71 438 SENSOR_ATTR_2(temp2_crit, S_IRUGO|S_IWUSR, show_temp_crit,
7567a043 439 store_temp_crit, 0, 2),
bc37ae71 440 SENSOR_ATTR_2(temp2_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
7567a043 441 0, 2),
754a5907 442 SENSOR_ATTR_2(temp2_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 6),
7567a043 443 SENSOR_ATTR_2(temp2_type, S_IRUGO, show_temp_type, NULL, 0, 2),
7567a043 444 SENSOR_ATTR_2(temp2_fault, S_IRUGO, show_temp_fault, NULL, 0, 2),
60d2b378 445}, {
7567a043 446 SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 0, 3),
bc37ae71 447 SENSOR_ATTR_2(temp3_max, S_IRUGO|S_IWUSR, show_temp_max,
7567a043 448 store_temp_max, 0, 3),
bc37ae71 449 SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
7567a043 450 store_temp_max_hyst, 0, 3),
754a5907
HG		 451 /* Should be temp3_max_alarm, see temp1_alarm note */
452 SENSOR_ATTR_2(temp3_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 3),
bc37ae71 453 SENSOR_ATTR_2(temp3_crit, S_IRUGO|S_IWUSR, show_temp_crit,
7567a043 454 store_temp_crit, 0, 3),
bc37ae71 455 SENSOR_ATTR_2(temp3_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
7567a043 456 0, 3),
754a5907 457 SENSOR_ATTR_2(temp3_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 7),
7567a043 458 SENSOR_ATTR_2(temp3_type, S_IRUGO, show_temp_type, NULL, 0, 3),
7567a043 459 SENSOR_ATTR_2(temp3_fault, S_IRUGO, show_temp_fault, NULL, 0, 3),
60d2b378 460} };
45fb3669 461
78aa4f72
HG		 462/* Temp attr for models which can beep on temp alarm */
463static struct sensor_device_attribute_2 fxxxx_temp_beep_attr[3][2] = { {
464 SENSOR_ATTR_2(temp1_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
465 store_temp_beep, 0, 1),
466 SENSOR_ATTR_2(temp1_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
467 store_temp_beep, 0, 5),
468}, {
469 SENSOR_ATTR_2(temp2_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
470 store_temp_beep, 0, 2),
471 SENSOR_ATTR_2(temp2_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
472 store_temp_beep, 0, 6),
473}, {
474 SENSOR_ATTR_2(temp3_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
475 store_temp_beep, 0, 3),
476 SENSOR_ATTR_2(temp3_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
477 store_temp_beep, 0, 7),
478} };
479
0bae6400 480/* Temp attr for the f8000
ed4f7c20
HG		 481 Note on the f8000 temp_ovt (crit) is used as max, and temp_high (max)
482 is used as hysteresis value to clear alarms
66344aa6 483 Also like the f71858fg its temperature indexes start at 0
ed4f7c20 484 */
0bae6400 485static struct sensor_device_attribute_2 f8000_temp_attr[] = {
ed4f7c20
HG		 486 SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0),
487 SENSOR_ATTR_2(temp1_max, S_IRUGO|S_IWUSR, show_temp_crit,
488 store_temp_crit, 0, 0),
489 SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO|S_IWUSR, show_temp_max,
490 store_temp_max, 0, 0),
491 SENSOR_ATTR_2(temp1_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 4),
b6858bca 492 SENSOR_ATTR_2(temp1_fault, S_IRUGO, show_temp_fault, NULL, 0, 0),
ed4f7c20
HG		 493 SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 0, 1),
494 SENSOR_ATTR_2(temp2_max, S_IRUGO|S_IWUSR, show_temp_crit,
495 store_temp_crit, 0, 1),
496 SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO|S_IWUSR, show_temp_max,
497 store_temp_max, 0, 1),
498 SENSOR_ATTR_2(temp2_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 5),
b6858bca 499 SENSOR_ATTR_2(temp2_fault, S_IRUGO, show_temp_fault, NULL, 0, 1),
ed4f7c20
HG		 500 SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 0, 2),
501 SENSOR_ATTR_2(temp3_max, S_IRUGO|S_IWUSR, show_temp_crit,
502 store_temp_crit, 0, 2),
503 SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO|S_IWUSR, show_temp_max,
504 store_temp_max, 0, 2),
505 SENSOR_ATTR_2(temp3_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 6),
b6858bca 506 SENSOR_ATTR_2(temp3_fault, S_IRUGO, show_temp_fault, NULL, 0, 2),
ed4f7c20
HG		 507};
508
0bae6400
HG		 509/* in attr for all models */
510static struct sensor_device_attribute_2 fxxxx_in_attr[] = {
511 SENSOR_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0),
512 SENSOR_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 0, 1),
513 SENSOR_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 0, 2),
514 SENSOR_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 0, 3),
515 SENSOR_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 0, 4),
516 SENSOR_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 0, 5),
517 SENSOR_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 0, 6),
518 SENSOR_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 0, 7),
519 SENSOR_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 0, 8),
520};
521
522/* For models with in1 alarm capability */
523static struct sensor_device_attribute_2 fxxxx_in1_alarm_attr[] = {
524 SENSOR_ATTR_2(in1_max, S_IRUGO|S_IWUSR, show_in_max, store_in_max,
525 0, 1),
526 SENSOR_ATTR_2(in1_beep, S_IRUGO|S_IWUSR, show_in_beep, store_in_beep,
527 0, 1),
528 SENSOR_ATTR_2(in1_alarm, S_IRUGO, show_in_alarm, NULL, 0, 1),
529};
530
ed4f7c20 531/* Fan / PWM attr common to all models */
b69b0399 532static struct sensor_device_attribute_2 fxxxx_fan_attr[4][6] = { {
bc37ae71 533 SENSOR_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0),
9ab796eb
MD		 534 SENSOR_ATTR_2(fan1_full_speed, S_IRUGO|S_IWUSR,
535 show_fan_full_speed,
536 store_fan_full_speed, 0, 0),
bc37ae71 537 SENSOR_ATTR_2(fan1_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 0),
9ab796eb
MD		 538 SENSOR_ATTR_2(pwm1, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 0),
539 SENSOR_ATTR_2(pwm1_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
540 store_pwm_enable, 0, 0),
541 SENSOR_ATTR_2(pwm1_interpolate, S_IRUGO|S_IWUSR,
542 show_pwm_interpolate, store_pwm_interpolate, 0, 0),
b69b0399
HG		 543}, {
544 SENSOR_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 0, 1),
545 SENSOR_ATTR_2(fan2_full_speed, S_IRUGO|S_IWUSR,
546 show_fan_full_speed,
547 store_fan_full_speed, 0, 1),
548 SENSOR_ATTR_2(fan2_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 1),
498be968
HG		 549 SENSOR_ATTR_2(pwm2, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 1),
550 SENSOR_ATTR_2(pwm2_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
551 store_pwm_enable, 0, 1),
552 SENSOR_ATTR_2(pwm2_interpolate, S_IRUGO|S_IWUSR,
553 show_pwm_interpolate, store_pwm_interpolate, 0, 1),
b69b0399
HG		 554}, {
555 SENSOR_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 0, 2),
556 SENSOR_ATTR_2(fan3_full_speed, S_IRUGO|S_IWUSR,
557 show_fan_full_speed,
558 store_fan_full_speed, 0, 2),
559 SENSOR_ATTR_2(fan3_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 2),
3fc7838a
HG		 560 SENSOR_ATTR_2(pwm3, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 2),
561 SENSOR_ATTR_2(pwm3_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
562 store_pwm_enable, 0, 2),
498be968
HG		 563 SENSOR_ATTR_2(pwm3_interpolate, S_IRUGO|S_IWUSR,
564 show_pwm_interpolate, store_pwm_interpolate, 0, 2),
b69b0399
HG		 565}, {
566 SENSOR_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 0, 3),
567 SENSOR_ATTR_2(fan4_full_speed, S_IRUGO|S_IWUSR,
568 show_fan_full_speed,
569 store_fan_full_speed, 0, 3),
570 SENSOR_ATTR_2(fan4_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 3),
571 SENSOR_ATTR_2(pwm4, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 3),
572 SENSOR_ATTR_2(pwm4_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
573 store_pwm_enable, 0, 3),
574 SENSOR_ATTR_2(pwm4_interpolate, S_IRUGO|S_IWUSR,
575 show_pwm_interpolate, store_pwm_interpolate, 0, 3),
576} };
498be968 577
629c58ba
HG		 578/* Attr for the third fan of the f71808a, which only has manual pwm */
579static struct sensor_device_attribute_2 f71808a_fan3_attr[] = {
580 SENSOR_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 0, 2),
581 SENSOR_ATTR_2(fan3_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 2),
582 SENSOR_ATTR_2(pwm3, S_IRUGO|S_IWUSR,
583 show_simple_pwm, store_simple_pwm, 0, 2),
584};
585
66344aa6
HG		 586/* Attr for models which can beep on Fan alarm */
587static struct sensor_device_attribute_2 fxxxx_fan_beep_attr[] = {
ed4f7c20
HG		 588 SENSOR_ATTR_2(fan1_beep, S_IRUGO|S_IWUSR, show_fan_beep,
589 store_fan_beep, 0, 0),
590 SENSOR_ATTR_2(fan2_beep, S_IRUGO|S_IWUSR, show_fan_beep,
591 store_fan_beep, 0, 1),
592 SENSOR_ATTR_2(fan3_beep, S_IRUGO|S_IWUSR, show_fan_beep,
593 store_fan_beep, 0, 2),
b69b0399
HG		 594 SENSOR_ATTR_2(fan4_beep, S_IRUGO|S_IWUSR, show_fan_beep,
595 store_fan_beep, 0, 3),
66344aa6 596};
ed4f7c20 597
66344aa6 598/* PWM attr for the f71862fg, fewer pwms and fewer zones per pwm than the
3cad4022 599 standard models */
66344aa6
HG		 600static struct sensor_device_attribute_2 f71862fg_auto_pwm_attr[] = {
601 SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR,
602 show_pwm_auto_point_channel,
603 store_pwm_auto_point_channel, 0, 0),
498be968
HG		 604 SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO|S_IWUSR,
605 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
606 1, 0),
607 SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO|S_IWUSR,
608 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
609 4, 0),
610 SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IRUGO|S_IWUSR,
611 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
612 0, 0),
613 SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IRUGO|S_IWUSR,
614 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
615 3, 0),
616 SENSOR_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
617 show_pwm_auto_point_temp_hyst,
618 store_pwm_auto_point_temp_hyst,
619 0, 0),
620 SENSOR_ATTR_2(pwm1_auto_point2_temp_hyst, S_IRUGO,
621 show_pwm_auto_point_temp_hyst, NULL, 3, 0),
622
66344aa6
HG		 623 SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR,
624 show_pwm_auto_point_channel,
625 store_pwm_auto_point_channel, 0, 1),
498be968
HG		 626 SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO|S_IWUSR,
627 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
628 1, 1),
629 SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO|S_IWUSR,
630 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
631 4, 1),
632 SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IRUGO|S_IWUSR,
633 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
634 0, 1),
635 SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IRUGO|S_IWUSR,
636 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
637 3, 1),
638 SENSOR_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
639 show_pwm_auto_point_temp_hyst,
640 store_pwm_auto_point_temp_hyst,
641 0, 1),
642 SENSOR_ATTR_2(pwm2_auto_point2_temp_hyst, S_IRUGO,
643 show_pwm_auto_point_temp_hyst, NULL, 3, 1),
4901062f 644
66344aa6
HG		 645 SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR,
646 show_pwm_auto_point_channel,
647 store_pwm_auto_point_channel, 0, 2),
4901062f
HG		 648 SENSOR_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO|S_IWUSR,
649 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
650 1, 2),
651 SENSOR_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO|S_IWUSR,
652 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
653 4, 2),
654 SENSOR_ATTR_2(pwm3_auto_point1_temp, S_IRUGO|S_IWUSR,
655 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
656 0, 2),
657 SENSOR_ATTR_2(pwm3_auto_point2_temp, S_IRUGO|S_IWUSR,
658 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
659 3, 2),
660 SENSOR_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
661 show_pwm_auto_point_temp_hyst,
662 store_pwm_auto_point_temp_hyst,
663 0, 2),
664 SENSOR_ATTR_2(pwm3_auto_point2_temp_hyst, S_IRUGO,
665 show_pwm_auto_point_temp_hyst, NULL, 3, 2),
498be968
HG		 666};
667
e5e713cb 668/* PWM attr for the f71808e/f71869, almost identical to the f71862fg, but the
c11bb993
HG		 669 pwm setting when the temperature is above the pwmX_auto_point1_temp can be
670 programmed instead of being hardcoded to 0xff */
671static struct sensor_device_attribute_2 f71869_auto_pwm_attr[] = {
672 SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR,
673 show_pwm_auto_point_channel,
674 store_pwm_auto_point_channel, 0, 0),
675 SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO|S_IWUSR,
676 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
677 0, 0),
678 SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO|S_IWUSR,
679 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
680 1, 0),
681 SENSOR_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO|S_IWUSR,
682 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
683 4, 0),
684 SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IRUGO|S_IWUSR,
685 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
686 0, 0),
687 SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IRUGO|S_IWUSR,
688 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
689 3, 0),
690 SENSOR_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
691 show_pwm_auto_point_temp_hyst,
692 store_pwm_auto_point_temp_hyst,
693 0, 0),
694 SENSOR_ATTR_2(pwm1_auto_point2_temp_hyst, S_IRUGO,
695 show_pwm_auto_point_temp_hyst, NULL, 3, 0),
696
697 SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR,
698 show_pwm_auto_point_channel,
699 store_pwm_auto_point_channel, 0, 1),
700 SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO|S_IWUSR,
701 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
702 0, 1),
703 SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO|S_IWUSR,
704 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
705 1, 1),
706 SENSOR_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO|S_IWUSR,
707 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
708 4, 1),
709 SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IRUGO|S_IWUSR,
710 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
711 0, 1),
712 SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IRUGO|S_IWUSR,
713 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
714 3, 1),
715 SENSOR_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
716 show_pwm_auto_point_temp_hyst,
717 store_pwm_auto_point_temp_hyst,
718 0, 1),
719 SENSOR_ATTR_2(pwm2_auto_point2_temp_hyst, S_IRUGO,
720 show_pwm_auto_point_temp_hyst, NULL, 3, 1),
721
722 SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR,
723 show_pwm_auto_point_channel,
724 store_pwm_auto_point_channel, 0, 2),
725 SENSOR_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO|S_IWUSR,
726 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
727 0, 2),
728 SENSOR_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO|S_IWUSR,
729 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
730 1, 2),
731 SENSOR_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO|S_IWUSR,
732 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
733 4, 2),
734 SENSOR_ATTR_2(pwm3_auto_point1_temp, S_IRUGO|S_IWUSR,
735 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
736 0, 2),
737 SENSOR_ATTR_2(pwm3_auto_point2_temp, S_IRUGO|S_IWUSR,
738 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
739 3, 2),
740 SENSOR_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
741 show_pwm_auto_point_temp_hyst,
742 store_pwm_auto_point_temp_hyst,
743 0, 2),
744 SENSOR_ATTR_2(pwm3_auto_point2_temp_hyst, S_IRUGO,
745 show_pwm_auto_point_temp_hyst, NULL, 3, 2),
746};
747
3cad4022 748/* PWM attr for the standard models */
b69b0399 749static struct sensor_device_attribute_2 fxxxx_auto_pwm_attr[4][14] = { {
66344aa6
HG		 750 SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR,
751 show_pwm_auto_point_channel,
752 store_pwm_auto_point_channel, 0, 0),
9ab796eb
MD		 753 SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO|S_IWUSR,
754 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
755 0, 0),
756 SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO|S_IWUSR,
757 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
758 1, 0),
759 SENSOR_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO|S_IWUSR,
760 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
761 2, 0),
762 SENSOR_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO|S_IWUSR,
763 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
764 3, 0),
765 SENSOR_ATTR_2(pwm1_auto_point5_pwm, S_IRUGO|S_IWUSR,
766 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
767 4, 0),
768 SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IRUGO|S_IWUSR,
769 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
770 0, 0),
771 SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IRUGO|S_IWUSR,
772 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
773 1, 0),
774 SENSOR_ATTR_2(pwm1_auto_point3_temp, S_IRUGO|S_IWUSR,
775 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
776 2, 0),
777 SENSOR_ATTR_2(pwm1_auto_point4_temp, S_IRUGO|S_IWUSR,
778 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
779 3, 0),
780 SENSOR_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
781 show_pwm_auto_point_temp_hyst,
782 store_pwm_auto_point_temp_hyst,
783 0, 0),
784 SENSOR_ATTR_2(pwm1_auto_point2_temp_hyst, S_IRUGO,
785 show_pwm_auto_point_temp_hyst, NULL, 1, 0),
786 SENSOR_ATTR_2(pwm1_auto_point3_temp_hyst, S_IRUGO,
787 show_pwm_auto_point_temp_hyst, NULL, 2, 0),
788 SENSOR_ATTR_2(pwm1_auto_point4_temp_hyst, S_IRUGO,
789 show_pwm_auto_point_temp_hyst, NULL, 3, 0),
b69b0399 790}, {
66344aa6
HG		 791 SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR,
792 show_pwm_auto_point_channel,
793 store_pwm_auto_point_channel, 0, 1),
9ab796eb
MD		 794 SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO|S_IWUSR,
795 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
796 0, 1),
797 SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO|S_IWUSR,
798 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
799 1, 1),
800 SENSOR_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO|S_IWUSR,
801 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
802 2, 1),
803 SENSOR_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO|S_IWUSR,
804 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
805 3, 1),
806 SENSOR_ATTR_2(pwm2_auto_point5_pwm, S_IRUGO|S_IWUSR,
807 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
808 4, 1),
809 SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IRUGO|S_IWUSR,
810 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
811 0, 1),
812 SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IRUGO|S_IWUSR,
813 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
814 1, 1),
815 SENSOR_ATTR_2(pwm2_auto_point3_temp, S_IRUGO|S_IWUSR,
816 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
817 2, 1),
818 SENSOR_ATTR_2(pwm2_auto_point4_temp, S_IRUGO|S_IWUSR,
819 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
820 3, 1),
821 SENSOR_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
822 show_pwm_auto_point_temp_hyst,
823 store_pwm_auto_point_temp_hyst,
824 0, 1),
825 SENSOR_ATTR_2(pwm2_auto_point2_temp_hyst, S_IRUGO,
826 show_pwm_auto_point_temp_hyst, NULL, 1, 1),
827 SENSOR_ATTR_2(pwm2_auto_point3_temp_hyst, S_IRUGO,
828 show_pwm_auto_point_temp_hyst, NULL, 2, 1),
829 SENSOR_ATTR_2(pwm2_auto_point4_temp_hyst, S_IRUGO,
830 show_pwm_auto_point_temp_hyst, NULL, 3, 1),
b69b0399 831}, {
66344aa6
HG		 832 SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR,
833 show_pwm_auto_point_channel,
834 store_pwm_auto_point_channel, 0, 2),
9ab796eb
MD		 835 SENSOR_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO|S_IWUSR,
836 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
837 0, 2),
838 SENSOR_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO|S_IWUSR,
839 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
840 1, 2),
841 SENSOR_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO|S_IWUSR,
842 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
843 2, 2),
844 SENSOR_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO|S_IWUSR,
845 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
846 3, 2),
847 SENSOR_ATTR_2(pwm3_auto_point5_pwm, S_IRUGO|S_IWUSR,
848 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
849 4, 2),
850 SENSOR_ATTR_2(pwm3_auto_point1_temp, S_IRUGO|S_IWUSR,
851 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
852 0, 2),
853 SENSOR_ATTR_2(pwm3_auto_point2_temp, S_IRUGO|S_IWUSR,
854 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
855 1, 2),
856 SENSOR_ATTR_2(pwm3_auto_point3_temp, S_IRUGO|S_IWUSR,
857 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
858 2, 2),
859 SENSOR_ATTR_2(pwm3_auto_point4_temp, S_IRUGO|S_IWUSR,
860 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
861 3, 2),
862 SENSOR_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
863 show_pwm_auto_point_temp_hyst,
864 store_pwm_auto_point_temp_hyst,
865 0, 2),
866 SENSOR_ATTR_2(pwm3_auto_point2_temp_hyst, S_IRUGO,
867 show_pwm_auto_point_temp_hyst, NULL, 1, 2),
868 SENSOR_ATTR_2(pwm3_auto_point3_temp_hyst, S_IRUGO,
869 show_pwm_auto_point_temp_hyst, NULL, 2, 2),
870 SENSOR_ATTR_2(pwm3_auto_point4_temp_hyst, S_IRUGO,
871 show_pwm_auto_point_temp_hyst, NULL, 3, 2),
b69b0399 872}, {
9ab796eb
MD		 873 SENSOR_ATTR_2(pwm4_auto_channels_temp, S_IRUGO|S_IWUSR,
874 show_pwm_auto_point_channel,
875 store_pwm_auto_point_channel, 0, 3),
876 SENSOR_ATTR_2(pwm4_auto_point1_pwm, S_IRUGO|S_IWUSR,
877 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
878 0, 3),
879 SENSOR_ATTR_2(pwm4_auto_point2_pwm, S_IRUGO|S_IWUSR,
880 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
881 1, 3),
882 SENSOR_ATTR_2(pwm4_auto_point3_pwm, S_IRUGO|S_IWUSR,
883 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
884 2, 3),
885 SENSOR_ATTR_2(pwm4_auto_point4_pwm, S_IRUGO|S_IWUSR,
886 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
887 3, 3),
888 SENSOR_ATTR_2(pwm4_auto_point5_pwm, S_IRUGO|S_IWUSR,
889 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
890 4, 3),
891 SENSOR_ATTR_2(pwm4_auto_point1_temp, S_IRUGO|S_IWUSR,
892 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
893 0, 3),
894 SENSOR_ATTR_2(pwm4_auto_point2_temp, S_IRUGO|S_IWUSR,
895 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
896 1, 3),
897 SENSOR_ATTR_2(pwm4_auto_point3_temp, S_IRUGO|S_IWUSR,
898 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
899 2, 3),
900 SENSOR_ATTR_2(pwm4_auto_point4_temp, S_IRUGO|S_IWUSR,
901 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
902 3, 3),
903 SENSOR_ATTR_2(pwm4_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
904 show_pwm_auto_point_temp_hyst,
905 store_pwm_auto_point_temp_hyst,
906 0, 3),
907 SENSOR_ATTR_2(pwm4_auto_point2_temp_hyst, S_IRUGO,
908 show_pwm_auto_point_temp_hyst, NULL, 1, 3),
909 SENSOR_ATTR_2(pwm4_auto_point3_temp_hyst, S_IRUGO,
910 show_pwm_auto_point_temp_hyst, NULL, 2, 3),
911 SENSOR_ATTR_2(pwm4_auto_point4_temp_hyst, S_IRUGO,
912 show_pwm_auto_point_temp_hyst, NULL, 3, 3),
b69b0399 913} };
45fb3669 914
66344aa6 915/* Fan attr specific to the f8000 (4th fan input can only measure speed) */
ed4f7c20
HG		 916static struct sensor_device_attribute_2 f8000_fan_attr[] = {
917 SENSOR_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 0, 3),
66344aa6 918};
ed4f7c20 919
66344aa6
HG		 920/* PWM attr for the f8000, zones mapped to temp instead of to pwm!
921 Also the register block at offset A0 maps to TEMP1 (so our temp2, as the
922 F8000 starts counting temps at 0), B0 maps the TEMP2 and C0 maps to TEMP0 */
923static struct sensor_device_attribute_2 f8000_auto_pwm_attr[] = {
924 SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR,
925 show_pwm_auto_point_channel,
926 store_pwm_auto_point_channel, 0, 0),
ed4f7c20
HG		 927 SENSOR_ATTR_2(temp1_auto_point1_pwm, S_IRUGO|S_IWUSR,
928 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
929 0, 2),
930 SENSOR_ATTR_2(temp1_auto_point2_pwm, S_IRUGO|S_IWUSR,
931 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
932 1, 2),
933 SENSOR_ATTR_2(temp1_auto_point3_pwm, S_IRUGO|S_IWUSR,
934 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
935 2, 2),
936 SENSOR_ATTR_2(temp1_auto_point4_pwm, S_IRUGO|S_IWUSR,
937 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
938 3, 2),
939 SENSOR_ATTR_2(temp1_auto_point5_pwm, S_IRUGO|S_IWUSR,
940 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
941 4, 2),
942 SENSOR_ATTR_2(temp1_auto_point1_temp, S_IRUGO|S_IWUSR,
943 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
944 0, 2),
945 SENSOR_ATTR_2(temp1_auto_point2_temp, S_IRUGO|S_IWUSR,
946 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
947 1, 2),
948 SENSOR_ATTR_2(temp1_auto_point3_temp, S_IRUGO|S_IWUSR,
949 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
950 2, 2),
951 SENSOR_ATTR_2(temp1_auto_point4_temp, S_IRUGO|S_IWUSR,
952 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
953 3, 2),
954 SENSOR_ATTR_2(temp1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
955 show_pwm_auto_point_temp_hyst,
956 store_pwm_auto_point_temp_hyst,
957 0, 2),
958 SENSOR_ATTR_2(temp1_auto_point2_temp_hyst, S_IRUGO,
959 show_pwm_auto_point_temp_hyst, NULL, 1, 2),
960 SENSOR_ATTR_2(temp1_auto_point3_temp_hyst, S_IRUGO,
961 show_pwm_auto_point_temp_hyst, NULL, 2, 2),
962 SENSOR_ATTR_2(temp1_auto_point4_temp_hyst, S_IRUGO,
963 show_pwm_auto_point_temp_hyst, NULL, 3, 2),
964
66344aa6
HG		 965 SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR,
966 show_pwm_auto_point_channel,
967 store_pwm_auto_point_channel, 0, 1),
ed4f7c20
HG		 968 SENSOR_ATTR_2(temp2_auto_point1_pwm, S_IRUGO|S_IWUSR,
969 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
970 0, 0),
971 SENSOR_ATTR_2(temp2_auto_point2_pwm, S_IRUGO|S_IWUSR,
972 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
973 1, 0),
974 SENSOR_ATTR_2(temp2_auto_point3_pwm, S_IRUGO|S_IWUSR,
975 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
976 2, 0),
977 SENSOR_ATTR_2(temp2_auto_point4_pwm, S_IRUGO|S_IWUSR,
978 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
979 3, 0),
980 SENSOR_ATTR_2(temp2_auto_point5_pwm, S_IRUGO|S_IWUSR,
981 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
982 4, 0),
983 SENSOR_ATTR_2(temp2_auto_point1_temp, S_IRUGO|S_IWUSR,
984 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
985 0, 0),
986 SENSOR_ATTR_2(temp2_auto_point2_temp, S_IRUGO|S_IWUSR,
987 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
988 1, 0),
989 SENSOR_ATTR_2(temp2_auto_point3_temp, S_IRUGO|S_IWUSR,
990 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
991 2, 0),
992 SENSOR_ATTR_2(temp2_auto_point4_temp, S_IRUGO|S_IWUSR,
993 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
994 3, 0),
995 SENSOR_ATTR_2(temp2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
996 show_pwm_auto_point_temp_hyst,
997 store_pwm_auto_point_temp_hyst,
998 0, 0),
999 SENSOR_ATTR_2(temp2_auto_point2_temp_hyst, S_IRUGO,
1000 show_pwm_auto_point_temp_hyst, NULL, 1, 0),
1001 SENSOR_ATTR_2(temp2_auto_point3_temp_hyst, S_IRUGO,
1002 show_pwm_auto_point_temp_hyst, NULL, 2, 0),
1003 SENSOR_ATTR_2(temp2_auto_point4_temp_hyst, S_IRUGO,
1004 show_pwm_auto_point_temp_hyst, NULL, 3, 0),
1005
66344aa6
HG		 1006 SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR,
1007 show_pwm_auto_point_channel,
1008 store_pwm_auto_point_channel, 0, 2),
ed4f7c20
HG		 1009 SENSOR_ATTR_2(temp3_auto_point1_pwm, S_IRUGO|S_IWUSR,
1010 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1011 0, 1),
1012 SENSOR_ATTR_2(temp3_auto_point2_pwm, S_IRUGO|S_IWUSR,
1013 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1014 1, 1),
1015 SENSOR_ATTR_2(temp3_auto_point3_pwm, S_IRUGO|S_IWUSR,
1016 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1017 2, 1),
1018 SENSOR_ATTR_2(temp3_auto_point4_pwm, S_IRUGO|S_IWUSR,
1019 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1020 3, 1),
1021 SENSOR_ATTR_2(temp3_auto_point5_pwm, S_IRUGO|S_IWUSR,
1022 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1023 4, 1),
1024 SENSOR_ATTR_2(temp3_auto_point1_temp, S_IRUGO|S_IWUSR,
1025 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1026 0, 1),
1027 SENSOR_ATTR_2(temp3_auto_point2_temp, S_IRUGO|S_IWUSR,
1028 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1029 1, 1),
1030 SENSOR_ATTR_2(temp3_auto_point3_temp, S_IRUGO|S_IWUSR,
1031 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1032 2, 1),
1033 SENSOR_ATTR_2(temp3_auto_point4_temp, S_IRUGO|S_IWUSR,
1034 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1035 3, 1),
1036 SENSOR_ATTR_2(temp3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
1037 show_pwm_auto_point_temp_hyst,
1038 store_pwm_auto_point_temp_hyst,
1039 0, 1),
1040 SENSOR_ATTR_2(temp3_auto_point2_temp_hyst, S_IRUGO,
1041 show_pwm_auto_point_temp_hyst, NULL, 1, 1),
1042 SENSOR_ATTR_2(temp3_auto_point3_temp_hyst, S_IRUGO,
1043 show_pwm_auto_point_temp_hyst, NULL, 2, 1),
1044 SENSOR_ATTR_2(temp3_auto_point4_temp_hyst, S_IRUGO,
1045 show_pwm_auto_point_temp_hyst, NULL, 3, 1),
1046};
45fb3669
HG		 1047
1048/* Super I/O functions */
1049static inline int superio_inb(int base, int reg)
1050{
1051 outb(reg, base);
1052 return inb(base + 1);
1053}
1054
1055static int superio_inw(int base, int reg)
1056{
1057 int val;
bd328acd
GS		 1058 val = superio_inb(base, reg) << 8;
1059 val |= superio_inb(base, reg + 1);
45fb3669
HG		 1060 return val;
1061}
1062
cadb8657 1063static inline int superio_enter(int base)
45fb3669 1064{
cadb8657
GS		 1065 /* Don't step on other drivers' I/O space by accident */
1066 if (!request_muxed_region(base, 2, DRVNAME)) {
22d3b412 1067 pr_err("I/O address 0x%04x already in use\n", base);
cadb8657
GS		 1068 return -EBUSY;
1069 }
1070
45fb3669 1071 /* according to the datasheet the key must be send twice! */
162bb59e
GS		 1072 outb(SIO_UNLOCK_KEY, base);
1073 outb(SIO_UNLOCK_KEY, base);
cadb8657
GS		 1074
1075 return 0;
45fb3669
HG		 1076}
1077
162bb59e 1078static inline void superio_select(int base, int ld)
45fb3669
HG		 1079{
1080 outb(SIO_REG_LDSEL, base);
1081 outb(ld, base + 1);
1082}
1083
1084static inline void superio_exit(int base)
1085{
1086 outb(SIO_LOCK_KEY, base);
cadb8657 1087 release_region(base, 2);
45fb3669
HG		 1088}
1089
2f650631 1090static inline int fan_from_reg(u16 reg)
45fb3669
HG		 1091{
1092 return reg ? (1500000 / reg) : 0;
1093}
1094
2f650631 1095static inline u16 fan_to_reg(int fan)
9ab796eb
MD		 1096{
1097 return fan ? (1500000 / fan) : 0;
1098}
1099
45fb3669
HG		 1100static u8 f71882fg_read8(struct f71882fg_data *data, u8 reg)
1101{
1102 u8 val;
1103
1104 outb(reg, data->addr + ADDR_REG_OFFSET);
1105 val = inb(data->addr + DATA_REG_OFFSET);
1106
1107 return val;
1108}
1109
1110static u16 f71882fg_read16(struct f71882fg_data *data, u8 reg)
1111{
1112 u16 val;
1113
bd328acd
GS		 1114 val = f71882fg_read8(data, reg) << 8;
1115 val |= f71882fg_read8(data, reg + 1);
45fb3669
HG		 1116
1117 return val;
1118}
1119
1120static void f71882fg_write8(struct f71882fg_data *data, u8 reg, u8 val)
1121{
1122 outb(reg, data->addr + ADDR_REG_OFFSET);
1123 outb(val, data->addr + DATA_REG_OFFSET);
1124}
1125
9ab796eb
MD		 1126static void f71882fg_write16(struct f71882fg_data *data, u8 reg, u16 val)
1127{
bd328acd
GS		 1128 f71882fg_write8(data, reg, val >> 8);
1129 f71882fg_write8(data, reg + 1, val & 0xff);
9ab796eb
MD		 1130}
1131
09475d32
HG		 1132static u16 f71882fg_read_temp(struct f71882fg_data *data, int nr)
1133{
1134 if (data->type == f71858fg)
1135 return f71882fg_read16(data, F71882FG_REG_TEMP(nr));
1136 else
1137 return f71882fg_read8(data, F71882FG_REG_TEMP(nr));
1138}
1139
77a4a3e2 1140static struct f71882fg_data *f71882fg_update_device(struct device *dev)
45fb3669
HG		 1141{
1142 struct f71882fg_data *data = dev_get_drvdata(dev);
f27def07
JD		 1143 int nr_fans = f71882fg_nr_fans[data->type];
1144 int nr_temps = f71882fg_nr_temps[data->type];
e5e713cb 1145 int nr, reg, point;
45fb3669
HG		 1146
1147 mutex_lock(&data->update_lock);
1148
1149 /* Update once every 60 seconds */
162bb59e 1150 if (time_after(jiffies, data->last_limits + 60 * HZ) ||
45fb3669 1151 !data->valid) {
0bae6400 1152 if (f71882fg_has_in1_alarm[data->type]) {
498be968
HG		 1153 data->in1_max =
1154 f71882fg_read8(data, F71882FG_REG_IN1_HIGH);
1155 data->in_beep =
1156 f71882fg_read8(data, F71882FG_REG_IN_BEEP);
1157 }
45fb3669
HG		 1158
1159 /* Get High & boundary temps*/
e5e713cb
HG		 1160 for (nr = data->temp_start; nr < nr_temps + data->temp_start;
1161 nr++) {
45fb3669
HG		 1162 data->temp_ovt[nr] = f71882fg_read8(data,
1163 F71882FG_REG_TEMP_OVT(nr));
1164 data->temp_high[nr] = f71882fg_read8(data,
1165 F71882FG_REG_TEMP_HIGH(nr));
1166 }
1167
ed4f7c20 1168 if (data->type != f8000) {
ed4f7c20
HG		 1169 data->temp_hyst[0] = f71882fg_read8(data,
1170 F71882FG_REG_TEMP_HYST(0));
1171 data->temp_hyst[1] = f71882fg_read8(data,
1172 F71882FG_REG_TEMP_HYST(1));
09475d32 1173 }
78aa4f72
HG		 1174 /* All but the f71858fg / f8000 have this register */
1175 if ((data->type != f71858fg) && (data->type != f8000)) {
1176 reg = f71882fg_read8(data, F71882FG_REG_TEMP_TYPE);
1177 data->temp_type[1] = (reg & 0x02) ? 2 : 4;
1178 data->temp_type[2] = (reg & 0x04) ? 2 : 4;
1179 data->temp_type[3] = (reg & 0x08) ? 2 : 4;
1180 }
09475d32 1181
4d53811a 1182 if (f71882fg_fan_has_beep[data->type])
09475d32
HG		 1183 data->fan_beep = f71882fg_read8(data,
1184 F71882FG_REG_FAN_BEEP);
4d53811a
HG		 1185
1186 if (f71882fg_temp_has_beep[data->type])
09475d32
HG		 1187 data->temp_beep = f71882fg_read8(data,
1188 F71882FG_REG_TEMP_BEEP);
45fb3669 1189
9ab796eb
MD		 1190 data->pwm_enable = f71882fg_read8(data,
1191 F71882FG_REG_PWM_ENABLE);
bc27490f
HG		 1192 data->pwm_auto_point_hyst[0] =
1193 f71882fg_read8(data, F71882FG_REG_FAN_HYST(0));
1194 data->pwm_auto_point_hyst[1] =
1195 f71882fg_read8(data, F71882FG_REG_FAN_HYST(1));
1196
498be968 1197 for (nr = 0; nr < nr_fans; nr++) {
9ab796eb
MD		 1198 data->pwm_auto_point_mapping[nr] =
1199 f71882fg_read8(data,
1200 F71882FG_REG_POINT_MAPPING(nr));
1201
e5e713cb
HG		 1202 switch (data->type) {
1203 default:
498be968
HG		 1204 for (point = 0; point < 5; point++) {
1205 data->pwm_auto_point_pwm[nr][point] =
1206 f71882fg_read8(data,
1207 F71882FG_REG_POINT_PWM
1208 (nr, point));
1209 }
1210 for (point = 0; point < 4; point++) {
1211 data->pwm_auto_point_temp[nr][point] =
1212 f71882fg_read8(data,
1213 F71882FG_REG_POINT_TEMP
1214 (nr, point));
1215 }
e5e713cb
HG		 1216 break;
1217 case f71808e:
1218 case f71869:
1219 data->pwm_auto_point_pwm[nr][0] =
1220 f71882fg_read8(data,
1221 F71882FG_REG_POINT_PWM(nr, 0));
1222 /* Fall through */
1223 case f71862fg:
498be968
HG		 1224 data->pwm_auto_point_pwm[nr][1] =
1225 f71882fg_read8(data,
1226 F71882FG_REG_POINT_PWM
1227 (nr, 1));
1228 data->pwm_auto_point_pwm[nr][4] =
1229 f71882fg_read8(data,
1230 F71882FG_REG_POINT_PWM
1231 (nr, 4));
1232 data->pwm_auto_point_temp[nr][0] =
1233 f71882fg_read8(data,
1234 F71882FG_REG_POINT_TEMP
1235 (nr, 0));
1236 data->pwm_auto_point_temp[nr][3] =
1237 f71882fg_read8(data,
1238 F71882FG_REG_POINT_TEMP
1239 (nr, 3));
e5e713cb 1240 break;
9ab796eb
MD		 1241 }
1242 }
45fb3669
HG		 1243 data->last_limits = jiffies;
1244 }
1245
1246 /* Update every second */
8afb1049 1247 if (time_after(jiffies, data->last_updated + HZ) || !data->valid) {
45fb3669
HG		 1248 data->temp_status = f71882fg_read8(data,
1249 F71882FG_REG_TEMP_STATUS);
1250 data->temp_diode_open = f71882fg_read8(data,
1251 F71882FG_REG_TEMP_DIODE_OPEN);
e5e713cb
HG		 1252 for (nr = data->temp_start; nr < nr_temps + data->temp_start;
1253 nr++)
09475d32 1254 data->temp[nr] = f71882fg_read_temp(data, nr);
45fb3669
HG		 1255
1256 data->fan_status = f71882fg_read8(data,
1257 F71882FG_REG_FAN_STATUS);
498be968 1258 for (nr = 0; nr < nr_fans; nr++) {
45fb3669
HG		 1259 data->fan[nr] = f71882fg_read16(data,
1260 F71882FG_REG_FAN(nr));
9ab796eb
MD		 1261 data->fan_target[nr] =
1262 f71882fg_read16(data, F71882FG_REG_FAN_TARGET(nr));
1263 data->fan_full_speed[nr] =
1264 f71882fg_read16(data,
1265 F71882FG_REG_FAN_FULL_SPEED(nr));
1266 data->pwm[nr] =
1267 f71882fg_read8(data, F71882FG_REG_PWM(nr));
1268 }
629c58ba
HG		 1269 /* Some models have 1 more fan with limited capabilities */
1270 if (data->type == f71808a) {
1271 data->fan[2] = f71882fg_read16(data,
1272 F71882FG_REG_FAN(2));
1273 data->pwm[2] = f71882fg_read8(data,
1274 F71882FG_REG_PWM(2));
1275 }
ed4f7c20
HG		 1276 if (data->type == f8000)
1277 data->fan[3] = f71882fg_read16(data,
1278 F71882FG_REG_FAN(3));
0bae6400
HG		 1279
1280 if (f71882fg_has_in1_alarm[data->type])
498be968 1281 data->in_status = f71882fg_read8(data,
45fb3669 1282 F71882FG_REG_IN_STATUS);
0bae6400
HG		 1283 for (nr = 0; nr < F71882FG_MAX_INS; nr++)
1284 if (f71882fg_has_in[data->type][nr])
1285 data->in[nr] = f71882fg_read8(data,
1286 F71882FG_REG_IN(nr));
45fb3669
HG		 1287
1288 data->last_updated = jiffies;
1289 data->valid = 1;
1290 }
1291
1292 mutex_unlock(&data->update_lock);
1293
1294 return data;
1295}
1296
1297/* Sysfs Interface */
1298static ssize_t show_fan(struct device *dev, struct device_attribute *devattr,
1299 char *buf)
1300{
1301 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 1302 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669
HG		 1303 int speed = fan_from_reg(data->fan[nr]);
1304
1305 if (speed == FAN_MIN_DETECT)
1306 speed = 0;
1307
1308 return sprintf(buf, "%d\n", speed);
1309}
1310
9ab796eb
MD		 1311static ssize_t show_fan_full_speed(struct device *dev,
1312 struct device_attribute *devattr, char *buf)
1313{
1314 struct f71882fg_data *data = f71882fg_update_device(dev);
1315 int nr = to_sensor_dev_attr_2(devattr)->index;
1316 int speed = fan_from_reg(data->fan_full_speed[nr]);
1317 return sprintf(buf, "%d\n", speed);
1318}
1319
1320static ssize_t store_fan_full_speed(struct device *dev,
1321 struct device_attribute *devattr,
1322 const char *buf, size_t count)
1323{
1324 struct f71882fg_data *data = dev_get_drvdata(dev);
e8a4eaca
GS		 1325 int err, nr = to_sensor_dev_attr_2(devattr)->index;
1326 long val;
1327
1328 err = strict_strtol(buf, 10, &val);
1329 if (err)
1330 return err;
9ab796eb
MD		 1331
1332 val = SENSORS_LIMIT(val, 23, 1500000);
1333 val = fan_to_reg(val);
1334
1335 mutex_lock(&data->update_lock);
4c82c38a
HG		 1336 f71882fg_write16(data, F71882FG_REG_FAN_FULL_SPEED(nr), val);
1337 data->fan_full_speed[nr] = val;
9ab796eb
MD		 1338 mutex_unlock(&data->update_lock);
1339
1340 return count;
1341}
1342
45fb3669
HG		 1343static ssize_t show_fan_beep(struct device *dev, struct device_attribute
1344 *devattr, char *buf)
1345{
1346 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 1347 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669
HG		 1348
1349 if (data->fan_beep & (1 << nr))
1350 return sprintf(buf, "1\n");
1351 else
1352 return sprintf(buf, "0\n");
1353}
1354
1355static ssize_t store_fan_beep(struct device *dev, struct device_attribute
1356 *devattr, const char *buf, size_t count)
1357{
1358 struct f71882fg_data *data = dev_get_drvdata(dev);
e8a4eaca
GS		 1359 int err, nr = to_sensor_dev_attr_2(devattr)->index;
1360 unsigned long val;
1361
1362 err = strict_strtoul(buf, 10, &val);
1363 if (err)
1364 return err;
45fb3669
HG		 1365
1366 mutex_lock(&data->update_lock);
ce0bfa5e 1367 data->fan_beep = f71882fg_read8(data, F71882FG_REG_FAN_BEEP);
45fb3669
HG		 1368 if (val)
1369 data->fan_beep |= 1 << nr;
1370 else
1371 data->fan_beep &= ~(1 << nr);
1372
1373 f71882fg_write8(data, F71882FG_REG_FAN_BEEP, data->fan_beep);
1374 mutex_unlock(&data->update_lock);
1375
1376 return count;
1377}
1378
1379static ssize_t show_fan_alarm(struct device *dev, struct device_attribute
1380 *devattr, char *buf)
1381{
1382 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 1383 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669
HG		 1384
1385 if (data->fan_status & (1 << nr))
1386 return sprintf(buf, "1\n");
1387 else
1388 return sprintf(buf, "0\n");
1389}
1390
1391static ssize_t show_in(struct device *dev, struct device_attribute *devattr,
1392 char *buf)
1393{
1394 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 1395 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669
HG		 1396
1397 return sprintf(buf, "%d\n", data->in[nr] * 8);
1398}
1399
1400static ssize_t show_in_max(struct device *dev, struct device_attribute
1401 *devattr, char *buf)
1402{
1403 struct f71882fg_data *data = f71882fg_update_device(dev);
1404
1405 return sprintf(buf, "%d\n", data->in1_max * 8);
1406}
1407
1408static ssize_t store_in_max(struct device *dev, struct device_attribute
1409 *devattr, const char *buf, size_t count)
1410{
1411 struct f71882fg_data *data = dev_get_drvdata(dev);
e8a4eaca
GS		 1412 int err;
1413 long val;
1414
1415 err = strict_strtol(buf, 10, &val);
1416 if (err)
1417 return err;
1418
1419 val /= 8;
ce0bfa5e 1420 val = SENSORS_LIMIT(val, 0, 255);
45fb3669
HG		 1421
1422 mutex_lock(&data->update_lock);
1423 f71882fg_write8(data, F71882FG_REG_IN1_HIGH, val);
1424 data->in1_max = val;
1425 mutex_unlock(&data->update_lock);
1426
1427 return count;
1428}
1429
1430static ssize_t show_in_beep(struct device *dev, struct device_attribute
1431 *devattr, char *buf)
1432{
1433 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 1434 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669
HG		 1435
1436 if (data->in_beep & (1 << nr))
1437 return sprintf(buf, "1\n");
1438 else
1439 return sprintf(buf, "0\n");
1440}
1441
1442static ssize_t store_in_beep(struct device *dev, struct device_attribute
1443 *devattr, const char *buf, size_t count)
1444{
1445 struct f71882fg_data *data = dev_get_drvdata(dev);
e8a4eaca
GS		 1446 int err, nr = to_sensor_dev_attr_2(devattr)->index;
1447 unsigned long val;
1448
1449 err = strict_strtoul(buf, 10, &val);
1450 if (err)
1451 return err;
45fb3669
HG		 1452
1453 mutex_lock(&data->update_lock);
ce0bfa5e 1454 data->in_beep = f71882fg_read8(data, F71882FG_REG_IN_BEEP);
45fb3669
HG		 1455 if (val)
1456 data->in_beep |= 1 << nr;
1457 else
1458 data->in_beep &= ~(1 << nr);
1459
1460 f71882fg_write8(data, F71882FG_REG_IN_BEEP, data->in_beep);
1461 mutex_unlock(&data->update_lock);
1462
1463 return count;
1464}
1465
1466static ssize_t show_in_alarm(struct device *dev, struct device_attribute
1467 *devattr, char *buf)
1468{
1469 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 1470 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669
HG		 1471
1472 if (data->in_status & (1 << nr))
1473 return sprintf(buf, "1\n");
1474 else
1475 return sprintf(buf, "0\n");
1476}
1477
1478static ssize_t show_temp(struct device *dev, struct device_attribute *devattr,
1479 char *buf)
1480{
1481 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 1482 int nr = to_sensor_dev_attr_2(devattr)->index;
09475d32
HG		 1483 int sign, temp;
1484
1485 if (data->type == f71858fg) {
1486 /* TEMP_TABLE_SEL 1 or 3 ? */
1487 if (data->temp_config & 1) {
1488 sign = data->temp[nr] & 0x0001;
1489 temp = (data->temp[nr] >> 5) & 0x7ff;
1490 } else {
1491 sign = data->temp[nr] & 0x8000;
1492 temp = (data->temp[nr] >> 5) & 0x3ff;
1493 }
1494 temp *= 125;
1495 if (sign)
1496 temp -= 128000;
1497 } else
1498 temp = data->temp[nr] * 1000;
45fb3669 1499
09475d32 1500 return sprintf(buf, "%d\n", temp);
45fb3669
HG		 1501}
1502
1503static ssize_t show_temp_max(struct device *dev, struct device_attribute
1504 *devattr, char *buf)
1505{
1506 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 1507 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669
HG		 1508
1509 return sprintf(buf, "%d\n", data->temp_high[nr] * 1000);
1510}
1511
1512static ssize_t store_temp_max(struct device *dev, struct device_attribute
1513 *devattr, const char *buf, size_t count)
1514{
1515 struct f71882fg_data *data = dev_get_drvdata(dev);
e8a4eaca
GS		 1516 int err, nr = to_sensor_dev_attr_2(devattr)->index;
1517 long val;
1518
1519 err = strict_strtol(buf, 10, &val);
1520 if (err)
1521 return err;
1522
1523 val /= 1000;
ce0bfa5e 1524 val = SENSORS_LIMIT(val, 0, 255);
45fb3669
HG		 1525
1526 mutex_lock(&data->update_lock);
1527 f71882fg_write8(data, F71882FG_REG_TEMP_HIGH(nr), val);
1528 data->temp_high[nr] = val;
1529 mutex_unlock(&data->update_lock);
1530
1531 return count;
1532}
1533
1534static ssize_t show_temp_max_hyst(struct device *dev, struct device_attribute
1535 *devattr, char *buf)
1536{
1537 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 1538 int nr = to_sensor_dev_attr_2(devattr)->index;
ce0bfa5e 1539 int temp_max_hyst;
45fb3669 1540
ce0bfa5e 1541 mutex_lock(&data->update_lock);
bc27490f
HG		 1542 if (nr & 1)
1543 temp_max_hyst = data->temp_hyst[nr / 2] >> 4;
1544 else
1545 temp_max_hyst = data->temp_hyst[nr / 2] & 0x0f;
1546 temp_max_hyst = (data->temp_high[nr] - temp_max_hyst) * 1000;
ce0bfa5e
HG		 1547 mutex_unlock(&data->update_lock);
1548
1549 return sprintf(buf, "%d\n", temp_max_hyst);
45fb3669
HG		 1550}
1551
1552static ssize_t store_temp_max_hyst(struct device *dev, struct device_attribute
1553 *devattr, const char *buf, size_t count)
1554{
1555 struct f71882fg_data *data = dev_get_drvdata(dev);
e8a4eaca 1556 int err, nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669 1557 ssize_t ret = count;
ce0bfa5e 1558 u8 reg;
e8a4eaca
GS		 1559 long val;
1560
1561 err = strict_strtol(buf, 10, &val);
1562 if (err)
1563 return err;
1564
1565 val /= 1000;
45fb3669
HG		 1566
1567 mutex_lock(&data->update_lock);
1568
1569 /* convert abs to relative and check */
ce0bfa5e
HG		 1570 data->temp_high[nr] = f71882fg_read8(data, F71882FG_REG_TEMP_HIGH(nr));
1571 val = SENSORS_LIMIT(val, data->temp_high[nr] - 15,
1572 data->temp_high[nr]);
45fb3669 1573 val = data->temp_high[nr] - val;
45fb3669
HG		 1574
1575 /* convert value to register contents */
bc27490f
HG		 1576 reg = f71882fg_read8(data, F71882FG_REG_TEMP_HYST(nr / 2));
1577 if (nr & 1)
1578 reg = (reg & 0x0f) | (val << 4);
1579 else
1580 reg = (reg & 0xf0) | val;
1581 f71882fg_write8(data, F71882FG_REG_TEMP_HYST(nr / 2), reg);
1582 data->temp_hyst[nr / 2] = reg;
45fb3669 1583
45fb3669
HG		 1584 mutex_unlock(&data->update_lock);
1585 return ret;
1586}
1587
1588static ssize_t show_temp_crit(struct device *dev, struct device_attribute
1589 *devattr, char *buf)
1590{
1591 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 1592 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669
HG		 1593
1594 return sprintf(buf, "%d\n", data->temp_ovt[nr] * 1000);
1595}
1596
1597static ssize_t store_temp_crit(struct device *dev, struct device_attribute
1598 *devattr, const char *buf, size_t count)
1599{
1600 struct f71882fg_data *data = dev_get_drvdata(dev);
e8a4eaca
GS		 1601 int err, nr = to_sensor_dev_attr_2(devattr)->index;
1602 long val;
1603
1604 err = strict_strtol(buf, 10, &val);
1605 if (err)
1606 return err;
1607
1608 val /= 1000;
ce0bfa5e 1609 val = SENSORS_LIMIT(val, 0, 255);
45fb3669
HG		 1610
1611 mutex_lock(&data->update_lock);
1612 f71882fg_write8(data, F71882FG_REG_TEMP_OVT(nr), val);
1613 data->temp_ovt[nr] = val;
1614 mutex_unlock(&data->update_lock);
1615
1616 return count;
1617}
1618
1619static ssize_t show_temp_crit_hyst(struct device *dev, struct device_attribute
1620 *devattr, char *buf)
1621{
1622 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 1623 int nr = to_sensor_dev_attr_2(devattr)->index;
ce0bfa5e 1624 int temp_crit_hyst;
45fb3669 1625
ce0bfa5e 1626 mutex_lock(&data->update_lock);
bc27490f
HG		 1627 if (nr & 1)
1628 temp_crit_hyst = data->temp_hyst[nr / 2] >> 4;
1629 else
1630 temp_crit_hyst = data->temp_hyst[nr / 2] & 0x0f;
1631 temp_crit_hyst = (data->temp_ovt[nr] - temp_crit_hyst) * 1000;
ce0bfa5e
HG		 1632 mutex_unlock(&data->update_lock);
1633
1634 return sprintf(buf, "%d\n", temp_crit_hyst);
45fb3669
HG		 1635}
1636
1637static ssize_t show_temp_type(struct device *dev, struct device_attribute
1638 *devattr, char *buf)
1639{
1640 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 1641 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669
HG		 1642
1643 return sprintf(buf, "%d\n", data->temp_type[nr]);
1644}
1645
1646static ssize_t show_temp_beep(struct device *dev, struct device_attribute
1647 *devattr, char *buf)
1648{
1649 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 1650 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669 1651
7567a043 1652 if (data->temp_beep & (1 << nr))
45fb3669
HG		 1653 return sprintf(buf, "1\n");
1654 else
1655 return sprintf(buf, "0\n");
1656}
1657
1658static ssize_t store_temp_beep(struct device *dev, struct device_attribute
1659 *devattr, const char *buf, size_t count)
1660{
1661 struct f71882fg_data *data = dev_get_drvdata(dev);
e8a4eaca
GS		 1662 int err, nr = to_sensor_dev_attr_2(devattr)->index;
1663 unsigned long val;
1664
1665 err = strict_strtoul(buf, 10, &val);
1666 if (err)
1667 return err;
45fb3669
HG		 1668
1669 mutex_lock(&data->update_lock);
ce0bfa5e 1670 data->temp_beep = f71882fg_read8(data, F71882FG_REG_TEMP_BEEP);
45fb3669 1671 if (val)
7567a043 1672 data->temp_beep |= 1 << nr;
45fb3669 1673 else
7567a043 1674 data->temp_beep &= ~(1 << nr);
45fb3669
HG		 1675
1676 f71882fg_write8(data, F71882FG_REG_TEMP_BEEP, data->temp_beep);
1677 mutex_unlock(&data->update_lock);
1678
1679 return count;
1680}
1681
1682static ssize_t show_temp_alarm(struct device *dev, struct device_attribute
1683 *devattr, char *buf)
1684{
1685 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 1686 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669 1687
7567a043 1688 if (data->temp_status & (1 << nr))
45fb3669
HG		 1689 return sprintf(buf, "1\n");
1690 else
1691 return sprintf(buf, "0\n");
1692}
1693
1694static ssize_t show_temp_fault(struct device *dev, struct device_attribute
1695 *devattr, char *buf)
1696{
1697 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 1698 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669 1699
7567a043 1700 if (data->temp_diode_open & (1 << nr))
45fb3669
HG		 1701 return sprintf(buf, "1\n");
1702 else
1703 return sprintf(buf, "0\n");
1704}
1705
9ab796eb
MD		 1706static ssize_t show_pwm(struct device *dev,
1707 struct device_attribute *devattr, char *buf)
1708{
1709 struct f71882fg_data *data = f71882fg_update_device(dev);
1710 int val, nr = to_sensor_dev_attr_2(devattr)->index;
ce0bfa5e 1711 mutex_lock(&data->update_lock);
9ab796eb
MD		 1712 if (data->pwm_enable & (1 << (2 * nr)))
1713 /* PWM mode */
1714 val = data->pwm[nr];
1715 else {
1716 /* RPM mode */
9ab796eb
MD		 1717 val = 255 * fan_from_reg(data->fan_target[nr])
1718 / fan_from_reg(data->fan_full_speed[nr]);
9ab796eb 1719 }
ce0bfa5e 1720 mutex_unlock(&data->update_lock);
9ab796eb
MD		 1721 return sprintf(buf, "%d\n", val);
1722}
1723
1724static ssize_t store_pwm(struct device *dev,
1725 struct device_attribute *devattr, const char *buf,
1726 size_t count)
1727{
ce0bfa5e 1728 struct f71882fg_data *data = dev_get_drvdata(dev);
e8a4eaca
GS		 1729 int err, nr = to_sensor_dev_attr_2(devattr)->index;
1730 long val;
1731
1732 err = strict_strtol(buf, 10, &val);
1733 if (err)
1734 return err;
1735
9ab796eb
MD		 1736 val = SENSORS_LIMIT(val, 0, 255);
1737
1738 mutex_lock(&data->update_lock);
ce0bfa5e 1739 data->pwm_enable = f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
ed4f7c20
HG		 1740 if ((data->type == f8000 && ((data->pwm_enable >> 2 * nr) & 3) != 2) ||
1741 (data->type != f8000 && !((data->pwm_enable >> 2 * nr) & 2))) {
1742 count = -EROFS;
1743 goto leave;
1744 }
9ab796eb
MD		 1745 if (data->pwm_enable & (1 << (2 * nr))) {
1746 /* PWM mode */
1747 f71882fg_write8(data, F71882FG_REG_PWM(nr), val);
1748 data->pwm[nr] = val;
1749 } else {
1750 /* RPM mode */
ce0bfa5e
HG		 1751 int target, full_speed;
1752 full_speed = f71882fg_read16(data,
1753 F71882FG_REG_FAN_FULL_SPEED(nr));
1754 target = fan_to_reg(val * fan_from_reg(full_speed) / 255);
1755 f71882fg_write16(data, F71882FG_REG_FAN_TARGET(nr), target);
1756 data->fan_target[nr] = target;
1757 data->fan_full_speed[nr] = full_speed;
9ab796eb 1758 }
ed4f7c20 1759leave:
9ab796eb
MD		 1760 mutex_unlock(&data->update_lock);
1761
1762 return count;
1763}
1764
629c58ba
HG		 1765static ssize_t show_simple_pwm(struct device *dev,
1766 struct device_attribute *devattr, char *buf)
1767{
1768 struct f71882fg_data *data = f71882fg_update_device(dev);
1769 int val, nr = to_sensor_dev_attr_2(devattr)->index;
1770
1771 val = data->pwm[nr];
1772 return sprintf(buf, "%d\n", val);
1773}
1774
1775static ssize_t store_simple_pwm(struct device *dev,
1776 struct device_attribute *devattr,
1777 const char *buf, size_t count)
1778{
1779 struct f71882fg_data *data = dev_get_drvdata(dev);
1780 int err, nr = to_sensor_dev_attr_2(devattr)->index;
1781 long val;
1782
1783 err = strict_strtol(buf, 10, &val);
1784 if (err)
1785 return err;
1786
1787 val = SENSORS_LIMIT(val, 0, 255);
1788
1789 mutex_lock(&data->update_lock);
1790 f71882fg_write8(data, F71882FG_REG_PWM(nr), val);
1791 data->pwm[nr] = val;
1792 mutex_unlock(&data->update_lock);
1793
1794 return count;
1795}
1796
9ab796eb
MD		 1797static ssize_t show_pwm_enable(struct device *dev,
1798 struct device_attribute *devattr, char *buf)
1799{
ed4f7c20 1800 int result = 0;
9ab796eb
MD		 1801 struct f71882fg_data *data = f71882fg_update_device(dev);
1802 int nr = to_sensor_dev_attr_2(devattr)->index;
1803
ed4f7c20
HG		 1804 switch ((data->pwm_enable >> 2 * nr) & 3) {
1805 case 0:
1806 case 1:
1807 result = 2; /* Normal auto mode */
1808 break;
1809 case 2:
1810 result = 1; /* Manual mode */
1811 break;
1812 case 3:
1813 if (data->type == f8000)
1814 result = 3; /* Thermostat mode */
1815 else
1816 result = 1; /* Manual mode */
1817 break;
1818 }
9ab796eb
MD		 1819
1820 return sprintf(buf, "%d\n", result);
1821}
1822
1823static ssize_t store_pwm_enable(struct device *dev, struct device_attribute
1824 *devattr, const char *buf, size_t count)
1825{
1826 struct f71882fg_data *data = dev_get_drvdata(dev);
e8a4eaca
GS		 1827 int err, nr = to_sensor_dev_attr_2(devattr)->index;
1828 long val;
1829
1830 err = strict_strtol(buf, 10, &val);
1831 if (err)
1832 return err;
9ab796eb 1833
3fc7838a
HG		 1834 /* Special case for F8000 pwm channel 3 which only does auto mode */
1835 if (data->type == f8000 && nr == 2 && val != 2)
1836 return -EINVAL;
1837
9ab796eb 1838 mutex_lock(&data->update_lock);
ce0bfa5e 1839 data->pwm_enable = f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
ed4f7c20
HG		 1840 /* Special case for F8000 auto PWM mode / Thermostat mode */
1841 if (data->type == f8000 && ((data->pwm_enable >> 2 * nr) & 1)) {
1842 switch (val) {
1843 case 2:
1844 data->pwm_enable &= ~(2 << (2 * nr));
1845 break; /* Normal auto mode */
1846 case 3:
1847 data->pwm_enable |= 2 << (2 * nr);
1848 break; /* Thermostat mode */
1849 default:
1850 count = -EINVAL;
1851 goto leave;
1852 }
1853 } else {
1854 switch (val) {
1855 case 1:
09475d32
HG		 1856 /* The f71858fg does not support manual RPM mode */
1857 if (data->type == f71858fg &&
1858 ((data->pwm_enable >> (2 * nr)) & 1)) {
1859 count = -EINVAL;
1860 goto leave;
1861 }
ed4f7c20
HG		 1862 data->pwm_enable |= 2 << (2 * nr);
1863 break; /* Manual */
1864 case 2:
1865 data->pwm_enable &= ~(2 << (2 * nr));
1866 break; /* Normal auto mode */
1867 default:
1868 count = -EINVAL;
1869 goto leave;
1870 }
9ab796eb 1871 }
9ab796eb 1872 f71882fg_write8(data, F71882FG_REG_PWM_ENABLE, data->pwm_enable);
ed4f7c20 1873leave:
9ab796eb
MD		 1874 mutex_unlock(&data->update_lock);
1875
1876 return count;
1877}
1878
1879static ssize_t show_pwm_auto_point_pwm(struct device *dev,
1880 struct device_attribute *devattr,
1881 char *buf)
1882{
1883 int result;
1884 struct f71882fg_data *data = f71882fg_update_device(dev);
1885 int pwm = to_sensor_dev_attr_2(devattr)->index;
1886 int point = to_sensor_dev_attr_2(devattr)->nr;
1887
ce0bfa5e 1888 mutex_lock(&data->update_lock);
9ab796eb
MD		 1889 if (data->pwm_enable & (1 << (2 * pwm))) {
1890 /* PWM mode */
1891 result = data->pwm_auto_point_pwm[pwm][point];
1892 } else {
1893 /* RPM mode */
1894 result = 32 * 255 / (32 + data->pwm_auto_point_pwm[pwm][point]);
1895 }
ce0bfa5e 1896 mutex_unlock(&data->update_lock);
9ab796eb
MD		 1897
1898 return sprintf(buf, "%d\n", result);
1899}
1900
1901static ssize_t store_pwm_auto_point_pwm(struct device *dev,
1902 struct device_attribute *devattr,
1903 const char *buf, size_t count)
1904{
ce0bfa5e 1905 struct f71882fg_data *data = dev_get_drvdata(dev);
e8a4eaca 1906 int err, pwm = to_sensor_dev_attr_2(devattr)->index;
9ab796eb 1907 int point = to_sensor_dev_attr_2(devattr)->nr;
e8a4eaca
GS		 1908 long val;
1909
1910 err = strict_strtol(buf, 10, &val);
1911 if (err)
1912 return err;
1913
9ab796eb
MD		 1914 val = SENSORS_LIMIT(val, 0, 255);
1915
1916 mutex_lock(&data->update_lock);
ce0bfa5e 1917 data->pwm_enable = f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
9ab796eb
MD		 1918 if (data->pwm_enable & (1 << (2 * pwm))) {
1919 /* PWM mode */
1920 } else {
1921 /* RPM mode */
1922 if (val < 29) /* Prevent negative numbers */
1923 val = 255;
1924 else
1925 val = (255 - val) * 32 / val;
1926 }
1927 f71882fg_write8(data, F71882FG_REG_POINT_PWM(pwm, point), val);
1928 data->pwm_auto_point_pwm[pwm][point] = val;
1929 mutex_unlock(&data->update_lock);
1930
1931 return count;
1932}
1933
1934static ssize_t show_pwm_auto_point_temp_hyst(struct device *dev,
1935 struct device_attribute *devattr,
1936 char *buf)
1937{
1938 int result = 0;
1939 struct f71882fg_data *data = f71882fg_update_device(dev);
1940 int nr = to_sensor_dev_attr_2(devattr)->index;
1941 int point = to_sensor_dev_attr_2(devattr)->nr;
1942
1943 mutex_lock(&data->update_lock);
bc27490f
HG		 1944 if (nr & 1)
1945 result = data->pwm_auto_point_hyst[nr / 2] >> 4;
1946 else
1947 result = data->pwm_auto_point_hyst[nr / 2] & 0x0f;
9ab796eb
MD		 1948 result = 1000 * (data->pwm_auto_point_temp[nr][point] - result);
1949 mutex_unlock(&data->update_lock);
1950
1951 return sprintf(buf, "%d\n", result);
1952}
1953
1954static ssize_t store_pwm_auto_point_temp_hyst(struct device *dev,
1955 struct device_attribute *devattr,
1956 const char *buf, size_t count)
1957{
ce0bfa5e 1958 struct f71882fg_data *data = dev_get_drvdata(dev);
e8a4eaca 1959 int err, nr = to_sensor_dev_attr_2(devattr)->index;
9ab796eb 1960 int point = to_sensor_dev_attr_2(devattr)->nr;
bc27490f 1961 u8 reg;
e8a4eaca
GS		 1962 long val;
1963
1964 err = strict_strtol(buf, 10, &val);
1965 if (err)
1966 return err;
1967
1968 val /= 1000;
9ab796eb
MD		 1969
1970 mutex_lock(&data->update_lock);
ce0bfa5e
HG		 1971 data->pwm_auto_point_temp[nr][point] =
1972 f71882fg_read8(data, F71882FG_REG_POINT_TEMP(nr, point));
9ab796eb
MD		 1973 val = SENSORS_LIMIT(val, data->pwm_auto_point_temp[nr][point] - 15,
1974 data->pwm_auto_point_temp[nr][point]);
1975 val = data->pwm_auto_point_temp[nr][point] - val;
1976
bc27490f
HG		 1977 reg = f71882fg_read8(data, F71882FG_REG_FAN_HYST(nr / 2));
1978 if (nr & 1)
1979 reg = (reg & 0x0f) | (val << 4);
1980 else
1981 reg = (reg & 0xf0) | val;
1982
1983 f71882fg_write8(data, F71882FG_REG_FAN_HYST(nr / 2), reg);
1984 data->pwm_auto_point_hyst[nr / 2] = reg;
9ab796eb
MD		 1985 mutex_unlock(&data->update_lock);
1986
1987 return count;
1988}
1989
1990static ssize_t show_pwm_interpolate(struct device *dev,
1991 struct device_attribute *devattr, char *buf)
1992{
1993 int result;
1994 struct f71882fg_data *data = f71882fg_update_device(dev);
1995 int nr = to_sensor_dev_attr_2(devattr)->index;
1996
1997 result = (data->pwm_auto_point_mapping[nr] >> 4) & 1;
1998
1999 return sprintf(buf, "%d\n", result);
2000}
2001
2002static ssize_t store_pwm_interpolate(struct device *dev,
2003 struct device_attribute *devattr,
2004 const char *buf, size_t count)
2005{
ce0bfa5e 2006 struct f71882fg_data *data = dev_get_drvdata(dev);
e8a4eaca
GS		 2007 int err, nr = to_sensor_dev_attr_2(devattr)->index;
2008 unsigned long val;
2009
2010 err = strict_strtoul(buf, 10, &val);
2011 if (err)
2012 return err;
ce0bfa5e 2013
9ab796eb 2014 mutex_lock(&data->update_lock);
ce0bfa5e
HG		 2015 data->pwm_auto_point_mapping[nr] =
2016 f71882fg_read8(data, F71882FG_REG_POINT_MAPPING(nr));
9ab796eb
MD		 2017 if (val)
2018 val = data->pwm_auto_point_mapping[nr] | (1 << 4);
2019 else
2020 val = data->pwm_auto_point_mapping[nr] & (~(1 << 4));
2021 f71882fg_write8(data, F71882FG_REG_POINT_MAPPING(nr), val);
2022 data->pwm_auto_point_mapping[nr] = val;
2023 mutex_unlock(&data->update_lock);
2024
2025 return count;
2026}
2027
2028static ssize_t show_pwm_auto_point_channel(struct device *dev,
2029 struct device_attribute *devattr,
2030 char *buf)
2031{
2032 int result;
2033 struct f71882fg_data *data = f71882fg_update_device(dev);
2034 int nr = to_sensor_dev_attr_2(devattr)->index;
2035
09475d32
HG		 2036 result = 1 << ((data->pwm_auto_point_mapping[nr] & 3) -
2037 data->temp_start);
9ab796eb
MD		 2038
2039 return sprintf(buf, "%d\n", result);
2040}
2041
2042static ssize_t store_pwm_auto_point_channel(struct device *dev,
2043 struct device_attribute *devattr,
2044 const char *buf, size_t count)
2045{
ce0bfa5e 2046 struct f71882fg_data *data = dev_get_drvdata(dev);
e8a4eaca
GS		 2047 int err, nr = to_sensor_dev_attr_2(devattr)->index;
2048 long val;
2049
2050 err = strict_strtol(buf, 10, &val);
2051 if (err)
2052 return err;
30453018 2053
9ab796eb
MD		 2054 switch (val) {
2055 case 1:
30453018 2056 val = 0;
9ab796eb
MD		 2057 break;
2058 case 2:
30453018 2059 val = 1;
9ab796eb
MD		 2060 break;
2061 case 4:
30453018 2062 val = 2;
9ab796eb
MD		 2063 break;
2064 default:
2065 return -EINVAL;
2066 }
09475d32 2067 val += data->temp_start;
9ab796eb 2068 mutex_lock(&data->update_lock);
ce0bfa5e
HG		 2069 data->pwm_auto_point_mapping[nr] =
2070 f71882fg_read8(data, F71882FG_REG_POINT_MAPPING(nr));
9ab796eb
MD		 2071 val = (data->pwm_auto_point_mapping[nr] & 0xfc) | val;
2072 f71882fg_write8(data, F71882FG_REG_POINT_MAPPING(nr), val);
2073 data->pwm_auto_point_mapping[nr] = val;
2074 mutex_unlock(&data->update_lock);
2075
2076 return count;
2077}
2078
2079static ssize_t show_pwm_auto_point_temp(struct device *dev,
2080 struct device_attribute *devattr,
2081 char *buf)
2082{
2083 int result;
2084 struct f71882fg_data *data = f71882fg_update_device(dev);
2085 int pwm = to_sensor_dev_attr_2(devattr)->index;
2086 int point = to_sensor_dev_attr_2(devattr)->nr;
2087
2088 result = data->pwm_auto_point_temp[pwm][point];
2089 return sprintf(buf, "%d\n", 1000 * result);
2090}
2091
2092static ssize_t store_pwm_auto_point_temp(struct device *dev,
2093 struct device_attribute *devattr,
2094 const char *buf, size_t count)
2095{
ce0bfa5e 2096 struct f71882fg_data *data = dev_get_drvdata(dev);
e8a4eaca 2097 int err, pwm = to_sensor_dev_attr_2(devattr)->index;
9ab796eb 2098 int point = to_sensor_dev_attr_2(devattr)->nr;
e8a4eaca
GS		 2099 long val;
2100
2101 err = strict_strtol(buf, 10, &val);
2102 if (err)
2103 return err;
2104
2105 val /= 1000;
7669896f 2106
98f7ba19 2107 if (data->auto_point_temp_signed)
7669896f
HG		 2108 val = SENSORS_LIMIT(val, -128, 127);
2109 else
2110 val = SENSORS_LIMIT(val, 0, 127);
9ab796eb
MD		 2111
2112 mutex_lock(&data->update_lock);
2113 f71882fg_write8(data, F71882FG_REG_POINT_TEMP(pwm, point), val);
2114 data->pwm_auto_point_temp[pwm][point] = val;
2115 mutex_unlock(&data->update_lock);
2116
2117 return count;
2118}
2119
45fb3669
HG		 2120static ssize_t show_name(struct device *dev, struct device_attribute *devattr,
2121 char *buf)
2122{
498be968
HG		 2123 struct f71882fg_data *data = dev_get_drvdata(dev);
2124 return sprintf(buf, "%s\n", f71882fg_names[data->type]);
45fb3669
HG		 2125}
2126
c13548c5
HG		 2127static int __devinit f71882fg_create_sysfs_files(struct platform_device *pdev,
2128 struct sensor_device_attribute_2 *attr, int count)
2129{
2130 int err, i;
2131
2132 for (i = 0; i < count; i++) {
2133 err = device_create_file(&pdev->dev, &attr[i].dev_attr);
2134 if (err)
2135 return err;
2136 }
2137 return 0;
2138}
45fb3669 2139
fc16c56e
HG		 2140static void f71882fg_remove_sysfs_files(struct platform_device *pdev,
2141 struct sensor_device_attribute_2 *attr, int count)
2142{
2143 int i;
2144
2145 for (i = 0; i < count; i++)
2146 device_remove_file(&pdev->dev, &attr[i].dev_attr);
2147}
2148
c13548c5 2149static int __devinit f71882fg_probe(struct platform_device *pdev)
45fb3669
HG		 2150{
2151 struct f71882fg_data *data;
498be968 2152 struct f71882fg_sio_data *sio_data = pdev->dev.platform_data;
f27def07
JD		 2153 int nr_fans = f71882fg_nr_fans[sio_data->type];
2154 int nr_temps = f71882fg_nr_temps[sio_data->type];
2155 int err, i;
98f7ba19 2156 u8 start_reg, reg;
45fb3669 2157
c13548c5
HG		 2158 data = kzalloc(sizeof(struct f71882fg_data), GFP_KERNEL);
2159 if (!data)
45fb3669
HG		 2160 return -ENOMEM;
2161
2162 data->addr = platform_get_resource(pdev, IORESOURCE_IO, 0)->start;
498be968 2163 data->type = sio_data->type;
09475d32
HG		 2164 data->temp_start =
2165 (data->type == f71858fg || data->type == f8000) ? 0 : 1;
45fb3669
HG		 2166 mutex_init(&data->update_lock);
2167 platform_set_drvdata(pdev, data);
2168
3cc74758 2169 start_reg = f71882fg_read8(data, F71882FG_REG_START);
12d66e84
HG		 2170 if (start_reg & 0x04) {
2171 dev_warn(&pdev->dev, "Hardware monitor is powered down\n");
2172 err = -ENODEV;
2173 goto exit_free;
2174 }
3cc74758
HG		 2175 if (!(start_reg & 0x03)) {
2176 dev_warn(&pdev->dev, "Hardware monitoring not activated\n");
2177 err = -ENODEV;
2178 goto exit_free;
2179 }
2180
45fb3669 2181 /* Register sysfs interface files */
c13548c5
HG		 2182 err = device_create_file(&pdev->dev, &dev_attr_name);
2183 if (err)
2184 goto exit_unregister_sysfs;
45fb3669 2185
45fb3669 2186 if (start_reg & 0x01) {
ed4f7c20 2187 switch (data->type) {
09475d32
HG		 2188 case f71858fg:
2189 data->temp_config =
2190 f71882fg_read8(data, F71882FG_REG_TEMP_CONFIG);
2191 if (data->temp_config & 0x10)
2192 /* The f71858fg temperature alarms behave as
2193 the f8000 alarms in this mode */
2194 err = f71882fg_create_sysfs_files(pdev,
0bae6400
HG		 2195 f8000_temp_attr,
2196 ARRAY_SIZE(f8000_temp_attr));
09475d32
HG		 2197 else
2198 err = f71882fg_create_sysfs_files(pdev,
0bae6400
HG		 2199 f71858fg_temp_attr,
2200 ARRAY_SIZE(f71858fg_temp_attr));
ed4f7c20
HG		 2201 break;
2202 case f8000:
2203 err = f71882fg_create_sysfs_files(pdev,
0bae6400
HG		 2204 f8000_temp_attr,
2205 ARRAY_SIZE(f8000_temp_attr));
ed4f7c20 2206 break;
0bae6400
HG		 2207 default:
2208 err = f71882fg_create_sysfs_files(pdev,
60d2b378
HG		 2209 &fxxxx_temp_attr[0][0],
2210 ARRAY_SIZE(fxxxx_temp_attr[0]) * nr_temps);
498be968 2211 }
ed4f7c20
HG		 2212 if (err)
2213 goto exit_unregister_sysfs;
0bae6400 2214
4d53811a 2215 if (f71882fg_temp_has_beep[data->type]) {
78aa4f72
HG		 2216 err = f71882fg_create_sysfs_files(pdev,
2217 &fxxxx_temp_beep_attr[0][0],
2218 ARRAY_SIZE(fxxxx_temp_beep_attr[0])
2219 * nr_temps);
2220 if (err)
2221 goto exit_unregister_sysfs;
2222 }
2223
0bae6400
HG		 2224 for (i = 0; i < F71882FG_MAX_INS; i++) {
2225 if (f71882fg_has_in[data->type][i]) {
2226 err = device_create_file(&pdev->dev,
2227 &fxxxx_in_attr[i].dev_attr);
2228 if (err)
2229 goto exit_unregister_sysfs;
2230 }
2231 }
2232 if (f71882fg_has_in1_alarm[data->type]) {
2233 err = f71882fg_create_sysfs_files(pdev,
2234 fxxxx_in1_alarm_attr,
2235 ARRAY_SIZE(fxxxx_in1_alarm_attr));
2236 if (err)
2237 goto exit_unregister_sysfs;
2238 }
45fb3669
HG		 2239 }
2240
2241 if (start_reg & 0x02) {
98f7ba19 2242 switch (data->type) {
e5e713cb 2243 case f71808e:
629c58ba 2244 case f71808a:
c11bb993 2245 case f71869:
e5e713cb 2246 /* These always have signed auto point temps */
c11bb993
HG		 2247 data->auto_point_temp_signed = 1;
2248 /* Fall through to select correct fan/pwm reg bank! */
98f7ba19 2249 case f71889fg:
3cad4022 2250 case f71889ed:
a66c1088 2251 case f71889a:
98f7ba19
HG		 2252 reg = f71882fg_read8(data, F71882FG_REG_FAN_FAULT_T);
2253 if (reg & F71882FG_FAN_NEG_TEMP_EN)
2254 data->auto_point_temp_signed = 1;
3cad4022
HG		 2255 /* Ensure banked pwm registers point to right bank */
2256 reg &= ~F71882FG_FAN_PROG_SEL;
2257 f71882fg_write8(data, F71882FG_REG_FAN_FAULT_T, reg);
98f7ba19
HG		 2258 break;
2259 default:
2260 break;
2261 }
2262
996cadb2
HG		 2263 data->pwm_enable =
2264 f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
2265
2266 /* Sanity check the pwm settings */
2267 switch (data->type) {
09475d32
HG		 2268 case f71858fg:
2269 err = 0;
2270 for (i = 0; i < nr_fans; i++)
2271 if (((data->pwm_enable >> (i * 2)) & 3) == 3)
2272 err = 1;
2273 break;
996cadb2
HG		 2274 case f71862fg:
2275 err = (data->pwm_enable & 0x15) != 0x15;
2276 break;
996cadb2
HG		 2277 case f8000:
2278 err = data->pwm_enable & 0x20;
2279 break;
383586b1
JD		 2280 default:
2281 err = 0;
2282 break;
996cadb2
HG		 2283 }
2284 if (err) {
2285 dev_err(&pdev->dev,
2286 "Invalid (reserved) pwm settings: 0x%02x\n",
2287 (unsigned int)data->pwm_enable);
2288 err = -ENODEV;
2289 goto exit_unregister_sysfs;
2290 }
2291
b69b0399
HG		 2292 err = f71882fg_create_sysfs_files(pdev, &fxxxx_fan_attr[0][0],
2293 ARRAY_SIZE(fxxxx_fan_attr[0]) * nr_fans);
498be968
HG		 2294 if (err)
2295 goto exit_unregister_sysfs;
2296
4d53811a 2297 if (f71882fg_fan_has_beep[data->type]) {
498be968 2298 err = f71882fg_create_sysfs_files(pdev,
b69b0399 2299 fxxxx_fan_beep_attr, nr_fans);
66344aa6
HG		 2300 if (err)
2301 goto exit_unregister_sysfs;
b69b0399
HG		 2302 }
2303
e48a7f1a 2304 switch (data->type) {
e5e713cb 2305 case f71808e:
629c58ba 2306 case f71808a:
c11bb993 2307 case f71869:
e48a7f1a 2308 case f71889fg:
3cad4022 2309 case f71889ed:
a66c1088 2310 case f71889a:
e48a7f1a
HG		 2311 for (i = 0; i < nr_fans; i++) {
2312 data->pwm_auto_point_mapping[i] =
2313 f71882fg_read8(data,
2314 F71882FG_REG_POINT_MAPPING(i));
3cad4022
HG		 2315 if ((data->pwm_auto_point_mapping[i] & 0x80) ||
2316 (data->pwm_auto_point_mapping[i] & 3) == 0)
e48a7f1a
HG		 2317 break;
2318 }
2319 if (i != nr_fans) {
2320 dev_warn(&pdev->dev,
2321 "Auto pwm controlled by raw digital "
2322 "data, disabling pwm auto_point "
2323 "sysfs attributes\n");
2324 goto no_pwm_auto_point;
2325 }
2326 break;
2327 default:
2328 break;
2329 }
2330
b69b0399 2331 switch (data->type) {
629c58ba
HG		 2332 case f71808a:
2333 err = f71882fg_create_sysfs_files(pdev,
2334 &fxxxx_auto_pwm_attr[0][0],
2335 ARRAY_SIZE(fxxxx_auto_pwm_attr[0]) * nr_fans);
2336 if (err)
2337 goto exit_unregister_sysfs;
2338 err = f71882fg_create_sysfs_files(pdev,
2339 f71808a_fan3_attr,
2340 ARRAY_SIZE(f71808a_fan3_attr));
2341 break;
b69b0399 2342 case f71862fg:
66344aa6
HG		 2343 err = f71882fg_create_sysfs_files(pdev,
2344 f71862fg_auto_pwm_attr,
2345 ARRAY_SIZE(f71862fg_auto_pwm_attr));
ed4f7c20 2346 break;
e5e713cb 2347 case f71808e:
c11bb993
HG		 2348 case f71869:
2349 err = f71882fg_create_sysfs_files(pdev,
2350 f71869_auto_pwm_attr,
2351 ARRAY_SIZE(f71869_auto_pwm_attr));
2352 break;
ed4f7c20
HG		 2353 case f8000:
2354 err = f71882fg_create_sysfs_files(pdev,
2355 f8000_fan_attr,
2356 ARRAY_SIZE(f8000_fan_attr));
66344aa6
HG		 2357 if (err)
2358 goto exit_unregister_sysfs;
2359 err = f71882fg_create_sysfs_files(pdev,
2360 f8000_auto_pwm_attr,
2361 ARRAY_SIZE(f8000_auto_pwm_attr));
ed4f7c20 2362 break;
e48a7f1a 2363 default:
b69b0399
HG		 2364 err = f71882fg_create_sysfs_files(pdev,
2365 &fxxxx_auto_pwm_attr[0][0],
2366 ARRAY_SIZE(fxxxx_auto_pwm_attr[0]) * nr_fans);
498be968 2367 }
c13548c5
HG		 2368 if (err)
2369 goto exit_unregister_sysfs;
28ba8587 2370
e48a7f1a 2371no_pwm_auto_point:
28ba8587
HG		 2372 for (i = 0; i < nr_fans; i++)
2373 dev_info(&pdev->dev, "Fan: %d is in %s mode\n", i + 1,
2374 (data->pwm_enable & (1 << 2 * i)) ?
2375 "duty-cycle" : "RPM");
45fb3669
HG		 2376 }
2377
1beeffe4
TJ		 2378 data->hwmon_dev = hwmon_device_register(&pdev->dev);
2379 if (IS_ERR(data->hwmon_dev)) {
2380 err = PTR_ERR(data->hwmon_dev);
c13548c5 2381 data->hwmon_dev = NULL;
45fb3669
HG		 2382 goto exit_unregister_sysfs;
2383 }
2384
2385 return 0;
2386
2387exit_unregister_sysfs:
c13548c5 2388 f71882fg_remove(pdev); /* Will unregister the sysfs files for us */
3cc74758
HG		 2389 return err; /* f71882fg_remove() also frees our data */
2390exit_free:
2391 kfree(data);
45fb3669
HG		 2392 return err;
2393}
2394
c13548c5 2395static int f71882fg_remove(struct platform_device *pdev)
45fb3669 2396{
45fb3669 2397 struct f71882fg_data *data = platform_get_drvdata(pdev);
f27def07
JD		 2398 int nr_fans = f71882fg_nr_fans[data->type];
2399 int nr_temps = f71882fg_nr_temps[data->type];
2400 int i;
fc16c56e 2401 u8 start_reg = f71882fg_read8(data, F71882FG_REG_START);
45fb3669 2402
c13548c5
HG		 2403 if (data->hwmon_dev)
2404 hwmon_device_unregister(data->hwmon_dev);
45fb3669 2405
c13548c5 2406 device_remove_file(&pdev->dev, &dev_attr_name);
45fb3669 2407
fc16c56e
HG		 2408 if (start_reg & 0x01) {
2409 switch (data->type) {
2410 case f71858fg:
2411 if (data->temp_config & 0x10)
2412 f71882fg_remove_sysfs_files(pdev,
0bae6400
HG		 2413 f8000_temp_attr,
2414 ARRAY_SIZE(f8000_temp_attr));
fc16c56e
HG		 2415 else
2416 f71882fg_remove_sysfs_files(pdev,
0bae6400
HG		 2417 f71858fg_temp_attr,
2418 ARRAY_SIZE(f71858fg_temp_attr));
fc16c56e
HG		 2419 break;
2420 case f8000:
2421 f71882fg_remove_sysfs_files(pdev,
0bae6400
HG		 2422 f8000_temp_attr,
2423 ARRAY_SIZE(f8000_temp_attr));
fc16c56e 2424 break;
0bae6400
HG		 2425 default:
2426 f71882fg_remove_sysfs_files(pdev,
60d2b378
HG		 2427 &fxxxx_temp_attr[0][0],
2428 ARRAY_SIZE(fxxxx_temp_attr[0]) * nr_temps);
0bae6400 2429 }
4d53811a 2430 if (f71882fg_temp_has_beep[data->type]) {
78aa4f72
HG		 2431 f71882fg_remove_sysfs_files(pdev,
2432 &fxxxx_temp_beep_attr[0][0],
2433 ARRAY_SIZE(fxxxx_temp_beep_attr[0]) * nr_temps);
2434 }
2435
0bae6400
HG		 2436 for (i = 0; i < F71882FG_MAX_INS; i++) {
2437 if (f71882fg_has_in[data->type][i]) {
2438 device_remove_file(&pdev->dev,
2439 &fxxxx_in_attr[i].dev_attr);
2440 }
2441 }
2442 if (f71882fg_has_in1_alarm[data->type]) {
2443 f71882fg_remove_sysfs_files(pdev,
2444 fxxxx_in1_alarm_attr,
2445 ARRAY_SIZE(fxxxx_in1_alarm_attr));
fc16c56e
HG		 2446 }
2447 }
498be968 2448
fc16c56e
HG		 2449 if (start_reg & 0x02) {
2450 f71882fg_remove_sysfs_files(pdev, &fxxxx_fan_attr[0][0],
2451 ARRAY_SIZE(fxxxx_fan_attr[0]) * nr_fans);
45fb3669 2452
4d53811a 2453 if (f71882fg_fan_has_beep[data->type]) {
fc16c56e
HG		 2454 f71882fg_remove_sysfs_files(pdev,
2455 fxxxx_fan_beep_attr, nr_fans);
78aa4f72 2456 }
66344aa6 2457
fc16c56e 2458 switch (data->type) {
629c58ba
HG		 2459 case f71808a:
2460 f71882fg_remove_sysfs_files(pdev,
2461 &fxxxx_auto_pwm_attr[0][0],
2462 ARRAY_SIZE(fxxxx_auto_pwm_attr[0]) * nr_fans);
2463 f71882fg_remove_sysfs_files(pdev,
2464 f71808a_fan3_attr,
2465 ARRAY_SIZE(f71808a_fan3_attr));
2466 break;
fc16c56e
HG		 2467 case f71862fg:
2468 f71882fg_remove_sysfs_files(pdev,
2469 f71862fg_auto_pwm_attr,
2470 ARRAY_SIZE(f71862fg_auto_pwm_attr));
2471 break;
e5e713cb 2472 case f71808e:
c11bb993
HG		 2473 case f71869:
2474 f71882fg_remove_sysfs_files(pdev,
2475 f71869_auto_pwm_attr,
2476 ARRAY_SIZE(f71869_auto_pwm_attr));
2477 break;
fc16c56e
HG		 2478 case f8000:
2479 f71882fg_remove_sysfs_files(pdev,
2480 f8000_fan_attr,
2481 ARRAY_SIZE(f8000_fan_attr));
2482 f71882fg_remove_sysfs_files(pdev,
2483 f8000_auto_pwm_attr,
2484 ARRAY_SIZE(f8000_auto_pwm_attr));
2485 break;
3cad4022 2486 default:
fc16c56e
HG		 2487 f71882fg_remove_sysfs_files(pdev,
2488 &fxxxx_auto_pwm_attr[0][0],
2489 ARRAY_SIZE(fxxxx_auto_pwm_attr[0]) * nr_fans);
2490 }
2491 }
ed4f7c20 2492
d9ebaa45 2493 platform_set_drvdata(pdev, NULL);
45fb3669
HG		 2494 kfree(data);
2495
2496 return 0;
2497}
2498
498be968
HG		 2499static int __init f71882fg_find(int sioaddr, unsigned short *address,
2500 struct f71882fg_sio_data *sio_data)
45fb3669 2501{
45fb3669 2502 u16 devid;
cadb8657
GS		 2503 int err = superio_enter(sioaddr);
2504 if (err)
2505 return err;
45fb3669
HG		 2506
2507 devid = superio_inw(sioaddr, SIO_REG_MANID);
2508 if (devid != SIO_FINTEK_ID) {
22d3b412 2509 pr_debug("Not a Fintek device\n");
cadb8657 2510 err = -ENODEV;
45fb3669
HG		 2511 goto exit;
2512 }
2513
67b671bc 2514 devid = force_id ? force_id : superio_inw(sioaddr, SIO_REG_DEVID);
498be968 2515 switch (devid) {
e5e713cb
HG		 2516 case SIO_F71808E_ID:
2517 sio_data->type = f71808e;
2518 break;
629c58ba
HG		 2519 case SIO_F71808A_ID:
2520 sio_data->type = f71808a;
2521 break;
09475d32
HG		 2522 case SIO_F71858_ID:
2523 sio_data->type = f71858fg;
2524 break;
498be968
HG		 2525 case SIO_F71862_ID:
2526 sio_data->type = f71862fg;
2527 break;
c11bb993
HG		 2528 case SIO_F71869_ID:
2529 sio_data->type = f71869;
2530 break;
498be968
HG		 2531 case SIO_F71882_ID:
2532 sio_data->type = f71882fg;
2533 break;
7669896f
HG		 2534 case SIO_F71889_ID:
2535 sio_data->type = f71889fg;
2536 break;
3cad4022
HG		 2537 case SIO_F71889E_ID:
2538 sio_data->type = f71889ed;
2539 break;
a66c1088
HG		 2540 case SIO_F71889A_ID:
2541 sio_data->type = f71889a;
2542 break;
ed4f7c20
HG		 2543 case SIO_F8000_ID:
2544 sio_data->type = f8000;
2545 break;
383586b1
JD		 2546 case SIO_F81865_ID:
2547 sio_data->type = f81865f;
2548 break;
498be968 2549 default:
22d3b412
JP		 2550 pr_info("Unsupported Fintek device: %04x\n",
2551 (unsigned int)devid);
cadb8657 2552 err = -ENODEV;
45fb3669
HG		 2553 goto exit;
2554 }
2555
09475d32
HG		 2556 if (sio_data->type == f71858fg)
2557 superio_select(sioaddr, SIO_F71858FG_LD_HWM);
2558 else
2559 superio_select(sioaddr, SIO_F71882FG_LD_HWM);
2560
8afb1049 2561 if (!(superio_inb(sioaddr, SIO_REG_ENABLE) & 0x01)) {
22d3b412 2562 pr_warn("Device not activated\n");
cadb8657 2563 err = -ENODEV;
45fb3669
HG		 2564 goto exit;
2565 }
2566
2567 *address = superio_inw(sioaddr, SIO_REG_ADDR);
162bb59e 2568 if (*address == 0) {
22d3b412 2569 pr_warn("Base address not set\n");
cadb8657 2570 err = -ENODEV;
45fb3669
HG		 2571 goto exit;
2572 }
2573 *address &= ~(REGION_LENGTH - 1); /* Ignore 3 LSB */
2574
45fb3669 2575 err = 0;
22d3b412 2576 pr_info("Found %s chip at %#x, revision %d\n",
498be968 2577 f71882fg_names[sio_data->type], (unsigned int)*address,
45fb3669
HG		 2578 (int)superio_inb(sioaddr, SIO_REG_DEVREV));
2579exit:
2580 superio_exit(sioaddr);
2581 return err;
2582}
2583
498be968
HG		 2584static int __init f71882fg_device_add(unsigned short address,
2585 const struct f71882fg_sio_data *sio_data)
45fb3669
HG		 2586{
2587 struct resource res = {
2588 .start = address,
2589 .end = address + REGION_LENGTH - 1,
2590 .flags = IORESOURCE_IO,
2591 };
2592 int err;
2593
2594 f71882fg_pdev = platform_device_alloc(DRVNAME, address);
8afb1049 2595 if (!f71882fg_pdev)
45fb3669
HG		 2596 return -ENOMEM;
2597
2598 res.name = f71882fg_pdev->name;
b9acb64a
JD		 2599 err = acpi_check_resource_conflict(&res);
2600 if (err)
18632f84 2601 goto exit_device_put;
b9acb64a 2602
45fb3669 2603 err = platform_device_add_resources(f71882fg_pdev, &res, 1);
8afb1049 2604 if (err) {
22d3b412 2605 pr_err("Device resource addition failed\n");
45fb3669
HG		 2606 goto exit_device_put;
2607 }
2608
498be968
HG		 2609 err = platform_device_add_data(f71882fg_pdev, sio_data,
2610 sizeof(struct f71882fg_sio_data));
2611 if (err) {
22d3b412 2612 pr_err("Platform data allocation failed\n");
498be968
HG		 2613 goto exit_device_put;
2614 }
2615
45fb3669 2616 err = platform_device_add(f71882fg_pdev);
8afb1049 2617 if (err) {
22d3b412 2618 pr_err("Device addition failed\n");
45fb3669
HG		 2619 goto exit_device_put;
2620 }
2621
2622 return 0;
2623
2624exit_device_put:
2625 platform_device_put(f71882fg_pdev);
2626
2627 return err;
2628}
2629
2630static int __init f71882fg_init(void)
2631{
2632 int err = -ENODEV;
2633 unsigned short address;
498be968
HG		 2634 struct f71882fg_sio_data sio_data;
2635
2636 memset(&sio_data, 0, sizeof(sio_data));
45fb3669 2637
498be968
HG		 2638 if (f71882fg_find(0x2e, &address, &sio_data) &&
2639 f71882fg_find(0x4e, &address, &sio_data))
45fb3669
HG		 2640 goto exit;
2641
c13548c5
HG		 2642 err = platform_driver_register(&f71882fg_driver);
2643 if (err)
45fb3669
HG		 2644 goto exit;
2645
498be968 2646 err = f71882fg_device_add(address, &sio_data);
c13548c5 2647 if (err)
45fb3669
HG		 2648 goto exit_driver;
2649
2650 return 0;
2651
2652exit_driver:
2653 platform_driver_unregister(&f71882fg_driver);
2654exit:
2655 return err;
2656}
2657
2658static void __exit f71882fg_exit(void)
2659{
2660 platform_device_unregister(f71882fg_pdev);
2661 platform_driver_unregister(&f71882fg_driver);
2662}
2663
2664MODULE_DESCRIPTION("F71882FG Hardware Monitoring Driver");
c13548c5 2665MODULE_AUTHOR("Hans Edgington, Hans de Goede ([email protected])");
45fb3669
HG		 2666MODULE_LICENSE("GPL");
2667
2668module_init(f71882fg_init);
2669module_exit(f71882fg_exit);
Empty description
This page took 0.792255 seconds and 4 git commands to generate.