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[ALSA] Fix possible races in timer callbacks
[linux.git] / sound / isa / cs423x / cs4231_lib.c
CommitLineData
1da177e4
LT		 1/*
2 * Copyright (c) by Jaroslav Kysela <[email protected]>
3 * Routines for control of CS4231(A)/CS4232/InterWave & compatible chips
4 *
5 * Bugs:
6 * - sometimes record brokes playback with WSS portion of
7 * Yamaha OPL3-SA3 chip
8 * - CS4231 (GUS MAX) - still trouble with occasional noises
9 * - broken initialization?
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 *
25 */
26
27#include <sound/driver.h>
28#include <linux/delay.h>
29#include <linux/pm.h>
30#include <linux/init.h>
31#include <linux/interrupt.h>
32#include <linux/slab.h>
33#include <linux/ioport.h>
34#include <sound/core.h>
35#include <sound/cs4231.h>
36#include <sound/pcm_params.h>
37
38#include <asm/io.h>
39#include <asm/dma.h>
40#include <asm/irq.h>
41
42MODULE_AUTHOR("Jaroslav Kysela <[email protected]>");
43MODULE_DESCRIPTION("Routines for control of CS4231(A)/CS4232/InterWave & compatible chips");
44MODULE_LICENSE("GPL");
45
46#if 0
47#define SNDRV_DEBUG_MCE
48#endif
49
50/*
51 * Some variables
52 */
53
54static unsigned char freq_bits[14] = {
55 /* 5510 */ 0x00 | CS4231_XTAL2,
56 /* 6620 */ 0x0E | CS4231_XTAL2,
57 /* 8000 */ 0x00 | CS4231_XTAL1,
58 /* 9600 */ 0x0E | CS4231_XTAL1,
59 /* 11025 */ 0x02 | CS4231_XTAL2,
60 /* 16000 */ 0x02 | CS4231_XTAL1,
61 /* 18900 */ 0x04 | CS4231_XTAL2,
62 /* 22050 */ 0x06 | CS4231_XTAL2,
63 /* 27042 */ 0x04 | CS4231_XTAL1,
64 /* 32000 */ 0x06 | CS4231_XTAL1,
65 /* 33075 */ 0x0C | CS4231_XTAL2,
66 /* 37800 */ 0x08 | CS4231_XTAL2,
67 /* 44100 */ 0x0A | CS4231_XTAL2,
68 /* 48000 */ 0x0C | CS4231_XTAL1
69};
70
71static unsigned int rates[14] = {
72 5510, 6620, 8000, 9600, 11025, 16000, 18900, 22050,
73 27042, 32000, 33075, 37800, 44100, 48000
74};
75
ba2375a4 76static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
1da177e4
LT		 77 .count = 14,
78 .list = rates,
79 .mask = 0,
80};
81
ba2375a4 82static int snd_cs4231_xrate(struct snd_pcm_runtime *runtime)
1da177e4
LT		 83{
84 return snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
85}
86
87static unsigned char snd_cs4231_original_image[32] =
88{
89 0x00, /* 00/00 - lic */
90 0x00, /* 01/01 - ric */
91 0x9f, /* 02/02 - la1ic */
92 0x9f, /* 03/03 - ra1ic */
93 0x9f, /* 04/04 - la2ic */
94 0x9f, /* 05/05 - ra2ic */
95 0xbf, /* 06/06 - loc */
96 0xbf, /* 07/07 - roc */
97 0x20, /* 08/08 - pdfr */
98 CS4231_AUTOCALIB, /* 09/09 - ic */
99 0x00, /* 0a/10 - pc */
100 0x00, /* 0b/11 - ti */
101 CS4231_MODE2, /* 0c/12 - mi */
102 0xfc, /* 0d/13 - lbc */
103 0x00, /* 0e/14 - pbru */
104 0x00, /* 0f/15 - pbrl */
105 0x80, /* 10/16 - afei */
106 0x01, /* 11/17 - afeii */
107 0x9f, /* 12/18 - llic */
108 0x9f, /* 13/19 - rlic */
109 0x00, /* 14/20 - tlb */
110 0x00, /* 15/21 - thb */
111 0x00, /* 16/22 - la3mic/reserved */
112 0x00, /* 17/23 - ra3mic/reserved */
113 0x00, /* 18/24 - afs */
114 0x00, /* 19/25 - lamoc/version */
115 0xcf, /* 1a/26 - mioc */
116 0x00, /* 1b/27 - ramoc/reserved */
117 0x20, /* 1c/28 - cdfr */
118 0x00, /* 1d/29 - res4 */
119 0x00, /* 1e/30 - cbru */
120 0x00, /* 1f/31 - cbrl */
121};
122
123/*
124 * Basic I/O functions
125 */
126
ba2375a4 127static inline void cs4231_outb(struct snd_cs4231 *chip, u8 offset, u8 val)
1da177e4 128{
1da177e4 129 outb(val, chip->port + offset);
1da177e4
LT		 130}
131
ba2375a4 132static inline u8 cs4231_inb(struct snd_cs4231 *chip, u8 offset)
1da177e4 133{
1da177e4 134 return inb(chip->port + offset);
1da177e4
LT		 135}
136
ba2375a4 137static void snd_cs4231_outm(struct snd_cs4231 *chip, unsigned char reg,
1da177e4
LT		 138 unsigned char mask, unsigned char value)
139{
140 int timeout;
141 unsigned char tmp;
142
143 for (timeout = 250;
144 timeout > 0 && (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT);
145 timeout--)
146 udelay(100);
147#ifdef CONFIG_SND_DEBUG
148 if (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
149 snd_printk("outm: auto calibration time out - reg = 0x%x, value = 0x%x\n", reg, value);
150#endif
151 if (chip->calibrate_mute) {
152 chip->image[reg] &= mask;
153 chip->image[reg] |= value;
154 } else {
155 cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | reg);
156 mb();
157 tmp = (chip->image[reg] & mask) | value;
158 cs4231_outb(chip, CS4231P(REG), tmp);
159 chip->image[reg] = tmp;
160 mb();
161 }
162}
163
ba2375a4 164static void snd_cs4231_dout(struct snd_cs4231 *chip, unsigned char reg, unsigned char value)
1da177e4
LT		 165{
166 int timeout;
167
168 for (timeout = 250;
169 timeout > 0 && (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT);
170 timeout--)
171 udelay(10);
172 cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | reg);
173 cs4231_outb(chip, CS4231P(REG), value);
174 mb();
175}
176
ba2375a4 177void snd_cs4231_out(struct snd_cs4231 *chip, unsigned char reg, unsigned char value)
1da177e4
LT		 178{
179 int timeout;
180
181 for (timeout = 250;
182 timeout > 0 && (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT);
183 timeout--)
184 udelay(100);
185#ifdef CONFIG_SND_DEBUG
186 if (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
187 snd_printk("out: auto calibration time out - reg = 0x%x, value = 0x%x\n", reg, value);
188#endif
189 cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | reg);
190 cs4231_outb(chip, CS4231P(REG), value);
191 chip->image[reg] = value;
192 mb();
193#if 0
194 printk("codec out - reg 0x%x = 0x%x\n", chip->mce_bit | reg, value);
195#endif
196}
197
ba2375a4 198unsigned char snd_cs4231_in(struct snd_cs4231 *chip, unsigned char reg)
1da177e4
LT		 199{
200 int timeout;
201
202 for (timeout = 250;
203 timeout > 0 && (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT);
204 timeout--)
205 udelay(100);
206#ifdef CONFIG_SND_DEBUG
207 if (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
208 snd_printk("in: auto calibration time out - reg = 0x%x\n", reg);
209#endif
210 cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | reg);
211 mb();
212 return cs4231_inb(chip, CS4231P(REG));
213}
214
ba2375a4 215void snd_cs4236_ext_out(struct snd_cs4231 *chip, unsigned char reg, unsigned char val)
1da177e4
LT		 216{
217 cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | 0x17);
218 cs4231_outb(chip, CS4231P(REG), reg | (chip->image[CS4236_EXT_REG] & 0x01));
219 cs4231_outb(chip, CS4231P(REG), val);
220 chip->eimage[CS4236_REG(reg)] = val;
221#if 0
222 printk("ext out : reg = 0x%x, val = 0x%x\n", reg, val);
223#endif
224}
225
ba2375a4 226unsigned char snd_cs4236_ext_in(struct snd_cs4231 *chip, unsigned char reg)
1da177e4
LT		 227{
228 cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | 0x17);
229 cs4231_outb(chip, CS4231P(REG), reg | (chip->image[CS4236_EXT_REG] & 0x01));
230#if 1
231 return cs4231_inb(chip, CS4231P(REG));
232#else
233 {
234 unsigned char res;
235 res = cs4231_inb(chip, CS4231P(REG));
236 printk("ext in : reg = 0x%x, val = 0x%x\n", reg, res);
237 return res;
238 }
239#endif
240}
241
242#if 0
243
ba2375a4 244static void snd_cs4231_debug(struct snd_cs4231 *chip)
1da177e4
LT		 245{
246 printk("CS4231 REGS: INDEX = 0x%02x ", cs4231_inb(chip, CS4231P(REGSEL)));
247 printk(" STATUS = 0x%02x\n", cs4231_inb(chip, CS4231P(STATUS)));
248 printk(" 0x00: left input = 0x%02x ", snd_cs4231_in(chip, 0x00));
249 printk(" 0x10: alt 1 (CFIG 2) = 0x%02x\n", snd_cs4231_in(chip, 0x10));
250 printk(" 0x01: right input = 0x%02x ", snd_cs4231_in(chip, 0x01));
251 printk(" 0x11: alt 2 (CFIG 3) = 0x%02x\n", snd_cs4231_in(chip, 0x11));
252 printk(" 0x02: GF1 left input = 0x%02x ", snd_cs4231_in(chip, 0x02));
253 printk(" 0x12: left line in = 0x%02x\n", snd_cs4231_in(chip, 0x12));
254 printk(" 0x03: GF1 right input = 0x%02x ", snd_cs4231_in(chip, 0x03));
255 printk(" 0x13: right line in = 0x%02x\n", snd_cs4231_in(chip, 0x13));
256 printk(" 0x04: CD left input = 0x%02x ", snd_cs4231_in(chip, 0x04));
257 printk(" 0x14: timer low = 0x%02x\n", snd_cs4231_in(chip, 0x14));
258 printk(" 0x05: CD right input = 0x%02x ", snd_cs4231_in(chip, 0x05));
259 printk(" 0x15: timer high = 0x%02x\n", snd_cs4231_in(chip, 0x15));
260 printk(" 0x06: left output = 0x%02x ", snd_cs4231_in(chip, 0x06));
261 printk(" 0x16: left MIC (PnP) = 0x%02x\n", snd_cs4231_in(chip, 0x16));
262 printk(" 0x07: right output = 0x%02x ", snd_cs4231_in(chip, 0x07));
263 printk(" 0x17: right MIC (PnP) = 0x%02x\n", snd_cs4231_in(chip, 0x17));
264 printk(" 0x08: playback format = 0x%02x ", snd_cs4231_in(chip, 0x08));
265 printk(" 0x18: IRQ status = 0x%02x\n", snd_cs4231_in(chip, 0x18));
266 printk(" 0x09: iface (CFIG 1) = 0x%02x ", snd_cs4231_in(chip, 0x09));
267 printk(" 0x19: left line out = 0x%02x\n", snd_cs4231_in(chip, 0x19));
268 printk(" 0x0a: pin control = 0x%02x ", snd_cs4231_in(chip, 0x0a));
269 printk(" 0x1a: mono control = 0x%02x\n", snd_cs4231_in(chip, 0x1a));
270 printk(" 0x0b: init & status = 0x%02x ", snd_cs4231_in(chip, 0x0b));
271 printk(" 0x1b: right line out = 0x%02x\n", snd_cs4231_in(chip, 0x1b));
272 printk(" 0x0c: revision & mode = 0x%02x ", snd_cs4231_in(chip, 0x0c));
273 printk(" 0x1c: record format = 0x%02x\n", snd_cs4231_in(chip, 0x1c));
274 printk(" 0x0d: loopback = 0x%02x ", snd_cs4231_in(chip, 0x0d));
275 printk(" 0x1d: var freq (PnP) = 0x%02x\n", snd_cs4231_in(chip, 0x1d));
276 printk(" 0x0e: ply upr count = 0x%02x ", snd_cs4231_in(chip, 0x0e));
277 printk(" 0x1e: ply lwr count = 0x%02x\n", snd_cs4231_in(chip, 0x1e));
278 printk(" 0x0f: rec upr count = 0x%02x ", snd_cs4231_in(chip, 0x0f));
279 printk(" 0x1f: rec lwr count = 0x%02x\n", snd_cs4231_in(chip, 0x1f));
280}
281
282#endif
283
284/*
285 * CS4231 detection / MCE routines
286 */
287
ba2375a4 288static void snd_cs4231_busy_wait(struct snd_cs4231 *chip)
1da177e4
LT		 289{
290 int timeout;
291
292 /* huh.. looks like this sequence is proper for CS4231A chip (GUS MAX) */
293 for (timeout = 5; timeout > 0; timeout--)
294 cs4231_inb(chip, CS4231P(REGSEL));
295 /* end of cleanup sequence */
296 for (timeout = 250;
297 timeout > 0 && (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT);
298 timeout--)
299 udelay(10);
300}
301
ba2375a4 302void snd_cs4231_mce_up(struct snd_cs4231 *chip)
1da177e4
LT		 303{
304 unsigned long flags;
305 int timeout;
306
307 for (timeout = 250; timeout > 0 && (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT); timeout--)
308 udelay(100);
309#ifdef CONFIG_SND_DEBUG
310 if (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
311 snd_printk("mce_up - auto calibration time out (0)\n");
312#endif
313 spin_lock_irqsave(&chip->reg_lock, flags);
314 chip->mce_bit |= CS4231_MCE;
315 timeout = cs4231_inb(chip, CS4231P(REGSEL));
316 if (timeout == 0x80)
317 snd_printk("mce_up [0x%lx]: serious init problem - codec still busy\n", chip->port);
318 if (!(timeout & CS4231_MCE))
319 cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | (timeout & 0x1f));
320 spin_unlock_irqrestore(&chip->reg_lock, flags);
321}
322
ba2375a4 323void snd_cs4231_mce_down(struct snd_cs4231 *chip)
1da177e4
LT		 324{
325 unsigned long flags;
326 int timeout;
327
328 snd_cs4231_busy_wait(chip);
329#if 0
330 printk("(1) timeout = %i\n", timeout);
331#endif
332#ifdef CONFIG_SND_DEBUG
333 if (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
334 snd_printk("mce_down [0x%lx] - auto calibration time out (0)\n", (long)CS4231P(REGSEL));
335#endif
336 spin_lock_irqsave(&chip->reg_lock, flags);
337 chip->mce_bit &= ~CS4231_MCE;
338 timeout = cs4231_inb(chip, CS4231P(REGSEL));
339 cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | (timeout & 0x1f));
340 spin_unlock_irqrestore(&chip->reg_lock, flags);
341 if (timeout == 0x80)
342 snd_printk("mce_down [0x%lx]: serious init problem - codec still busy\n", chip->port);
343 if ((timeout & CS4231_MCE) == 0 ||
344 !(chip->hardware & (CS4231_HW_CS4231_MASK | CS4231_HW_CS4232_MASK))) {
345 return;
346 }
347 snd_cs4231_busy_wait(chip);
348
349 /* calibration process */
350
351 for (timeout = 500; timeout > 0 && (snd_cs4231_in(chip, CS4231_TEST_INIT) & CS4231_CALIB_IN_PROGRESS) == 0; timeout--)
352 udelay(10);
353 if ((snd_cs4231_in(chip, CS4231_TEST_INIT) & CS4231_CALIB_IN_PROGRESS) == 0) {
354 snd_printd("cs4231_mce_down - auto calibration time out (1)\n");
355 return;
356 }
357#if 0
358 printk("(2) timeout = %i, jiffies = %li\n", timeout, jiffies);
359#endif
360 /* in 10 ms increments, check condition, up to 250 ms */
361 timeout = 25;
362 while (snd_cs4231_in(chip, CS4231_TEST_INIT) & CS4231_CALIB_IN_PROGRESS) {
363 if (--timeout < 0) {
364 snd_printk("mce_down - auto calibration time out (2)\n");
365 return;
366 }
367 msleep(10);
368 }
369#if 0
370 printk("(3) jiffies = %li\n", jiffies);
371#endif
372 /* in 10 ms increments, check condition, up to 100 ms */
373 timeout = 10;
374 while (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT) {
375 if (--timeout < 0) {
376 snd_printk(KERN_ERR "mce_down - auto calibration time out (3)\n");
377 return;
378 }
379 msleep(10);
380 }
381#if 0
382 printk("(4) jiffies = %li\n", jiffies);
383 snd_printk("mce_down - exit = 0x%x\n", cs4231_inb(chip, CS4231P(REGSEL)));
384#endif
385}
386
387static unsigned int snd_cs4231_get_count(unsigned char format, unsigned int size)
388{
389 switch (format & 0xe0) {
390 case CS4231_LINEAR_16:
391 case CS4231_LINEAR_16_BIG:
392 size >>= 1;
393 break;
394 case CS4231_ADPCM_16:
395 return size >> 2;
396 }
397 if (format & CS4231_STEREO)
398 size >>= 1;
399 return size;
400}
401
ba2375a4 402static int snd_cs4231_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 403 int cmd)
404{
ba2375a4 405 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 406 int result = 0;
407 unsigned int what;
408 struct list_head *pos;
ba2375a4 409 struct snd_pcm_substream *s;
1da177e4
LT		 410 int do_start;
411
412#if 0
413 printk("codec trigger!!! - what = %i, enable = %i, status = 0x%x\n", what, enable, cs4231_inb(chip, CS4231P(STATUS)));
414#endif
415
416 switch (cmd) {
417 case SNDRV_PCM_TRIGGER_START:
418 case SNDRV_PCM_TRIGGER_RESUME:
419 do_start = 1; break;
420 case SNDRV_PCM_TRIGGER_STOP:
421 case SNDRV_PCM_TRIGGER_SUSPEND:
422 do_start = 0; break;
423 default:
424 return -EINVAL;
425 }
426
427 what = 0;
428 snd_pcm_group_for_each(pos, substream) {
429 s = snd_pcm_group_substream_entry(pos);
430 if (s == chip->playback_substream) {
431 what |= CS4231_PLAYBACK_ENABLE;
432 snd_pcm_trigger_done(s, substream);
433 } else if (s == chip->capture_substream) {
434 what |= CS4231_RECORD_ENABLE;
435 snd_pcm_trigger_done(s, substream);
436 }
437 }
438 spin_lock(&chip->reg_lock);
439 if (do_start) {
440 chip->image[CS4231_IFACE_CTRL] |= what;
441 if (chip->trigger)
442 chip->trigger(chip, what, 1);
443 } else {
444 chip->image[CS4231_IFACE_CTRL] &= ~what;
445 if (chip->trigger)
446 chip->trigger(chip, what, 0);
447 }
448 snd_cs4231_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]);
449 spin_unlock(&chip->reg_lock);
450#if 0
451 snd_cs4231_debug(chip);
452#endif
453 return result;
454}
455
456/*
457 * CODEC I/O
458 */
459
460static unsigned char snd_cs4231_get_rate(unsigned int rate)
461{
462 int i;
463
464 for (i = 0; i < 14; i++)
465 if (rate == rates[i])
466 return freq_bits[i];
467 // snd_BUG();
468 return freq_bits[13];
469}
470
ba2375a4 471static unsigned char snd_cs4231_get_format(struct snd_cs4231 *chip,
1da177e4
LT		 472 int format,
473 int channels)
474{
475 unsigned char rformat;
476
477 rformat = CS4231_LINEAR_8;
478 switch (format) {
479 case SNDRV_PCM_FORMAT_MU_LAW: rformat = CS4231_ULAW_8; break;
480 case SNDRV_PCM_FORMAT_A_LAW: rformat = CS4231_ALAW_8; break;
481 case SNDRV_PCM_FORMAT_S16_LE: rformat = CS4231_LINEAR_16; break;
482 case SNDRV_PCM_FORMAT_S16_BE: rformat = CS4231_LINEAR_16_BIG; break;
483 case SNDRV_PCM_FORMAT_IMA_ADPCM: rformat = CS4231_ADPCM_16; break;
484 }
485 if (channels > 1)
486 rformat |= CS4231_STEREO;
487#if 0
488 snd_printk("get_format: 0x%x (mode=0x%x)\n", format, mode);
489#endif
490 return rformat;
491}
492
ba2375a4 493static void snd_cs4231_calibrate_mute(struct snd_cs4231 *chip, int mute)
1da177e4
LT		 494{
495 unsigned long flags;
496
497 mute = mute ? 1 : 0;
498 spin_lock_irqsave(&chip->reg_lock, flags);
499 if (chip->calibrate_mute == mute) {
500 spin_unlock_irqrestore(&chip->reg_lock, flags);
501 return;
502 }
503 if (!mute) {
504 snd_cs4231_dout(chip, CS4231_LEFT_INPUT, chip->image[CS4231_LEFT_INPUT]);
505 snd_cs4231_dout(chip, CS4231_RIGHT_INPUT, chip->image[CS4231_RIGHT_INPUT]);
506 snd_cs4231_dout(chip, CS4231_LOOPBACK, chip->image[CS4231_LOOPBACK]);
507 }
508 snd_cs4231_dout(chip, CS4231_AUX1_LEFT_INPUT, mute ? 0x80 : chip->image[CS4231_AUX1_LEFT_INPUT]);
509 snd_cs4231_dout(chip, CS4231_AUX1_RIGHT_INPUT, mute ? 0x80 : chip->image[CS4231_AUX1_RIGHT_INPUT]);
510 snd_cs4231_dout(chip, CS4231_AUX2_LEFT_INPUT, mute ? 0x80 : chip->image[CS4231_AUX2_LEFT_INPUT]);
511 snd_cs4231_dout(chip, CS4231_AUX2_RIGHT_INPUT, mute ? 0x80 : chip->image[CS4231_AUX2_RIGHT_INPUT]);
512 snd_cs4231_dout(chip, CS4231_LEFT_OUTPUT, mute ? 0x80 : chip->image[CS4231_LEFT_OUTPUT]);
513 snd_cs4231_dout(chip, CS4231_RIGHT_OUTPUT, mute ? 0x80 : chip->image[CS4231_RIGHT_OUTPUT]);
514 snd_cs4231_dout(chip, CS4231_LEFT_LINE_IN, mute ? 0x80 : chip->image[CS4231_LEFT_LINE_IN]);
515 snd_cs4231_dout(chip, CS4231_RIGHT_LINE_IN, mute ? 0x80 : chip->image[CS4231_RIGHT_LINE_IN]);
516 snd_cs4231_dout(chip, CS4231_MONO_CTRL, mute ? 0xc0 : chip->image[CS4231_MONO_CTRL]);
517 if (chip->hardware == CS4231_HW_INTERWAVE) {
518 snd_cs4231_dout(chip, CS4231_LEFT_MIC_INPUT, mute ? 0x80 : chip->image[CS4231_LEFT_MIC_INPUT]);
519 snd_cs4231_dout(chip, CS4231_RIGHT_MIC_INPUT, mute ? 0x80 : chip->image[CS4231_RIGHT_MIC_INPUT]);
520 snd_cs4231_dout(chip, CS4231_LINE_LEFT_OUTPUT, mute ? 0x80 : chip->image[CS4231_LINE_LEFT_OUTPUT]);
521 snd_cs4231_dout(chip, CS4231_LINE_RIGHT_OUTPUT, mute ? 0x80 : chip->image[CS4231_LINE_RIGHT_OUTPUT]);
522 }
523 chip->calibrate_mute = mute;
524 spin_unlock_irqrestore(&chip->reg_lock, flags);
525}
526
ba2375a4
TI		 527static void snd_cs4231_playback_format(struct snd_cs4231 *chip,
528 struct snd_pcm_hw_params *params,
1da177e4
LT		 529 unsigned char pdfr)
530{
531 unsigned long flags;
532 int full_calib = 1;
533
534 down(&chip->mce_mutex);
535 snd_cs4231_calibrate_mute(chip, 1);
536 if (chip->hardware == CS4231_HW_CS4231A ||
537 (chip->hardware & CS4231_HW_CS4232_MASK)) {
538 spin_lock_irqsave(&chip->reg_lock, flags);
539 if ((chip->image[CS4231_PLAYBK_FORMAT] & 0x0f) == (pdfr & 0x0f)) { /* rate is same? */
540 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1] | 0x10);
541 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT, chip->image[CS4231_PLAYBK_FORMAT] = pdfr);
542 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1] &= ~0x10);
543 udelay(100); /* Fixes audible clicks at least on GUS MAX */
544 full_calib = 0;
545 }
546 spin_unlock_irqrestore(&chip->reg_lock, flags);
547 }
548 if (full_calib) {
549 snd_cs4231_mce_up(chip);
550 spin_lock_irqsave(&chip->reg_lock, flags);
551 if (chip->hardware != CS4231_HW_INTERWAVE && !chip->single_dma) {
552 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
553 (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) ?
554 (pdfr & 0xf0) | (chip->image[CS4231_REC_FORMAT] & 0x0f) :
555 pdfr);
556 } else {
557 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT, chip->image[CS4231_PLAYBK_FORMAT] = pdfr);
558 }
559 spin_unlock_irqrestore(&chip->reg_lock, flags);
560 snd_cs4231_mce_down(chip);
561 }
562 snd_cs4231_calibrate_mute(chip, 0);
563 up(&chip->mce_mutex);
564}
565
ba2375a4
TI		 566static void snd_cs4231_capture_format(struct snd_cs4231 *chip,
567 struct snd_pcm_hw_params *params,
1da177e4
LT		 568 unsigned char cdfr)
569{
570 unsigned long flags;
571 int full_calib = 1;
572
573 down(&chip->mce_mutex);
574 snd_cs4231_calibrate_mute(chip, 1);
575 if (chip->hardware == CS4231_HW_CS4231A ||
576 (chip->hardware & CS4231_HW_CS4232_MASK)) {
577 spin_lock_irqsave(&chip->reg_lock, flags);
578 if ((chip->image[CS4231_PLAYBK_FORMAT] & 0x0f) == (cdfr & 0x0f) || /* rate is same? */
579 (chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE)) {
580 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1] | 0x20);
581 snd_cs4231_out(chip, CS4231_REC_FORMAT, chip->image[CS4231_REC_FORMAT] = cdfr);
582 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1] &= ~0x20);
583 full_calib = 0;
584 }
585 spin_unlock_irqrestore(&chip->reg_lock, flags);
586 }
587 if (full_calib) {
588 snd_cs4231_mce_up(chip);
589 spin_lock_irqsave(&chip->reg_lock, flags);
590 if (chip->hardware != CS4231_HW_INTERWAVE) {
591 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE)) {
592 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
593 ((chip->single_dma ? cdfr : chip->image[CS4231_PLAYBK_FORMAT]) & 0xf0) |
594 (cdfr & 0x0f));
595 spin_unlock_irqrestore(&chip->reg_lock, flags);
596 snd_cs4231_mce_down(chip);
597 snd_cs4231_mce_up(chip);
598 spin_lock_irqsave(&chip->reg_lock, flags);
599 }
600 }
601 snd_cs4231_out(chip, CS4231_REC_FORMAT, cdfr);
602 spin_unlock_irqrestore(&chip->reg_lock, flags);
603 snd_cs4231_mce_down(chip);
604 }
605 snd_cs4231_calibrate_mute(chip, 0);
606 up(&chip->mce_mutex);
607}
608
609/*
610 * Timer interface
611 */
612
ba2375a4 613static unsigned long snd_cs4231_timer_resolution(struct snd_timer * timer)
1da177e4 614{
ba2375a4 615 struct snd_cs4231 *chip = snd_timer_chip(timer);
1da177e4
LT		 616 if (chip->hardware & CS4231_HW_CS4236B_MASK)
617 return 14467;
618 else
619 return chip->image[CS4231_PLAYBK_FORMAT] & 1 ? 9969 : 9920;
620}
621
ba2375a4 622static int snd_cs4231_timer_start(struct snd_timer * timer)
1da177e4
LT		 623{
624 unsigned long flags;
625 unsigned int ticks;
ba2375a4 626 struct snd_cs4231 *chip = snd_timer_chip(timer);
1da177e4
LT		 627 spin_lock_irqsave(&chip->reg_lock, flags);
628 ticks = timer->sticks;
629 if ((chip->image[CS4231_ALT_FEATURE_1] & CS4231_TIMER_ENABLE) == 0 ||
630 (unsigned char)(ticks >> 8) != chip->image[CS4231_TIMER_HIGH] ||
631 (unsigned char)ticks != chip->image[CS4231_TIMER_LOW]) {
632 snd_cs4231_out(chip, CS4231_TIMER_HIGH, chip->image[CS4231_TIMER_HIGH] = (unsigned char) (ticks >> 8));
633 snd_cs4231_out(chip, CS4231_TIMER_LOW, chip->image[CS4231_TIMER_LOW] = (unsigned char) ticks);
634 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1] | CS4231_TIMER_ENABLE);
635 }
636 spin_unlock_irqrestore(&chip->reg_lock, flags);
637 return 0;
638}
639
ba2375a4 640static int snd_cs4231_timer_stop(struct snd_timer * timer)
1da177e4
LT		 641{
642 unsigned long flags;
ba2375a4 643 struct snd_cs4231 *chip = snd_timer_chip(timer);
1da177e4
LT		 644 spin_lock_irqsave(&chip->reg_lock, flags);
645 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1] &= ~CS4231_TIMER_ENABLE);
646 spin_unlock_irqrestore(&chip->reg_lock, flags);
647 return 0;
648}
649
ba2375a4 650static void snd_cs4231_init(struct snd_cs4231 *chip)
1da177e4
LT		 651{
652 unsigned long flags;
653
654 snd_cs4231_mce_down(chip);
655
656#ifdef SNDRV_DEBUG_MCE
657 snd_printk("init: (1)\n");
658#endif
659 snd_cs4231_mce_up(chip);
660 spin_lock_irqsave(&chip->reg_lock, flags);
661 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
662 CS4231_RECORD_ENABLE | CS4231_RECORD_PIO |
663 CS4231_CALIB_MODE);
664 chip->image[CS4231_IFACE_CTRL] |= CS4231_AUTOCALIB;
665 snd_cs4231_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]);
666 spin_unlock_irqrestore(&chip->reg_lock, flags);
667 snd_cs4231_mce_down(chip);
668
669#ifdef SNDRV_DEBUG_MCE
670 snd_printk("init: (2)\n");
671#endif
672
673 snd_cs4231_mce_up(chip);
674 spin_lock_irqsave(&chip->reg_lock, flags);
675 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1]);
676 spin_unlock_irqrestore(&chip->reg_lock, flags);
677 snd_cs4231_mce_down(chip);
678
679#ifdef SNDRV_DEBUG_MCE
680 snd_printk("init: (3) - afei = 0x%x\n", chip->image[CS4231_ALT_FEATURE_1]);
681#endif
682
683 spin_lock_irqsave(&chip->reg_lock, flags);
684 snd_cs4231_out(chip, CS4231_ALT_FEATURE_2, chip->image[CS4231_ALT_FEATURE_2]);
685 spin_unlock_irqrestore(&chip->reg_lock, flags);
686
687 snd_cs4231_mce_up(chip);
688 spin_lock_irqsave(&chip->reg_lock, flags);
689 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT, chip->image[CS4231_PLAYBK_FORMAT]);
690 spin_unlock_irqrestore(&chip->reg_lock, flags);
691 snd_cs4231_mce_down(chip);
692
693#ifdef SNDRV_DEBUG_MCE
694 snd_printk("init: (4)\n");
695#endif
696
697 snd_cs4231_mce_up(chip);
698 spin_lock_irqsave(&chip->reg_lock, flags);
699 snd_cs4231_out(chip, CS4231_REC_FORMAT, chip->image[CS4231_REC_FORMAT]);
700 spin_unlock_irqrestore(&chip->reg_lock, flags);
701 snd_cs4231_mce_down(chip);
702
703#ifdef SNDRV_DEBUG_MCE
704 snd_printk("init: (5)\n");
705#endif
706}
707
ba2375a4 708static int snd_cs4231_open(struct snd_cs4231 *chip, unsigned int mode)
1da177e4
LT		 709{
710 unsigned long flags;
711
712 down(&chip->open_mutex);
713 if ((chip->mode & mode) ||
714 ((chip->mode & CS4231_MODE_OPEN) && chip->single_dma)) {
715 up(&chip->open_mutex);
716 return -EAGAIN;
717 }
718 if (chip->mode & CS4231_MODE_OPEN) {
719 chip->mode |= mode;
720 up(&chip->open_mutex);
721 return 0;
722 }
723 /* ok. now enable and ack CODEC IRQ */
724 spin_lock_irqsave(&chip->reg_lock, flags);
725 snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ |
726 CS4231_RECORD_IRQ |
727 CS4231_TIMER_IRQ);
728 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
729 cs4231_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */
730 cs4231_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */
731 chip->image[CS4231_PIN_CTRL] |= CS4231_IRQ_ENABLE;
732 snd_cs4231_out(chip, CS4231_PIN_CTRL, chip->image[CS4231_PIN_CTRL]);
733 snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ |
734 CS4231_RECORD_IRQ |
735 CS4231_TIMER_IRQ);
736 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
737 spin_unlock_irqrestore(&chip->reg_lock, flags);
738
739 chip->mode = mode;
740 up(&chip->open_mutex);
741 return 0;
742}
743
ba2375a4 744static void snd_cs4231_close(struct snd_cs4231 *chip, unsigned int mode)
1da177e4
LT		 745{
746 unsigned long flags;
747
748 down(&chip->open_mutex);
749 chip->mode &= ~mode;
750 if (chip->mode & CS4231_MODE_OPEN) {
751 up(&chip->open_mutex);
752 return;
753 }
754 snd_cs4231_calibrate_mute(chip, 1);
755
756 /* disable IRQ */
757 spin_lock_irqsave(&chip->reg_lock, flags);
758 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
759 cs4231_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */
760 cs4231_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */
761 chip->image[CS4231_PIN_CTRL] &= ~CS4231_IRQ_ENABLE;
762 snd_cs4231_out(chip, CS4231_PIN_CTRL, chip->image[CS4231_PIN_CTRL]);
763
764 /* now disable record & playback */
765
766 if (chip->image[CS4231_IFACE_CTRL] & (CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
767 CS4231_RECORD_ENABLE | CS4231_RECORD_PIO)) {
768 spin_unlock_irqrestore(&chip->reg_lock, flags);
769 snd_cs4231_mce_up(chip);
770 spin_lock_irqsave(&chip->reg_lock, flags);
771 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
772 CS4231_RECORD_ENABLE | CS4231_RECORD_PIO);
773 snd_cs4231_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]);
774 spin_unlock_irqrestore(&chip->reg_lock, flags);
775 snd_cs4231_mce_down(chip);
776 spin_lock_irqsave(&chip->reg_lock, flags);
777 }
778
779 /* clear IRQ again */
780 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
781 cs4231_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */
782 cs4231_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */
783 spin_unlock_irqrestore(&chip->reg_lock, flags);
784
785 snd_cs4231_calibrate_mute(chip, 0);
786
787 chip->mode = 0;
788 up(&chip->open_mutex);
789}
790
791/*
792 * timer open/close
793 */
794
ba2375a4 795static int snd_cs4231_timer_open(struct snd_timer * timer)
1da177e4 796{
ba2375a4 797 struct snd_cs4231 *chip = snd_timer_chip(timer);
1da177e4
LT		 798 snd_cs4231_open(chip, CS4231_MODE_TIMER);
799 return 0;
800}
801
ba2375a4 802static int snd_cs4231_timer_close(struct snd_timer * timer)
1da177e4 803{
ba2375a4 804 struct snd_cs4231 *chip = snd_timer_chip(timer);
1da177e4
LT		 805 snd_cs4231_close(chip, CS4231_MODE_TIMER);
806 return 0;
807}
808
ba2375a4 809static struct snd_timer_hardware snd_cs4231_timer_table =
1da177e4
LT		 810{
811 .flags = SNDRV_TIMER_HW_AUTO,
812 .resolution = 9945,
813 .ticks = 65535,
814 .open = snd_cs4231_timer_open,
815 .close = snd_cs4231_timer_close,
816 .c_resolution = snd_cs4231_timer_resolution,
817 .start = snd_cs4231_timer_start,
818 .stop = snd_cs4231_timer_stop,
819};
820
821/*
822 * ok.. exported functions..
823 */
824
ba2375a4
TI		 825static int snd_cs4231_playback_hw_params(struct snd_pcm_substream *substream,
826 struct snd_pcm_hw_params *hw_params)
1da177e4 827{
ba2375a4 828 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 829 unsigned char new_pdfr;
830 int err;
831
832 if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
833 return err;
834 new_pdfr = snd_cs4231_get_format(chip, params_format(hw_params), params_channels(hw_params)) |
835 snd_cs4231_get_rate(params_rate(hw_params));
836 chip->set_playback_format(chip, hw_params, new_pdfr);
837 return 0;
838}
839
ba2375a4 840static int snd_cs4231_playback_hw_free(struct snd_pcm_substream *substream)
1da177e4
LT		 841{
842 return snd_pcm_lib_free_pages(substream);
843}
844
ba2375a4 845static int snd_cs4231_playback_prepare(struct snd_pcm_substream *substream)
1da177e4 846{
ba2375a4
TI		 847 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
848 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 849 unsigned long flags;
850 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
851 unsigned int count = snd_pcm_lib_period_bytes(substream);
852
853 spin_lock_irqsave(&chip->reg_lock, flags);
854 chip->p_dma_size = size;
855 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO);
856 snd_dma_program(chip->dma1, runtime->dma_addr, size, DMA_MODE_WRITE | DMA_AUTOINIT);
857 count = snd_cs4231_get_count(chip->image[CS4231_PLAYBK_FORMAT], count) - 1;
858 snd_cs4231_out(chip, CS4231_PLY_LWR_CNT, (unsigned char) count);
859 snd_cs4231_out(chip, CS4231_PLY_UPR_CNT, (unsigned char) (count >> 8));
860 spin_unlock_irqrestore(&chip->reg_lock, flags);
861#if 0
862 snd_cs4231_debug(chip);
863#endif
864 return 0;
865}
1da177e4 866
ba2375a4
TI		 867static int snd_cs4231_capture_hw_params(struct snd_pcm_substream *substream,
868 struct snd_pcm_hw_params *hw_params)
1da177e4 869{
ba2375a4 870 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 871 unsigned char new_cdfr;
872 int err;
873
874 if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
875 return err;
876 new_cdfr = snd_cs4231_get_format(chip, params_format(hw_params), params_channels(hw_params)) |
877 snd_cs4231_get_rate(params_rate(hw_params));
878 chip->set_capture_format(chip, hw_params, new_cdfr);
879 return 0;
880}
881
ba2375a4 882static int snd_cs4231_capture_hw_free(struct snd_pcm_substream *substream)
1da177e4
LT		 883{
884 return snd_pcm_lib_free_pages(substream);
885}
886
ba2375a4 887static int snd_cs4231_capture_prepare(struct snd_pcm_substream *substream)
1da177e4 888{
ba2375a4
TI		 889 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
890 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 891 unsigned long flags;
892 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
893 unsigned int count = snd_pcm_lib_period_bytes(substream);
894
895 spin_lock_irqsave(&chip->reg_lock, flags);
896 chip->c_dma_size = size;
897 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_RECORD_ENABLE | CS4231_RECORD_PIO);
898 snd_dma_program(chip->dma2, runtime->dma_addr, size, DMA_MODE_READ | DMA_AUTOINIT);
899 count = snd_cs4231_get_count(chip->image[CS4231_REC_FORMAT], count) - 1;
900 if (chip->single_dma && chip->hardware != CS4231_HW_INTERWAVE) {
901 snd_cs4231_out(chip, CS4231_PLY_LWR_CNT, (unsigned char) count);
902 snd_cs4231_out(chip, CS4231_PLY_UPR_CNT, (unsigned char) (count >> 8));
903 } else {
904 snd_cs4231_out(chip, CS4231_REC_LWR_CNT, (unsigned char) count);
905 snd_cs4231_out(chip, CS4231_REC_UPR_CNT, (unsigned char) (count >> 8));
906 }
907 spin_unlock_irqrestore(&chip->reg_lock, flags);
908 return 0;
909}
1da177e4 910
ba2375a4 911static void snd_cs4231_overrange(struct snd_cs4231 *chip)
1da177e4
LT		 912{
913 unsigned long flags;
914 unsigned char res;
915
916 spin_lock_irqsave(&chip->reg_lock, flags);
917 res = snd_cs4231_in(chip, CS4231_TEST_INIT);
918 spin_unlock_irqrestore(&chip->reg_lock, flags);
919 if (res & (0x08 | 0x02)) /* detect overrange only above 0dB; may be user selectable? */
920 chip->capture_substream->runtime->overrange++;
921}
922
923irqreturn_t snd_cs4231_interrupt(int irq, void *dev_id, struct pt_regs *regs)
924{
ba2375a4 925 struct snd_cs4231 *chip = dev_id;
1da177e4
LT		 926 unsigned char status;
927
928 status = snd_cs4231_in(chip, CS4231_IRQ_STATUS);
929 if (status & CS4231_TIMER_IRQ) {
930 if (chip->timer)
931 snd_timer_interrupt(chip->timer, chip->timer->sticks);
932 }
933 if (chip->single_dma && chip->hardware != CS4231_HW_INTERWAVE) {
934 if (status & CS4231_PLAYBACK_IRQ) {
935 if (chip->mode & CS4231_MODE_PLAY) {
936 if (chip->playback_substream)
937 snd_pcm_period_elapsed(chip->playback_substream);
938 }
939 if (chip->mode & CS4231_MODE_RECORD) {
940 if (chip->capture_substream) {
941 snd_cs4231_overrange(chip);
942 snd_pcm_period_elapsed(chip->capture_substream);
943 }
944 }
945 }
946 } else {
947 if (status & CS4231_PLAYBACK_IRQ) {
948 if (chip->playback_substream)
949 snd_pcm_period_elapsed(chip->playback_substream);
950 }
951 if (status & CS4231_RECORD_IRQ) {
952 if (chip->capture_substream) {
953 snd_cs4231_overrange(chip);
954 snd_pcm_period_elapsed(chip->capture_substream);
955 }
956 }
957 }
958
959 spin_lock(&chip->reg_lock);
960 snd_cs4231_outm(chip, CS4231_IRQ_STATUS, ~CS4231_ALL_IRQS | ~status, 0);
961 spin_unlock(&chip->reg_lock);
962 return IRQ_HANDLED;
963}
964
ba2375a4 965static snd_pcm_uframes_t snd_cs4231_playback_pointer(struct snd_pcm_substream *substream)
1da177e4 966{
ba2375a4 967 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 968 size_t ptr;
969
970 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE))
971 return 0;
972 ptr = snd_dma_pointer(chip->dma1, chip->p_dma_size);
973 return bytes_to_frames(substream->runtime, ptr);
974}
975
ba2375a4 976static snd_pcm_uframes_t snd_cs4231_capture_pointer(struct snd_pcm_substream *substream)
1da177e4 977{
ba2375a4 978 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 979 size_t ptr;
980
981 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE))
982 return 0;
983 ptr = snd_dma_pointer(chip->dma2, chip->c_dma_size);
984 return bytes_to_frames(substream->runtime, ptr);
985}
1da177e4
LT		 986
987/*
988
989 */
990
ba2375a4 991static int snd_cs4231_probe(struct snd_cs4231 *chip)
1da177e4
LT		 992{
993 unsigned long flags;
994 int i, id, rev;
995 unsigned char *ptr;
996 unsigned int hw;
997
998#if 0
999 snd_cs4231_debug(chip);
1000#endif
1001 id = 0;
1002 for (i = 0; i < 50; i++) {
1003 mb();
1004 if (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
1005 udelay(2000);
1006 else {
1007 spin_lock_irqsave(&chip->reg_lock, flags);
1008 snd_cs4231_out(chip, CS4231_MISC_INFO, CS4231_MODE2);
1009 id = snd_cs4231_in(chip, CS4231_MISC_INFO) & 0x0f;
1010 spin_unlock_irqrestore(&chip->reg_lock, flags);
1011 if (id == 0x0a)
1012 break; /* this is valid value */
1013 }
1014 }
1015 snd_printdd("cs4231: port = 0x%lx, id = 0x%x\n", chip->port, id);
1016 if (id != 0x0a)
1017 return -ENODEV; /* no valid device found */
1018
1019 if (((hw = chip->hardware) & CS4231_HW_TYPE_MASK) == CS4231_HW_DETECT) {
1020 rev = snd_cs4231_in(chip, CS4231_VERSION) & 0xe7;
1021 snd_printdd("CS4231: VERSION (I25) = 0x%x\n", rev);
1022 if (rev == 0x80) {
1023 unsigned char tmp = snd_cs4231_in(chip, 23);
1024 snd_cs4231_out(chip, 23, ~tmp);
1025 if (snd_cs4231_in(chip, 23) != tmp)
1026 chip->hardware = CS4231_HW_AD1845;
1027 else
1028 chip->hardware = CS4231_HW_CS4231;
1029 } else if (rev == 0xa0) {
1030 chip->hardware = CS4231_HW_CS4231A;
1031 } else if (rev == 0xa2) {
1032 chip->hardware = CS4231_HW_CS4232;
1033 } else if (rev == 0xb2) {
1034 chip->hardware = CS4231_HW_CS4232A;
1035 } else if (rev == 0x83) {
1036 chip->hardware = CS4231_HW_CS4236;
1037 } else if (rev == 0x03) {
1038 chip->hardware = CS4231_HW_CS4236B;
1039 } else {
1040 snd_printk("unknown CS chip with version 0x%x\n", rev);
1041 return -ENODEV; /* unknown CS4231 chip? */
1042 }
1043 }
1044 spin_lock_irqsave(&chip->reg_lock, flags);
1045 cs4231_inb(chip, CS4231P(STATUS)); /* clear any pendings IRQ */
1046 cs4231_outb(chip, CS4231P(STATUS), 0);
1047 mb();
1048 spin_unlock_irqrestore(&chip->reg_lock, flags);
1049
1050 chip->image[CS4231_MISC_INFO] = CS4231_MODE2;
1051 switch (chip->hardware) {
1052 case CS4231_HW_INTERWAVE:
1053 chip->image[CS4231_MISC_INFO] = CS4231_IW_MODE3;
1054 break;
1055 case CS4231_HW_CS4235:
1056 case CS4231_HW_CS4236B:
1057 case CS4231_HW_CS4237B:
1058 case CS4231_HW_CS4238B:
1059 case CS4231_HW_CS4239:
1060 if (hw == CS4231_HW_DETECT3)
1061 chip->image[CS4231_MISC_INFO] = CS4231_4236_MODE3;
1062 else
1063 chip->hardware = CS4231_HW_CS4236;
1064 break;
1065 }
1066
1067 chip->image[CS4231_IFACE_CTRL] =
1068 (chip->image[CS4231_IFACE_CTRL] & ~CS4231_SINGLE_DMA) |
1069 (chip->single_dma ? CS4231_SINGLE_DMA : 0);
1070 chip->image[CS4231_ALT_FEATURE_1] = 0x80;
1071 chip->image[CS4231_ALT_FEATURE_2] = chip->hardware == CS4231_HW_INTERWAVE ? 0xc2 : 0x01;
1072 ptr = (unsigned char *) &chip->image;
1073 snd_cs4231_mce_down(chip);
1074 spin_lock_irqsave(&chip->reg_lock, flags);
1075 for (i = 0; i < 32; i++) /* ok.. fill all CS4231 registers */
1076 snd_cs4231_out(chip, i, *ptr++);
1077 spin_unlock_irqrestore(&chip->reg_lock, flags);
1078 snd_cs4231_mce_up(chip);
1079 snd_cs4231_mce_down(chip);
1080
1081 mdelay(2);
1082
1083 /* ok.. try check hardware version for CS4236+ chips */
1084 if ((hw & CS4231_HW_TYPE_MASK) == CS4231_HW_DETECT) {
1085 if (chip->hardware == CS4231_HW_CS4236B) {
1086 rev = snd_cs4236_ext_in(chip, CS4236_VERSION);
1087 snd_cs4236_ext_out(chip, CS4236_VERSION, 0xff);
1088 id = snd_cs4236_ext_in(chip, CS4236_VERSION);
1089 snd_cs4236_ext_out(chip, CS4236_VERSION, rev);
1090 snd_printdd("CS4231: ext version; rev = 0x%x, id = 0x%x\n", rev, id);
1091 if ((id & 0x1f) == 0x1d) { /* CS4235 */
1092 chip->hardware = CS4231_HW_CS4235;
1093 switch (id >> 5) {
1094 case 4:
1095 case 5:
1096 case 6:
1097 break;
1098 default:
1099 snd_printk("unknown CS4235 chip (enhanced version = 0x%x)\n", id);
1100 }
1101 } else if ((id & 0x1f) == 0x0b) { /* CS4236/B */
1102 switch (id >> 5) {
1103 case 4:
1104 case 5:
1105 case 6:
1106 case 7:
1107 chip->hardware = CS4231_HW_CS4236B;
1108 break;
1109 default:
1110 snd_printk("unknown CS4236 chip (enhanced version = 0x%x)\n", id);
1111 }
1112 } else if ((id & 0x1f) == 0x08) { /* CS4237B */
1113 chip->hardware = CS4231_HW_CS4237B;
1114 switch (id >> 5) {
1115 case 4:
1116 case 5:
1117 case 6:
1118 case 7:
1119 break;
1120 default:
1121 snd_printk("unknown CS4237B chip (enhanced version = 0x%x)\n", id);
1122 }
1123 } else if ((id & 0x1f) == 0x09) { /* CS4238B */
1124 chip->hardware = CS4231_HW_CS4238B;
1125 switch (id >> 5) {
1126 case 5:
1127 case 6:
1128 case 7:
1129 break;
1130 default:
1131 snd_printk("unknown CS4238B chip (enhanced version = 0x%x)\n", id);
1132 }
1133 } else if ((id & 0x1f) == 0x1e) { /* CS4239 */
1134 chip->hardware = CS4231_HW_CS4239;
1135 switch (id >> 5) {
1136 case 4:
1137 case 5:
1138 case 6:
1139 break;
1140 default:
1141 snd_printk("unknown CS4239 chip (enhanced version = 0x%x)\n", id);
1142 }
1143 } else {
1144 snd_printk("unknown CS4236/CS423xB chip (enhanced version = 0x%x)\n", id);
1145 }
1146 }
1147 }
1148 return 0; /* all things are ok.. */
1149}
1150
1151/*
1152
1153 */
1154
ba2375a4 1155static struct snd_pcm_hardware snd_cs4231_playback =
1da177e4
LT		 1156{
1157 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1158 SNDRV_PCM_INFO_MMAP_VALID |
1159 SNDRV_PCM_INFO_RESUME |
1160 SNDRV_PCM_INFO_SYNC_START),
1161 .formats = (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW | SNDRV_PCM_FMTBIT_IMA_ADPCM |
1162 SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE),
1163 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
1164 .rate_min = 5510,
1165 .rate_max = 48000,
1166 .channels_min = 1,
1167 .channels_max = 2,
1168 .buffer_bytes_max = (128*1024),
1169 .period_bytes_min = 64,
1170 .period_bytes_max = (128*1024),
1171 .periods_min = 1,
1172 .periods_max = 1024,
1173 .fifo_size = 0,
1174};
1175
ba2375a4 1176static struct snd_pcm_hardware snd_cs4231_capture =
1da177e4
LT		 1177{
1178 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1179 SNDRV_PCM_INFO_MMAP_VALID |
1180 SNDRV_PCM_INFO_RESUME |
1181 SNDRV_PCM_INFO_SYNC_START),
1182 .formats = (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW | SNDRV_PCM_FMTBIT_IMA_ADPCM |
1183 SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE),
1184 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
1185 .rate_min = 5510,
1186 .rate_max = 48000,
1187 .channels_min = 1,
1188 .channels_max = 2,
1189 .buffer_bytes_max = (128*1024),
1190 .period_bytes_min = 64,
1191 .period_bytes_max = (128*1024),
1192 .periods_min = 1,
1193 .periods_max = 1024,
1194 .fifo_size = 0,
1195};
1196
1197/*
1198
1199 */
1200
ba2375a4 1201static int snd_cs4231_playback_open(struct snd_pcm_substream *substream)
1da177e4 1202{
ba2375a4
TI		 1203 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1204 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 1205 int err;
1206
1207 runtime->hw = snd_cs4231_playback;
1208
1209 /* hardware bug in InterWave chipset */
1210 if (chip->hardware == CS4231_HW_INTERWAVE && chip->dma1 > 3)
1211 runtime->hw.formats &= ~SNDRV_PCM_FMTBIT_MU_LAW;
1212
1213 /* hardware limitation of cheap chips */
1214 if (chip->hardware == CS4231_HW_CS4235 ||
1215 chip->hardware == CS4231_HW_CS4239)
1216 runtime->hw.formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE;
1217
1da177e4
LT		 1218 snd_pcm_limit_isa_dma_size(chip->dma1, &runtime->hw.buffer_bytes_max);
1219 snd_pcm_limit_isa_dma_size(chip->dma1, &runtime->hw.period_bytes_max);
1220
1221 if (chip->claim_dma) {
1222 if ((err = chip->claim_dma(chip, chip->dma_private_data, chip->dma1)) < 0)
1223 return err;
1224 }
1da177e4
LT		 1225
1226 if ((err = snd_cs4231_open(chip, CS4231_MODE_PLAY)) < 0) {
1da177e4
LT		 1227 if (chip->release_dma)
1228 chip->release_dma(chip, chip->dma_private_data, chip->dma1);
1da177e4
LT		 1229 snd_free_pages(runtime->dma_area, runtime->dma_bytes);
1230 return err;
1231 }
1232 chip->playback_substream = substream;
1da177e4
LT		 1233 snd_pcm_set_sync(substream);
1234 chip->rate_constraint(runtime);
1235 return 0;
1236}
1237
ba2375a4 1238static int snd_cs4231_capture_open(struct snd_pcm_substream *substream)
1da177e4 1239{
ba2375a4
TI		 1240 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1241 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 1242 int err;
1243
1244 runtime->hw = snd_cs4231_capture;
1245
1246 /* hardware limitation of cheap chips */
1247 if (chip->hardware == CS4231_HW_CS4235 ||
1248 chip->hardware == CS4231_HW_CS4239)
1249 runtime->hw.formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE;
1250
1da177e4
LT		 1251 snd_pcm_limit_isa_dma_size(chip->dma2, &runtime->hw.buffer_bytes_max);
1252 snd_pcm_limit_isa_dma_size(chip->dma2, &runtime->hw.period_bytes_max);
1253
1254 if (chip->claim_dma) {
1255 if ((err = chip->claim_dma(chip, chip->dma_private_data, chip->dma2)) < 0)
1256 return err;
1257 }
1da177e4
LT		 1258
1259 if ((err = snd_cs4231_open(chip, CS4231_MODE_RECORD)) < 0) {
1da177e4
LT		 1260 if (chip->release_dma)
1261 chip->release_dma(chip, chip->dma_private_data, chip->dma2);
1da177e4
LT		 1262 snd_free_pages(runtime->dma_area, runtime->dma_bytes);
1263 return err;
1264 }
1265 chip->capture_substream = substream;
1da177e4
LT		 1266 snd_pcm_set_sync(substream);
1267 chip->rate_constraint(runtime);
1268 return 0;
1269}
1270
ba2375a4 1271static int snd_cs4231_playback_close(struct snd_pcm_substream *substream)
1da177e4 1272{
ba2375a4 1273 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 1274
1275 chip->playback_substream = NULL;
1276 snd_cs4231_close(chip, CS4231_MODE_PLAY);
1277 return 0;
1278}
1279
ba2375a4 1280static int snd_cs4231_capture_close(struct snd_pcm_substream *substream)
1da177e4 1281{
ba2375a4 1282 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 1283
1284 chip->capture_substream = NULL;
1285 snd_cs4231_close(chip, CS4231_MODE_RECORD);
1286 return 0;
1287}
1288
1289#ifdef CONFIG_PM
1290
1291/* lowlevel suspend callback for CS4231 */
ba2375a4 1292static void snd_cs4231_suspend(struct snd_cs4231 *chip)
1da177e4
LT		 1293{
1294 int reg;
1295 unsigned long flags;
1296
7bb35e20 1297 snd_pcm_suspend_all(chip->pcm);
1da177e4
LT		 1298 spin_lock_irqsave(&chip->reg_lock, flags);
1299 for (reg = 0; reg < 32; reg++)
1300 chip->image[reg] = snd_cs4231_in(chip, reg);
1301 spin_unlock_irqrestore(&chip->reg_lock, flags);
1302}
1303
1304/* lowlevel resume callback for CS4231 */
ba2375a4 1305static void snd_cs4231_resume(struct snd_cs4231 *chip)
1da177e4
LT		 1306{
1307 int reg;
1308 unsigned long flags;
1309 int timeout;
1310
1311 snd_cs4231_mce_up(chip);
1312 spin_lock_irqsave(&chip->reg_lock, flags);
1313 for (reg = 0; reg < 32; reg++) {
1314 switch (reg) {
1315 case CS4231_VERSION:
1316 break;
1317 default:
1318 snd_cs4231_out(chip, reg, chip->image[reg]);
1319 break;
1320 }
1321 }
1322 spin_unlock_irqrestore(&chip->reg_lock, flags);
fa55f837 1323#if 1
1da177e4
LT		 1324 snd_cs4231_mce_down(chip);
1325#else
1326 /* The following is a workaround to avoid freeze after resume on TP600E.
1327 This is the first half of copy of snd_cs4231_mce_down(), but doesn't
1328 include rescheduling. -- iwai
1329 */
1330 snd_cs4231_busy_wait(chip);
1331 spin_lock_irqsave(&chip->reg_lock, flags);
1332 chip->mce_bit &= ~CS4231_MCE;
1333 timeout = cs4231_inb(chip, CS4231P(REGSEL));
1334 cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | (timeout & 0x1f));
1335 spin_unlock_irqrestore(&chip->reg_lock, flags);
1336 if (timeout == 0x80)
1337 snd_printk("down [0x%lx]: serious init problem - codec still busy\n", chip->port);
1338 if ((timeout & CS4231_MCE) == 0 ||
1339 !(chip->hardware & (CS4231_HW_CS4231_MASK | CS4231_HW_CS4232_MASK))) {
1340 return;
1341 }
1342 snd_cs4231_busy_wait(chip);
1343#endif
1344}
1da177e4
LT		 1345#endif /* CONFIG_PM */
1346
ba2375a4 1347static int snd_cs4231_free(struct snd_cs4231 *chip)
1da177e4 1348{
b1d5776d
TI		 1349 release_and_free_resource(chip->res_port);
1350 release_and_free_resource(chip->res_cport);
1da177e4
LT		 1351 if (chip->irq >= 0) {
1352 disable_irq(chip->irq);
1353 if (!(chip->hwshare & CS4231_HWSHARE_IRQ))
1354 free_irq(chip->irq, (void *) chip);
1355 }
1356 if (!(chip->hwshare & CS4231_HWSHARE_DMA1) && chip->dma1 >= 0) {
1357 snd_dma_disable(chip->dma1);
1358 free_dma(chip->dma1);
1359 }
1360 if (!(chip->hwshare & CS4231_HWSHARE_DMA2) && chip->dma2 >= 0 && chip->dma2 != chip->dma1) {
1361 snd_dma_disable(chip->dma2);
1362 free_dma(chip->dma2);
1363 }
1364 if (chip->timer)
1365 snd_device_free(chip->card, chip->timer);
1366 kfree(chip);
1367 return 0;
1368}
1369
ba2375a4 1370static int snd_cs4231_dev_free(struct snd_device *device)
1da177e4 1371{
ba2375a4 1372 struct snd_cs4231 *chip = device->device_data;
1da177e4
LT		 1373 return snd_cs4231_free(chip);
1374}
1375
ba2375a4 1376const char *snd_cs4231_chip_id(struct snd_cs4231 *chip)
1da177e4
LT		 1377{
1378 switch (chip->hardware) {
1379 case CS4231_HW_CS4231: return "CS4231";
1380 case CS4231_HW_CS4231A: return "CS4231A";
1381 case CS4231_HW_CS4232: return "CS4232";
1382 case CS4231_HW_CS4232A: return "CS4232A";
1383 case CS4231_HW_CS4235: return "CS4235";
1384 case CS4231_HW_CS4236: return "CS4236";
1385 case CS4231_HW_CS4236B: return "CS4236B";
1386 case CS4231_HW_CS4237B: return "CS4237B";
1387 case CS4231_HW_CS4238B: return "CS4238B";
1388 case CS4231_HW_CS4239: return "CS4239";
1389 case CS4231_HW_INTERWAVE: return "AMD InterWave";
1390 case CS4231_HW_OPL3SA2: return chip->card->shortname;
1391 case CS4231_HW_AD1845: return "AD1845";
1392 default: return "???";
1393 }
1394}
1395
ba2375a4 1396static int snd_cs4231_new(struct snd_card *card,
1da177e4
LT		 1397 unsigned short hardware,
1398 unsigned short hwshare,
ba2375a4 1399 struct snd_cs4231 ** rchip)
1da177e4 1400{
ba2375a4 1401 struct snd_cs4231 *chip;
1da177e4
LT		 1402
1403 *rchip = NULL;
9e76a76e 1404 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1da177e4
LT		 1405 if (chip == NULL)
1406 return -ENOMEM;
1407 chip->hardware = hardware;
1408 chip->hwshare = hwshare;
1409
1410 spin_lock_init(&chip->reg_lock);
1411 init_MUTEX(&chip->mce_mutex);
1412 init_MUTEX(&chip->open_mutex);
1413 chip->card = card;
1414 chip->rate_constraint = snd_cs4231_xrate;
1415 chip->set_playback_format = snd_cs4231_playback_format;
1416 chip->set_capture_format = snd_cs4231_capture_format;
1417 memcpy(&chip->image, &snd_cs4231_original_image, sizeof(snd_cs4231_original_image));
1418
1419 *rchip = chip;
1420 return 0;
1421}
1422
ba2375a4 1423int snd_cs4231_create(struct snd_card *card,
1da177e4
LT		 1424 unsigned long port,
1425 unsigned long cport,
1426 int irq, int dma1, int dma2,
1427 unsigned short hardware,
1428 unsigned short hwshare,
ba2375a4 1429 struct snd_cs4231 ** rchip)
1da177e4 1430{
ba2375a4 1431 static struct snd_device_ops ops = {
1da177e4
LT		 1432 .dev_free = snd_cs4231_dev_free,
1433 };
ba2375a4 1434 struct snd_cs4231 *chip;
1da177e4
LT		 1435 int err;
1436
1437 err = snd_cs4231_new(card, hardware, hwshare, &chip);
1438 if (err < 0)
1439 return err;
1440
1441 chip->irq = -1;
1442 chip->dma1 = -1;
1443 chip->dma2 = -1;
1444
1445 if ((chip->res_port = request_region(port, 4, "CS4231")) == NULL) {
1446 snd_printk(KERN_ERR "cs4231: can't grab port 0x%lx\n", port);
1447 snd_cs4231_free(chip);
1448 return -EBUSY;
1449 }
1450 chip->port = port;
1451 if ((long)cport >= 0 && (chip->res_cport = request_region(cport, 8, "CS4232 Control")) == NULL) {
1452 snd_printk(KERN_ERR "cs4231: can't grab control port 0x%lx\n", cport);
1453 snd_cs4231_free(chip);
1454 return -ENODEV;
1455 }
1456 chip->cport = cport;
1457 if (!(hwshare & CS4231_HWSHARE_IRQ) && request_irq(irq, snd_cs4231_interrupt, SA_INTERRUPT, "CS4231", (void *) chip)) {
1458 snd_printk(KERN_ERR "cs4231: can't grab IRQ %d\n", irq);
1459 snd_cs4231_free(chip);
1460 return -EBUSY;
1461 }
1462 chip->irq = irq;
1463 if (!(hwshare & CS4231_HWSHARE_DMA1) && request_dma(dma1, "CS4231 - 1")) {
1464 snd_printk(KERN_ERR "cs4231: can't grab DMA1 %d\n", dma1);
1465 snd_cs4231_free(chip);
1466 return -EBUSY;
1467 }
1468 chip->dma1 = dma1;
1469 if (!(hwshare & CS4231_HWSHARE_DMA2) && dma1 != dma2 && dma2 >= 0 && request_dma(dma2, "CS4231 - 2")) {
1470 snd_printk(KERN_ERR "cs4231: can't grab DMA2 %d\n", dma2);
1471 snd_cs4231_free(chip);
1472 return -EBUSY;
1473 }
1474 if (dma1 == dma2 || dma2 < 0) {
1475 chip->single_dma = 1;
1476 chip->dma2 = chip->dma1;
1477 } else
1478 chip->dma2 = dma2;
1479
1480 /* global setup */
1481 if (snd_cs4231_probe(chip) < 0) {
1482 snd_cs4231_free(chip);
1483 return -ENODEV;
1484 }
1485 snd_cs4231_init(chip);
1486
a9824c86 1487#if 0
1da177e4
LT		 1488 if (chip->hardware & CS4231_HW_CS4232_MASK) {
1489 if (chip->res_cport == NULL)
1490 snd_printk("CS4232 control port features are not accessible\n");
1491 }
a9824c86 1492#endif
1da177e4
LT		 1493
1494 /* Register device */
1495 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1496 snd_cs4231_free(chip);
1497 return err;
1498 }
1499
1500#ifdef CONFIG_PM
1501 /* Power Management */
1502 chip->suspend = snd_cs4231_suspend;
1503 chip->resume = snd_cs4231_resume;
1da177e4
LT		 1504#endif
1505
1506 *rchip = chip;
1507 return 0;
1508}
1509
ba2375a4 1510static struct snd_pcm_ops snd_cs4231_playback_ops = {
1da177e4
LT		 1511 .open = snd_cs4231_playback_open,
1512 .close = snd_cs4231_playback_close,
1513 .ioctl = snd_pcm_lib_ioctl,
1514 .hw_params = snd_cs4231_playback_hw_params,
1515 .hw_free = snd_cs4231_playback_hw_free,
1516 .prepare = snd_cs4231_playback_prepare,
1517 .trigger = snd_cs4231_trigger,
1518 .pointer = snd_cs4231_playback_pointer,
1519};
1520
ba2375a4 1521static struct snd_pcm_ops snd_cs4231_capture_ops = {
1da177e4
LT		 1522 .open = snd_cs4231_capture_open,
1523 .close = snd_cs4231_capture_close,
1524 .ioctl = snd_pcm_lib_ioctl,
1525 .hw_params = snd_cs4231_capture_hw_params,
1526 .hw_free = snd_cs4231_capture_hw_free,
1527 .prepare = snd_cs4231_capture_prepare,
1528 .trigger = snd_cs4231_trigger,
1529 .pointer = snd_cs4231_capture_pointer,
1530};
1531
ba2375a4 1532int snd_cs4231_pcm(struct snd_cs4231 *chip, int device, struct snd_pcm **rpcm)
1da177e4 1533{
ba2375a4 1534 struct snd_pcm *pcm;
1da177e4
LT		 1535 int err;
1536
1537 if ((err = snd_pcm_new(chip->card, "CS4231", device, 1, 1, &pcm)) < 0)
1538 return err;
1539
1540 spin_lock_init(&chip->reg_lock);
1541 init_MUTEX(&chip->mce_mutex);
1542 init_MUTEX(&chip->open_mutex);
1543
1544 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_cs4231_playback_ops);
1545 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_cs4231_capture_ops);
1546
1547 /* global setup */
1548 pcm->private_data = chip;
1da177e4
LT		 1549 pcm->info_flags = 0;
1550 if (chip->single_dma)
1551 pcm->info_flags |= SNDRV_PCM_INFO_HALF_DUPLEX;
1552 if (chip->hardware != CS4231_HW_INTERWAVE)
1553 pcm->info_flags |= SNDRV_PCM_INFO_JOINT_DUPLEX;
1554 strcpy(pcm->name, snd_cs4231_chip_id(chip));
1555
1da177e4
LT		 1556 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1557 snd_dma_isa_data(),
1558 64*1024, chip->dma1 > 3 || chip->dma2 > 3 ? 128*1024 : 64*1024);
1da177e4
LT		 1559
1560 chip->pcm = pcm;
1561 if (rpcm)
1562 *rpcm = pcm;
1563 return 0;
1564}
1565
ba2375a4 1566static void snd_cs4231_timer_free(struct snd_timer *timer)
1da177e4 1567{
ba2375a4 1568 struct snd_cs4231 *chip = timer->private_data;
1da177e4
LT		 1569 chip->timer = NULL;
1570}
1571
ba2375a4 1572int snd_cs4231_timer(struct snd_cs4231 *chip, int device, struct snd_timer **rtimer)
1da177e4 1573{
ba2375a4
TI		 1574 struct snd_timer *timer;
1575 struct snd_timer_id tid;
1da177e4
LT		 1576 int err;
1577
1578 /* Timer initialization */
1579 tid.dev_class = SNDRV_TIMER_CLASS_CARD;
1580 tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
1581 tid.card = chip->card->number;
1582 tid.device = device;
1583 tid.subdevice = 0;
1584 if ((err = snd_timer_new(chip->card, "CS4231", &tid, &timer)) < 0)
1585 return err;
1586 strcpy(timer->name, snd_cs4231_chip_id(chip));
1587 timer->private_data = chip;
1588 timer->private_free = snd_cs4231_timer_free;
1589 timer->hw = snd_cs4231_timer_table;
1590 chip->timer = timer;
1591 if (rtimer)
1592 *rtimer = timer;
1593 return 0;
1594}
1595
1596/*
1597 * MIXER part
1598 */
1599
ba2375a4 1600static int snd_cs4231_info_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1601{
1602 static char *texts[4] = {
1603 "Line", "Aux", "Mic", "Mix"
1604 };
1605 static char *opl3sa_texts[4] = {
1606 "Line", "CD", "Mic", "Mix"
1607 };
1608 static char *gusmax_texts[4] = {
1609 "Line", "Synth", "Mic", "Mix"
1610 };
1611 char **ptexts = texts;
ba2375a4 1612 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1613
1614 snd_assert(chip->card != NULL, return -EINVAL);
1615 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1616 uinfo->count = 2;
1617 uinfo->value.enumerated.items = 4;
1618 if (uinfo->value.enumerated.item > 3)
1619 uinfo->value.enumerated.item = 3;
1620 if (!strcmp(chip->card->driver, "GUS MAX"))
1621 ptexts = gusmax_texts;
1622 switch (chip->hardware) {
1623 case CS4231_HW_INTERWAVE: ptexts = gusmax_texts; break;
1624 case CS4231_HW_OPL3SA2: ptexts = opl3sa_texts; break;
1625 }
1626 strcpy(uinfo->value.enumerated.name, ptexts[uinfo->value.enumerated.item]);
1627 return 0;
1628}
1629
ba2375a4 1630static int snd_cs4231_get_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1631{
ba2375a4 1632 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1633 unsigned long flags;
1634
1635 spin_lock_irqsave(&chip->reg_lock, flags);
1636 ucontrol->value.enumerated.item[0] = (chip->image[CS4231_LEFT_INPUT] & CS4231_MIXS_ALL) >> 6;
1637 ucontrol->value.enumerated.item[1] = (chip->image[CS4231_RIGHT_INPUT] & CS4231_MIXS_ALL) >> 6;
1638 spin_unlock_irqrestore(&chip->reg_lock, flags);
1639 return 0;
1640}
1641
ba2375a4 1642static int snd_cs4231_put_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1643{
ba2375a4 1644 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1645 unsigned long flags;
1646 unsigned short left, right;
1647 int change;
1648
1649 if (ucontrol->value.enumerated.item[0] > 3 ||
1650 ucontrol->value.enumerated.item[1] > 3)
1651 return -EINVAL;
1652 left = ucontrol->value.enumerated.item[0] << 6;
1653 right = ucontrol->value.enumerated.item[1] << 6;
1654 spin_lock_irqsave(&chip->reg_lock, flags);
1655 left = (chip->image[CS4231_LEFT_INPUT] & ~CS4231_MIXS_ALL) | left;
1656 right = (chip->image[CS4231_RIGHT_INPUT] & ~CS4231_MIXS_ALL) | right;
1657 change = left != chip->image[CS4231_LEFT_INPUT] ||
1658 right != chip->image[CS4231_RIGHT_INPUT];
1659 snd_cs4231_out(chip, CS4231_LEFT_INPUT, left);
1660 snd_cs4231_out(chip, CS4231_RIGHT_INPUT, right);
1661 spin_unlock_irqrestore(&chip->reg_lock, flags);
1662 return change;
1663}
1664
ba2375a4 1665int snd_cs4231_info_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1666{
1667 int mask = (kcontrol->private_value >> 16) & 0xff;
1668
1669 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1670 uinfo->count = 1;
1671 uinfo->value.integer.min = 0;
1672 uinfo->value.integer.max = mask;
1673 return 0;
1674}
1675
ba2375a4 1676int snd_cs4231_get_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1677{
ba2375a4 1678 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1679 unsigned long flags;
1680 int reg = kcontrol->private_value & 0xff;
1681 int shift = (kcontrol->private_value >> 8) & 0xff;
1682 int mask = (kcontrol->private_value >> 16) & 0xff;
1683 int invert = (kcontrol->private_value >> 24) & 0xff;
1684
1685 spin_lock_irqsave(&chip->reg_lock, flags);
1686 ucontrol->value.integer.value[0] = (chip->image[reg] >> shift) & mask;
1687 spin_unlock_irqrestore(&chip->reg_lock, flags);
1688 if (invert)
1689 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1690 return 0;
1691}
1692
ba2375a4 1693int snd_cs4231_put_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1694{
ba2375a4 1695 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1696 unsigned long flags;
1697 int reg = kcontrol->private_value & 0xff;
1698 int shift = (kcontrol->private_value >> 8) & 0xff;
1699 int mask = (kcontrol->private_value >> 16) & 0xff;
1700 int invert = (kcontrol->private_value >> 24) & 0xff;
1701 int change;
1702 unsigned short val;
1703
1704 val = (ucontrol->value.integer.value[0] & mask);
1705 if (invert)
1706 val = mask - val;
1707 val <<= shift;
1708 spin_lock_irqsave(&chip->reg_lock, flags);
1709 val = (chip->image[reg] & ~(mask << shift)) | val;
1710 change = val != chip->image[reg];
1711 snd_cs4231_out(chip, reg, val);
1712 spin_unlock_irqrestore(&chip->reg_lock, flags);
1713 return change;
1714}
1715
ba2375a4 1716int snd_cs4231_info_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1717{
1718 int mask = (kcontrol->private_value >> 24) & 0xff;
1719
1720 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1721 uinfo->count = 2;
1722 uinfo->value.integer.min = 0;
1723 uinfo->value.integer.max = mask;
1724 return 0;
1725}
1726
ba2375a4 1727int snd_cs4231_get_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1728{
ba2375a4 1729 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1730 unsigned long flags;
1731 int left_reg = kcontrol->private_value & 0xff;
1732 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1733 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1734 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1735 int mask = (kcontrol->private_value >> 24) & 0xff;
1736 int invert = (kcontrol->private_value >> 22) & 1;
1737
1738 spin_lock_irqsave(&chip->reg_lock, flags);
1739 ucontrol->value.integer.value[0] = (chip->image[left_reg] >> shift_left) & mask;
1740 ucontrol->value.integer.value[1] = (chip->image[right_reg] >> shift_right) & mask;
1741 spin_unlock_irqrestore(&chip->reg_lock, flags);
1742 if (invert) {
1743 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1744 ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
1745 }
1746 return 0;
1747}
1748
ba2375a4 1749int snd_cs4231_put_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1750{
ba2375a4 1751 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1752 unsigned long flags;
1753 int left_reg = kcontrol->private_value & 0xff;
1754 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1755 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1756 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1757 int mask = (kcontrol->private_value >> 24) & 0xff;
1758 int invert = (kcontrol->private_value >> 22) & 1;
1759 int change;
1760 unsigned short val1, val2;
1761
1762 val1 = ucontrol->value.integer.value[0] & mask;
1763 val2 = ucontrol->value.integer.value[1] & mask;
1764 if (invert) {
1765 val1 = mask - val1;
1766 val2 = mask - val2;
1767 }
1768 val1 <<= shift_left;
1769 val2 <<= shift_right;
1770 spin_lock_irqsave(&chip->reg_lock, flags);
1771 val1 = (chip->image[left_reg] & ~(mask << shift_left)) | val1;
1772 val2 = (chip->image[right_reg] & ~(mask << shift_right)) | val2;
1773 change = val1 != chip->image[left_reg] || val2 != chip->image[right_reg];
1774 snd_cs4231_out(chip, left_reg, val1);
1775 snd_cs4231_out(chip, right_reg, val2);
1776 spin_unlock_irqrestore(&chip->reg_lock, flags);
1777 return change;
1778}
1779
ba2375a4 1780static struct snd_kcontrol_new snd_cs4231_controls[] = {
1da177e4
LT		 1781CS4231_DOUBLE("PCM Playback Switch", 0, CS4231_LEFT_OUTPUT, CS4231_RIGHT_OUTPUT, 7, 7, 1, 1),
1782CS4231_DOUBLE("PCM Playback Volume", 0, CS4231_LEFT_OUTPUT, CS4231_RIGHT_OUTPUT, 0, 0, 63, 1),
1783CS4231_DOUBLE("Line Playback Switch", 0, CS4231_LEFT_LINE_IN, CS4231_RIGHT_LINE_IN, 7, 7, 1, 1),
1784CS4231_DOUBLE("Line Playback Volume", 0, CS4231_LEFT_LINE_IN, CS4231_RIGHT_LINE_IN, 0, 0, 31, 1),
1785CS4231_DOUBLE("Aux Playback Switch", 0, CS4231_AUX1_LEFT_INPUT, CS4231_AUX1_RIGHT_INPUT, 7, 7, 1, 1),
1786CS4231_DOUBLE("Aux Playback Volume", 0, CS4231_AUX1_LEFT_INPUT, CS4231_AUX1_RIGHT_INPUT, 0, 0, 31, 1),
1787CS4231_DOUBLE("Aux Playback Switch", 1, CS4231_AUX2_LEFT_INPUT, CS4231_AUX2_RIGHT_INPUT, 7, 7, 1, 1),
1788CS4231_DOUBLE("Aux Playback Volume", 1, CS4231_AUX2_LEFT_INPUT, CS4231_AUX2_RIGHT_INPUT, 0, 0, 31, 1),
1789CS4231_SINGLE("Mono Playback Switch", 0, CS4231_MONO_CTRL, 7, 1, 1),
1790CS4231_SINGLE("Mono Playback Volume", 0, CS4231_MONO_CTRL, 0, 15, 1),
1791CS4231_SINGLE("Mono Output Playback Switch", 0, CS4231_MONO_CTRL, 6, 1, 1),
1792CS4231_SINGLE("Mono Output Playback Bypass", 0, CS4231_MONO_CTRL, 5, 1, 0),
1793CS4231_DOUBLE("Capture Volume", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 0, 0, 15, 0),
1794{
1795 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1796 .name = "Capture Source",
1797 .info = snd_cs4231_info_mux,
1798 .get = snd_cs4231_get_mux,
1799 .put = snd_cs4231_put_mux,
1800},
1801CS4231_DOUBLE("Mic Boost", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 5, 5, 1, 0),
1802CS4231_SINGLE("Loopback Capture Switch", 0, CS4231_LOOPBACK, 0, 1, 0),
1803CS4231_SINGLE("Loopback Capture Volume", 0, CS4231_LOOPBACK, 2, 63, 1)
1804};
1805
ba2375a4 1806int snd_cs4231_mixer(struct snd_cs4231 *chip)
1da177e4 1807{
ba2375a4 1808 struct snd_card *card;
1da177e4
LT		 1809 unsigned int idx;
1810 int err;
1811
1812 snd_assert(chip != NULL && chip->pcm != NULL, return -EINVAL);
1813
1814 card = chip->card;
1815
1816 strcpy(card->mixername, chip->pcm->name);
1817
1818 for (idx = 0; idx < ARRAY_SIZE(snd_cs4231_controls); idx++) {
1819 if ((err = snd_ctl_add(card, snd_ctl_new1(&snd_cs4231_controls[idx], chip))) < 0)
1820 return err;
1821 }
1822 return 0;
1823}
1824
1825EXPORT_SYMBOL(snd_cs4231_out);
1826EXPORT_SYMBOL(snd_cs4231_in);
1827EXPORT_SYMBOL(snd_cs4236_ext_out);
1828EXPORT_SYMBOL(snd_cs4236_ext_in);
1829EXPORT_SYMBOL(snd_cs4231_mce_up);
1830EXPORT_SYMBOL(snd_cs4231_mce_down);
1831EXPORT_SYMBOL(snd_cs4231_interrupt);
1832EXPORT_SYMBOL(snd_cs4231_chip_id);
1833EXPORT_SYMBOL(snd_cs4231_create);
1834EXPORT_SYMBOL(snd_cs4231_pcm);
1835EXPORT_SYMBOL(snd_cs4231_mixer);
1836EXPORT_SYMBOL(snd_cs4231_timer);
1837EXPORT_SYMBOL(snd_cs4231_info_single);
1838EXPORT_SYMBOL(snd_cs4231_get_single);
1839EXPORT_SYMBOL(snd_cs4231_put_single);
1840EXPORT_SYMBOL(snd_cs4231_info_double);
1841EXPORT_SYMBOL(snd_cs4231_get_double);
1842EXPORT_SYMBOL(snd_cs4231_put_double);
1843
1844/*
1845 * INIT part
1846 */
1847
1848static int __init alsa_cs4231_init(void)
1849{
1850 return 0;
1851}
1852
1853static void __exit alsa_cs4231_exit(void)
1854{
1855}
1856
1857module_init(alsa_cs4231_init)
1858module_exit(alsa_cs4231_exit)
Empty description
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