]>
Commit | Line | Data |
---|---|---|
c5a3c2e5 AB |
1 | /* |
2 | * arch/ppc64/kernel/rtas_pci.c | |
3 | * | |
4 | * Copyright (C) 2001 Dave Engebretsen, IBM Corporation | |
5 | * Copyright (C) 2003 Anton Blanchard <[email protected]>, IBM | |
6 | * | |
7 | * RTAS specific routines for PCI. | |
8 | * | |
9 | * Based on code from pci.c, chrp_pci.c and pSeries_pci.c | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License as published by | |
13 | * the Free Software Foundation; either version 2 of the License, or | |
14 | * (at your option) any later version. | |
15 | * | |
16 | * This program is distributed in the hope that it will be useful, | |
17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
19 | * GNU General Public License for more details. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License | |
22 | * along with this program; if not, write to the Free Software | |
23 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
24 | */ | |
25 | ||
26 | #include <linux/kernel.h> | |
27 | #include <linux/threads.h> | |
28 | #include <linux/pci.h> | |
29 | #include <linux/string.h> | |
30 | #include <linux/init.h> | |
31 | #include <linux/bootmem.h> | |
32 | ||
33 | #include <asm/io.h> | |
34 | #include <asm/pgtable.h> | |
35 | #include <asm/irq.h> | |
36 | #include <asm/prom.h> | |
37 | #include <asm/machdep.h> | |
38 | #include <asm/pci-bridge.h> | |
39 | #include <asm/iommu.h> | |
40 | #include <asm/rtas.h> | |
41 | ||
42 | #include "mpic.h" | |
43 | #include "pci.h" | |
44 | ||
45 | /* RTAS tokens */ | |
46 | static int read_pci_config; | |
47 | static int write_pci_config; | |
48 | static int ibm_read_pci_config; | |
49 | static int ibm_write_pci_config; | |
50 | ||
51 | static int config_access_valid(struct device_node *dn, int where) | |
52 | { | |
53 | if (where < 256) | |
54 | return 1; | |
55 | if (where < 4096 && dn->pci_ext_config_space) | |
56 | return 1; | |
57 | ||
58 | return 0; | |
59 | } | |
60 | ||
293da76b JM |
61 | static int of_device_available(struct device_node * dn) |
62 | { | |
63 | char * status; | |
64 | ||
65 | status = get_property(dn, "status", NULL); | |
66 | ||
67 | if (!status) | |
68 | return 1; | |
69 | ||
70 | if (!strcmp(status, "okay")) | |
71 | return 1; | |
72 | ||
73 | return 0; | |
74 | } | |
75 | ||
c5a3c2e5 AB |
76 | static int rtas_read_config(struct device_node *dn, int where, int size, u32 *val) |
77 | { | |
78 | int returnval = -1; | |
79 | unsigned long buid, addr; | |
80 | int ret; | |
81 | ||
82 | if (!dn) | |
83 | return PCIBIOS_DEVICE_NOT_FOUND; | |
84 | if (!config_access_valid(dn, where)) | |
85 | return PCIBIOS_BAD_REGISTER_NUMBER; | |
86 | ||
87 | addr = ((where & 0xf00) << 20) | (dn->busno << 16) | | |
88 | (dn->devfn << 8) | (where & 0xff); | |
89 | buid = dn->phb->buid; | |
90 | if (buid) { | |
91 | ret = rtas_call(ibm_read_pci_config, 4, 2, &returnval, | |
92 | addr, buid >> 32, buid & 0xffffffff, size); | |
93 | } else { | |
94 | ret = rtas_call(read_pci_config, 2, 2, &returnval, addr, size); | |
95 | } | |
96 | *val = returnval; | |
97 | ||
98 | if (ret) | |
99 | return PCIBIOS_DEVICE_NOT_FOUND; | |
100 | ||
101 | if (returnval == EEH_IO_ERROR_VALUE(size) | |
102 | && eeh_dn_check_failure (dn, NULL)) | |
103 | return PCIBIOS_DEVICE_NOT_FOUND; | |
104 | ||
105 | return PCIBIOS_SUCCESSFUL; | |
106 | } | |
107 | ||
108 | static int rtas_pci_read_config(struct pci_bus *bus, | |
109 | unsigned int devfn, | |
110 | int where, int size, u32 *val) | |
111 | { | |
112 | struct device_node *busdn, *dn; | |
113 | ||
114 | if (bus->self) | |
115 | busdn = pci_device_to_OF_node(bus->self); | |
116 | else | |
117 | busdn = bus->sysdata; /* must be a phb */ | |
118 | ||
119 | /* Search only direct children of the bus */ | |
120 | for (dn = busdn->child; dn; dn = dn->sibling) | |
293da76b | 121 | if (dn->devfn == devfn && of_device_available(dn)) |
c5a3c2e5 AB |
122 | return rtas_read_config(dn, where, size, val); |
123 | return PCIBIOS_DEVICE_NOT_FOUND; | |
124 | } | |
125 | ||
126 | static int rtas_write_config(struct device_node *dn, int where, int size, u32 val) | |
127 | { | |
128 | unsigned long buid, addr; | |
129 | int ret; | |
130 | ||
131 | if (!dn) | |
132 | return PCIBIOS_DEVICE_NOT_FOUND; | |
133 | if (!config_access_valid(dn, where)) | |
134 | return PCIBIOS_BAD_REGISTER_NUMBER; | |
135 | ||
136 | addr = ((where & 0xf00) << 20) | (dn->busno << 16) | | |
137 | (dn->devfn << 8) | (where & 0xff); | |
138 | buid = dn->phb->buid; | |
139 | if (buid) { | |
140 | ret = rtas_call(ibm_write_pci_config, 5, 1, NULL, addr, buid >> 32, buid & 0xffffffff, size, (ulong) val); | |
141 | } else { | |
142 | ret = rtas_call(write_pci_config, 3, 1, NULL, addr, size, (ulong)val); | |
143 | } | |
144 | ||
145 | if (ret) | |
146 | return PCIBIOS_DEVICE_NOT_FOUND; | |
147 | ||
148 | return PCIBIOS_SUCCESSFUL; | |
149 | } | |
150 | ||
151 | static int rtas_pci_write_config(struct pci_bus *bus, | |
152 | unsigned int devfn, | |
153 | int where, int size, u32 val) | |
154 | { | |
155 | struct device_node *busdn, *dn; | |
156 | ||
157 | if (bus->self) | |
158 | busdn = pci_device_to_OF_node(bus->self); | |
159 | else | |
160 | busdn = bus->sysdata; /* must be a phb */ | |
161 | ||
162 | /* Search only direct children of the bus */ | |
163 | for (dn = busdn->child; dn; dn = dn->sibling) | |
293da76b | 164 | if (dn->devfn == devfn && of_device_available(dn)) |
c5a3c2e5 AB |
165 | return rtas_write_config(dn, where, size, val); |
166 | return PCIBIOS_DEVICE_NOT_FOUND; | |
167 | } | |
168 | ||
169 | struct pci_ops rtas_pci_ops = { | |
170 | rtas_pci_read_config, | |
171 | rtas_pci_write_config | |
172 | }; | |
173 | ||
174 | int is_python(struct device_node *dev) | |
175 | { | |
176 | char *model = (char *)get_property(dev, "model", NULL); | |
177 | ||
178 | if (model && strstr(model, "Python")) | |
179 | return 1; | |
180 | ||
181 | return 0; | |
182 | } | |
183 | ||
184 | static int get_phb_reg_prop(struct device_node *dev, | |
185 | unsigned int addr_size_words, | |
186 | struct reg_property64 *reg) | |
187 | { | |
188 | unsigned int *ui_ptr = NULL, len; | |
189 | ||
190 | /* Found a PHB, now figure out where his registers are mapped. */ | |
191 | ui_ptr = (unsigned int *)get_property(dev, "reg", &len); | |
192 | if (ui_ptr == NULL) | |
193 | return 1; | |
194 | ||
195 | if (addr_size_words == 1) { | |
196 | reg->address = ((struct reg_property32 *)ui_ptr)->address; | |
197 | reg->size = ((struct reg_property32 *)ui_ptr)->size; | |
198 | } else { | |
199 | *reg = *((struct reg_property64 *)ui_ptr); | |
200 | } | |
201 | ||
202 | return 0; | |
203 | } | |
204 | ||
205 | static void python_countermeasures(struct device_node *dev, | |
206 | unsigned int addr_size_words) | |
207 | { | |
208 | struct reg_property64 reg_struct; | |
209 | void __iomem *chip_regs; | |
210 | volatile u32 val; | |
211 | ||
212 | if (get_phb_reg_prop(dev, addr_size_words, ®_struct)) | |
213 | return; | |
214 | ||
215 | /* Python's register file is 1 MB in size. */ | |
216 | chip_regs = ioremap(reg_struct.address & ~(0xfffffUL), 0x100000); | |
217 | ||
218 | /* | |
219 | * Firmware doesn't always clear this bit which is critical | |
220 | * for good performance - Anton | |
221 | */ | |
222 | ||
223 | #define PRG_CL_RESET_VALID 0x00010000 | |
224 | ||
225 | val = in_be32(chip_regs + 0xf6030); | |
226 | if (val & PRG_CL_RESET_VALID) { | |
227 | printk(KERN_INFO "Python workaround: "); | |
228 | val &= ~PRG_CL_RESET_VALID; | |
229 | out_be32(chip_regs + 0xf6030, val); | |
230 | /* | |
231 | * We must read it back for changes to | |
232 | * take effect | |
233 | */ | |
234 | val = in_be32(chip_regs + 0xf6030); | |
235 | printk("reg0: %x\n", val); | |
236 | } | |
237 | ||
238 | iounmap(chip_regs); | |
239 | } | |
240 | ||
241 | void __init init_pci_config_tokens (void) | |
242 | { | |
243 | read_pci_config = rtas_token("read-pci-config"); | |
244 | write_pci_config = rtas_token("write-pci-config"); | |
245 | ibm_read_pci_config = rtas_token("ibm,read-pci-config"); | |
246 | ibm_write_pci_config = rtas_token("ibm,write-pci-config"); | |
247 | } | |
248 | ||
249 | unsigned long __devinit get_phb_buid (struct device_node *phb) | |
250 | { | |
251 | int addr_cells; | |
252 | unsigned int *buid_vals; | |
253 | unsigned int len; | |
254 | unsigned long buid; | |
255 | ||
256 | if (ibm_read_pci_config == -1) return 0; | |
257 | ||
258 | /* PHB's will always be children of the root node, | |
259 | * or so it is promised by the current firmware. */ | |
260 | if (phb->parent == NULL) | |
261 | return 0; | |
262 | if (phb->parent->parent) | |
263 | return 0; | |
264 | ||
265 | buid_vals = (unsigned int *) get_property(phb, "reg", &len); | |
266 | if (buid_vals == NULL) | |
267 | return 0; | |
268 | ||
269 | addr_cells = prom_n_addr_cells(phb); | |
270 | if (addr_cells == 1) { | |
271 | buid = (unsigned long) buid_vals[0]; | |
272 | } else { | |
273 | buid = (((unsigned long)buid_vals[0]) << 32UL) | | |
274 | (((unsigned long)buid_vals[1]) & 0xffffffff); | |
275 | } | |
276 | return buid; | |
277 | } | |
278 | ||
279 | static int phb_set_bus_ranges(struct device_node *dev, | |
280 | struct pci_controller *phb) | |
281 | { | |
282 | int *bus_range; | |
283 | unsigned int len; | |
284 | ||
285 | bus_range = (int *) get_property(dev, "bus-range", &len); | |
286 | if (bus_range == NULL || len < 2 * sizeof(int)) { | |
287 | return 1; | |
288 | } | |
289 | ||
290 | phb->first_busno = bus_range[0]; | |
291 | phb->last_busno = bus_range[1]; | |
292 | ||
293 | return 0; | |
294 | } | |
295 | ||
296 | static int __devinit setup_phb(struct device_node *dev, | |
297 | struct pci_controller *phb, | |
298 | unsigned int addr_size_words) | |
299 | { | |
300 | pci_setup_pci_controller(phb); | |
301 | ||
302 | if (is_python(dev)) | |
303 | python_countermeasures(dev, addr_size_words); | |
304 | ||
305 | if (phb_set_bus_ranges(dev, phb)) | |
306 | return 1; | |
307 | ||
308 | phb->arch_data = dev; | |
309 | phb->ops = &rtas_pci_ops; | |
310 | phb->buid = get_phb_buid(dev); | |
311 | ||
312 | return 0; | |
313 | } | |
314 | ||
315 | static void __devinit add_linux_pci_domain(struct device_node *dev, | |
316 | struct pci_controller *phb, | |
317 | struct property *of_prop) | |
318 | { | |
319 | memset(of_prop, 0, sizeof(struct property)); | |
320 | of_prop->name = "linux,pci-domain"; | |
321 | of_prop->length = sizeof(phb->global_number); | |
322 | of_prop->value = (unsigned char *)&of_prop[1]; | |
323 | memcpy(of_prop->value, &phb->global_number, sizeof(phb->global_number)); | |
324 | prom_add_property(dev, of_prop); | |
325 | } | |
326 | ||
327 | static struct pci_controller * __init alloc_phb(struct device_node *dev, | |
328 | unsigned int addr_size_words) | |
329 | { | |
330 | struct pci_controller *phb; | |
331 | struct property *of_prop; | |
332 | ||
333 | phb = alloc_bootmem(sizeof(struct pci_controller)); | |
334 | if (phb == NULL) | |
335 | return NULL; | |
336 | ||
337 | of_prop = alloc_bootmem(sizeof(struct property) + | |
338 | sizeof(phb->global_number)); | |
339 | if (!of_prop) | |
340 | return NULL; | |
341 | ||
342 | if (setup_phb(dev, phb, addr_size_words)) | |
343 | return NULL; | |
344 | ||
345 | add_linux_pci_domain(dev, phb, of_prop); | |
346 | ||
347 | return phb; | |
348 | } | |
349 | ||
350 | static struct pci_controller * __devinit alloc_phb_dynamic(struct device_node *dev, unsigned int addr_size_words) | |
351 | { | |
352 | struct pci_controller *phb; | |
353 | ||
354 | phb = (struct pci_controller *)kmalloc(sizeof(struct pci_controller), | |
355 | GFP_KERNEL); | |
356 | if (phb == NULL) | |
357 | return NULL; | |
358 | ||
359 | if (setup_phb(dev, phb, addr_size_words)) | |
360 | return NULL; | |
361 | ||
362 | phb->is_dynamic = 1; | |
363 | ||
364 | /* TODO: linux,pci-domain? */ | |
365 | ||
366 | return phb; | |
367 | } | |
368 | ||
369 | unsigned long __init find_and_init_phbs(void) | |
370 | { | |
371 | struct device_node *node; | |
372 | struct pci_controller *phb; | |
373 | unsigned int root_size_cells = 0; | |
374 | unsigned int index; | |
375 | unsigned int *opprop = NULL; | |
376 | struct device_node *root = of_find_node_by_path("/"); | |
377 | ||
378 | if (ppc64_interrupt_controller == IC_OPEN_PIC) { | |
379 | opprop = (unsigned int *)get_property(root, | |
380 | "platform-open-pic", NULL); | |
381 | } | |
382 | ||
383 | root_size_cells = prom_n_size_cells(root); | |
384 | ||
385 | index = 0; | |
386 | ||
387 | for (node = of_get_next_child(root, NULL); | |
388 | node != NULL; | |
389 | node = of_get_next_child(root, node)) { | |
390 | if (node->type == NULL || strcmp(node->type, "pci") != 0) | |
391 | continue; | |
392 | ||
393 | phb = alloc_phb(node, root_size_cells); | |
394 | if (!phb) | |
395 | continue; | |
396 | ||
397 | pci_process_bridge_OF_ranges(phb, node); | |
398 | pci_setup_phb_io(phb, index == 0); | |
399 | #ifdef CONFIG_PPC_PSERIES | |
400 | if (ppc64_interrupt_controller == IC_OPEN_PIC && pSeries_mpic) { | |
401 | int addr = root_size_cells * (index + 2) - 1; | |
402 | mpic_assign_isu(pSeries_mpic, index, opprop[addr]); | |
403 | } | |
404 | #endif | |
405 | index++; | |
406 | } | |
407 | ||
408 | of_node_put(root); | |
409 | pci_devs_phb_init(); | |
410 | ||
411 | /* | |
412 | * pci_probe_only and pci_assign_all_buses can be set via properties | |
413 | * in chosen. | |
414 | */ | |
415 | if (of_chosen) { | |
416 | int *prop; | |
417 | ||
418 | prop = (int *)get_property(of_chosen, "linux,pci-probe-only", | |
419 | NULL); | |
420 | if (prop) | |
421 | pci_probe_only = *prop; | |
422 | ||
423 | prop = (int *)get_property(of_chosen, | |
424 | "linux,pci-assign-all-buses", NULL); | |
425 | if (prop) | |
426 | pci_assign_all_buses = *prop; | |
427 | } | |
428 | ||
429 | return 0; | |
430 | } | |
431 | ||
432 | struct pci_controller * __devinit init_phb_dynamic(struct device_node *dn) | |
433 | { | |
434 | struct device_node *root = of_find_node_by_path("/"); | |
435 | unsigned int root_size_cells = 0; | |
436 | struct pci_controller *phb; | |
437 | struct pci_bus *bus; | |
438 | int primary; | |
439 | ||
440 | root_size_cells = prom_n_size_cells(root); | |
441 | ||
442 | primary = list_empty(&hose_list); | |
443 | phb = alloc_phb_dynamic(dn, root_size_cells); | |
444 | if (!phb) | |
445 | return NULL; | |
446 | ||
447 | pci_process_bridge_OF_ranges(phb, dn); | |
448 | ||
449 | pci_setup_phb_io_dynamic(phb, primary); | |
450 | of_node_put(root); | |
451 | ||
452 | pci_devs_phb_init_dynamic(phb); | |
453 | phb->last_busno = 0xff; | |
454 | bus = pci_scan_bus(phb->first_busno, phb->ops, phb->arch_data); | |
455 | phb->bus = bus; | |
456 | phb->last_busno = bus->subordinate; | |
457 | ||
458 | return phb; | |
459 | } | |
460 | EXPORT_SYMBOL(init_phb_dynamic); | |
461 | ||
462 | /* RPA-specific bits for removing PHBs */ | |
463 | int pcibios_remove_root_bus(struct pci_controller *phb) | |
464 | { | |
465 | struct pci_bus *b = phb->bus; | |
466 | struct resource *res; | |
467 | int rc, i; | |
468 | ||
469 | res = b->resource[0]; | |
470 | if (!res->flags) { | |
471 | printk(KERN_ERR "%s: no IO resource for PHB %s\n", __FUNCTION__, | |
472 | b->name); | |
473 | return 1; | |
474 | } | |
475 | ||
476 | rc = unmap_bus_range(b); | |
477 | if (rc) { | |
478 | printk(KERN_ERR "%s: failed to unmap IO on bus %s\n", | |
479 | __FUNCTION__, b->name); | |
480 | return 1; | |
481 | } | |
482 | ||
483 | if (release_resource(res)) { | |
484 | printk(KERN_ERR "%s: failed to release IO on bus %s\n", | |
485 | __FUNCTION__, b->name); | |
486 | return 1; | |
487 | } | |
488 | ||
489 | for (i = 1; i < 3; ++i) { | |
490 | res = b->resource[i]; | |
491 | if (!res->flags && i == 0) { | |
492 | printk(KERN_ERR "%s: no MEM resource for PHB %s\n", | |
493 | __FUNCTION__, b->name); | |
494 | return 1; | |
495 | } | |
496 | if (res->flags && release_resource(res)) { | |
497 | printk(KERN_ERR | |
498 | "%s: failed to release IO %d on bus %s\n", | |
499 | __FUNCTION__, i, b->name); | |
500 | return 1; | |
501 | } | |
502 | } | |
503 | ||
504 | list_del(&phb->list_node); | |
505 | if (phb->is_dynamic) | |
506 | kfree(phb); | |
507 | ||
508 | return 0; | |
509 | } | |
510 | EXPORT_SYMBOL(pcibios_remove_root_bus); |