]>
Commit | Line | Data |
---|---|---|
d7d8d7a2 KK |
1 | // SPDX-License-Identifier: GPL-2.0+ |
2 | // | |
3 | // max77686.c - mfd core driver for the Maxim 77686/802 | |
4 | // | |
5 | // Copyright (C) 2012 Samsung Electronics | |
6 | // Chiwoong Byun <[email protected]> | |
7 | // Jonghwa Lee <[email protected]> | |
8 | // | |
9 | //This driver is based on max8997.c | |
dae8a969 JL |
10 | |
11 | #include <linux/export.h> | |
12 | #include <linux/slab.h> | |
13 | #include <linux/i2c.h> | |
6f1c1e71 JMC |
14 | #include <linux/irq.h> |
15 | #include <linux/interrupt.h> | |
dae8a969 JL |
16 | #include <linux/pm_runtime.h> |
17 | #include <linux/module.h> | |
dae8a969 JL |
18 | #include <linux/mfd/core.h> |
19 | #include <linux/mfd/max77686.h> | |
20 | #include <linux/mfd/max77686-private.h> | |
21 | #include <linux/err.h> | |
2a048d3b | 22 | #include <linux/of.h> |
dae8a969 | 23 | |
7c0517b1 | 24 | static const struct mfd_cell max77686_devs[] = { |
dae8a969 JL |
25 | { .name = "max77686-pmic", }, |
26 | { .name = "max77686-rtc", }, | |
c0fa7e10 | 27 | { .name = "max77686-clk", }, |
dae8a969 JL |
28 | }; |
29 | ||
a259f389 JMC |
30 | static const struct mfd_cell max77802_devs[] = { |
31 | { .name = "max77802-pmic", }, | |
32 | { .name = "max77802-clk", }, | |
33 | { .name = "max77802-rtc", }, | |
34 | }; | |
35 | ||
36 | static bool max77802_pmic_is_accessible_reg(struct device *dev, | |
37 | unsigned int reg) | |
38 | { | |
b87d9a0f | 39 | return reg < MAX77802_REG_PMIC_END; |
a259f389 JMC |
40 | } |
41 | ||
42 | static bool max77802_rtc_is_accessible_reg(struct device *dev, | |
43 | unsigned int reg) | |
44 | { | |
45 | return (reg >= MAX77802_RTC_INT && reg < MAX77802_RTC_END); | |
46 | } | |
47 | ||
48 | static bool max77802_is_accessible_reg(struct device *dev, unsigned int reg) | |
49 | { | |
50 | return (max77802_pmic_is_accessible_reg(dev, reg) || | |
51 | max77802_rtc_is_accessible_reg(dev, reg)); | |
52 | } | |
53 | ||
54 | static bool max77802_pmic_is_precious_reg(struct device *dev, unsigned int reg) | |
55 | { | |
56 | return (reg == MAX77802_REG_INTSRC || reg == MAX77802_REG_INT1 || | |
57 | reg == MAX77802_REG_INT2); | |
58 | } | |
59 | ||
60 | static bool max77802_rtc_is_precious_reg(struct device *dev, unsigned int reg) | |
61 | { | |
62 | return (reg == MAX77802_RTC_INT || | |
63 | reg == MAX77802_RTC_UPDATE0 || | |
64 | reg == MAX77802_RTC_UPDATE1); | |
65 | } | |
66 | ||
67 | static bool max77802_is_precious_reg(struct device *dev, unsigned int reg) | |
68 | { | |
69 | return (max77802_pmic_is_precious_reg(dev, reg) || | |
70 | max77802_rtc_is_precious_reg(dev, reg)); | |
71 | } | |
72 | ||
73 | static bool max77802_pmic_is_volatile_reg(struct device *dev, unsigned int reg) | |
74 | { | |
75 | return (max77802_is_precious_reg(dev, reg) || | |
76 | reg == MAX77802_REG_STATUS1 || reg == MAX77802_REG_STATUS2 || | |
77 | reg == MAX77802_REG_PWRON); | |
78 | } | |
79 | ||
80 | static bool max77802_rtc_is_volatile_reg(struct device *dev, unsigned int reg) | |
81 | { | |
82 | return (max77802_rtc_is_precious_reg(dev, reg) || | |
83 | reg == MAX77802_RTC_SEC || | |
84 | reg == MAX77802_RTC_MIN || | |
85 | reg == MAX77802_RTC_HOUR || | |
86 | reg == MAX77802_RTC_WEEKDAY || | |
87 | reg == MAX77802_RTC_MONTH || | |
88 | reg == MAX77802_RTC_YEAR || | |
a26d8463 | 89 | reg == MAX77802_RTC_MONTHDAY); |
a259f389 JMC |
90 | } |
91 | ||
92 | static bool max77802_is_volatile_reg(struct device *dev, unsigned int reg) | |
93 | { | |
94 | return (max77802_pmic_is_volatile_reg(dev, reg) || | |
95 | max77802_rtc_is_volatile_reg(dev, reg)); | |
96 | } | |
97 | ||
68be231c | 98 | static const struct regmap_config max77686_regmap_config = { |
dae8a969 JL |
99 | .reg_bits = 8, |
100 | .val_bits = 8, | |
101 | }; | |
102 | ||
68be231c | 103 | static const struct regmap_config max77802_regmap_config = { |
a259f389 JMC |
104 | .reg_bits = 8, |
105 | .val_bits = 8, | |
106 | .writeable_reg = max77802_is_accessible_reg, | |
107 | .readable_reg = max77802_is_accessible_reg, | |
108 | .precious_reg = max77802_is_precious_reg, | |
109 | .volatile_reg = max77802_is_volatile_reg, | |
110 | .name = "max77802-pmic", | |
728f3374 | 111 | .cache_type = REGCACHE_MAPLE, |
a259f389 JMC |
112 | }; |
113 | ||
6f1c1e71 JMC |
114 | static const struct regmap_irq max77686_irqs[] = { |
115 | /* INT1 interrupts */ | |
116 | { .reg_offset = 0, .mask = MAX77686_INT1_PWRONF_MSK, }, | |
117 | { .reg_offset = 0, .mask = MAX77686_INT1_PWRONR_MSK, }, | |
118 | { .reg_offset = 0, .mask = MAX77686_INT1_JIGONBF_MSK, }, | |
119 | { .reg_offset = 0, .mask = MAX77686_INT1_JIGONBR_MSK, }, | |
120 | { .reg_offset = 0, .mask = MAX77686_INT1_ACOKBF_MSK, }, | |
121 | { .reg_offset = 0, .mask = MAX77686_INT1_ACOKBR_MSK, }, | |
122 | { .reg_offset = 0, .mask = MAX77686_INT1_ONKEY1S_MSK, }, | |
123 | { .reg_offset = 0, .mask = MAX77686_INT1_MRSTB_MSK, }, | |
124 | /* INT2 interrupts */ | |
125 | { .reg_offset = 1, .mask = MAX77686_INT2_140C_MSK, }, | |
126 | { .reg_offset = 1, .mask = MAX77686_INT2_120C_MSK, }, | |
127 | }; | |
128 | ||
129 | static const struct regmap_irq_chip max77686_irq_chip = { | |
130 | .name = "max77686-pmic", | |
131 | .status_base = MAX77686_REG_INT1, | |
132 | .mask_base = MAX77686_REG_INT1MSK, | |
133 | .num_regs = 2, | |
134 | .irqs = max77686_irqs, | |
135 | .num_irqs = ARRAY_SIZE(max77686_irqs), | |
136 | }; | |
137 | ||
a259f389 JMC |
138 | static const struct regmap_irq_chip max77802_irq_chip = { |
139 | .name = "max77802-pmic", | |
140 | .status_base = MAX77802_REG_INT1, | |
141 | .mask_base = MAX77802_REG_INT1MSK, | |
142 | .num_regs = 2, | |
143 | .irqs = max77686_irqs, /* same masks as 77686 */ | |
144 | .num_irqs = ARRAY_SIZE(max77686_irqs), | |
145 | }; | |
146 | ||
b68ece3d | 147 | static const struct of_device_id max77686_pmic_dt_match[] = { |
a259f389 JMC |
148 | { |
149 | .compatible = "maxim,max77686", | |
150 | .data = (void *)TYPE_MAX77686, | |
151 | }, | |
152 | { | |
153 | .compatible = "maxim,max77802", | |
154 | .data = (void *)TYPE_MAX77802, | |
155 | }, | |
156 | { }, | |
2984fc00 | 157 | }; |
7f8ada1a | 158 | MODULE_DEVICE_TABLE(of, max77686_pmic_dt_match); |
2984fc00 | 159 | |
be1bb235 | 160 | static int max77686_i2c_probe(struct i2c_client *i2c) |
dae8a969 | 161 | { |
c1516f84 | 162 | struct max77686_dev *max77686 = NULL; |
dae8a969 JL |
163 | unsigned int data; |
164 | int ret = 0; | |
a259f389 JMC |
165 | const struct regmap_config *config; |
166 | const struct regmap_irq_chip *irq_chip; | |
a259f389 JMC |
167 | const struct mfd_cell *cells; |
168 | int n_devs; | |
dae8a969 | 169 | |
742413a4 LJ |
170 | max77686 = devm_kzalloc(&i2c->dev, |
171 | sizeof(struct max77686_dev), GFP_KERNEL); | |
c0e0fcda | 172 | if (!max77686) |
dae8a969 JL |
173 | return -ENOMEM; |
174 | ||
dae8a969 | 175 | i2c_set_clientdata(i2c, max77686); |
68e61f75 | 176 | max77686->type = (unsigned long)of_device_get_match_data(&i2c->dev); |
dae8a969 JL |
177 | max77686->dev = &i2c->dev; |
178 | max77686->i2c = i2c; | |
dae8a969 | 179 | |
2b40459b | 180 | max77686->irq = i2c->irq; |
dae8a969 | 181 | |
a259f389 JMC |
182 | if (max77686->type == TYPE_MAX77686) { |
183 | config = &max77686_regmap_config; | |
184 | irq_chip = &max77686_irq_chip; | |
a259f389 JMC |
185 | cells = max77686_devs; |
186 | n_devs = ARRAY_SIZE(max77686_devs); | |
187 | } else { | |
188 | config = &max77802_regmap_config; | |
189 | irq_chip = &max77802_irq_chip; | |
a259f389 JMC |
190 | cells = max77802_devs; |
191 | n_devs = ARRAY_SIZE(max77802_devs); | |
192 | } | |
193 | ||
194 | max77686->regmap = devm_regmap_init_i2c(i2c, config); | |
136d982e AL |
195 | if (IS_ERR(max77686->regmap)) { |
196 | ret = PTR_ERR(max77686->regmap); | |
197 | dev_err(max77686->dev, "Failed to allocate register map: %d\n", | |
198 | ret); | |
136d982e AL |
199 | return ret; |
200 | } | |
201 | ||
c0e0fcda JMC |
202 | ret = regmap_read(max77686->regmap, MAX77686_REG_DEVICE_ID, &data); |
203 | if (ret < 0) { | |
dae8a969 JL |
204 | dev_err(max77686->dev, |
205 | "device not found on this channel (this is not an error)\n"); | |
742413a4 | 206 | return -ENODEV; |
6f1c1e71 | 207 | } |
dae8a969 | 208 | |
1a5422c9 LD |
209 | ret = devm_regmap_add_irq_chip(&i2c->dev, max77686->regmap, |
210 | max77686->irq, | |
215e50b0 | 211 | IRQF_ONESHOT | IRQF_SHARED, 0, irq_chip, |
1a5422c9 | 212 | &max77686->irq_data); |
f3937549 | 213 | if (ret < 0) { |
6f1c1e71 | 214 | dev_err(&i2c->dev, "failed to add PMIC irq chip: %d\n", ret); |
f3937549 | 215 | return ret; |
6f1c1e71 | 216 | } |
dae8a969 | 217 | |
1a5422c9 LD |
218 | ret = devm_mfd_add_devices(max77686->dev, -1, cells, n_devs, NULL, |
219 | 0, NULL); | |
742413a4 | 220 | if (ret < 0) { |
6f1c1e71 | 221 | dev_err(&i2c->dev, "failed to add MFD devices: %d\n", ret); |
1a5422c9 | 222 | return ret; |
742413a4 | 223 | } |
dae8a969 | 224 | |
dae8a969 JL |
225 | return 0; |
226 | } | |
227 | ||
2b52b5d5 JMC |
228 | static int max77686_suspend(struct device *dev) |
229 | { | |
1b5420e1 | 230 | struct i2c_client *i2c = to_i2c_client(dev); |
2b52b5d5 JMC |
231 | struct max77686_dev *max77686 = i2c_get_clientdata(i2c); |
232 | ||
233 | if (device_may_wakeup(dev)) | |
234 | enable_irq_wake(max77686->irq); | |
235 | ||
236 | /* | |
237 | * IRQ must be disabled during suspend because if it happens | |
238 | * while suspended it will be handled before resuming I2C. | |
239 | * | |
240 | * When device is woken up from suspend (e.g. by RTC wake alarm), | |
241 | * an interrupt occurs before resuming I2C bus controller. | |
242 | * Interrupt handler tries to read registers but this read | |
243 | * will fail because I2C is still suspended. | |
244 | */ | |
245 | disable_irq(max77686->irq); | |
246 | ||
247 | return 0; | |
248 | } | |
249 | ||
250 | static int max77686_resume(struct device *dev) | |
251 | { | |
1b5420e1 | 252 | struct i2c_client *i2c = to_i2c_client(dev); |
2b52b5d5 JMC |
253 | struct max77686_dev *max77686 = i2c_get_clientdata(i2c); |
254 | ||
255 | if (device_may_wakeup(dev)) | |
256 | disable_irq_wake(max77686->irq); | |
257 | ||
258 | enable_irq(max77686->irq); | |
259 | ||
260 | return 0; | |
261 | } | |
2b52b5d5 | 262 | |
ef72ed42 | 263 | static DEFINE_SIMPLE_DEV_PM_OPS(max77686_pm, max77686_suspend, max77686_resume); |
2b52b5d5 | 264 | |
dae8a969 JL |
265 | static struct i2c_driver max77686_i2c_driver = { |
266 | .driver = { | |
267 | .name = "max77686", | |
ef72ed42 | 268 | .pm = pm_sleep_ptr(&max77686_pm), |
608a4758 | 269 | .of_match_table = max77686_pmic_dt_match, |
dae8a969 | 270 | }, |
9816d859 | 271 | .probe = max77686_i2c_probe, |
dae8a969 JL |
272 | }; |
273 | ||
8a0aee4a | 274 | module_i2c_driver(max77686_i2c_driver); |
dae8a969 | 275 | |
a259f389 | 276 | MODULE_DESCRIPTION("MAXIM 77686/802 multi-function core driver"); |
dae8a969 JL |
277 | MODULE_AUTHOR("Chiwoong Byun <[email protected]>"); |
278 | MODULE_LICENSE("GPL"); |