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2f01a1f5 | 1 | /* |
80301cdc | 2 | * This file is part of wl1251 |
2f01a1f5 KV |
3 | * |
4 | * Copyright (c) 1998-2007 Texas Instruments Incorporated | |
5 | * Copyright (C) 2008 Nokia Corporation | |
6 | * | |
2f01a1f5 KV |
7 | * This program is free software; you can redistribute it and/or |
8 | * modify it under the terms of the GNU General Public License | |
9 | * version 2 as published by the Free Software Foundation. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, but | |
12 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
14 | * General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, write to the Free Software | |
18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA | |
19 | * 02110-1301 USA | |
20 | * | |
21 | */ | |
22 | ||
80301cdc KV |
23 | #ifndef __WL1251_SPI_H__ |
24 | #define __WL1251_SPI_H__ | |
2f01a1f5 | 25 | |
9bc6772e KV |
26 | #include "cmd.h" |
27 | #include "acx.h" | |
28 | #include "reg.h" | |
2f01a1f5 | 29 | |
2f01a1f5 KV |
30 | #define WSPI_CMD_READ 0x40000000 |
31 | #define WSPI_CMD_WRITE 0x00000000 | |
32 | #define WSPI_CMD_FIXED 0x20000000 | |
33 | #define WSPI_CMD_BYTE_LENGTH 0x1FFE0000 | |
34 | #define WSPI_CMD_BYTE_LENGTH_OFFSET 17 | |
35 | #define WSPI_CMD_BYTE_ADDR 0x0001FFFF | |
36 | ||
37 | #define WSPI_INIT_CMD_CRC_LEN 5 | |
38 | ||
39 | #define WSPI_INIT_CMD_START 0x00 | |
40 | #define WSPI_INIT_CMD_TX 0x40 | |
41 | /* the extra bypass bit is sampled by the TNET as '1' */ | |
42 | #define WSPI_INIT_CMD_BYPASS_BIT 0x80 | |
43 | #define WSPI_INIT_CMD_FIXEDBUSY_LEN 0x07 | |
44 | #define WSPI_INIT_CMD_EN_FIXEDBUSY 0x80 | |
45 | #define WSPI_INIT_CMD_DIS_FIXEDBUSY 0x00 | |
46 | #define WSPI_INIT_CMD_IOD 0x40 | |
47 | #define WSPI_INIT_CMD_IP 0x20 | |
48 | #define WSPI_INIT_CMD_CS 0x10 | |
49 | #define WSPI_INIT_CMD_WS 0x08 | |
50 | #define WSPI_INIT_CMD_WSPI 0x01 | |
51 | #define WSPI_INIT_CMD_END 0x01 | |
52 | ||
53 | #define WSPI_INIT_CMD_LEN 8 | |
54 | ||
2f01a1f5 | 55 | #define HW_ACCESS_WSPI_FIXED_BUSY_LEN \ |
80301cdc | 56 | ((WL1251_BUSY_WORD_LEN - 4) / sizeof(u32)) |
2f01a1f5 KV |
57 | #define HW_ACCESS_WSPI_INIT_CMD_MASK 0 |
58 | ||
80301cdc | 59 | #endif /* __WL1251_SPI_H__ */ |