projects / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 7328c8f4 | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 66eab4df MT |
2 | /* |
| 3 | * Implement the default iomap interfaces | |
| 4 | * | |
| 5 | * (C) Copyright 2004 Linus Torvalds | |
| 6 | */ | |
| 7 | #include <linux/pci.h> | |
| 8 | #include <linux/io.h> | |
| 9 | ||
| 10 | #include <linux/export.h> | |
| 11 | ||
| 12 | #ifdef CONFIG_PCI | |
| 13 | /** | |
| eb29d8d2 | 14 | * pci_iomap_range - create a virtual mapping cookie for a PCI BAR |
| 66eab4df MT |
15 | * @dev: PCI device that owns the BAR |
| 16 | * @bar: BAR number | |
| eb29d8d2 MT |
17 | * @offset: map memory at the given offset in BAR |
| 18 | * @maxlen: max length of the memory to map | |
| 66eab4df MT |
19 | * |
| 20 | * Using this function you will get a __iomem address to your device BAR. | |
| 21 | * You can access it using ioread*() and iowrite*(). These functions hide | |
| 22 | * the details if this is a MMIO or PIO address space and will just do what | |
| 23 | * you expect from them in the correct way. | |
| 24 | * | |
| 25 | * @maxlen specifies the maximum length to map. If you want to get access to | |
| eb29d8d2 | 26 | * the complete BAR from offset to the end, pass %0 here. |
| 66eab4df | 27 | * */ |
| eb29d8d2 MT |
28 | void __iomem *pci_iomap_range(struct pci_dev *dev, |
| 29 | int bar, | |
| 30 | unsigned long offset, | |
| 31 | unsigned long maxlen) | |
| 66eab4df MT |
32 | { |
| 33 | resource_size_t start = pci_resource_start(dev, bar); | |
| 34 | resource_size_t len = pci_resource_len(dev, bar); | |
| 35 | unsigned long flags = pci_resource_flags(dev, bar); | |
| 36 | ||
| eb29d8d2 | 37 | if (len <= offset || !start) |
| 66eab4df | 38 | return NULL; |
| eb29d8d2 MT |
39 | len -= offset; |
| 40 | start += offset; | |
| 66eab4df MT |
41 | if (maxlen && len > maxlen) |
| 42 | len = maxlen; | |
| 43 | if (flags & IORESOURCE_IO) | |
| b923650b | 44 | return __pci_ioport_map(dev, start, len); |
| 92b19ff5 DW |
45 | if (flags & IORESOURCE_MEM) |
| 46 | return ioremap(start, len); | |
| 66eab4df MT |
47 | /* What? */ |
| 48 | return NULL; | |
| 49 | } | |
| eb29d8d2 | 50 | EXPORT_SYMBOL(pci_iomap_range); |
| 66eab4df | 51 | |
| 1b3d4200 LR |
52 | /** |
| 53 | * pci_iomap_wc_range - create a virtual WC mapping cookie for a PCI BAR | |
| 54 | * @dev: PCI device that owns the BAR | |
| 55 | * @bar: BAR number | |
| 56 | * @offset: map memory at the given offset in BAR | |
| 57 | * @maxlen: max length of the memory to map | |
| 58 | * | |
| 59 | * Using this function you will get a __iomem address to your device BAR. | |
| 60 | * You can access it using ioread*() and iowrite*(). These functions hide | |
| 61 | * the details if this is a MMIO or PIO address space and will just do what | |
| 62 | * you expect from them in the correct way. When possible write combining | |
| 63 | * is used. | |
| 64 | * | |
| 65 | * @maxlen specifies the maximum length to map. If you want to get access to | |
| 66 | * the complete BAR from offset to the end, pass %0 here. | |
| 67 | * */ | |
| 68 | void __iomem *pci_iomap_wc_range(struct pci_dev *dev, | |
| 69 | int bar, | |
| 70 | unsigned long offset, | |
| 71 | unsigned long maxlen) | |
| 72 | { | |
| 73 | resource_size_t start = pci_resource_start(dev, bar); | |
| 74 | resource_size_t len = pci_resource_len(dev, bar); | |
| 75 | unsigned long flags = pci_resource_flags(dev, bar); | |
| 76 | ||
| 77 | ||
| 78 | if (flags & IORESOURCE_IO) | |
| 79 | return NULL; | |
| 80 | ||
| 81 | if (len <= offset || !start) | |
| 82 | return NULL; | |
| 83 | ||
| 84 | len -= offset; | |
| 85 | start += offset; | |
| 86 | if (maxlen && len > maxlen) | |
| 87 | len = maxlen; | |
| 88 | ||
| 89 | if (flags & IORESOURCE_MEM) | |
| 90 | return ioremap_wc(start, len); | |
| 91 | ||
| 92 | /* What? */ | |
| 93 | return NULL; | |
| 94 | } | |
| 95 | EXPORT_SYMBOL_GPL(pci_iomap_wc_range); | |
| 96 | ||
| eb29d8d2 MT |
97 | /** |
| 98 | * pci_iomap - create a virtual mapping cookie for a PCI BAR | |
| 99 | * @dev: PCI device that owns the BAR | |
| 100 | * @bar: BAR number | |
| 101 | * @maxlen: length of the memory to map | |
| 102 | * | |
| 103 | * Using this function you will get a __iomem address to your device BAR. | |
| 104 | * You can access it using ioread*() and iowrite*(). These functions hide | |
| 105 | * the details if this is a MMIO or PIO address space and will just do what | |
| 106 | * you expect from them in the correct way. | |
| 107 | * | |
| 108 | * @maxlen specifies the maximum length to map. If you want to get access to | |
| 109 | * the complete BAR without checking for its length first, pass %0 here. | |
| 110 | * */ | |
| 111 | void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen) | |
| 112 | { | |
| 113 | return pci_iomap_range(dev, bar, 0, maxlen); | |
| 114 | } | |
| 66eab4df | 115 | EXPORT_SYMBOL(pci_iomap); |
| 1b3d4200 LR |
116 | |
| 117 | /** | |
| 118 | * pci_iomap_wc - create a virtual WC mapping cookie for a PCI BAR | |
| 119 | * @dev: PCI device that owns the BAR | |
| 120 | * @bar: BAR number | |
| 121 | * @maxlen: length of the memory to map | |
| 122 | * | |
| 123 | * Using this function you will get a __iomem address to your device BAR. | |
| 124 | * You can access it using ioread*() and iowrite*(). These functions hide | |
| 125 | * the details if this is a MMIO or PIO address space and will just do what | |
| 126 | * you expect from them in the correct way. When possible write combining | |
| 127 | * is used. | |
| 128 | * | |
| 129 | * @maxlen specifies the maximum length to map. If you want to get access to | |
| 130 | * the complete BAR without checking for its length first, pass %0 here. | |
| 131 | * */ | |
| 132 | void __iomem *pci_iomap_wc(struct pci_dev *dev, int bar, unsigned long maxlen) | |
| 133 | { | |
| 134 | return pci_iomap_wc_range(dev, bar, 0, maxlen); | |
| 135 | } | |
| 136 | EXPORT_SYMBOL_GPL(pci_iomap_wc); | |
| 66eab4df | 137 | #endif /* CONFIG_PCI */ |