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2c1f3b7a AV |
1 | /* |
2 | * at91_cf.c -- AT91 CompactFlash controller driver | |
3 | * | |
4 | * Copyright (C) 2005 David Brownell | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | */ | |
11 | ||
12 | #include <linux/module.h> | |
13 | #include <linux/kernel.h> | |
2c1f3b7a AV |
14 | #include <linux/platform_device.h> |
15 | #include <linux/errno.h> | |
16 | #include <linux/init.h> | |
17 | #include <linux/interrupt.h> | |
5a0e3ad6 | 18 | #include <linux/slab.h> |
80af9e6d | 19 | #include <linux/gpio.h> |
bcd2360c | 20 | #include <linux/platform_data/atmel.h> |
a843168d JE |
21 | #include <linux/io.h> |
22 | #include <linux/sizes.h> | |
eaa9a21d AB |
23 | #include <linux/mfd/syscon.h> |
24 | #include <linux/mfd/syscon/atmel-mc.h> | |
ed9084ec JE |
25 | #include <linux/of.h> |
26 | #include <linux/of_device.h> | |
27 | #include <linux/of_gpio.h> | |
eaa9a21d | 28 | #include <linux/regmap.h> |
2c1f3b7a AV |
29 | |
30 | #include <pcmcia/ss.h> | |
31 | ||
2c1f3b7a AV |
32 | /* |
33 | * A0..A10 work in each range; A23 indicates I/O space; A25 is CFRNW; | |
34 | * some other bit in {A24,A22..A11} is nREG to flag memory access | |
35 | * (vs attributes). So more than 2KB/region would just be waste. | |
ebe5cfb3 | 36 | * Note: These are offsets from the physical base address. |
2c1f3b7a | 37 | */ |
ebe5cfb3 AV |
38 | #define CF_ATTR_PHYS (0) |
39 | #define CF_IO_PHYS (1 << 23) | |
40 | #define CF_MEM_PHYS (0x017ff800) | |
2c1f3b7a | 41 | |
eaa9a21d AB |
42 | struct regmap *mc; |
43 | ||
2c1f3b7a AV |
44 | /*--------------------------------------------------------------------------*/ |
45 | ||
2c1f3b7a AV |
46 | struct at91_cf_socket { |
47 | struct pcmcia_socket socket; | |
48 | ||
49 | unsigned present:1; | |
50 | ||
51 | struct platform_device *pdev; | |
52 | struct at91_cf_data *board; | |
ebe5cfb3 AV |
53 | |
54 | unsigned long phys_baseaddr; | |
2c1f3b7a AV |
55 | }; |
56 | ||
2c1f3b7a AV |
57 | static inline int at91_cf_present(struct at91_cf_socket *cf) |
58 | { | |
4c1fc445 | 59 | return !gpio_get_value(cf->board->det_pin); |
2c1f3b7a AV |
60 | } |
61 | ||
62 | /*--------------------------------------------------------------------------*/ | |
63 | ||
64 | static int at91_cf_ss_init(struct pcmcia_socket *s) | |
65 | { | |
66 | return 0; | |
67 | } | |
68 | ||
7d12e780 | 69 | static irqreturn_t at91_cf_irq(int irq, void *_cf) |
2c1f3b7a | 70 | { |
c7bec5ab | 71 | struct at91_cf_socket *cf = _cf; |
2c1f3b7a | 72 | |
80af9e6d | 73 | if (irq == gpio_to_irq(cf->board->det_pin)) { |
2c1f3b7a AV |
74 | unsigned present = at91_cf_present(cf); |
75 | ||
76 | /* kick pccard as needed */ | |
77 | if (present != cf->present) { | |
78 | cf->present = present; | |
40ca0209 | 79 | dev_dbg(&cf->pdev->dev, "card %s\n", |
2c536200 | 80 | present ? "present" : "gone"); |
2c1f3b7a AV |
81 | pcmcia_parse_events(&cf->socket, SS_DETECT); |
82 | } | |
83 | } | |
84 | ||
85 | return IRQ_HANDLED; | |
86 | } | |
87 | ||
88 | static int at91_cf_get_status(struct pcmcia_socket *s, u_int *sp) | |
89 | { | |
90 | struct at91_cf_socket *cf; | |
91 | ||
92 | if (!sp) | |
93 | return -EINVAL; | |
94 | ||
95 | cf = container_of(s, struct at91_cf_socket, socket); | |
96 | ||
2c536200 | 97 | /* NOTE: CF is always 3VCARD */ |
2c1f3b7a | 98 | if (at91_cf_present(cf)) { |
80af9e6d JE |
99 | int rdy = gpio_is_valid(cf->board->irq_pin); /* RDY/nIRQ */ |
100 | int vcc = gpio_is_valid(cf->board->vcc_pin); | |
2c1f3b7a AV |
101 | |
102 | *sp = SS_DETECT | SS_3VCARD; | |
e39506b4 | 103 | if (!rdy || gpio_get_value(cf->board->irq_pin)) |
2c1f3b7a | 104 | *sp |= SS_READY; |
e39506b4 | 105 | if (!vcc || gpio_get_value(cf->board->vcc_pin)) |
2c1f3b7a AV |
106 | *sp |= SS_POWERON; |
107 | } else | |
108 | *sp = 0; | |
109 | ||
110 | return 0; | |
111 | } | |
112 | ||
2c536200 DB |
113 | static int |
114 | at91_cf_set_socket(struct pcmcia_socket *sock, struct socket_state_t *s) | |
2c1f3b7a AV |
115 | { |
116 | struct at91_cf_socket *cf; | |
117 | ||
118 | cf = container_of(sock, struct at91_cf_socket, socket); | |
119 | ||
120 | /* switch Vcc if needed and possible */ | |
80af9e6d | 121 | if (gpio_is_valid(cf->board->vcc_pin)) { |
2c1f3b7a | 122 | switch (s->Vcc) { |
d652f702 LN |
123 | case 0: |
124 | gpio_set_value(cf->board->vcc_pin, 0); | |
125 | break; | |
126 | case 33: | |
127 | gpio_set_value(cf->board->vcc_pin, 1); | |
128 | break; | |
129 | default: | |
130 | return -EINVAL; | |
2c1f3b7a AV |
131 | } |
132 | } | |
133 | ||
134 | /* toggle reset if needed */ | |
4c1fc445 | 135 | gpio_set_value(cf->board->rst_pin, s->flags & SS_RESET); |
2c1f3b7a | 136 | |
40ca0209 JE |
137 | dev_dbg(&cf->pdev->dev, "Vcc %d, io_irq %d, flags %04x csc %04x\n", |
138 | s->Vcc, s->io_irq, s->flags, s->csc_mask); | |
2c1f3b7a AV |
139 | |
140 | return 0; | |
141 | } | |
142 | ||
143 | static int at91_cf_ss_suspend(struct pcmcia_socket *s) | |
144 | { | |
145 | return at91_cf_set_socket(s, &dead_socket); | |
146 | } | |
147 | ||
148 | /* we already mapped the I/O region */ | |
149 | static int at91_cf_set_io_map(struct pcmcia_socket *s, struct pccard_io_map *io) | |
150 | { | |
151 | struct at91_cf_socket *cf; | |
152 | u32 csr; | |
153 | ||
154 | cf = container_of(s, struct at91_cf_socket, socket); | |
155 | io->flags &= (MAP_ACTIVE | MAP_16BIT | MAP_AUTOSZ); | |
156 | ||
157 | /* | |
158 | * Use 16 bit accesses unless/until we need 8-bit i/o space. | |
eaa9a21d | 159 | * |
2c1f3b7a AV |
160 | * NOTE: this CF controller ignores IOIS16, so we can't really do |
161 | * MAP_AUTOSZ. The 16bit mode allows single byte access on either | |
162 | * D0-D7 (even addr) or D8-D15 (odd), so it's close enough for many | |
163 | * purposes (and handles ide-cs). | |
164 | * | |
165 | * The 8bit mode is needed for odd byte access on D0-D7. It seems | |
166 | * some cards only like that way to get at the odd byte, despite | |
167 | * CF 3.0 spec table 35 also giving the D8-D15 option. | |
168 | */ | |
ebe5cfb3 | 169 | if (!(io->flags & (MAP_16BIT | MAP_AUTOSZ))) { |
eaa9a21d | 170 | csr = AT91_MC_SMC_DBW_8; |
40ca0209 | 171 | dev_dbg(&cf->pdev->dev, "8bit i/o bus\n"); |
2c1f3b7a | 172 | } else { |
eaa9a21d | 173 | csr = AT91_MC_SMC_DBW_16; |
40ca0209 | 174 | dev_dbg(&cf->pdev->dev, "16bit i/o bus\n"); |
2c1f3b7a | 175 | } |
eaa9a21d AB |
176 | regmap_update_bits(mc, AT91_MC_SMC_CSR(cf->board->chipselect), |
177 | AT91_MC_SMC_DBW, csr); | |
2c1f3b7a AV |
178 | |
179 | io->start = cf->socket.io_offset; | |
180 | io->stop = io->start + SZ_2K - 1; | |
181 | ||
182 | return 0; | |
183 | } | |
184 | ||
185 | /* pcmcia layer maps/unmaps mem regions */ | |
2c536200 DB |
186 | static int |
187 | at91_cf_set_mem_map(struct pcmcia_socket *s, struct pccard_mem_map *map) | |
2c1f3b7a AV |
188 | { |
189 | struct at91_cf_socket *cf; | |
190 | ||
191 | if (map->card_start) | |
192 | return -EINVAL; | |
193 | ||
194 | cf = container_of(s, struct at91_cf_socket, socket); | |
195 | ||
ebe5cfb3 | 196 | map->flags &= (MAP_ACTIVE | MAP_ATTRIB | MAP_16BIT); |
2c1f3b7a | 197 | if (map->flags & MAP_ATTRIB) |
ebe5cfb3 | 198 | map->static_start = cf->phys_baseaddr + CF_ATTR_PHYS; |
2c1f3b7a | 199 | else |
ebe5cfb3 | 200 | map->static_start = cf->phys_baseaddr + CF_MEM_PHYS; |
2c1f3b7a AV |
201 | |
202 | return 0; | |
203 | } | |
204 | ||
205 | static struct pccard_operations at91_cf_ops = { | |
206 | .init = at91_cf_ss_init, | |
207 | .suspend = at91_cf_ss_suspend, | |
208 | .get_status = at91_cf_get_status, | |
209 | .set_socket = at91_cf_set_socket, | |
210 | .set_io_map = at91_cf_set_io_map, | |
211 | .set_mem_map = at91_cf_set_mem_map, | |
212 | }; | |
213 | ||
214 | /*--------------------------------------------------------------------------*/ | |
215 | ||
ed9084ec JE |
216 | #if defined(CONFIG_OF) |
217 | static const struct of_device_id at91_cf_dt_ids[] = { | |
218 | { .compatible = "atmel,at91rm9200-cf" }, | |
219 | { /* sentinel */ } | |
220 | }; | |
221 | MODULE_DEVICE_TABLE(of, at91_cf_dt_ids); | |
222 | ||
223 | static int at91_cf_dt_init(struct platform_device *pdev) | |
224 | { | |
225 | struct at91_cf_data *board; | |
226 | ||
227 | board = devm_kzalloc(&pdev->dev, sizeof(*board), GFP_KERNEL); | |
228 | if (!board) | |
229 | return -ENOMEM; | |
230 | ||
231 | board->irq_pin = of_get_gpio(pdev->dev.of_node, 0); | |
232 | board->det_pin = of_get_gpio(pdev->dev.of_node, 1); | |
233 | board->vcc_pin = of_get_gpio(pdev->dev.of_node, 2); | |
234 | board->rst_pin = of_get_gpio(pdev->dev.of_node, 3); | |
235 | ||
236 | pdev->dev.platform_data = board; | |
237 | ||
eaa9a21d AB |
238 | mc = syscon_regmap_lookup_by_compatible("atmel,at91rm9200-sdramc"); |
239 | if (IS_ERR(mc)) | |
240 | return PTR_ERR(mc); | |
241 | ||
ed9084ec JE |
242 | return 0; |
243 | } | |
244 | #else | |
245 | static int at91_cf_dt_init(struct platform_device *pdev) | |
246 | { | |
247 | return -ENODEV; | |
248 | } | |
249 | #endif | |
250 | ||
16a7c7cf | 251 | static int at91_cf_probe(struct platform_device *pdev) |
2c1f3b7a AV |
252 | { |
253 | struct at91_cf_socket *cf; | |
0db6095d | 254 | struct at91_cf_data *board = pdev->dev.platform_data; |
2c536200 | 255 | struct resource *io; |
2c1f3b7a AV |
256 | int status; |
257 | ||
ed9084ec JE |
258 | if (!board) { |
259 | status = at91_cf_dt_init(pdev); | |
260 | if (status) | |
261 | return status; | |
262 | ||
263 | board = pdev->dev.platform_data; | |
264 | } | |
265 | ||
266 | if (!gpio_is_valid(board->det_pin) || !gpio_is_valid(board->rst_pin)) | |
2c1f3b7a AV |
267 | return -ENODEV; |
268 | ||
2c536200 DB |
269 | io = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
270 | if (!io) | |
271 | return -ENODEV; | |
272 | ||
54fe1591 | 273 | cf = devm_kzalloc(&pdev->dev, sizeof(*cf), GFP_KERNEL); |
2c1f3b7a AV |
274 | if (!cf) |
275 | return -ENOMEM; | |
276 | ||
277 | cf->board = board; | |
278 | cf->pdev = pdev; | |
ebe5cfb3 | 279 | cf->phys_baseaddr = io->start; |
0db6095d | 280 | platform_set_drvdata(pdev, cf); |
2c1f3b7a | 281 | |
2c1f3b7a | 282 | /* must be a GPIO; ergo must trigger on both edges */ |
54fe1591 | 283 | status = devm_gpio_request(&pdev->dev, board->det_pin, "cf_det"); |
2c1f3b7a | 284 | if (status < 0) |
54fe1591 JE |
285 | return status; |
286 | ||
287 | status = devm_request_irq(&pdev->dev, gpio_to_irq(board->det_pin), | |
288 | at91_cf_irq, 0, "at91_cf detect", cf); | |
4c1fc445 | 289 | if (status < 0) |
54fe1591 JE |
290 | return status; |
291 | ||
0db6095d | 292 | device_init_wakeup(&pdev->dev, 1); |
2c1f3b7a | 293 | |
54fe1591 | 294 | status = devm_gpio_request(&pdev->dev, board->rst_pin, "cf_rst"); |
4c1fc445 DB |
295 | if (status < 0) |
296 | goto fail0a; | |
297 | ||
80af9e6d | 298 | if (gpio_is_valid(board->vcc_pin)) { |
54fe1591 | 299 | status = devm_gpio_request(&pdev->dev, board->vcc_pin, "cf_vcc"); |
4c1fc445 | 300 | if (status < 0) |
54fe1591 | 301 | goto fail0a; |
4c1fc445 DB |
302 | } |
303 | ||
2c1f3b7a AV |
304 | /* |
305 | * The card driver will request this irq later as needed. | |
306 | * but it causes lots of "irqNN: nobody cared" messages | |
307 | * unless we report that we handle everything (sigh). | |
308 | * (Note: DK board doesn't wire the IRQ pin...) | |
309 | */ | |
80af9e6d | 310 | if (gpio_is_valid(board->irq_pin)) { |
54fe1591 | 311 | status = devm_gpio_request(&pdev->dev, board->irq_pin, "cf_irq"); |
4c1fc445 | 312 | if (status < 0) |
54fe1591 JE |
313 | goto fail0a; |
314 | ||
315 | status = devm_request_irq(&pdev->dev, gpio_to_irq(board->irq_pin), | |
316 | at91_cf_irq, IRQF_SHARED, "at91_cf", cf); | |
2c1f3b7a | 317 | if (status < 0) |
54fe1591 | 318 | goto fail0a; |
80af9e6d | 319 | cf->socket.pci_irq = gpio_to_irq(board->irq_pin); |
2c536200 | 320 | } else |
9130adda | 321 | cf->socket.pci_irq = nr_irqs + 1; |
2c1f3b7a | 322 | |
1be27c62 AB |
323 | /* |
324 | * pcmcia layer only remaps "real" memory not iospace | |
325 | * io_offset is set to 0x10000 to avoid the check in static_find_io(). | |
326 | * */ | |
327 | cf->socket.io_offset = 0x10000; | |
328 | status = pci_ioremap_io(0x10000, cf->phys_baseaddr + CF_IO_PHYS); | |
329 | if (status) | |
54fe1591 | 330 | goto fail0a; |
2c1f3b7a | 331 | |
40a0017e | 332 | /* reserve chip-select regions */ |
54fe1591 | 333 | if (!devm_request_mem_region(&pdev->dev, io->start, resource_size(io), "at91_cf")) { |
ebe5cfb3 | 334 | status = -ENXIO; |
54fe1591 | 335 | goto fail0a; |
ebe5cfb3 | 336 | } |
2c1f3b7a | 337 | |
40ca0209 | 338 | dev_info(&pdev->dev, "irqs det #%d, io #%d\n", |
80af9e6d | 339 | gpio_to_irq(board->det_pin), gpio_to_irq(board->irq_pin)); |
2c1f3b7a AV |
340 | |
341 | cf->socket.owner = THIS_MODULE; | |
e4a3c3f0 | 342 | cf->socket.dev.parent = &pdev->dev; |
2c1f3b7a AV |
343 | cf->socket.ops = &at91_cf_ops; |
344 | cf->socket.resource_ops = &pccard_static_ops; | |
345 | cf->socket.features = SS_CAP_PCCARD | SS_CAP_STATIC_MAP | |
346 | | SS_CAP_MEM_ALIGN; | |
347 | cf->socket.map_size = SZ_2K; | |
2c536200 | 348 | cf->socket.io[0].res = io; |
2c1f3b7a AV |
349 | |
350 | status = pcmcia_register_socket(&cf->socket); | |
351 | if (status < 0) | |
54fe1591 | 352 | goto fail0a; |
2c1f3b7a AV |
353 | |
354 | return 0; | |
355 | ||
2c1f3b7a | 356 | fail0a: |
1fbece15 | 357 | device_init_wakeup(&pdev->dev, 0); |
2c1f3b7a AV |
358 | return status; |
359 | } | |
360 | ||
16a7c7cf | 361 | static int at91_cf_remove(struct platform_device *pdev) |
2c1f3b7a | 362 | { |
0db6095d | 363 | struct at91_cf_socket *cf = platform_get_drvdata(pdev); |
2c1f3b7a AV |
364 | |
365 | pcmcia_unregister_socket(&cf->socket); | |
0db6095d | 366 | device_init_wakeup(&pdev->dev, 0); |
54fe1591 | 367 | |
2c1f3b7a AV |
368 | return 0; |
369 | } | |
370 | ||
0db6095d DB |
371 | #ifdef CONFIG_PM |
372 | ||
373 | static int at91_cf_suspend(struct platform_device *pdev, pm_message_t mesg) | |
374 | { | |
375 | struct at91_cf_socket *cf = platform_get_drvdata(pdev); | |
376 | struct at91_cf_data *board = cf->board; | |
377 | ||
1fbece15 | 378 | if (device_may_wakeup(&pdev->dev)) { |
80af9e6d JE |
379 | enable_irq_wake(gpio_to_irq(board->det_pin)); |
380 | if (gpio_is_valid(board->irq_pin)) | |
381 | enable_irq_wake(gpio_to_irq(board->irq_pin)); | |
0db6095d | 382 | } |
0db6095d DB |
383 | return 0; |
384 | } | |
385 | ||
386 | static int at91_cf_resume(struct platform_device *pdev) | |
387 | { | |
9af20376 MP |
388 | struct at91_cf_socket *cf = platform_get_drvdata(pdev); |
389 | struct at91_cf_data *board = cf->board; | |
390 | ||
391 | if (device_may_wakeup(&pdev->dev)) { | |
80af9e6d JE |
392 | disable_irq_wake(gpio_to_irq(board->det_pin)); |
393 | if (gpio_is_valid(board->irq_pin)) | |
394 | disable_irq_wake(gpio_to_irq(board->irq_pin)); | |
9af20376 MP |
395 | } |
396 | ||
0db6095d DB |
397 | return 0; |
398 | } | |
399 | ||
400 | #else | |
401 | #define at91_cf_suspend NULL | |
402 | #define at91_cf_resume NULL | |
403 | #endif | |
404 | ||
405 | static struct platform_driver at91_cf_driver = { | |
406 | .driver = { | |
40ca0209 | 407 | .name = "at91_cf", |
ed9084ec | 408 | .of_match_table = of_match_ptr(at91_cf_dt_ids), |
0db6095d | 409 | }, |
16a7c7cf JH |
410 | .probe = at91_cf_probe, |
411 | .remove = at91_cf_remove, | |
0db6095d DB |
412 | .suspend = at91_cf_suspend, |
413 | .resume = at91_cf_resume, | |
2c1f3b7a AV |
414 | }; |
415 | ||
16a7c7cf | 416 | module_platform_driver(at91_cf_driver); |
2c1f3b7a AV |
417 | |
418 | MODULE_DESCRIPTION("AT91 Compact Flash Driver"); | |
419 | MODULE_AUTHOR("David Brownell"); | |
420 | MODULE_LICENSE("GPL"); | |
12c2c019 | 421 | MODULE_ALIAS("platform:at91_cf"); |