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Commit | Line | Data |
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3cc72986 MB |
1 | /* |
2 | * Arizona core driver | |
3 | * | |
4 | * Copyright 2012 Wolfson Microelectronics plc | |
5 | * | |
6 | * Author: Mark Brown <[email protected]> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
cdd8da8c | 13 | #include <linux/clk.h> |
3cc72986 | 14 | #include <linux/delay.h> |
59db9691 | 15 | #include <linux/err.h> |
3cc72986 MB |
16 | #include <linux/gpio.h> |
17 | #include <linux/interrupt.h> | |
18 | #include <linux/mfd/core.h> | |
19 | #include <linux/module.h> | |
d781009c MB |
20 | #include <linux/of.h> |
21 | #include <linux/of_device.h> | |
22 | #include <linux/of_gpio.h> | |
3cc72986 MB |
23 | #include <linux/pm_runtime.h> |
24 | #include <linux/regmap.h> | |
25 | #include <linux/regulator/consumer.h> | |
5927467d | 26 | #include <linux/regulator/machine.h> |
3cc72986 | 27 | #include <linux/slab.h> |
ae05ea36 | 28 | #include <linux/platform_device.h> |
3cc72986 MB |
29 | |
30 | #include <linux/mfd/arizona/core.h> | |
31 | #include <linux/mfd/arizona/registers.h> | |
32 | ||
33 | #include "arizona.h" | |
34 | ||
3762aede | 35 | static const char * const wm5102_core_supplies[] = { |
3cc72986 MB |
36 | "AVDD", |
37 | "DBVDD1", | |
3cc72986 MB |
38 | }; |
39 | ||
40 | int arizona_clk32k_enable(struct arizona *arizona) | |
41 | { | |
42 | int ret = 0; | |
43 | ||
44 | mutex_lock(&arizona->clk_lock); | |
45 | ||
46 | arizona->clk32k_ref++; | |
47 | ||
247fa192 MB |
48 | if (arizona->clk32k_ref == 1) { |
49 | switch (arizona->pdata.clk32k_src) { | |
50 | case ARIZONA_32KZ_MCLK1: | |
51 | ret = pm_runtime_get_sync(arizona->dev); | |
52 | if (ret != 0) | |
cdd8da8c SN |
53 | goto err_ref; |
54 | ret = clk_prepare_enable(arizona->mclk[ARIZONA_MCLK1]); | |
55 | if (ret != 0) | |
56 | goto err_pm; | |
57 | break; | |
58 | case ARIZONA_32KZ_MCLK2: | |
59 | ret = clk_prepare_enable(arizona->mclk[ARIZONA_MCLK2]); | |
60 | if (ret != 0) | |
61 | goto err_ref; | |
247fa192 MB |
62 | break; |
63 | } | |
64 | ||
3cc72986 MB |
65 | ret = regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, |
66 | ARIZONA_CLK_32K_ENA, | |
67 | ARIZONA_CLK_32K_ENA); | |
247fa192 | 68 | } |
3cc72986 | 69 | |
cdd8da8c SN |
70 | err_pm: |
71 | pm_runtime_put_sync(arizona->dev); | |
72 | err_ref: | |
3cc72986 MB |
73 | if (ret != 0) |
74 | arizona->clk32k_ref--; | |
75 | ||
76 | mutex_unlock(&arizona->clk_lock); | |
77 | ||
78 | return ret; | |
79 | } | |
80 | EXPORT_SYMBOL_GPL(arizona_clk32k_enable); | |
81 | ||
82 | int arizona_clk32k_disable(struct arizona *arizona) | |
83 | { | |
3cc72986 MB |
84 | mutex_lock(&arizona->clk_lock); |
85 | ||
86 | BUG_ON(arizona->clk32k_ref <= 0); | |
87 | ||
88 | arizona->clk32k_ref--; | |
89 | ||
247fa192 | 90 | if (arizona->clk32k_ref == 0) { |
3cc72986 MB |
91 | regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, |
92 | ARIZONA_CLK_32K_ENA, 0); | |
93 | ||
247fa192 MB |
94 | switch (arizona->pdata.clk32k_src) { |
95 | case ARIZONA_32KZ_MCLK1: | |
96 | pm_runtime_put_sync(arizona->dev); | |
cdd8da8c SN |
97 | clk_disable_unprepare(arizona->mclk[ARIZONA_MCLK1]); |
98 | break; | |
99 | case ARIZONA_32KZ_MCLK2: | |
100 | clk_disable_unprepare(arizona->mclk[ARIZONA_MCLK2]); | |
247fa192 MB |
101 | break; |
102 | } | |
103 | } | |
104 | ||
3cc72986 MB |
105 | mutex_unlock(&arizona->clk_lock); |
106 | ||
a260fba1 | 107 | return 0; |
3cc72986 MB |
108 | } |
109 | EXPORT_SYMBOL_GPL(arizona_clk32k_disable); | |
110 | ||
111 | static irqreturn_t arizona_clkgen_err(int irq, void *data) | |
112 | { | |
113 | struct arizona *arizona = data; | |
114 | ||
115 | dev_err(arizona->dev, "CLKGEN error\n"); | |
116 | ||
117 | return IRQ_HANDLED; | |
118 | } | |
119 | ||
120 | static irqreturn_t arizona_underclocked(int irq, void *data) | |
121 | { | |
122 | struct arizona *arizona = data; | |
123 | unsigned int val; | |
124 | int ret; | |
125 | ||
126 | ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_8, | |
127 | &val); | |
128 | if (ret != 0) { | |
129 | dev_err(arizona->dev, "Failed to read underclock status: %d\n", | |
130 | ret); | |
131 | return IRQ_NONE; | |
132 | } | |
133 | ||
3cc72986 MB |
134 | if (val & ARIZONA_AIF3_UNDERCLOCKED_STS) |
135 | dev_err(arizona->dev, "AIF3 underclocked\n"); | |
136 | if (val & ARIZONA_AIF2_UNDERCLOCKED_STS) | |
3ebef34d CK |
137 | dev_err(arizona->dev, "AIF2 underclocked\n"); |
138 | if (val & ARIZONA_AIF1_UNDERCLOCKED_STS) | |
3cc72986 | 139 | dev_err(arizona->dev, "AIF1 underclocked\n"); |
6e440d27 CK |
140 | if (val & ARIZONA_ISRC3_UNDERCLOCKED_STS) |
141 | dev_err(arizona->dev, "ISRC3 underclocked\n"); | |
3cc72986 MB |
142 | if (val & ARIZONA_ISRC2_UNDERCLOCKED_STS) |
143 | dev_err(arizona->dev, "ISRC2 underclocked\n"); | |
144 | if (val & ARIZONA_ISRC1_UNDERCLOCKED_STS) | |
145 | dev_err(arizona->dev, "ISRC1 underclocked\n"); | |
146 | if (val & ARIZONA_FX_UNDERCLOCKED_STS) | |
147 | dev_err(arizona->dev, "FX underclocked\n"); | |
148 | if (val & ARIZONA_ASRC_UNDERCLOCKED_STS) | |
149 | dev_err(arizona->dev, "ASRC underclocked\n"); | |
150 | if (val & ARIZONA_DAC_UNDERCLOCKED_STS) | |
151 | dev_err(arizona->dev, "DAC underclocked\n"); | |
152 | if (val & ARIZONA_ADC_UNDERCLOCKED_STS) | |
153 | dev_err(arizona->dev, "ADC underclocked\n"); | |
154 | if (val & ARIZONA_MIXER_UNDERCLOCKED_STS) | |
648a9880 | 155 | dev_err(arizona->dev, "Mixer dropped sample\n"); |
3cc72986 MB |
156 | |
157 | return IRQ_HANDLED; | |
158 | } | |
159 | ||
160 | static irqreturn_t arizona_overclocked(int irq, void *data) | |
161 | { | |
162 | struct arizona *arizona = data; | |
6887b042 | 163 | unsigned int val[3]; |
3cc72986 | 164 | int ret; |
3762aede | 165 | |
3cc72986 | 166 | ret = regmap_bulk_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_6, |
6887b042 | 167 | &val[0], 3); |
3cc72986 MB |
168 | if (ret != 0) { |
169 | dev_err(arizona->dev, "Failed to read overclock status: %d\n", | |
170 | ret); | |
171 | return IRQ_NONE; | |
172 | } | |
173 | ||
6887b042 RF |
174 | switch (arizona->type) { |
175 | case WM8998: | |
176 | case WM1814: | |
177 | /* Some bits are shifted on WM8998, | |
178 | * rearrange to match the standard bit layout | |
179 | */ | |
180 | val[0] = ((val[0] & 0x60e0) >> 1) | | |
181 | ((val[0] & 0x1e00) >> 2) | | |
182 | (val[0] & 0x000f); | |
183 | break; | |
184 | default: | |
185 | break; | |
186 | } | |
187 | ||
3cc72986 MB |
188 | if (val[0] & ARIZONA_PWM_OVERCLOCKED_STS) |
189 | dev_err(arizona->dev, "PWM overclocked\n"); | |
190 | if (val[0] & ARIZONA_FX_CORE_OVERCLOCKED_STS) | |
191 | dev_err(arizona->dev, "FX core overclocked\n"); | |
192 | if (val[0] & ARIZONA_DAC_SYS_OVERCLOCKED_STS) | |
193 | dev_err(arizona->dev, "DAC SYS overclocked\n"); | |
194 | if (val[0] & ARIZONA_DAC_WARP_OVERCLOCKED_STS) | |
195 | dev_err(arizona->dev, "DAC WARP overclocked\n"); | |
196 | if (val[0] & ARIZONA_ADC_OVERCLOCKED_STS) | |
197 | dev_err(arizona->dev, "ADC overclocked\n"); | |
198 | if (val[0] & ARIZONA_MIXER_OVERCLOCKED_STS) | |
199 | dev_err(arizona->dev, "Mixer overclocked\n"); | |
200 | if (val[0] & ARIZONA_AIF3_SYNC_OVERCLOCKED_STS) | |
201 | dev_err(arizona->dev, "AIF3 overclocked\n"); | |
202 | if (val[0] & ARIZONA_AIF2_SYNC_OVERCLOCKED_STS) | |
203 | dev_err(arizona->dev, "AIF2 overclocked\n"); | |
204 | if (val[0] & ARIZONA_AIF1_SYNC_OVERCLOCKED_STS) | |
205 | dev_err(arizona->dev, "AIF1 overclocked\n"); | |
206 | if (val[0] & ARIZONA_PAD_CTRL_OVERCLOCKED_STS) | |
207 | dev_err(arizona->dev, "Pad control overclocked\n"); | |
208 | ||
209 | if (val[1] & ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS) | |
210 | dev_err(arizona->dev, "Slimbus subsystem overclocked\n"); | |
211 | if (val[1] & ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS) | |
212 | dev_err(arizona->dev, "Slimbus async overclocked\n"); | |
213 | if (val[1] & ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS) | |
214 | dev_err(arizona->dev, "Slimbus sync overclocked\n"); | |
215 | if (val[1] & ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS) | |
216 | dev_err(arizona->dev, "ASRC async system overclocked\n"); | |
217 | if (val[1] & ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS) | |
218 | dev_err(arizona->dev, "ASRC async WARP overclocked\n"); | |
219 | if (val[1] & ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS) | |
220 | dev_err(arizona->dev, "ASRC sync system overclocked\n"); | |
221 | if (val[1] & ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS) | |
222 | dev_err(arizona->dev, "ASRC sync WARP overclocked\n"); | |
223 | if (val[1] & ARIZONA_ADSP2_1_OVERCLOCKED_STS) | |
224 | dev_err(arizona->dev, "DSP1 overclocked\n"); | |
6e440d27 CK |
225 | if (val[1] & ARIZONA_ISRC3_OVERCLOCKED_STS) |
226 | dev_err(arizona->dev, "ISRC3 overclocked\n"); | |
3cc72986 MB |
227 | if (val[1] & ARIZONA_ISRC2_OVERCLOCKED_STS) |
228 | dev_err(arizona->dev, "ISRC2 overclocked\n"); | |
229 | if (val[1] & ARIZONA_ISRC1_OVERCLOCKED_STS) | |
230 | dev_err(arizona->dev, "ISRC1 overclocked\n"); | |
231 | ||
6887b042 RF |
232 | if (val[2] & ARIZONA_SPDIF_OVERCLOCKED_STS) |
233 | dev_err(arizona->dev, "SPDIF overclocked\n"); | |
234 | ||
3cc72986 MB |
235 | return IRQ_HANDLED; |
236 | } | |
237 | ||
ef84f885 CK |
238 | #define ARIZONA_REG_POLL_DELAY_US 7500 |
239 | ||
9d53dfdc | 240 | static int arizona_poll_reg(struct arizona *arizona, |
ef84f885 | 241 | int timeout_ms, unsigned int reg, |
9d53dfdc | 242 | unsigned int mask, unsigned int target) |
3cc72986 | 243 | { |
9d53dfdc | 244 | unsigned int val = 0; |
ef84f885 | 245 | int ret; |
9d53dfdc | 246 | |
ef84f885 | 247 | ret = regmap_read_poll_timeout(arizona->regmap, |
27fef9f8 | 248 | reg, val, ((val & mask) == target), |
ef84f885 CK |
249 | ARIZONA_REG_POLL_DELAY_US, |
250 | timeout_ms * 1000); | |
251 | if (ret) | |
252 | dev_err(arizona->dev, "Polling reg 0x%x timed out: %x\n", | |
253 | reg, val); | |
3cc72986 | 254 | |
ef84f885 | 255 | return ret; |
9d53dfdc CK |
256 | } |
257 | ||
258 | static int arizona_wait_for_boot(struct arizona *arizona) | |
259 | { | |
260 | int ret; | |
261 | ||
262 | /* | |
263 | * We can't use an interrupt as we need to runtime resume to do so, | |
264 | * we won't race with the interrupt handler as it'll be blocked on | |
265 | * runtime resume. | |
266 | */ | |
ef84f885 | 267 | ret = arizona_poll_reg(arizona, 30, ARIZONA_INTERRUPT_RAW_STATUS_5, |
9d53dfdc CK |
268 | ARIZONA_BOOT_DONE_STS, ARIZONA_BOOT_DONE_STS); |
269 | ||
270 | if (!ret) | |
3cc72986 MB |
271 | regmap_write(arizona->regmap, ARIZONA_INTERRUPT_STATUS_5, |
272 | ARIZONA_BOOT_DONE_STS); | |
3cc72986 MB |
273 | |
274 | pm_runtime_mark_last_busy(arizona->dev); | |
275 | ||
9d53dfdc | 276 | return ret; |
3cc72986 MB |
277 | } |
278 | ||
2229875d CK |
279 | static inline void arizona_enable_reset(struct arizona *arizona) |
280 | { | |
281 | if (arizona->pdata.reset) | |
282 | gpio_set_value_cansleep(arizona->pdata.reset, 0); | |
283 | } | |
284 | ||
285 | static void arizona_disable_reset(struct arizona *arizona) | |
286 | { | |
287 | if (arizona->pdata.reset) { | |
121c075c CK |
288 | switch (arizona->type) { |
289 | case WM5110: | |
290 | case WM8280: | |
291 | /* Meet requirements for minimum reset duration */ | |
b79a980f | 292 | usleep_range(5000, 10000); |
121c075c CK |
293 | break; |
294 | default: | |
295 | break; | |
296 | } | |
297 | ||
2229875d | 298 | gpio_set_value_cansleep(arizona->pdata.reset, 1); |
b79a980f | 299 | usleep_range(1000, 5000); |
2229875d CK |
300 | } |
301 | } | |
302 | ||
3850e3ee CK |
303 | struct arizona_sysclk_state { |
304 | unsigned int fll; | |
305 | unsigned int sysclk; | |
306 | }; | |
307 | ||
308 | static int arizona_enable_freerun_sysclk(struct arizona *arizona, | |
309 | struct arizona_sysclk_state *state) | |
e80436bb | 310 | { |
e80436bb CK |
311 | int ret, err; |
312 | ||
e80436bb | 313 | /* Cache existing FLL and SYSCLK settings */ |
3850e3ee | 314 | ret = regmap_read(arizona->regmap, ARIZONA_FLL1_CONTROL_1, &state->fll); |
0be068a0 | 315 | if (ret) { |
e80436bb CK |
316 | dev_err(arizona->dev, "Failed to cache FLL settings: %d\n", |
317 | ret); | |
318 | return ret; | |
319 | } | |
3850e3ee CK |
320 | ret = regmap_read(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, |
321 | &state->sysclk); | |
0be068a0 | 322 | if (ret) { |
e80436bb CK |
323 | dev_err(arizona->dev, "Failed to cache SYSCLK settings: %d\n", |
324 | ret); | |
325 | return ret; | |
326 | } | |
327 | ||
328 | /* Start up SYSCLK using the FLL in free running mode */ | |
329 | ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, | |
330 | ARIZONA_FLL1_ENA | ARIZONA_FLL1_FREERUN); | |
0be068a0 | 331 | if (ret) { |
e80436bb CK |
332 | dev_err(arizona->dev, |
333 | "Failed to start FLL in freerunning mode: %d\n", | |
334 | ret); | |
335 | return ret; | |
336 | } | |
ef84f885 | 337 | ret = arizona_poll_reg(arizona, 180, ARIZONA_INTERRUPT_RAW_STATUS_5, |
e80436bb CK |
338 | ARIZONA_FLL1_CLOCK_OK_STS, |
339 | ARIZONA_FLL1_CLOCK_OK_STS); | |
de4ea10a | 340 | if (ret) |
e80436bb | 341 | goto err_fll; |
e80436bb CK |
342 | |
343 | ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, 0x0144); | |
0be068a0 | 344 | if (ret) { |
e80436bb CK |
345 | dev_err(arizona->dev, "Failed to start SYSCLK: %d\n", ret); |
346 | goto err_fll; | |
347 | } | |
348 | ||
3850e3ee CK |
349 | return 0; |
350 | ||
351 | err_fll: | |
352 | err = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, state->fll); | |
353 | if (err) | |
354 | dev_err(arizona->dev, | |
355 | "Failed to re-apply old FLL settings: %d\n", err); | |
356 | ||
357 | return ret; | |
358 | } | |
359 | ||
360 | static int arizona_disable_freerun_sysclk(struct arizona *arizona, | |
361 | struct arizona_sysclk_state *state) | |
362 | { | |
363 | int ret; | |
364 | ||
365 | ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, | |
366 | state->sysclk); | |
367 | if (ret) { | |
368 | dev_err(arizona->dev, | |
369 | "Failed to re-apply old SYSCLK settings: %d\n", ret); | |
370 | return ret; | |
371 | } | |
372 | ||
373 | ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, state->fll); | |
374 | if (ret) { | |
375 | dev_err(arizona->dev, | |
376 | "Failed to re-apply old FLL settings: %d\n", ret); | |
377 | return ret; | |
378 | } | |
379 | ||
380 | return 0; | |
381 | } | |
382 | ||
383 | static int wm5102_apply_hardware_patch(struct arizona *arizona) | |
384 | { | |
385 | struct arizona_sysclk_state state; | |
386 | int err, ret; | |
387 | ||
388 | ret = arizona_enable_freerun_sysclk(arizona, &state); | |
389 | if (ret) | |
390 | return ret; | |
391 | ||
e80436bb CK |
392 | /* Start the write sequencer and wait for it to finish */ |
393 | ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0, | |
0be068a0 CK |
394 | ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | 160); |
395 | if (ret) { | |
e80436bb CK |
396 | dev_err(arizona->dev, "Failed to start write sequencer: %d\n", |
397 | ret); | |
3850e3ee | 398 | goto err; |
e80436bb | 399 | } |
3850e3ee | 400 | |
ef84f885 | 401 | ret = arizona_poll_reg(arizona, 30, ARIZONA_WRITE_SEQUENCER_CTRL_1, |
e80436bb | 402 | ARIZONA_WSEQ_BUSY, 0); |
de4ea10a | 403 | if (ret) |
e80436bb | 404 | regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0, |
0be068a0 | 405 | ARIZONA_WSEQ_ABORT); |
e80436bb | 406 | |
3850e3ee CK |
407 | err: |
408 | err = arizona_disable_freerun_sysclk(arizona, &state); | |
e80436bb | 409 | |
0be068a0 | 410 | return ret ?: err; |
e80436bb CK |
411 | } |
412 | ||
882bc468 CK |
413 | /* |
414 | * Register patch to some of the CODECs internal write sequences | |
415 | * to ensure a clean exit from the low power sleep state. | |
416 | */ | |
8019ff6c | 417 | static const struct reg_sequence wm5110_sleep_patch[] = { |
882bc468 CK |
418 | { 0x337A, 0xC100 }, |
419 | { 0x337B, 0x0041 }, | |
420 | { 0x3300, 0xA210 }, | |
421 | { 0x3301, 0x050C }, | |
422 | }; | |
423 | ||
424 | static int wm5110_apply_sleep_patch(struct arizona *arizona) | |
425 | { | |
426 | struct arizona_sysclk_state state; | |
427 | int err, ret; | |
428 | ||
429 | ret = arizona_enable_freerun_sysclk(arizona, &state); | |
430 | if (ret) | |
431 | return ret; | |
432 | ||
433 | ret = regmap_multi_reg_write_bypassed(arizona->regmap, | |
434 | wm5110_sleep_patch, | |
435 | ARRAY_SIZE(wm5110_sleep_patch)); | |
436 | ||
437 | err = arizona_disable_freerun_sysclk(arizona, &state); | |
438 | ||
439 | return ret ?: err; | |
440 | } | |
441 | ||
1c1c6bba CK |
442 | static int wm5102_clear_write_sequencer(struct arizona *arizona) |
443 | { | |
444 | int ret; | |
445 | ||
446 | ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_3, | |
447 | 0x0); | |
448 | if (ret) { | |
449 | dev_err(arizona->dev, | |
450 | "Failed to clear write sequencer state: %d\n", ret); | |
451 | return ret; | |
452 | } | |
453 | ||
454 | arizona_enable_reset(arizona); | |
455 | regulator_disable(arizona->dcvdd); | |
456 | ||
457 | msleep(20); | |
458 | ||
459 | ret = regulator_enable(arizona->dcvdd); | |
460 | if (ret) { | |
461 | dev_err(arizona->dev, "Failed to re-enable DCVDD: %d\n", ret); | |
462 | return ret; | |
463 | } | |
464 | arizona_disable_reset(arizona); | |
465 | ||
466 | return 0; | |
467 | } | |
468 | ||
48bb9fe4 | 469 | #ifdef CONFIG_PM |
e7811147 RF |
470 | static int arizona_isolate_dcvdd(struct arizona *arizona) |
471 | { | |
472 | int ret; | |
473 | ||
474 | ret = regmap_update_bits(arizona->regmap, | |
475 | ARIZONA_ISOLATION_CONTROL, | |
476 | ARIZONA_ISOLATE_DCVDD1, | |
477 | ARIZONA_ISOLATE_DCVDD1); | |
478 | if (ret != 0) | |
479 | dev_err(arizona->dev, "Failed to isolate DCVDD: %d\n", ret); | |
480 | ||
481 | return ret; | |
482 | } | |
483 | ||
484 | static int arizona_connect_dcvdd(struct arizona *arizona) | |
485 | { | |
486 | int ret; | |
487 | ||
488 | ret = regmap_update_bits(arizona->regmap, | |
489 | ARIZONA_ISOLATION_CONTROL, | |
490 | ARIZONA_ISOLATE_DCVDD1, 0); | |
491 | if (ret != 0) | |
492 | dev_err(arizona->dev, "Failed to connect DCVDD: %d\n", ret); | |
493 | ||
494 | return ret; | |
495 | } | |
496 | ||
e3424273 RF |
497 | static int arizona_is_jack_det_active(struct arizona *arizona) |
498 | { | |
499 | unsigned int val; | |
500 | int ret; | |
501 | ||
502 | ret = regmap_read(arizona->regmap, ARIZONA_JACK_DETECT_ANALOGUE, &val); | |
503 | if (ret) { | |
504 | dev_err(arizona->dev, | |
505 | "Failed to check jack det status: %d\n", ret); | |
506 | return ret; | |
507 | } else if (val & ARIZONA_JD1_ENA) { | |
508 | return 1; | |
509 | } else { | |
510 | return 0; | |
511 | } | |
512 | } | |
513 | ||
3cc72986 MB |
514 | static int arizona_runtime_resume(struct device *dev) |
515 | { | |
516 | struct arizona *arizona = dev_get_drvdata(dev); | |
517 | int ret; | |
518 | ||
508c8299 MB |
519 | dev_dbg(arizona->dev, "Leaving AoD mode\n"); |
520 | ||
e6cb7341 CK |
521 | if (arizona->has_fully_powered_off) { |
522 | dev_dbg(arizona->dev, "Re-enabling core supplies\n"); | |
523 | ||
524 | ret = regulator_bulk_enable(arizona->num_core_supplies, | |
525 | arizona->core_supplies); | |
526 | if (ret) { | |
527 | dev_err(dev, "Failed to enable core supplies: %d\n", | |
528 | ret); | |
529 | return ret; | |
530 | } | |
531 | } | |
532 | ||
59db9691 MB |
533 | ret = regulator_enable(arizona->dcvdd); |
534 | if (ret != 0) { | |
535 | dev_err(arizona->dev, "Failed to enable DCVDD: %d\n", ret); | |
e6cb7341 CK |
536 | if (arizona->has_fully_powered_off) |
537 | regulator_bulk_disable(arizona->num_core_supplies, | |
538 | arizona->core_supplies); | |
59db9691 MB |
539 | return ret; |
540 | } | |
3cc72986 | 541 | |
e6cb7341 CK |
542 | if (arizona->has_fully_powered_off) { |
543 | arizona_disable_reset(arizona); | |
544 | enable_irq(arizona->irq); | |
545 | arizona->has_fully_powered_off = false; | |
546 | } | |
547 | ||
3cc72986 MB |
548 | regcache_cache_only(arizona->regmap, false); |
549 | ||
4c9bb8bc CK |
550 | switch (arizona->type) { |
551 | case WM5102: | |
5927467d | 552 | if (arizona->external_dcvdd) { |
e7811147 RF |
553 | ret = arizona_connect_dcvdd(arizona); |
554 | if (ret != 0) | |
5927467d | 555 | goto err; |
5927467d MB |
556 | } |
557 | ||
4c9bb8bc CK |
558 | ret = wm5102_patch(arizona); |
559 | if (ret != 0) { | |
560 | dev_err(arizona->dev, "Failed to apply patch: %d\n", | |
561 | ret); | |
562 | goto err; | |
563 | } | |
e80436bb | 564 | |
0be068a0 CK |
565 | ret = wm5102_apply_hardware_patch(arizona); |
566 | if (ret) { | |
e80436bb CK |
567 | dev_err(arizona->dev, |
568 | "Failed to apply hardware patch: %d\n", | |
569 | ret); | |
570 | goto err; | |
571 | } | |
572 | break; | |
96129a0e CK |
573 | case WM5110: |
574 | case WM8280: | |
575 | ret = arizona_wait_for_boot(arizona); | |
576 | if (ret) | |
577 | goto err; | |
578 | ||
579 | if (arizona->external_dcvdd) { | |
e7811147 RF |
580 | ret = arizona_connect_dcvdd(arizona); |
581 | if (ret != 0) | |
96129a0e | 582 | goto err; |
96129a0e CK |
583 | } else { |
584 | /* | |
585 | * As this is only called for the internal regulator | |
586 | * (where we know voltage ranges available) it is ok | |
587 | * to request an exact range. | |
588 | */ | |
589 | ret = regulator_set_voltage(arizona->dcvdd, | |
590 | 1200000, 1200000); | |
591 | if (ret < 0) { | |
592 | dev_err(arizona->dev, | |
593 | "Failed to set resume voltage: %d\n", | |
594 | ret); | |
595 | goto err; | |
596 | } | |
597 | } | |
e6cb7341 CK |
598 | |
599 | ret = wm5110_apply_sleep_patch(arizona); | |
600 | if (ret) { | |
601 | dev_err(arizona->dev, | |
602 | "Failed to re-apply sleep patch: %d\n", | |
603 | ret); | |
604 | goto err; | |
605 | } | |
96129a0e | 606 | break; |
ea1f3339 RF |
607 | case WM1831: |
608 | case CS47L24: | |
609 | ret = arizona_wait_for_boot(arizona); | |
610 | if (ret != 0) | |
611 | goto err; | |
612 | break; | |
e80436bb | 613 | default: |
12bb68ed | 614 | ret = arizona_wait_for_boot(arizona); |
3762aede | 615 | if (ret != 0) |
12bb68ed | 616 | goto err; |
12bb68ed | 617 | |
5927467d | 618 | if (arizona->external_dcvdd) { |
e7811147 RF |
619 | ret = arizona_connect_dcvdd(arizona); |
620 | if (ret != 0) | |
5927467d | 621 | goto err; |
5927467d | 622 | } |
e80436bb | 623 | break; |
4c9bb8bc CK |
624 | } |
625 | ||
9270bdf5 MB |
626 | ret = regcache_sync(arizona->regmap); |
627 | if (ret != 0) { | |
628 | dev_err(arizona->dev, "Failed to restore register cache\n"); | |
4816bd1c | 629 | goto err; |
9270bdf5 | 630 | } |
3cc72986 MB |
631 | |
632 | return 0; | |
4816bd1c MB |
633 | |
634 | err: | |
635 | regcache_cache_only(arizona->regmap, true); | |
636 | regulator_disable(arizona->dcvdd); | |
637 | return ret; | |
3cc72986 MB |
638 | } |
639 | ||
640 | static int arizona_runtime_suspend(struct device *dev) | |
641 | { | |
642 | struct arizona *arizona = dev_get_drvdata(dev); | |
a05950a4 | 643 | int jd_active = 0; |
5927467d | 644 | int ret; |
3cc72986 | 645 | |
508c8299 MB |
646 | dev_dbg(arizona->dev, "Entering AoD mode\n"); |
647 | ||
e6cb7341 CK |
648 | switch (arizona->type) { |
649 | case WM5110: | |
650 | case WM8280: | |
e3424273 RF |
651 | jd_active = arizona_is_jack_det_active(arizona); |
652 | if (jd_active < 0) | |
653 | return jd_active; | |
654 | ||
e7811147 RF |
655 | if (arizona->external_dcvdd) { |
656 | ret = arizona_isolate_dcvdd(arizona); | |
657 | if (ret != 0) | |
658 | return ret; | |
659 | } else { | |
660 | /* | |
661 | * As this is only called for the internal regulator | |
662 | * (where we know voltage ranges available) it is ok | |
663 | * to request an exact range. | |
664 | */ | |
665 | ret = regulator_set_voltage(arizona->dcvdd, | |
666 | 1175000, 1175000); | |
667 | if (ret < 0) { | |
668 | dev_err(arizona->dev, | |
669 | "Failed to set suspend voltage: %d\n", | |
670 | ret); | |
671 | return ret; | |
672 | } | |
e6cb7341 CK |
673 | } |
674 | break; | |
675 | case WM5102: | |
e3424273 RF |
676 | jd_active = arizona_is_jack_det_active(arizona); |
677 | if (jd_active < 0) | |
678 | return jd_active; | |
679 | ||
e7811147 RF |
680 | if (arizona->external_dcvdd) { |
681 | ret = arizona_isolate_dcvdd(arizona); | |
682 | if (ret != 0) | |
683 | return ret; | |
684 | } | |
685 | ||
e3424273 | 686 | if (!jd_active) { |
e6cb7341 CK |
687 | ret = regmap_write(arizona->regmap, |
688 | ARIZONA_WRITE_SEQUENCER_CTRL_3, 0x0); | |
689 | if (ret) { | |
96129a0e | 690 | dev_err(arizona->dev, |
e6cb7341 | 691 | "Failed to clear write sequencer: %d\n", |
96129a0e CK |
692 | ret); |
693 | return ret; | |
694 | } | |
96129a0e | 695 | } |
e6cb7341 | 696 | break; |
ea1f3339 RF |
697 | case WM1831: |
698 | case CS47L24: | |
699 | break; | |
e6cb7341 | 700 | default: |
e3424273 RF |
701 | jd_active = arizona_is_jack_det_active(arizona); |
702 | if (jd_active < 0) | |
703 | return jd_active; | |
704 | ||
e7811147 RF |
705 | if (arizona->external_dcvdd) { |
706 | ret = arizona_isolate_dcvdd(arizona); | |
707 | if (ret != 0) | |
708 | return ret; | |
709 | } | |
e6cb7341 | 710 | break; |
5927467d MB |
711 | } |
712 | ||
59db9691 MB |
713 | regcache_cache_only(arizona->regmap, true); |
714 | regcache_mark_dirty(arizona->regmap); | |
e293e847 | 715 | regulator_disable(arizona->dcvdd); |
3cc72986 | 716 | |
e6cb7341 | 717 | /* Allow us to completely power down if no jack detection */ |
e3424273 | 718 | if (!jd_active) { |
e6cb7341 CK |
719 | dev_dbg(arizona->dev, "Fully powering off\n"); |
720 | ||
721 | arizona->has_fully_powered_off = true; | |
722 | ||
11150929 | 723 | disable_irq_nosync(arizona->irq); |
e6cb7341 CK |
724 | arizona_enable_reset(arizona); |
725 | regulator_bulk_disable(arizona->num_core_supplies, | |
726 | arizona->core_supplies); | |
727 | } | |
728 | ||
3cc72986 MB |
729 | return 0; |
730 | } | |
731 | #endif | |
732 | ||
dc781d0e | 733 | #ifdef CONFIG_PM_SLEEP |
67c99296 MB |
734 | static int arizona_suspend(struct device *dev) |
735 | { | |
736 | struct arizona *arizona = dev_get_drvdata(dev); | |
737 | ||
738 | dev_dbg(arizona->dev, "Suspend, disabling IRQ\n"); | |
739 | disable_irq(arizona->irq); | |
740 | ||
741 | return 0; | |
742 | } | |
743 | ||
3612b27c | 744 | static int arizona_suspend_noirq(struct device *dev) |
67c99296 MB |
745 | { |
746 | struct arizona *arizona = dev_get_drvdata(dev); | |
747 | ||
748 | dev_dbg(arizona->dev, "Late suspend, reenabling IRQ\n"); | |
749 | enable_irq(arizona->irq); | |
750 | ||
751 | return 0; | |
752 | } | |
753 | ||
dc781d0e MB |
754 | static int arizona_resume_noirq(struct device *dev) |
755 | { | |
756 | struct arizona *arizona = dev_get_drvdata(dev); | |
757 | ||
758 | dev_dbg(arizona->dev, "Early resume, disabling IRQ\n"); | |
759 | disable_irq(arizona->irq); | |
760 | ||
761 | return 0; | |
762 | } | |
763 | ||
764 | static int arizona_resume(struct device *dev) | |
765 | { | |
766 | struct arizona *arizona = dev_get_drvdata(dev); | |
767 | ||
3612b27c | 768 | dev_dbg(arizona->dev, "Resume, reenabling IRQ\n"); |
dc781d0e MB |
769 | enable_irq(arizona->irq); |
770 | ||
771 | return 0; | |
772 | } | |
773 | #endif | |
774 | ||
3cc72986 MB |
775 | const struct dev_pm_ops arizona_pm_ops = { |
776 | SET_RUNTIME_PM_OPS(arizona_runtime_suspend, | |
777 | arizona_runtime_resume, | |
778 | NULL) | |
67c99296 | 779 | SET_SYSTEM_SLEEP_PM_OPS(arizona_suspend, arizona_resume) |
3612b27c CK |
780 | SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(arizona_suspend_noirq, |
781 | arizona_resume_noirq) | |
3cc72986 MB |
782 | }; |
783 | EXPORT_SYMBOL_GPL(arizona_pm_ops); | |
784 | ||
d781009c | 785 | #ifdef CONFIG_OF |
942786e6 | 786 | unsigned long arizona_of_get_type(struct device *dev) |
d781009c MB |
787 | { |
788 | const struct of_device_id *id = of_match_device(arizona_of_match, dev); | |
789 | ||
790 | if (id) | |
942786e6 | 791 | return (unsigned long)id->data; |
d781009c MB |
792 | else |
793 | return 0; | |
794 | } | |
795 | EXPORT_SYMBOL_GPL(arizona_of_get_type); | |
796 | ||
797 | static int arizona_of_get_core_pdata(struct arizona *arizona) | |
798 | { | |
e4fcb1d6 | 799 | struct arizona_pdata *pdata = &arizona->pdata; |
d781009c MB |
800 | int ret, i; |
801 | ||
1961531d | 802 | pdata->reset = of_get_named_gpio(arizona->dev->of_node, "wlf,reset", 0); |
b8d336ed CK |
803 | if (pdata->reset == -EPROBE_DEFER) { |
804 | return pdata->reset; | |
805 | } else if (pdata->reset < 0) { | |
1961531d CK |
806 | dev_err(arizona->dev, "Reset GPIO missing/malformed: %d\n", |
807 | pdata->reset); | |
808 | ||
809 | pdata->reset = 0; | |
810 | } | |
d781009c MB |
811 | |
812 | ret = of_property_read_u32_array(arizona->dev->of_node, | |
813 | "wlf,gpio-defaults", | |
3762aede CK |
814 | pdata->gpio_defaults, |
815 | ARRAY_SIZE(pdata->gpio_defaults)); | |
d781009c MB |
816 | if (ret >= 0) { |
817 | /* | |
818 | * All values are literal except out of range values | |
819 | * which are chip default, translate into platform | |
820 | * data which uses 0 as chip default and out of range | |
821 | * as zero. | |
822 | */ | |
3762aede CK |
823 | for (i = 0; i < ARRAY_SIZE(pdata->gpio_defaults); i++) { |
824 | if (pdata->gpio_defaults[i] > 0xffff) | |
825 | pdata->gpio_defaults[i] = 0; | |
826 | else if (pdata->gpio_defaults[i] == 0) | |
827 | pdata->gpio_defaults[i] = 0x10000; | |
d781009c MB |
828 | } |
829 | } else { | |
830 | dev_err(arizona->dev, "Failed to parse GPIO defaults: %d\n", | |
831 | ret); | |
832 | } | |
833 | ||
834 | return 0; | |
835 | } | |
836 | ||
837 | const struct of_device_id arizona_of_match[] = { | |
838 | { .compatible = "wlf,wm5102", .data = (void *)WM5102 }, | |
839 | { .compatible = "wlf,wm5110", .data = (void *)WM5110 }, | |
e5d4ef0d | 840 | { .compatible = "wlf,wm8280", .data = (void *)WM8280 }, |
dc7d4863 | 841 | { .compatible = "wlf,wm8997", .data = (void *)WM8997 }, |
6887b042 RF |
842 | { .compatible = "wlf,wm8998", .data = (void *)WM8998 }, |
843 | { .compatible = "wlf,wm1814", .data = (void *)WM1814 }, | |
ea1f3339 RF |
844 | { .compatible = "wlf,wm1831", .data = (void *)WM1831 }, |
845 | { .compatible = "cirrus,cs47l24", .data = (void *)CS47L24 }, | |
d781009c MB |
846 | {}, |
847 | }; | |
848 | EXPORT_SYMBOL_GPL(arizona_of_match); | |
849 | #else | |
850 | static inline int arizona_of_get_core_pdata(struct arizona *arizona) | |
851 | { | |
852 | return 0; | |
853 | } | |
854 | #endif | |
855 | ||
5ac98553 | 856 | static const struct mfd_cell early_devs[] = { |
3cc72986 MB |
857 | { .name = "arizona-ldo1" }, |
858 | }; | |
859 | ||
3762aede | 860 | static const char * const wm5102_supplies[] = { |
5fc6c396 | 861 | "MICVDD", |
32dadef2 CK |
862 | "DBVDD2", |
863 | "DBVDD3", | |
864 | "CPVDD", | |
865 | "SPKVDDL", | |
866 | "SPKVDDR", | |
867 | }; | |
868 | ||
5ac98553 | 869 | static const struct mfd_cell wm5102_devs[] = { |
d7768111 | 870 | { .name = "arizona-micsupp" }, |
f83c218c | 871 | { .name = "arizona-gpio" }, |
5fc6c396 CK |
872 | { |
873 | .name = "arizona-extcon", | |
874 | .parent_supplies = wm5102_supplies, | |
875 | .num_parent_supplies = 1, /* We only need MICVDD */ | |
876 | }, | |
503b1cac | 877 | { .name = "arizona-haptics" }, |
3cc72986 | 878 | { .name = "arizona-pwm" }, |
32dadef2 CK |
879 | { |
880 | .name = "wm5102-codec", | |
881 | .parent_supplies = wm5102_supplies, | |
882 | .num_parent_supplies = ARRAY_SIZE(wm5102_supplies), | |
883 | }, | |
3cc72986 MB |
884 | }; |
885 | ||
5ac98553 | 886 | static const struct mfd_cell wm5110_devs[] = { |
d7768111 | 887 | { .name = "arizona-micsupp" }, |
f83c218c | 888 | { .name = "arizona-gpio" }, |
5fc6c396 CK |
889 | { |
890 | .name = "arizona-extcon", | |
891 | .parent_supplies = wm5102_supplies, | |
892 | .num_parent_supplies = 1, /* We only need MICVDD */ | |
893 | }, | |
503b1cac | 894 | { .name = "arizona-haptics" }, |
e102befe | 895 | { .name = "arizona-pwm" }, |
32dadef2 CK |
896 | { |
897 | .name = "wm5110-codec", | |
898 | .parent_supplies = wm5102_supplies, | |
899 | .num_parent_supplies = ARRAY_SIZE(wm5102_supplies), | |
900 | }, | |
901 | }; | |
902 | ||
ea1f3339 RF |
903 | static const char * const cs47l24_supplies[] = { |
904 | "MICVDD", | |
905 | "CPVDD", | |
906 | "SPKVDD", | |
907 | }; | |
908 | ||
909 | static const struct mfd_cell cs47l24_devs[] = { | |
910 | { .name = "arizona-gpio" }, | |
911 | { .name = "arizona-haptics" }, | |
912 | { .name = "arizona-pwm" }, | |
913 | { | |
914 | .name = "cs47l24-codec", | |
915 | .parent_supplies = cs47l24_supplies, | |
916 | .num_parent_supplies = ARRAY_SIZE(cs47l24_supplies), | |
917 | }, | |
918 | }; | |
919 | ||
3762aede | 920 | static const char * const wm8997_supplies[] = { |
996c2d4f | 921 | "MICVDD", |
32dadef2 CK |
922 | "DBVDD2", |
923 | "CPVDD", | |
924 | "SPKVDD", | |
e102befe MB |
925 | }; |
926 | ||
5ac98553 | 927 | static const struct mfd_cell wm8997_devs[] = { |
dc7d4863 | 928 | { .name = "arizona-micsupp" }, |
f83c218c | 929 | { .name = "arizona-gpio" }, |
5fc6c396 CK |
930 | { |
931 | .name = "arizona-extcon", | |
932 | .parent_supplies = wm8997_supplies, | |
933 | .num_parent_supplies = 1, /* We only need MICVDD */ | |
934 | }, | |
dc7d4863 CK |
935 | { .name = "arizona-haptics" }, |
936 | { .name = "arizona-pwm" }, | |
32dadef2 CK |
937 | { |
938 | .name = "wm8997-codec", | |
939 | .parent_supplies = wm8997_supplies, | |
940 | .num_parent_supplies = ARRAY_SIZE(wm8997_supplies), | |
941 | }, | |
dc7d4863 CK |
942 | }; |
943 | ||
6887b042 | 944 | static const struct mfd_cell wm8998_devs[] = { |
f83c218c CK |
945 | { .name = "arizona-micsupp" }, |
946 | { .name = "arizona-gpio" }, | |
6887b042 RF |
947 | { |
948 | .name = "arizona-extcon", | |
949 | .parent_supplies = wm5102_supplies, | |
950 | .num_parent_supplies = 1, /* We only need MICVDD */ | |
951 | }, | |
6887b042 RF |
952 | { .name = "arizona-haptics" }, |
953 | { .name = "arizona-pwm" }, | |
954 | { | |
955 | .name = "wm8998-codec", | |
956 | .parent_supplies = wm5102_supplies, | |
957 | .num_parent_supplies = ARRAY_SIZE(wm5102_supplies), | |
958 | }, | |
6887b042 RF |
959 | }; |
960 | ||
f791be49 | 961 | int arizona_dev_init(struct arizona *arizona) |
3cc72986 | 962 | { |
cdd8da8c | 963 | const char * const mclk_name[] = { "mclk1", "mclk2" }; |
3cc72986 | 964 | struct device *dev = arizona->dev; |
ea1f3339 | 965 | const char *type_name = NULL; |
6000c99e | 966 | unsigned int reg, val; |
62d62b59 | 967 | int (*apply_patch)(struct arizona *) = NULL; |
ae05ea36 RF |
968 | const struct mfd_cell *subdevs = NULL; |
969 | int n_subdevs, ret, i; | |
3cc72986 MB |
970 | |
971 | dev_set_drvdata(arizona->dev, arizona); | |
972 | mutex_init(&arizona->clk_lock); | |
973 | ||
b8d336ed | 974 | if (dev_get_platdata(arizona->dev)) { |
3cc72986 MB |
975 | memcpy(&arizona->pdata, dev_get_platdata(arizona->dev), |
976 | sizeof(arizona->pdata)); | |
b8d336ed CK |
977 | } else { |
978 | ret = arizona_of_get_core_pdata(arizona); | |
979 | if (ret < 0) | |
980 | return ret; | |
981 | } | |
3cc72986 | 982 | |
cdd8da8c SN |
983 | BUILD_BUG_ON(ARRAY_SIZE(arizona->mclk) != ARRAY_SIZE(mclk_name)); |
984 | for (i = 0; i < ARRAY_SIZE(arizona->mclk); i++) { | |
985 | arizona->mclk[i] = devm_clk_get(arizona->dev, mclk_name[i]); | |
986 | if (IS_ERR(arizona->mclk[i])) { | |
987 | dev_info(arizona->dev, "Failed to get %s: %ld\n", | |
988 | mclk_name[i], PTR_ERR(arizona->mclk[i])); | |
989 | arizona->mclk[i] = NULL; | |
990 | } | |
991 | } | |
992 | ||
3cc72986 MB |
993 | regcache_cache_only(arizona->regmap, true); |
994 | ||
995 | switch (arizona->type) { | |
996 | case WM5102: | |
e102befe | 997 | case WM5110: |
e5d4ef0d | 998 | case WM8280: |
dc7d4863 | 999 | case WM8997: |
6887b042 RF |
1000 | case WM8998: |
1001 | case WM1814: | |
ea1f3339 RF |
1002 | case WM1831: |
1003 | case CS47L24: | |
3cc72986 MB |
1004 | for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++) |
1005 | arizona->core_supplies[i].supply | |
1006 | = wm5102_core_supplies[i]; | |
1007 | arizona->num_core_supplies = ARRAY_SIZE(wm5102_core_supplies); | |
1008 | break; | |
1009 | default: | |
1010 | dev_err(arizona->dev, "Unknown device type %d\n", | |
1011 | arizona->type); | |
75d8a2b0 | 1012 | return -ENODEV; |
3cc72986 MB |
1013 | } |
1014 | ||
4a8c475f CK |
1015 | /* Mark DCVDD as external, LDO1 driver will clear if internal */ |
1016 | arizona->external_dcvdd = true; | |
1017 | ||
ea1f3339 RF |
1018 | switch (arizona->type) { |
1019 | case WM1831: | |
1020 | case CS47L24: | |
1021 | break; /* No LDO1 regulator */ | |
1022 | default: | |
1023 | ret = mfd_add_devices(arizona->dev, -1, early_devs, | |
1024 | ARRAY_SIZE(early_devs), NULL, 0, NULL); | |
1025 | if (ret != 0) { | |
1026 | dev_err(dev, "Failed to add early children: %d\n", ret); | |
1027 | return ret; | |
1028 | } | |
1029 | break; | |
3cc72986 MB |
1030 | } |
1031 | ||
1032 | ret = devm_regulator_bulk_get(dev, arizona->num_core_supplies, | |
1033 | arizona->core_supplies); | |
1034 | if (ret != 0) { | |
1035 | dev_err(dev, "Failed to request core supplies: %d\n", | |
1036 | ret); | |
1037 | goto err_early; | |
1038 | } | |
1039 | ||
0c2d0ffb CK |
1040 | /** |
1041 | * Don't use devres here because the only device we have to get | |
1042 | * against is the MFD device and DCVDD will likely be supplied by | |
1043 | * one of its children. Meaning that the regulator will be | |
1044 | * destroyed by the time devres calls regulator put. | |
1045 | */ | |
e6021511 | 1046 | arizona->dcvdd = regulator_get(arizona->dev, "DCVDD"); |
59db9691 MB |
1047 | if (IS_ERR(arizona->dcvdd)) { |
1048 | ret = PTR_ERR(arizona->dcvdd); | |
1049 | dev_err(dev, "Failed to request DCVDD: %d\n", ret); | |
1050 | goto err_early; | |
1051 | } | |
1052 | ||
87d3af4a MB |
1053 | if (arizona->pdata.reset) { |
1054 | /* Start out with /RESET low to put the chip into reset */ | |
5f056bf0 CK |
1055 | ret = devm_gpio_request_one(arizona->dev, arizona->pdata.reset, |
1056 | GPIOF_DIR_OUT | GPIOF_INIT_LOW, | |
1057 | "arizona /RESET"); | |
87d3af4a MB |
1058 | if (ret != 0) { |
1059 | dev_err(dev, "Failed to request /RESET: %d\n", ret); | |
e6021511 | 1060 | goto err_dcvdd; |
87d3af4a MB |
1061 | } |
1062 | } | |
1063 | ||
3cc72986 MB |
1064 | ret = regulator_bulk_enable(arizona->num_core_supplies, |
1065 | arizona->core_supplies); | |
1066 | if (ret != 0) { | |
1067 | dev_err(dev, "Failed to enable core supplies: %d\n", | |
1068 | ret); | |
e6021511 | 1069 | goto err_dcvdd; |
3cc72986 MB |
1070 | } |
1071 | ||
59db9691 MB |
1072 | ret = regulator_enable(arizona->dcvdd); |
1073 | if (ret != 0) { | |
1074 | dev_err(dev, "Failed to enable DCVDD: %d\n", ret); | |
1075 | goto err_enable; | |
1076 | } | |
1077 | ||
2229875d | 1078 | arizona_disable_reset(arizona); |
3cc72986 | 1079 | |
3cc72986 MB |
1080 | regcache_cache_only(arizona->regmap, false); |
1081 | ||
ca76ceb8 | 1082 | /* Verify that this is a chip we know about */ |
3cc72986 MB |
1083 | ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, ®); |
1084 | if (ret != 0) { | |
1085 | dev_err(dev, "Failed to read ID register: %d\n", ret); | |
59db9691 | 1086 | goto err_reset; |
3cc72986 MB |
1087 | } |
1088 | ||
3cc72986 MB |
1089 | switch (reg) { |
1090 | case 0x5102: | |
e102befe | 1091 | case 0x5110: |
6887b042 | 1092 | case 0x6349: |
ea1f3339 | 1093 | case 0x6363: |
dc7d4863 | 1094 | case 0x8997: |
e102befe | 1095 | break; |
3cc72986 | 1096 | default: |
ca76ceb8 | 1097 | dev_err(arizona->dev, "Unknown device ID: %x\n", reg); |
75d8a2b0 | 1098 | ret = -ENODEV; |
59db9691 | 1099 | goto err_reset; |
3cc72986 MB |
1100 | } |
1101 | ||
3cc72986 MB |
1102 | /* If we have a /RESET GPIO we'll already be reset */ |
1103 | if (!arizona->pdata.reset) { | |
1104 | ret = regmap_write(arizona->regmap, ARIZONA_SOFTWARE_RESET, 0); | |
1105 | if (ret != 0) { | |
1106 | dev_err(dev, "Failed to reset device: %d\n", ret); | |
59db9691 | 1107 | goto err_reset; |
3cc72986 | 1108 | } |
46b9d13a | 1109 | |
b79a980f | 1110 | usleep_range(1000, 5000); |
3cc72986 MB |
1111 | } |
1112 | ||
ca76ceb8 | 1113 | /* Ensure device startup is complete */ |
d955cba8 CK |
1114 | switch (arizona->type) { |
1115 | case WM5102: | |
48018943 MB |
1116 | ret = regmap_read(arizona->regmap, |
1117 | ARIZONA_WRITE_SEQUENCER_CTRL_3, &val); | |
1c1c6bba | 1118 | if (ret) { |
d955cba8 CK |
1119 | dev_err(dev, |
1120 | "Failed to check write sequencer state: %d\n", | |
1121 | ret); | |
1c1c6bba CK |
1122 | } else if (val & 0x01) { |
1123 | ret = wm5102_clear_write_sequencer(arizona); | |
1124 | if (ret) | |
1125 | return ret; | |
d955cba8 CK |
1126 | } |
1127 | break; | |
1c1c6bba CK |
1128 | default: |
1129 | break; | |
1130 | } | |
1131 | ||
1132 | ret = arizona_wait_for_boot(arizona); | |
1133 | if (ret) { | |
1134 | dev_err(arizona->dev, "Device failed initial boot: %d\n", ret); | |
1135 | goto err_reset; | |
af65a361 | 1136 | } |
3cc72986 | 1137 | |
ca76ceb8 MB |
1138 | /* Read the device ID information & do device specific stuff */ |
1139 | ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, ®); | |
1140 | if (ret != 0) { | |
1141 | dev_err(dev, "Failed to read ID register: %d\n", ret); | |
1142 | goto err_reset; | |
1143 | } | |
1144 | ||
1145 | ret = regmap_read(arizona->regmap, ARIZONA_DEVICE_REVISION, | |
1146 | &arizona->rev); | |
1147 | if (ret != 0) { | |
1148 | dev_err(dev, "Failed to read revision register: %d\n", ret); | |
1149 | goto err_reset; | |
1150 | } | |
1151 | arizona->rev &= ARIZONA_DEVICE_REVISION_MASK; | |
1152 | ||
1153 | switch (reg) { | |
ca76ceb8 | 1154 | case 0x5102: |
b61c1ec0 RF |
1155 | if (IS_ENABLED(CONFIG_MFD_WM5102)) { |
1156 | type_name = "WM5102"; | |
1157 | if (arizona->type != WM5102) { | |
1158 | dev_warn(arizona->dev, | |
1159 | "WM5102 registered as %d\n", | |
1160 | arizona->type); | |
1161 | arizona->type = WM5102; | |
1162 | } | |
1163 | ||
1164 | apply_patch = wm5102_patch; | |
1165 | arizona->rev &= 0x7; | |
1166 | subdevs = wm5102_devs; | |
1167 | n_subdevs = ARRAY_SIZE(wm5102_devs); | |
ca76ceb8 | 1168 | } |
ca76ceb8 | 1169 | break; |
ca76ceb8 | 1170 | case 0x5110: |
b61c1ec0 RF |
1171 | if (IS_ENABLED(CONFIG_MFD_WM5110)) { |
1172 | switch (arizona->type) { | |
1173 | case WM5110: | |
1174 | type_name = "WM5110"; | |
1175 | break; | |
1176 | case WM8280: | |
1177 | type_name = "WM8280"; | |
1178 | break; | |
1179 | default: | |
1180 | type_name = "WM5110"; | |
1181 | dev_warn(arizona->dev, | |
1182 | "WM5110 registered as %d\n", | |
1183 | arizona->type); | |
1184 | arizona->type = WM5110; | |
1185 | break; | |
1186 | } | |
1187 | ||
1188 | apply_patch = wm5110_patch; | |
1189 | subdevs = wm5110_devs; | |
1190 | n_subdevs = ARRAY_SIZE(wm5110_devs); | |
ca76ceb8 | 1191 | } |
ca76ceb8 | 1192 | break; |
ea1f3339 RF |
1193 | case 0x6363: |
1194 | if (IS_ENABLED(CONFIG_MFD_CS47L24)) { | |
1195 | switch (arizona->type) { | |
1196 | case CS47L24: | |
1197 | type_name = "CS47L24"; | |
1198 | break; | |
1199 | ||
1200 | case WM1831: | |
1201 | type_name = "WM1831"; | |
1202 | break; | |
1203 | ||
1204 | default: | |
1205 | dev_warn(arizona->dev, | |
1206 | "CS47L24 registered as %d\n", | |
1207 | arizona->type); | |
1208 | arizona->type = CS47L24; | |
1209 | break; | |
1210 | } | |
1211 | ||
1212 | apply_patch = cs47l24_patch; | |
1213 | subdevs = cs47l24_devs; | |
1214 | n_subdevs = ARRAY_SIZE(cs47l24_devs); | |
1215 | } | |
1216 | break; | |
dc7d4863 | 1217 | case 0x8997: |
b61c1ec0 RF |
1218 | if (IS_ENABLED(CONFIG_MFD_WM8997)) { |
1219 | type_name = "WM8997"; | |
1220 | if (arizona->type != WM8997) { | |
1221 | dev_warn(arizona->dev, | |
1222 | "WM8997 registered as %d\n", | |
1223 | arizona->type); | |
1224 | arizona->type = WM8997; | |
1225 | } | |
1226 | ||
1227 | apply_patch = wm8997_patch; | |
1228 | subdevs = wm8997_devs; | |
1229 | n_subdevs = ARRAY_SIZE(wm8997_devs); | |
dc7d4863 | 1230 | } |
dc7d4863 | 1231 | break; |
6887b042 | 1232 | case 0x6349: |
b61c1ec0 RF |
1233 | if (IS_ENABLED(CONFIG_MFD_WM8998)) { |
1234 | switch (arizona->type) { | |
1235 | case WM8998: | |
1236 | type_name = "WM8998"; | |
1237 | break; | |
1238 | ||
1239 | case WM1814: | |
1240 | type_name = "WM1814"; | |
1241 | break; | |
1242 | ||
1243 | default: | |
1244 | type_name = "WM8998"; | |
1245 | dev_warn(arizona->dev, | |
1246 | "WM8998 registered as %d\n", | |
1247 | arizona->type); | |
1248 | arizona->type = WM8998; | |
1249 | } | |
6887b042 | 1250 | |
b61c1ec0 RF |
1251 | apply_patch = wm8998_patch; |
1252 | subdevs = wm8998_devs; | |
1253 | n_subdevs = ARRAY_SIZE(wm8998_devs); | |
6887b042 | 1254 | } |
6887b042 | 1255 | break; |
ca76ceb8 MB |
1256 | default: |
1257 | dev_err(arizona->dev, "Unknown device ID %x\n", reg); | |
75d8a2b0 | 1258 | ret = -ENODEV; |
ca76ceb8 MB |
1259 | goto err_reset; |
1260 | } | |
1261 | ||
b61c1ec0 RF |
1262 | if (!subdevs) { |
1263 | dev_err(arizona->dev, | |
1264 | "No kernel support for device ID %x\n", reg); | |
75d8a2b0 | 1265 | ret = -ENODEV; |
b61c1ec0 RF |
1266 | goto err_reset; |
1267 | } | |
1268 | ||
ca76ceb8 MB |
1269 | dev_info(dev, "%s revision %c\n", type_name, arizona->rev + 'A'); |
1270 | ||
62d62b59 MB |
1271 | if (apply_patch) { |
1272 | ret = apply_patch(arizona); | |
1273 | if (ret != 0) { | |
1274 | dev_err(arizona->dev, "Failed to apply patch: %d\n", | |
1275 | ret); | |
1276 | goto err_reset; | |
1277 | } | |
e80436bb CK |
1278 | |
1279 | switch (arizona->type) { | |
1280 | case WM5102: | |
0be068a0 CK |
1281 | ret = wm5102_apply_hardware_patch(arizona); |
1282 | if (ret) { | |
e80436bb CK |
1283 | dev_err(arizona->dev, |
1284 | "Failed to apply hardware patch: %d\n", | |
1285 | ret); | |
1286 | goto err_reset; | |
1287 | } | |
1288 | break; | |
882bc468 CK |
1289 | case WM5110: |
1290 | case WM8280: | |
1291 | ret = wm5110_apply_sleep_patch(arizona); | |
1292 | if (ret) { | |
1293 | dev_err(arizona->dev, | |
1294 | "Failed to apply sleep patch: %d\n", | |
1295 | ret); | |
1296 | goto err_reset; | |
1297 | } | |
1298 | break; | |
e80436bb CK |
1299 | default: |
1300 | break; | |
1301 | } | |
62d62b59 MB |
1302 | } |
1303 | ||
3cc72986 MB |
1304 | for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) { |
1305 | if (!arizona->pdata.gpio_defaults[i]) | |
1306 | continue; | |
1307 | ||
1308 | regmap_write(arizona->regmap, ARIZONA_GPIO1_CTRL + i, | |
1309 | arizona->pdata.gpio_defaults[i]); | |
1310 | } | |
1311 | ||
3cc72986 MB |
1312 | /* Chip default */ |
1313 | if (!arizona->pdata.clk32k_src) | |
1314 | arizona->pdata.clk32k_src = ARIZONA_32KZ_MCLK2; | |
1315 | ||
1316 | switch (arizona->pdata.clk32k_src) { | |
1317 | case ARIZONA_32KZ_MCLK1: | |
1318 | case ARIZONA_32KZ_MCLK2: | |
1319 | regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, | |
1320 | ARIZONA_CLK_32K_SRC_MASK, | |
1321 | arizona->pdata.clk32k_src - 1); | |
767c6dc0 | 1322 | arizona_clk32k_enable(arizona); |
3cc72986 MB |
1323 | break; |
1324 | case ARIZONA_32KZ_NONE: | |
1325 | regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, | |
1326 | ARIZONA_CLK_32K_SRC_MASK, 2); | |
1327 | break; | |
1328 | default: | |
1329 | dev_err(arizona->dev, "Invalid 32kHz clock source: %d\n", | |
1330 | arizona->pdata.clk32k_src); | |
1331 | ret = -EINVAL; | |
59db9691 | 1332 | goto err_reset; |
3cc72986 MB |
1333 | } |
1334 | ||
3d91f828 | 1335 | for (i = 0; i < ARIZONA_MAX_MICBIAS; i++) { |
544c7aad MB |
1336 | if (!arizona->pdata.micbias[i].mV && |
1337 | !arizona->pdata.micbias[i].bypass) | |
3d91f828 MB |
1338 | continue; |
1339 | ||
544c7aad MB |
1340 | /* Apply default for bypass mode */ |
1341 | if (!arizona->pdata.micbias[i].mV) | |
1342 | arizona->pdata.micbias[i].mV = 2800; | |
1343 | ||
3d91f828 | 1344 | val = (arizona->pdata.micbias[i].mV - 1500) / 100; |
544c7aad | 1345 | |
3d91f828 MB |
1346 | val <<= ARIZONA_MICB1_LVL_SHIFT; |
1347 | ||
1348 | if (arizona->pdata.micbias[i].ext_cap) | |
1349 | val |= ARIZONA_MICB1_EXT_CAP; | |
1350 | ||
1351 | if (arizona->pdata.micbias[i].discharge) | |
1352 | val |= ARIZONA_MICB1_DISCH; | |
1353 | ||
f773fc6d | 1354 | if (arizona->pdata.micbias[i].soft_start) |
3d91f828 MB |
1355 | val |= ARIZONA_MICB1_RATE; |
1356 | ||
544c7aad MB |
1357 | if (arizona->pdata.micbias[i].bypass) |
1358 | val |= ARIZONA_MICB1_BYPASS; | |
1359 | ||
3d91f828 MB |
1360 | regmap_update_bits(arizona->regmap, |
1361 | ARIZONA_MIC_BIAS_CTRL_1 + i, | |
1362 | ARIZONA_MICB1_LVL_MASK | | |
71d134b9 | 1363 | ARIZONA_MICB1_EXT_CAP | |
3d91f828 | 1364 | ARIZONA_MICB1_DISCH | |
544c7aad | 1365 | ARIZONA_MICB1_BYPASS | |
3d91f828 MB |
1366 | ARIZONA_MICB1_RATE, val); |
1367 | } | |
1368 | ||
72e43164 CK |
1369 | pm_runtime_set_active(arizona->dev); |
1370 | pm_runtime_enable(arizona->dev); | |
1371 | ||
3cc72986 MB |
1372 | /* Set up for interrupts */ |
1373 | ret = arizona_irq_init(arizona); | |
1374 | if (ret != 0) | |
d347792c | 1375 | goto err_pm; |
3cc72986 | 1376 | |
72e43164 CK |
1377 | pm_runtime_set_autosuspend_delay(arizona->dev, 100); |
1378 | pm_runtime_use_autosuspend(arizona->dev); | |
1379 | ||
3cc72986 MB |
1380 | arizona_request_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, "CLKGEN error", |
1381 | arizona_clkgen_err, arizona); | |
1382 | arizona_request_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, "Overclocked", | |
1383 | arizona_overclocked, arizona); | |
1384 | arizona_request_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, "Underclocked", | |
1385 | arizona_underclocked, arizona); | |
1386 | ||
ae05ea36 RF |
1387 | ret = mfd_add_devices(arizona->dev, PLATFORM_DEVID_NONE, |
1388 | subdevs, n_subdevs, NULL, 0, NULL); | |
3cc72986 | 1389 | |
ae05ea36 | 1390 | if (ret) { |
3cc72986 MB |
1391 | dev_err(arizona->dev, "Failed to add subdevices: %d\n", ret); |
1392 | goto err_irq; | |
1393 | } | |
1394 | ||
1395 | return 0; | |
1396 | ||
1397 | err_irq: | |
1398 | arizona_irq_exit(arizona); | |
d347792c CK |
1399 | err_pm: |
1400 | pm_runtime_disable(arizona->dev); | |
3cc72986 | 1401 | err_reset: |
2229875d | 1402 | arizona_enable_reset(arizona); |
59db9691 | 1403 | regulator_disable(arizona->dcvdd); |
3cc72986 | 1404 | err_enable: |
3a36a0db | 1405 | regulator_bulk_disable(arizona->num_core_supplies, |
3cc72986 | 1406 | arizona->core_supplies); |
e6021511 CK |
1407 | err_dcvdd: |
1408 | regulator_put(arizona->dcvdd); | |
3cc72986 MB |
1409 | err_early: |
1410 | mfd_remove_devices(dev); | |
1411 | return ret; | |
1412 | } | |
1413 | EXPORT_SYMBOL_GPL(arizona_dev_init); | |
1414 | ||
4740f73f | 1415 | int arizona_dev_exit(struct arizona *arizona) |
3cc72986 | 1416 | { |
fb36f77e | 1417 | disable_irq(arizona->irq); |
b804020a CK |
1418 | pm_runtime_disable(arizona->dev); |
1419 | ||
df6b3352 | 1420 | regulator_disable(arizona->dcvdd); |
e6021511 | 1421 | regulator_put(arizona->dcvdd); |
df6b3352 | 1422 | |
3cc72986 MB |
1423 | mfd_remove_devices(arizona->dev); |
1424 | arizona_free_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, arizona); | |
1425 | arizona_free_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, arizona); | |
1426 | arizona_free_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, arizona); | |
3cc72986 | 1427 | arizona_irq_exit(arizona); |
2229875d | 1428 | arizona_enable_reset(arizona); |
df6b3352 | 1429 | |
4420286e | 1430 | regulator_bulk_disable(arizona->num_core_supplies, |
1d017b6b | 1431 | arizona->core_supplies); |
3cc72986 MB |
1432 | return 0; |
1433 | } | |
1434 | EXPORT_SYMBOL_GPL(arizona_dev_exit); |