[linux.git] / drivers / reset / reset-a10sr.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 *  Copyright Intel Corporation (C) 2017. All Rights Reserved
 *
 * Reset driver for Altera Arria10 MAX5 System Resource Chip
 *
 * Adapted from reset-socfpga.c
 */

#include <linux/err.h>
#include <linux/mfd/altera-a10sr.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/reset-controller.h>

#include <dt-bindings/reset/altr,rst-mgr-a10sr.h>

struct a10sr_reset {
	struct reset_controller_dev     rcdev;
	struct regmap *regmap;
};

static inline struct a10sr_reset *to_a10sr_rst(struct reset_controller_dev *rc)
{
	return container_of(rc, struct a10sr_reset, rcdev);
}

static inline int a10sr_reset_shift(unsigned long id)
{
	switch (id) {
	case A10SR_RESET_ENET_HPS:
		return 1;
	case A10SR_RESET_PCIE:
	case A10SR_RESET_FILE:
	case A10SR_RESET_BQSPI:
	case A10SR_RESET_USB:
		return id + 11;
	default:
		return -EINVAL;
	}
}

static int a10sr_reset_update(struct reset_controller_dev *rcdev,
			      unsigned long id, bool assert)
{
	struct a10sr_reset *a10r = to_a10sr_rst(rcdev);
	int offset = a10sr_reset_shift(id);
	u8 mask = ALTR_A10SR_REG_BIT_MASK(offset);
	int index = ALTR_A10SR_HPS_RST_REG + ALTR_A10SR_REG_OFFSET(offset);

	return regmap_update_bits(a10r->regmap, index, mask, assert ? 0 : mask);
}

static int a10sr_reset_assert(struct reset_controller_dev *rcdev,
			      unsigned long id)
{
	return a10sr_reset_update(rcdev, id, true);
}

static int a10sr_reset_deassert(struct reset_controller_dev *rcdev,
				unsigned long id)
{
	return a10sr_reset_update(rcdev, id, false);
}

static int a10sr_reset_status(struct reset_controller_dev *rcdev,
			      unsigned long id)
{
	int ret;
	struct a10sr_reset *a10r = to_a10sr_rst(rcdev);
	int offset = a10sr_reset_shift(id);
	u8 mask = ALTR_A10SR_REG_BIT_MASK(offset);
	int index = ALTR_A10SR_HPS_RST_REG + ALTR_A10SR_REG_OFFSET(offset);
	unsigned int value;

	ret = regmap_read(a10r->regmap, index, &value);
	if (ret < 0)
		return ret;

	return !!(value & mask);
}

static const struct reset_control_ops a10sr_reset_ops = {
	.assert		= a10sr_reset_assert,
	.deassert	= a10sr_reset_deassert,
	.status		= a10sr_reset_status,
};

static int a10sr_reset_probe(struct platform_device *pdev)
{
	struct altr_a10sr *a10sr = dev_get_drvdata(pdev->dev.parent);
	struct a10sr_reset *a10r;

	a10r = devm_kzalloc(&pdev->dev, sizeof(struct a10sr_reset),
			    GFP_KERNEL);
	if (!a10r)
		return -ENOMEM;

	a10r->rcdev.owner = THIS_MODULE;
	a10r->rcdev.nr_resets = A10SR_RESET_NUM;
	a10r->rcdev.ops = &a10sr_reset_ops;
	a10r->rcdev.of_node = pdev->dev.of_node;
	a10r->regmap = a10sr->regmap;

	platform_set_drvdata(pdev, a10r);

	return devm_reset_controller_register(&pdev->dev, &a10r->rcdev);
}

static const struct of_device_id a10sr_reset_of_match[] = {
	{ .compatible = "altr,a10sr-reset" },
	{ },
};
MODULE_DEVICE_TABLE(of, a10sr_reset_of_match);

static struct platform_driver a10sr_reset_driver = {
	.probe	= a10sr_reset_probe,
	.driver = {
		.name		= "altr_a10sr_reset",
		.of_match_table	= a10sr_reset_of_match,
	},
};
module_platform_driver(a10sr_reset_driver);

MODULE_AUTHOR("Thor Thayer <[email protected]>");
MODULE_DESCRIPTION("Altera Arria10 System Resource Reset Controller Driver");
MODULE_LICENSE("GPL v2");
Commit	Line	Data
9952f691	1	// SPDX-License-Identifier: GPL-2.0-only
62700682 TT	2	/*
	3	* Copyright Intel Corporation (C) 2017. All Rights Reserved
	4	*
62700682 TT	5	* Reset driver for Altera Arria10 MAX5 System Resource Chip
	6	*
	7	* Adapted from reset-socfpga.c
	8	*/
	9
	10	#include <linux/err.h>
	11	#include <linux/mfd/altera-a10sr.h>
	12	#include <linux/module.h>
	13	#include <linux/of.h>
	14	#include <linux/platform_device.h>
	15	#include <linux/reset-controller.h>
	16
	17	#include <dt-bindings/reset/altr,rst-mgr-a10sr.h>
	18
	19	struct a10sr_reset {
	20	struct reset_controller_dev rcdev;
	21	struct regmap *regmap;
	22	};
	23
	24	static inline struct a10sr_reset to_a10sr_rst(struct reset_controller_dev rc)
	25	{
	26	return container_of(rc, struct a10sr_reset, rcdev);
	27	}
	28
	29	static inline int a10sr_reset_shift(unsigned long id)
	30	{
	31	switch (id) {
	32	case A10SR_RESET_ENET_HPS:
	33	return 1;
	34	case A10SR_RESET_PCIE:
	35	case A10SR_RESET_FILE:
	36	case A10SR_RESET_BQSPI:
	37	case A10SR_RESET_USB:
	38	return id + 11;
	39	default:
	40	return -EINVAL;
	41	}
	42	}
	43
	44	static int a10sr_reset_update(struct reset_controller_dev *rcdev,
	45	unsigned long id, bool assert)
	46	{
	47	struct a10sr_reset *a10r = to_a10sr_rst(rcdev);
	48	int offset = a10sr_reset_shift(id);
	49	u8 mask = ALTR_A10SR_REG_BIT_MASK(offset);
	50	int index = ALTR_A10SR_HPS_RST_REG + ALTR_A10SR_REG_OFFSET(offset);
	51
	52	return regmap_update_bits(a10r->regmap, index, mask, assert ? 0 : mask);
	53	}
	54
	55	static int a10sr_reset_assert(struct reset_controller_dev *rcdev,
	56	unsigned long id)
	57	{
	58	return a10sr_reset_update(rcdev, id, true);
	59	}
	60
	61	static int a10sr_reset_deassert(struct reset_controller_dev *rcdev,
	62	unsigned long id)
	63	{
	64	return a10sr_reset_update(rcdev, id, false);
	65	}
	66
	67	static int a10sr_reset_status(struct reset_controller_dev *rcdev,
	68	unsigned long id)
69	{
70	int ret;
71	struct a10sr_reset *a10r = to_a10sr_rst(rcdev);
72	int offset = a10sr_reset_shift(id);
73	u8 mask = ALTR_A10SR_REG_BIT_MASK(offset);
74	int index = ALTR_A10SR_HPS_RST_REG + ALTR_A10SR_REG_OFFSET(offset);
75	unsigned int value;
76
77	ret = regmap_read(a10r->regmap, index, &value);
78	if (ret < 0)
79	return ret;
80
81	return !!(value & mask);
82	}
83
84	static const struct reset_control_ops a10sr_reset_ops = {
85	.assert = a10sr_reset_assert,
86	.deassert = a10sr_reset_deassert,
87	.status = a10sr_reset_status,
88	};
89
90	static int a10sr_reset_probe(struct platform_device *pdev)
91	{
92	struct altr_a10sr *a10sr = dev_get_drvdata(pdev->dev.parent);
93	struct a10sr_reset *a10r;
94
95	a10r = devm_kzalloc(&pdev->dev, sizeof(struct a10sr_reset),
96	GFP_KERNEL);
97	if (!a10r)
98	return -ENOMEM;
99
100	a10r->rcdev.owner = THIS_MODULE;
101	a10r->rcdev.nr_resets = A10SR_RESET_NUM;
102	a10r->rcdev.ops = &a10sr_reset_ops;
103	a10r->rcdev.of_node = pdev->dev.of_node;
104	a10r->regmap = a10sr->regmap;
105
106	platform_set_drvdata(pdev, a10r);
107
108	return devm_reset_controller_register(&pdev->dev, &a10r->rcdev);
109	}
110
111	static const struct of_device_id a10sr_reset_of_match[] = {
112	{ .compatible = "altr,a10sr-reset" },
113	{ },
114	};
115	MODULE_DEVICE_TABLE(of, a10sr_reset_of_match);
116
117	static struct platform_driver a10sr_reset_driver = {
118	.probe = a10sr_reset_probe,
119	.driver = {
120	.name = "altr_a10sr_reset",
466ba3c8	121	.of_match_table = a10sr_reset_of_match,
62700682 TT	122	},
	123	};
	124	module_platform_driver(a10sr_reset_driver);
	125
	126	MODULE_AUTHOR("Thor Thayer <[email protected]>");
	127	MODULE_DESCRIPTION("Altera Arria10 System Resource Reset Controller Driver");
	128	MODULE_LICENSE("GPL v2");