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drm/i915: INTEL_INFO->gen supercedes i8xx, i9xx, i965g
[linux.git] / drivers / gpu / drm / i915 / i915_debugfs.c
CommitLineData
2017263e
BG		 1/*
2 * Copyright © 2008 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <[email protected]>
25 * Keith Packard <[email protected]>
26 *
27 */
28
29#include <linux/seq_file.h>
f3cd474b 30#include <linux/debugfs.h>
5a0e3ad6 31#include <linux/slab.h>
2017263e
BG		 32#include "drmP.h"
33#include "drm.h"
4e5359cd 34#include "intel_drv.h"
2017263e
BG		 35#include "i915_drm.h"
36#include "i915_drv.h"
37
38#define DRM_I915_RING_DEBUG 1
39
40
41#if defined(CONFIG_DEBUG_FS)
42
433e12f7
BG		 43#define ACTIVE_LIST 1
44#define FLUSHING_LIST 2
45#define INACTIVE_LIST 3
2017263e 46
70d39fe4
CW		 47static const char *yesno(int v)
48{
49 return v ? "yes" : "no";
50}
51
52static int i915_capabilities(struct seq_file *m, void *data)
53{
54 struct drm_info_node *node = (struct drm_info_node *) m->private;
55 struct drm_device *dev = node->minor->dev;
56 const struct intel_device_info *info = INTEL_INFO(dev);
57
58 seq_printf(m, "gen: %d\n", info->gen);
59#define B(x) seq_printf(m, #x ": %s\n", yesno(info->x))
60 B(is_mobile);
70d39fe4
CW		 61 B(is_i85x);
62 B(is_i915g);
70d39fe4 63 B(is_i945gm);
70d39fe4
CW		 64 B(is_g33);
65 B(need_gfx_hws);
66 B(is_g4x);
67 B(is_pineview);
68 B(is_broadwater);
69 B(is_crestline);
70 B(is_ironlake);
71 B(has_fbc);
72 B(has_rc6);
73 B(has_pipe_cxsr);
74 B(has_hotplug);
75 B(cursor_needs_physical);
76 B(has_overlay);
77 B(overlay_needs_physical);
a6c45cf0 78 B(supports_tv);
70d39fe4
CW		 79#undef B
80
81 return 0;
82}
83
a6172a80
CW		 84static const char *get_pin_flag(struct drm_i915_gem_object *obj_priv)
85{
86 if (obj_priv->user_pin_count > 0)
87 return "P";
88 else if (obj_priv->pin_count > 0)
89 return "p";
90 else
91 return " ";
92}
93
94static const char *get_tiling_flag(struct drm_i915_gem_object *obj_priv)
95{
96 switch (obj_priv->tiling_mode) {
97 default:
98 case I915_TILING_NONE: return " ";
99 case I915_TILING_X: return "X";
100 case I915_TILING_Y: return "Y";
101 }
102}
103
37811fcc
CW		 104static void
105describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj)
106{
107 seq_printf(m, "%p: %s%s %8zd %08x %08x %d%s%s",
108 &obj->base,
109 get_pin_flag(obj),
110 get_tiling_flag(obj),
111 obj->base.size,
112 obj->base.read_domains,
113 obj->base.write_domain,
114 obj->last_rendering_seqno,
115 obj->dirty ? " dirty" : "",
116 obj->madv == I915_MADV_DONTNEED ? " purgeable" : "");
117 if (obj->base.name)
118 seq_printf(m, " (name: %d)", obj->base.name);
119 if (obj->fence_reg != I915_FENCE_REG_NONE)
120 seq_printf(m, " (fence: %d)", obj->fence_reg);
121 if (obj->gtt_space != NULL)
122 seq_printf(m, " (gtt_offset: %08x)", obj->gtt_offset);
123}
124
433e12f7 125static int i915_gem_object_list_info(struct seq_file *m, void *data)
2017263e
BG		 126{
127 struct drm_info_node *node = (struct drm_info_node *) m->private;
433e12f7
BG		 128 uintptr_t list = (uintptr_t) node->info_ent->data;
129 struct list_head *head;
2017263e
BG		 130 struct drm_device *dev = node->minor->dev;
131 drm_i915_private_t *dev_priv = dev->dev_private;
132 struct drm_i915_gem_object *obj_priv;
de227ef0
CW		 133 int ret;
134
135 ret = mutex_lock_interruptible(&dev->struct_mutex);
136 if (ret)
137 return ret;
2017263e 138
433e12f7
BG		 139 switch (list) {
140 case ACTIVE_LIST:
141 seq_printf(m, "Active:\n");
852835f3 142 head = &dev_priv->render_ring.active_list;
433e12f7
BG		 143 break;
144 case INACTIVE_LIST:
a17458fc 145 seq_printf(m, "Inactive:\n");
433e12f7
BG		 146 head = &dev_priv->mm.inactive_list;
147 break;
148 case FLUSHING_LIST:
149 seq_printf(m, "Flushing:\n");
150 head = &dev_priv->mm.flushing_list;
151 break;
152 default:
de227ef0
CW		 153 mutex_unlock(&dev->struct_mutex);
154 return -EINVAL;
2017263e 155 }
2017263e 156
de227ef0 157 list_for_each_entry(obj_priv, head, list) {
37811fcc
CW		 158 seq_printf(m, " ");
159 describe_obj(m, obj_priv);
f4ceda89 160 seq_printf(m, "\n");
2017263e 161 }
5e118f41 162
de227ef0 163 mutex_unlock(&dev->struct_mutex);
2017263e
BG		 164 return 0;
165}
166
4e5359cd
SF		 167static int i915_gem_pageflip_info(struct seq_file *m, void *data)
168{
169 struct drm_info_node *node = (struct drm_info_node *) m->private;
170 struct drm_device *dev = node->minor->dev;
171 unsigned long flags;
172 struct intel_crtc *crtc;
173
174 list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head) {
175 const char *pipe = crtc->pipe ? "B" : "A";
176 const char *plane = crtc->plane ? "B" : "A";
177 struct intel_unpin_work *work;
178
179 spin_lock_irqsave(&dev->event_lock, flags);
180 work = crtc->unpin_work;
181 if (work == NULL) {
182 seq_printf(m, "No flip due on pipe %s (plane %s)\n",
183 pipe, plane);
184 } else {
185 if (!work->pending) {
186 seq_printf(m, "Flip queued on pipe %s (plane %s)\n",
187 pipe, plane);
188 } else {
189 seq_printf(m, "Flip pending (waiting for vsync) on pipe %s (plane %s)\n",
190 pipe, plane);
191 }
192 if (work->enable_stall_check)
193 seq_printf(m, "Stall check enabled, ");
194 else
195 seq_printf(m, "Stall check waiting for page flip ioctl, ");
196 seq_printf(m, "%d prepares\n", work->pending);
197
198 if (work->old_fb_obj) {
199 struct drm_i915_gem_object *obj_priv = to_intel_bo(work->old_fb_obj);
200 if(obj_priv)
201 seq_printf(m, "Old framebuffer gtt_offset 0x%08x\n", obj_priv->gtt_offset );
202 }
203 if (work->pending_flip_obj) {
204 struct drm_i915_gem_object *obj_priv = to_intel_bo(work->pending_flip_obj);
205 if(obj_priv)
206 seq_printf(m, "New framebuffer gtt_offset 0x%08x\n", obj_priv->gtt_offset );
207 }
208 }
209 spin_unlock_irqrestore(&dev->event_lock, flags);
210 }
211
212 return 0;
213}
214
2017263e
BG		 215static int i915_gem_request_info(struct seq_file *m, void *data)
216{
217 struct drm_info_node *node = (struct drm_info_node *) m->private;
218 struct drm_device *dev = node->minor->dev;
219 drm_i915_private_t *dev_priv = dev->dev_private;
220 struct drm_i915_gem_request *gem_request;
de227ef0
CW		 221 int ret;
222
223 ret = mutex_lock_interruptible(&dev->struct_mutex);
224 if (ret)
225 return ret;
2017263e
BG		 226
227 seq_printf(m, "Request:\n");
852835f3
ZN		 228 list_for_each_entry(gem_request, &dev_priv->render_ring.request_list,
229 list) {
2017263e
BG		 230 seq_printf(m, " %d @ %d\n",
231 gem_request->seqno,
232 (int) (jiffies - gem_request->emitted_jiffies));
233 }
de227ef0
CW		 234 mutex_unlock(&dev->struct_mutex);
235
2017263e
BG		 236 return 0;
237}
238
239static int i915_gem_seqno_info(struct seq_file *m, void *data)
240{
241 struct drm_info_node *node = (struct drm_info_node *) m->private;
242 struct drm_device *dev = node->minor->dev;
243 drm_i915_private_t *dev_priv = dev->dev_private;
de227ef0
CW		 244 int ret;
245
246 ret = mutex_lock_interruptible(&dev->struct_mutex);
247 if (ret)
248 return ret;
2017263e 249
e20f9c64 250 if (dev_priv->render_ring.status_page.page_addr != NULL) {
2017263e 251 seq_printf(m, "Current sequence: %d\n",
852835f3 252 i915_get_gem_seqno(dev, &dev_priv->render_ring));
2017263e
BG		 253 } else {
254 seq_printf(m, "Current sequence: hws uninitialized\n");
255 }
256 seq_printf(m, "Waiter sequence: %d\n",
257 dev_priv->mm.waiting_gem_seqno);
258 seq_printf(m, "IRQ sequence: %d\n", dev_priv->mm.irq_gem_seqno);
de227ef0
CW		 259
260 mutex_unlock(&dev->struct_mutex);
261
2017263e
BG		 262 return 0;
263}
264
265
266static int i915_interrupt_info(struct seq_file *m, void *data)
267{
268 struct drm_info_node *node = (struct drm_info_node *) m->private;
269 struct drm_device *dev = node->minor->dev;
270 drm_i915_private_t *dev_priv = dev->dev_private;
de227ef0
CW		 271 int ret;
272
273 ret = mutex_lock_interruptible(&dev->struct_mutex);
274 if (ret)
275 return ret;
2017263e 276
bad720ff 277 if (!HAS_PCH_SPLIT(dev)) {
5f6a1695
ZW		 278 seq_printf(m, "Interrupt enable: %08x\n",
279 I915_READ(IER));
280 seq_printf(m, "Interrupt identity: %08x\n",
281 I915_READ(IIR));
282 seq_printf(m, "Interrupt mask: %08x\n",
283 I915_READ(IMR));
284 seq_printf(m, "Pipe A stat: %08x\n",
285 I915_READ(PIPEASTAT));
286 seq_printf(m, "Pipe B stat: %08x\n",
287 I915_READ(PIPEBSTAT));
288 } else {
289 seq_printf(m, "North Display Interrupt enable: %08x\n",
290 I915_READ(DEIER));
291 seq_printf(m, "North Display Interrupt identity: %08x\n",
292 I915_READ(DEIIR));
293 seq_printf(m, "North Display Interrupt mask: %08x\n",
294 I915_READ(DEIMR));
295 seq_printf(m, "South Display Interrupt enable: %08x\n",
296 I915_READ(SDEIER));
297 seq_printf(m, "South Display Interrupt identity: %08x\n",
298 I915_READ(SDEIIR));
299 seq_printf(m, "South Display Interrupt mask: %08x\n",
300 I915_READ(SDEIMR));
301 seq_printf(m, "Graphics Interrupt enable: %08x\n",
302 I915_READ(GTIER));
303 seq_printf(m, "Graphics Interrupt identity: %08x\n",
304 I915_READ(GTIIR));
305 seq_printf(m, "Graphics Interrupt mask: %08x\n",
306 I915_READ(GTIMR));
307 }
2017263e
BG		 308 seq_printf(m, "Interrupts received: %d\n",
309 atomic_read(&dev_priv->irq_received));
e20f9c64 310 if (dev_priv->render_ring.status_page.page_addr != NULL) {
2017263e 311 seq_printf(m, "Current sequence: %d\n",
852835f3 312 i915_get_gem_seqno(dev, &dev_priv->render_ring));
2017263e
BG		 313 } else {
314 seq_printf(m, "Current sequence: hws uninitialized\n");
315 }
316 seq_printf(m, "Waiter sequence: %d\n",
317 dev_priv->mm.waiting_gem_seqno);
318 seq_printf(m, "IRQ sequence: %d\n",
319 dev_priv->mm.irq_gem_seqno);
de227ef0
CW		 320 mutex_unlock(&dev->struct_mutex);
321
2017263e
BG		 322 return 0;
323}
324
a6172a80
CW		 325static int i915_gem_fence_regs_info(struct seq_file *m, void *data)
326{
327 struct drm_info_node *node = (struct drm_info_node *) m->private;
328 struct drm_device *dev = node->minor->dev;
329 drm_i915_private_t *dev_priv = dev->dev_private;
de227ef0
CW		 330 int i, ret;
331
332 ret = mutex_lock_interruptible(&dev->struct_mutex);
333 if (ret)
334 return ret;
a6172a80
CW		 335
336 seq_printf(m, "Reserved fences = %d\n", dev_priv->fence_reg_start);
337 seq_printf(m, "Total fences = %d\n", dev_priv->num_fence_regs);
338 for (i = 0; i < dev_priv->num_fence_regs; i++) {
339 struct drm_gem_object *obj = dev_priv->fence_regs[i].obj;
340
341 if (obj == NULL) {
342 seq_printf(m, "Fenced object[%2d] = unused\n", i);
343 } else {
344 struct drm_i915_gem_object *obj_priv;
345
23010e43 346 obj_priv = to_intel_bo(obj);
a6172a80 347 seq_printf(m, "Fenced object[%2d] = %p: %s "
0b4d569d 348 "%08x %08zx %08x %s %08x %08x %d",
a6172a80
CW		 349 i, obj, get_pin_flag(obj_priv),
350 obj_priv->gtt_offset,
351 obj->size, obj_priv->stride,
352 get_tiling_flag(obj_priv),
353 obj->read_domains, obj->write_domain,
354 obj_priv->last_rendering_seqno);
355 if (obj->name)
356 seq_printf(m, " (name: %d)", obj->name);
357 seq_printf(m, "\n");
358 }
359 }
de227ef0 360 mutex_unlock(&dev->struct_mutex);
a6172a80
CW		 361
362 return 0;
363}
364
2017263e
BG		 365static int i915_hws_info(struct seq_file *m, void *data)
366{
367 struct drm_info_node *node = (struct drm_info_node *) m->private;
368 struct drm_device *dev = node->minor->dev;
369 drm_i915_private_t *dev_priv = dev->dev_private;
370 int i;
371 volatile u32 *hws;
372
e20f9c64 373 hws = (volatile u32 *)dev_priv->render_ring.status_page.page_addr;
2017263e
BG		 374 if (hws == NULL)
375 return 0;
376
377 for (i = 0; i < 4096 / sizeof(u32) / 4; i += 4) {
378 seq_printf(m, "0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n",
379 i * 4,
380 hws[i], hws[i + 1], hws[i + 2], hws[i + 3]);
381 }
382 return 0;
383}
384
6911a9b8
BG		 385static void i915_dump_pages(struct seq_file *m, struct page **pages, int page_count)
386{
387 int page, i;
388 uint32_t *mem;
389
390 for (page = 0; page < page_count; page++) {
de227ef0 391 mem = kmap(pages[page]);
6911a9b8
BG		 392 for (i = 0; i < PAGE_SIZE; i += 4)
393 seq_printf(m, "%08x : %08x\n", i, mem[i / 4]);
de227ef0 394 kunmap(pages[page]);
6911a9b8
BG		 395 }
396}
397
398static int i915_batchbuffer_info(struct seq_file *m, void *data)
399{
400 struct drm_info_node *node = (struct drm_info_node *) m->private;
401 struct drm_device *dev = node->minor->dev;
402 drm_i915_private_t *dev_priv = dev->dev_private;
403 struct drm_gem_object *obj;
404 struct drm_i915_gem_object *obj_priv;
405 int ret;
406
de227ef0
CW		 407 ret = mutex_lock_interruptible(&dev->struct_mutex);
408 if (ret)
409 return ret;
6911a9b8 410
852835f3
ZN		 411 list_for_each_entry(obj_priv, &dev_priv->render_ring.active_list,
412 list) {
a8089e84 413 obj = &obj_priv->base;
6911a9b8 414 if (obj->read_domains & I915_GEM_DOMAIN_COMMAND) {
4bdadb97 415 ret = i915_gem_object_get_pages(obj, 0);
6911a9b8 416 if (ret) {
de227ef0 417 mutex_unlock(&dev->struct_mutex);
6911a9b8
BG		 418 return ret;
419 }
420
421 seq_printf(m, "--- gtt_offset = 0x%08x\n", obj_priv->gtt_offset);
422 i915_dump_pages(m, obj_priv->pages, obj->size / PAGE_SIZE);
423
424 i915_gem_object_put_pages(obj);
425 }
426 }
427
de227ef0 428 mutex_unlock(&dev->struct_mutex);
6911a9b8
BG		 429
430 return 0;
431}
432
433static int i915_ringbuffer_data(struct seq_file *m, void *data)
434{
435 struct drm_info_node *node = (struct drm_info_node *) m->private;
436 struct drm_device *dev = node->minor->dev;
437 drm_i915_private_t *dev_priv = dev->dev_private;
de227ef0
CW		 438 int ret;
439
440 ret = mutex_lock_interruptible(&dev->struct_mutex);
441 if (ret)
442 return ret;
6911a9b8 443
8187a2b7 444 if (!dev_priv->render_ring.gem_object) {
6911a9b8 445 seq_printf(m, "No ringbuffer setup\n");
de227ef0
CW		 446 } else {
447 u8 *virt = dev_priv->render_ring.virtual_start;
448 uint32_t off;
6911a9b8 449
de227ef0
CW		 450 for (off = 0; off < dev_priv->render_ring.size; off += 4) {
451 uint32_t *ptr = (uint32_t *)(virt + off);
452 seq_printf(m, "%08x : %08x\n", off, *ptr);
453 }
6911a9b8 454 }
de227ef0 455 mutex_unlock(&dev->struct_mutex);
6911a9b8
BG		 456
457 return 0;
458}
459
460static int i915_ringbuffer_info(struct seq_file *m, void *data)
461{
462 struct drm_info_node *node = (struct drm_info_node *) m->private;
463 struct drm_device *dev = node->minor->dev;
464 drm_i915_private_t *dev_priv = dev->dev_private;
0ef82af7 465 unsigned int head, tail;
6911a9b8
BG		 466
467 head = I915_READ(PRB0_HEAD) & HEAD_ADDR;
468 tail = I915_READ(PRB0_TAIL) & TAIL_ADDR;
6911a9b8
BG		 469
470 seq_printf(m, "RingHead : %08x\n", head);
471 seq_printf(m, "RingTail : %08x\n", tail);
8187a2b7 472 seq_printf(m, "RingSize : %08lx\n", dev_priv->render_ring.size);
a6c45cf0 473 seq_printf(m, "Acthd : %08x\n", I915_READ(INTEL_INFO(dev)->gen >= 4 ? ACTHD_I965 : ACTHD));
6911a9b8
BG		 474
475 return 0;
476}
477
9df30794
CW		 478static const char *pin_flag(int pinned)
479{
480 if (pinned > 0)
481 return " P";
482 else if (pinned < 0)
483 return " p";
484 else
485 return "";
486}
487
488static const char *tiling_flag(int tiling)
489{
490 switch (tiling) {
491 default:
492 case I915_TILING_NONE: return "";
493 case I915_TILING_X: return " X";
494 case I915_TILING_Y: return " Y";
495 }
496}
497
498static const char *dirty_flag(int dirty)
499{
500 return dirty ? " dirty" : "";
501}
502
503static const char *purgeable_flag(int purgeable)
504{
505 return purgeable ? " purgeable" : "";
506}
507
63eeaf38
JB		 508static int i915_error_state(struct seq_file *m, void *unused)
509{
510 struct drm_info_node *node = (struct drm_info_node *) m->private;
511 struct drm_device *dev = node->minor->dev;
512 drm_i915_private_t *dev_priv = dev->dev_private;
513 struct drm_i915_error_state *error;
514 unsigned long flags;
9df30794 515 int i, page, offset, elt;
63eeaf38
JB		 516
517 spin_lock_irqsave(&dev_priv->error_lock, flags);
518 if (!dev_priv->first_error) {
519 seq_printf(m, "no error state collected\n");
520 goto out;
521 }
522
523 error = dev_priv->first_error;
524
8a905236
JB		 525 seq_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec,
526 error->time.tv_usec);
9df30794 527 seq_printf(m, "PCI ID: 0x%04x\n", dev->pci_device);
63eeaf38
JB		 528 seq_printf(m, "EIR: 0x%08x\n", error->eir);
529 seq_printf(m, " PGTBL_ER: 0x%08x\n", error->pgtbl_er);
530 seq_printf(m, " INSTPM: 0x%08x\n", error->instpm);
531 seq_printf(m, " IPEIR: 0x%08x\n", error->ipeir);
532 seq_printf(m, " IPEHR: 0x%08x\n", error->ipehr);
533 seq_printf(m, " INSTDONE: 0x%08x\n", error->instdone);
534 seq_printf(m, " ACTHD: 0x%08x\n", error->acthd);
a6c45cf0 535 if (INTEL_INFO(dev)->gen >= 4) {
63eeaf38
JB		 536 seq_printf(m, " INSTPS: 0x%08x\n", error->instps);
537 seq_printf(m, " INSTDONE1: 0x%08x\n", error->instdone1);
538 }
9df30794
CW		 539 seq_printf(m, "seqno: 0x%08x\n", error->seqno);
540
541 if (error->active_bo_count) {
542 seq_printf(m, "Buffers [%d]:\n", error->active_bo_count);
543
544 for (i = 0; i < error->active_bo_count; i++) {
545 seq_printf(m, " %08x %8zd %08x %08x %08x%s%s%s%s",
546 error->active_bo[i].gtt_offset,
547 error->active_bo[i].size,
548 error->active_bo[i].read_domains,
549 error->active_bo[i].write_domain,
550 error->active_bo[i].seqno,
551 pin_flag(error->active_bo[i].pinned),
552 tiling_flag(error->active_bo[i].tiling),
553 dirty_flag(error->active_bo[i].dirty),
554 purgeable_flag(error->active_bo[i].purgeable));
555
556 if (error->active_bo[i].name)
557 seq_printf(m, " (name: %d)", error->active_bo[i].name);
558 if (error->active_bo[i].fence_reg != I915_FENCE_REG_NONE)
559 seq_printf(m, " (fence: %d)", error->active_bo[i].fence_reg);
560
561 seq_printf(m, "\n");
562 }
563 }
564
565 for (i = 0; i < ARRAY_SIZE(error->batchbuffer); i++) {
566 if (error->batchbuffer[i]) {
567 struct drm_i915_error_object *obj = error->batchbuffer[i];
568
569 seq_printf(m, "--- gtt_offset = 0x%08x\n", obj->gtt_offset);
570 offset = 0;
571 for (page = 0; page < obj->page_count; page++) {
572 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
573 seq_printf(m, "%08x : %08x\n", offset, obj->pages[page][elt]);
574 offset += 4;
575 }
576 }
577 }
578 }
579
580 if (error->ringbuffer) {
581 struct drm_i915_error_object *obj = error->ringbuffer;
582
583 seq_printf(m, "--- ringbuffer = 0x%08x\n", obj->gtt_offset);
584 offset = 0;
585 for (page = 0; page < obj->page_count; page++) {
586 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
587 seq_printf(m, "%08x : %08x\n", offset, obj->pages[page][elt]);
588 offset += 4;
589 }
590 }
591 }
63eeaf38 592
6ef3d427
CW		 593 if (error->overlay)
594 intel_overlay_print_error_state(m, error->overlay);
595
63eeaf38
JB		 596out:
597 spin_unlock_irqrestore(&dev_priv->error_lock, flags);
598
599 return 0;
600}
6911a9b8 601
f97108d1
JB		 602static int i915_rstdby_delays(struct seq_file *m, void *unused)
603{
604 struct drm_info_node *node = (struct drm_info_node *) m->private;
605 struct drm_device *dev = node->minor->dev;
606 drm_i915_private_t *dev_priv = dev->dev_private;
607 u16 crstanddelay = I915_READ16(CRSTANDVID);
608
609 seq_printf(m, "w/ctx: %d, w/o ctx: %d\n", (crstanddelay >> 8) & 0x3f, (crstanddelay & 0x3f));
610
611 return 0;
612}
613
614static int i915_cur_delayinfo(struct seq_file *m, void *unused)
615{
616 struct drm_info_node *node = (struct drm_info_node *) m->private;
617 struct drm_device *dev = node->minor->dev;
618 drm_i915_private_t *dev_priv = dev->dev_private;
619 u16 rgvswctl = I915_READ16(MEMSWCTL);
7648fa99 620 u16 rgvstat = I915_READ16(MEMSTAT_ILK);
f97108d1 621
7648fa99
JB		 622 seq_printf(m, "Requested P-state: %d\n", (rgvswctl >> 8) & 0xf);
623 seq_printf(m, "Requested VID: %d\n", rgvswctl & 0x3f);
624 seq_printf(m, "Current VID: %d\n", (rgvstat & MEMSTAT_VID_MASK) >>
625 MEMSTAT_VID_SHIFT);
626 seq_printf(m, "Current P-state: %d\n",
627 (rgvstat & MEMSTAT_PSTATE_MASK) >> MEMSTAT_PSTATE_SHIFT);
f97108d1
JB		 628
629 return 0;
630}
631
632static int i915_delayfreq_table(struct seq_file *m, void *unused)
633{
634 struct drm_info_node *node = (struct drm_info_node *) m->private;
635 struct drm_device *dev = node->minor->dev;
636 drm_i915_private_t *dev_priv = dev->dev_private;
637 u32 delayfreq;
638 int i;
639
640 for (i = 0; i < 16; i++) {
641 delayfreq = I915_READ(PXVFREQ_BASE + i * 4);
7648fa99
JB		 642 seq_printf(m, "P%02dVIDFREQ: 0x%08x (VID: %d)\n", i, delayfreq,
643 (delayfreq & PXVFREQ_PX_MASK) >> PXVFREQ_PX_SHIFT);
f97108d1
JB		 644 }
645
646 return 0;
647}
648
649static inline int MAP_TO_MV(int map)
650{
651 return 1250 - (map * 25);
652}
653
654static int i915_inttoext_table(struct seq_file *m, void *unused)
655{
656 struct drm_info_node *node = (struct drm_info_node *) m->private;
657 struct drm_device *dev = node->minor->dev;
658 drm_i915_private_t *dev_priv = dev->dev_private;
659 u32 inttoext;
660 int i;
661
662 for (i = 1; i <= 32; i++) {
663 inttoext = I915_READ(INTTOEXT_BASE_ILK + i * 4);
664 seq_printf(m, "INTTOEXT%02d: 0x%08x\n", i, inttoext);
665 }
666
667 return 0;
668}
669
670static int i915_drpc_info(struct seq_file *m, void *unused)
671{
672 struct drm_info_node *node = (struct drm_info_node *) m->private;
673 struct drm_device *dev = node->minor->dev;
674 drm_i915_private_t *dev_priv = dev->dev_private;
675 u32 rgvmodectl = I915_READ(MEMMODECTL);
7648fa99
JB		 676 u32 rstdbyctl = I915_READ(MCHBAR_RENDER_STANDBY);
677 u16 crstandvid = I915_READ16(CRSTANDVID);
f97108d1
JB		 678
679 seq_printf(m, "HD boost: %s\n", (rgvmodectl & MEMMODE_BOOST_EN) ?
680 "yes" : "no");
681 seq_printf(m, "Boost freq: %d\n",
682 (rgvmodectl & MEMMODE_BOOST_FREQ_MASK) >>
683 MEMMODE_BOOST_FREQ_SHIFT);
684 seq_printf(m, "HW control enabled: %s\n",
685 rgvmodectl & MEMMODE_HWIDLE_EN ? "yes" : "no");
686 seq_printf(m, "SW control enabled: %s\n",
687 rgvmodectl & MEMMODE_SWMODE_EN ? "yes" : "no");
688 seq_printf(m, "Gated voltage change: %s\n",
689 rgvmodectl & MEMMODE_RCLK_GATE ? "yes" : "no");
690 seq_printf(m, "Starting frequency: P%d\n",
691 (rgvmodectl & MEMMODE_FSTART_MASK) >> MEMMODE_FSTART_SHIFT);
7648fa99 692 seq_printf(m, "Max P-state: P%d\n",
f97108d1 693 (rgvmodectl & MEMMODE_FMAX_MASK) >> MEMMODE_FMAX_SHIFT);
7648fa99
JB		 694 seq_printf(m, "Min P-state: P%d\n", (rgvmodectl & MEMMODE_FMIN_MASK));
695 seq_printf(m, "RS1 VID: %d\n", (crstandvid & 0x3f));
696 seq_printf(m, "RS2 VID: %d\n", ((crstandvid >> 8) & 0x3f));
697 seq_printf(m, "Render standby enabled: %s\n",
698 (rstdbyctl & RCX_SW_EXIT) ? "no" : "yes");
f97108d1
JB		 699
700 return 0;
701}
702
b5e50c3f
JB		 703static int i915_fbc_status(struct seq_file *m, void *unused)
704{
705 struct drm_info_node *node = (struct drm_info_node *) m->private;
706 struct drm_device *dev = node->minor->dev;
b5e50c3f 707 drm_i915_private_t *dev_priv = dev->dev_private;
b5e50c3f 708
ee5382ae 709 if (!I915_HAS_FBC(dev)) {
b5e50c3f
JB		 710 seq_printf(m, "FBC unsupported on this chipset\n");
711 return 0;
712 }
713
ee5382ae 714 if (intel_fbc_enabled(dev)) {
b5e50c3f
JB		 715 seq_printf(m, "FBC enabled\n");
716 } else {
717 seq_printf(m, "FBC disabled: ");
718 switch (dev_priv->no_fbc_reason) {
bed4a673
CW		 719 case FBC_NO_OUTPUT:
720 seq_printf(m, "no outputs");
721 break;
b5e50c3f
JB		 722 case FBC_STOLEN_TOO_SMALL:
723 seq_printf(m, "not enough stolen memory");
724 break;
725 case FBC_UNSUPPORTED_MODE:
726 seq_printf(m, "mode not supported");
727 break;
728 case FBC_MODE_TOO_LARGE:
729 seq_printf(m, "mode too large");
730 break;
731 case FBC_BAD_PLANE:
732 seq_printf(m, "FBC unsupported on plane");
733 break;
734 case FBC_NOT_TILED:
735 seq_printf(m, "scanout buffer not tiled");
736 break;
9c928d16
JB		 737 case FBC_MULTIPLE_PIPES:
738 seq_printf(m, "multiple pipes are enabled");
739 break;
b5e50c3f
JB		 740 default:
741 seq_printf(m, "unknown reason");
742 }
743 seq_printf(m, "\n");
744 }
745 return 0;
746}
747
4a9bef37
JB		 748static int i915_sr_status(struct seq_file *m, void *unused)
749{
750 struct drm_info_node *node = (struct drm_info_node *) m->private;
751 struct drm_device *dev = node->minor->dev;
752 drm_i915_private_t *dev_priv = dev->dev_private;
753 bool sr_enabled = false;
754
5ba2aaaa
CW		 755 if (IS_IRONLAKE(dev))
756 sr_enabled = I915_READ(WM1_LP_ILK) & WM1_LP_SR_EN;
a6c45cf0 757 else if (IS_CRESTLINE(dev) || IS_I945G(dev) || IS_I945GM(dev))
4a9bef37
JB		 758 sr_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN;
759 else if (IS_I915GM(dev))
760 sr_enabled = I915_READ(INSTPM) & INSTPM_SELF_EN;
761 else if (IS_PINEVIEW(dev))
762 sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN;
763
5ba2aaaa
CW		 764 seq_printf(m, "self-refresh: %s\n",
765 sr_enabled ? "enabled" : "disabled");
4a9bef37
JB		 766
767 return 0;
768}
769
7648fa99
JB		 770static int i915_emon_status(struct seq_file *m, void *unused)
771{
772 struct drm_info_node *node = (struct drm_info_node *) m->private;
773 struct drm_device *dev = node->minor->dev;
774 drm_i915_private_t *dev_priv = dev->dev_private;
775 unsigned long temp, chipset, gfx;
de227ef0
CW		 776 int ret;
777
778 ret = mutex_lock_interruptible(&dev->struct_mutex);
779 if (ret)
780 return ret;
7648fa99
JB		 781
782 temp = i915_mch_val(dev_priv);
783 chipset = i915_chipset_val(dev_priv);
784 gfx = i915_gfx_val(dev_priv);
de227ef0 785 mutex_unlock(&dev->struct_mutex);
7648fa99
JB		 786
787 seq_printf(m, "GMCH temp: %ld\n", temp);
788 seq_printf(m, "Chipset power: %ld\n", chipset);
789 seq_printf(m, "GFX power: %ld\n", gfx);
790 seq_printf(m, "Total power: %ld\n", chipset + gfx);
791
792 return 0;
793}
794
795static int i915_gfxec(struct seq_file *m, void *unused)
796{
797 struct drm_info_node *node = (struct drm_info_node *) m->private;
798 struct drm_device *dev = node->minor->dev;
799 drm_i915_private_t *dev_priv = dev->dev_private;
800
801 seq_printf(m, "GFXEC: %ld\n", (unsigned long)I915_READ(0x112f4));
802
803 return 0;
804}
805
44834a67
CW		 806static int i915_opregion(struct seq_file *m, void *unused)
807{
808 struct drm_info_node *node = (struct drm_info_node *) m->private;
809 struct drm_device *dev = node->minor->dev;
810 drm_i915_private_t *dev_priv = dev->dev_private;
811 struct intel_opregion *opregion = &dev_priv->opregion;
812 int ret;
813
814 ret = mutex_lock_interruptible(&dev->struct_mutex);
815 if (ret)
816 return ret;
817
818 if (opregion->header)
819 seq_write(m, opregion->header, OPREGION_SIZE);
820
821 mutex_unlock(&dev->struct_mutex);
822
823 return 0;
824}
825
37811fcc
CW		 826static int i915_gem_framebuffer_info(struct seq_file *m, void *data)
827{
828 struct drm_info_node *node = (struct drm_info_node *) m->private;
829 struct drm_device *dev = node->minor->dev;
830 drm_i915_private_t *dev_priv = dev->dev_private;
831 struct intel_fbdev *ifbdev;
832 struct intel_framebuffer *fb;
833 int ret;
834
835 ret = mutex_lock_interruptible(&dev->mode_config.mutex);
836 if (ret)
837 return ret;
838
839 ifbdev = dev_priv->fbdev;
840 fb = to_intel_framebuffer(ifbdev->helper.fb);
841
842 seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, obj ",
843 fb->base.width,
844 fb->base.height,
845 fb->base.depth,
846 fb->base.bits_per_pixel);
847 describe_obj(m, to_intel_bo(fb->obj));
848 seq_printf(m, "\n");
849
850 list_for_each_entry(fb, &dev->mode_config.fb_list, base.head) {
851 if (&fb->base == ifbdev->helper.fb)
852 continue;
853
854 seq_printf(m, "user size: %d x %d, depth %d, %d bpp, obj ",
855 fb->base.width,
856 fb->base.height,
857 fb->base.depth,
858 fb->base.bits_per_pixel);
859 describe_obj(m, to_intel_bo(fb->obj));
860 seq_printf(m, "\n");
861 }
862
863 mutex_unlock(&dev->mode_config.mutex);
864
865 return 0;
866}
867
f3cd474b
CW		 868static int
869i915_wedged_open(struct inode *inode,
870 struct file *filp)
871{
872 filp->private_data = inode->i_private;
873 return 0;
874}
875
876static ssize_t
877i915_wedged_read(struct file *filp,
878 char __user *ubuf,
879 size_t max,
880 loff_t *ppos)
881{
882 struct drm_device *dev = filp->private_data;
883 drm_i915_private_t *dev_priv = dev->dev_private;
884 char buf[80];
885 int len;
886
887 len = snprintf(buf, sizeof (buf),
888 "wedged : %d\n",
889 atomic_read(&dev_priv->mm.wedged));
890
f4433a8d
DC		 891 if (len > sizeof (buf))
892 len = sizeof (buf);
893
f3cd474b
CW		 894 return simple_read_from_buffer(ubuf, max, ppos, buf, len);
895}
896
897static ssize_t
898i915_wedged_write(struct file *filp,
899 const char __user *ubuf,
900 size_t cnt,
901 loff_t *ppos)
902{
903 struct drm_device *dev = filp->private_data;
904 drm_i915_private_t *dev_priv = dev->dev_private;
905 char buf[20];
906 int val = 1;
907
908 if (cnt > 0) {
909 if (cnt > sizeof (buf) - 1)
910 return -EINVAL;
911
912 if (copy_from_user(buf, ubuf, cnt))
913 return -EFAULT;
914 buf[cnt] = 0;
915
916 val = simple_strtoul(buf, NULL, 0);
917 }
918
919 DRM_INFO("Manually setting wedged to %d\n", val);
920
921 atomic_set(&dev_priv->mm.wedged, val);
922 if (val) {
923 DRM_WAKEUP(&dev_priv->irq_queue);
924 queue_work(dev_priv->wq, &dev_priv->error_work);
925 }
926
927 return cnt;
928}
929
930static const struct file_operations i915_wedged_fops = {
931 .owner = THIS_MODULE,
932 .open = i915_wedged_open,
933 .read = i915_wedged_read,
934 .write = i915_wedged_write,
935};
936
937/* As the drm_debugfs_init() routines are called before dev->dev_private is
938 * allocated we need to hook into the minor for release. */
939static int
940drm_add_fake_info_node(struct drm_minor *minor,
941 struct dentry *ent,
942 const void *key)
943{
944 struct drm_info_node *node;
945
946 node = kmalloc(sizeof(struct drm_info_node), GFP_KERNEL);
947 if (node == NULL) {
948 debugfs_remove(ent);
949 return -ENOMEM;
950 }
951
952 node->minor = minor;
953 node->dent = ent;
954 node->info_ent = (void *) key;
955 list_add(&node->list, &minor->debugfs_nodes.list);
956
957 return 0;
958}
959
960static int i915_wedged_create(struct dentry *root, struct drm_minor *minor)
961{
962 struct drm_device *dev = minor->dev;
963 struct dentry *ent;
964
965 ent = debugfs_create_file("i915_wedged",
966 S_IRUGO | S_IWUSR,
967 root, dev,
968 &i915_wedged_fops);
969 if (IS_ERR(ent))
970 return PTR_ERR(ent);
971
972 return drm_add_fake_info_node(minor, ent, &i915_wedged_fops);
973}
9e3a6d15 974
27c202ad 975static struct drm_info_list i915_debugfs_list[] = {
70d39fe4 976 {"i915_capabilities", i915_capabilities, 0, 0},
433e12f7
BG		 977 {"i915_gem_active", i915_gem_object_list_info, 0, (void *) ACTIVE_LIST},
978 {"i915_gem_flushing", i915_gem_object_list_info, 0, (void *) FLUSHING_LIST},
979 {"i915_gem_inactive", i915_gem_object_list_info, 0, (void *) INACTIVE_LIST},
4e5359cd 980 {"i915_gem_pageflip", i915_gem_pageflip_info, 0},
2017263e
BG		 981 {"i915_gem_request", i915_gem_request_info, 0},
982 {"i915_gem_seqno", i915_gem_seqno_info, 0},
a6172a80 983 {"i915_gem_fence_regs", i915_gem_fence_regs_info, 0},
2017263e
BG		 984 {"i915_gem_interrupt", i915_interrupt_info, 0},
985 {"i915_gem_hws", i915_hws_info, 0},
6911a9b8
BG		 986 {"i915_ringbuffer_data", i915_ringbuffer_data, 0},
987 {"i915_ringbuffer_info", i915_ringbuffer_info, 0},
988 {"i915_batchbuffers", i915_batchbuffer_info, 0},
63eeaf38 989 {"i915_error_state", i915_error_state, 0},
f97108d1
JB		 990 {"i915_rstdby_delays", i915_rstdby_delays, 0},
991 {"i915_cur_delayinfo", i915_cur_delayinfo, 0},
992 {"i915_delayfreq_table", i915_delayfreq_table, 0},
993 {"i915_inttoext_table", i915_inttoext_table, 0},
994 {"i915_drpc_info", i915_drpc_info, 0},
7648fa99
JB		 995 {"i915_emon_status", i915_emon_status, 0},
996 {"i915_gfxec", i915_gfxec, 0},
b5e50c3f 997 {"i915_fbc_status", i915_fbc_status, 0},
4a9bef37 998 {"i915_sr_status", i915_sr_status, 0},
44834a67 999 {"i915_opregion", i915_opregion, 0},
37811fcc 1000 {"i915_gem_framebuffer", i915_gem_framebuffer_info, 0},
2017263e 1001};
27c202ad 1002#define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
2017263e 1003
27c202ad 1004int i915_debugfs_init(struct drm_minor *minor)
2017263e 1005{
f3cd474b
CW		 1006 int ret;
1007
1008 ret = i915_wedged_create(minor->debugfs_root, minor);
1009 if (ret)
1010 return ret;
1011
27c202ad
BG		 1012 return drm_debugfs_create_files(i915_debugfs_list,
1013 I915_DEBUGFS_ENTRIES,
2017263e
BG		 1014 minor->debugfs_root, minor);
1015}
1016
27c202ad 1017void i915_debugfs_cleanup(struct drm_minor *minor)
2017263e 1018{
27c202ad
BG		 1019 drm_debugfs_remove_files(i915_debugfs_list,
1020 I915_DEBUGFS_ENTRIES, minor);
33db679b
KH		 1021 drm_debugfs_remove_files((struct drm_info_list *) &i915_wedged_fops,
1022 1, minor);
2017263e
BG		 1023}
1024
1025#endif /* CONFIG_DEBUG_FS */
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