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ixgb: increment version to 1.0.104-k4
[linux.git] / drivers / net / ixgb / ixgb_main.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
3
4 Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 2 of the License, or (at your option)
9 any later version.
10
11 This program is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 more details.
15
16 You should have received a copy of the GNU General Public License along with
17 this program; if not, write to the Free Software Foundation, Inc., 59
18 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19
20 The full GNU General Public License is included in this distribution in the
21 file called LICENSE.
22
23 Contact Information:
24 Linux NICS <[email protected]>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "ixgb.h"
30
31/* Change Log
ab707da7
MC		 32 * 1.0.96 04/19/05
33 * - Make needlessly global code static -- [email protected]
34 * - ethtool cleanup -- [email protected]
35 * - Support for MODULE_VERSION -- [email protected]
36 * - add skb_header_cloned check to the tso path -- [email protected]
1da177e4
LT		 37 * 1.0.88 01/05/05
38 * - include fix to the condition that determines when to quit NAPI - Robert Olsson
39 * - use netif_poll_{disable/enable} to synchronize between NAPI and i/f up/down
40 * 1.0.84 10/26/04
41 * - reset buffer_info->dma in Tx resource cleanup logic
42 * 1.0.83 10/12/04
43 * - sparse cleanup - [email protected]
44 * - fix tx resource cleanup logic
45 */
46
47char ixgb_driver_name[] = "ixgb";
e9ab1d14 48static char ixgb_driver_string[] = "Intel(R) PRO/10GbE Network Driver";
1da177e4
LT		 49
50#ifndef CONFIG_IXGB_NAPI
51#define DRIVERNAPI
52#else
53#define DRIVERNAPI "-NAPI"
54#endif
a24e2513 55#define DRV_VERSION "1.0.104-k4"DRIVERNAPI
01e5abc2 56char ixgb_driver_version[] = DRV_VERSION;
ab707da7 57static char ixgb_copyright[] = "Copyright (c) 1999-2005 Intel Corporation.";
1da177e4
LT		 58
59/* ixgb_pci_tbl - PCI Device ID Table
60 *
61 * Wildcard entries (PCI_ANY_ID) should come last
62 * Last entry must be all 0s
63 *
64 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
65 * Class, Class Mask, private data (not used) }
66 */
67static struct pci_device_id ixgb_pci_tbl[] = {
68 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX,
69 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
940829e2
AK		 70 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_CX4,
71 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1da177e4
LT		 72 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_SR,
73 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
74 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_LR,
75 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
76
77 /* required last entry */
78 {0,}
79};
80
81MODULE_DEVICE_TABLE(pci, ixgb_pci_tbl);
82
83/* Local Function Prototypes */
84
85int ixgb_up(struct ixgb_adapter *adapter);
86void ixgb_down(struct ixgb_adapter *adapter, boolean_t kill_watchdog);
87void ixgb_reset(struct ixgb_adapter *adapter);
88int ixgb_setup_tx_resources(struct ixgb_adapter *adapter);
89int ixgb_setup_rx_resources(struct ixgb_adapter *adapter);
90void ixgb_free_tx_resources(struct ixgb_adapter *adapter);
91void ixgb_free_rx_resources(struct ixgb_adapter *adapter);
92void ixgb_update_stats(struct ixgb_adapter *adapter);
93
94static int ixgb_init_module(void);
95static void ixgb_exit_module(void);
96static int ixgb_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
97static void __devexit ixgb_remove(struct pci_dev *pdev);
98static int ixgb_sw_init(struct ixgb_adapter *adapter);
99static int ixgb_open(struct net_device *netdev);
100static int ixgb_close(struct net_device *netdev);
101static void ixgb_configure_tx(struct ixgb_adapter *adapter);
102static void ixgb_configure_rx(struct ixgb_adapter *adapter);
103static void ixgb_setup_rctl(struct ixgb_adapter *adapter);
104static void ixgb_clean_tx_ring(struct ixgb_adapter *adapter);
105static void ixgb_clean_rx_ring(struct ixgb_adapter *adapter);
106static void ixgb_set_multi(struct net_device *netdev);
107static void ixgb_watchdog(unsigned long data);
108static int ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
109static struct net_device_stats *ixgb_get_stats(struct net_device *netdev);
110static int ixgb_change_mtu(struct net_device *netdev, int new_mtu);
111static int ixgb_set_mac(struct net_device *netdev, void *p);
112static irqreturn_t ixgb_intr(int irq, void *data, struct pt_regs *regs);
113static boolean_t ixgb_clean_tx_irq(struct ixgb_adapter *adapter);
ac79c82e 114
1da177e4
LT		 115#ifdef CONFIG_IXGB_NAPI
116static int ixgb_clean(struct net_device *netdev, int *budget);
117static boolean_t ixgb_clean_rx_irq(struct ixgb_adapter *adapter,
118 int *work_done, int work_to_do);
119#else
120static boolean_t ixgb_clean_rx_irq(struct ixgb_adapter *adapter);
121#endif
122static void ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter);
123void ixgb_set_ethtool_ops(struct net_device *netdev);
124static void ixgb_tx_timeout(struct net_device *dev);
125static void ixgb_tx_timeout_task(struct net_device *dev);
126static void ixgb_vlan_rx_register(struct net_device *netdev,
127 struct vlan_group *grp);
128static void ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
129static void ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
130static void ixgb_restore_vlan(struct ixgb_adapter *adapter);
131
1da177e4
LT		 132#ifdef CONFIG_NET_POLL_CONTROLLER
133/* for netdump / net console */
134static void ixgb_netpoll(struct net_device *dev);
135#endif
136
1da177e4
LT		 137/* Exported from other modules */
138
139extern void ixgb_check_options(struct ixgb_adapter *adapter);
140
141static struct pci_driver ixgb_driver = {
c2eba932 142 .name = ixgb_driver_name,
1da177e4 143 .id_table = ixgb_pci_tbl,
c2eba932
MC		 144 .probe = ixgb_probe,
145 .remove = __devexit_p(ixgb_remove),
1da177e4
LT		 146};
147
148MODULE_AUTHOR("Intel Corporation, <[email protected]>");
149MODULE_DESCRIPTION("Intel(R) PRO/10GbE Network Driver");
150MODULE_LICENSE("GPL");
01e5abc2 151MODULE_VERSION(DRV_VERSION);
1da177e4 152
ec9c3f5d
AK		 153#define DEFAULT_DEBUG_LEVEL_SHIFT 3
154static int debug = DEFAULT_DEBUG_LEVEL_SHIFT;
155module_param(debug, int, 0);
156MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
157
1da177e4 158/* some defines for controlling descriptor fetches in h/w */
1da177e4 159#define RXDCTL_WTHRESH_DEFAULT 16 /* chip writes back at this many or RXT0 */
9c15d24f
MC		 160#define RXDCTL_PTHRESH_DEFAULT 0 /* chip considers prefech below
161 * this */
162#define RXDCTL_HTHRESH_DEFAULT 0 /* chip will only prefetch if tail
163 * is pushed this many descriptors
164 * from head */
1da177e4
LT		 165
166/**
167 * ixgb_init_module - Driver Registration Routine
168 *
169 * ixgb_init_module is the first routine called when the driver is
170 * loaded. All it does is register with the PCI subsystem.
171 **/
172
173static int __init
174ixgb_init_module(void)
175{
1da177e4
LT		 176 printk(KERN_INFO "%s - version %s\n",
177 ixgb_driver_string, ixgb_driver_version);
178
179 printk(KERN_INFO "%s\n", ixgb_copyright);
180
c2eba932 181 return pci_module_init(&ixgb_driver);
1da177e4
LT		 182}
183
184module_init(ixgb_init_module);
185
186/**
187 * ixgb_exit_module - Driver Exit Cleanup Routine
188 *
189 * ixgb_exit_module is called just before the driver is removed
190 * from memory.
191 **/
192
193static void __exit
194ixgb_exit_module(void)
195{
1da177e4
LT		 196 pci_unregister_driver(&ixgb_driver);
197}
198
199module_exit(ixgb_exit_module);
200
201/**
202 * ixgb_irq_disable - Mask off interrupt generation on the NIC
203 * @adapter: board private structure
204 **/
205
206static inline void
207ixgb_irq_disable(struct ixgb_adapter *adapter)
208{
209 atomic_inc(&adapter->irq_sem);
210 IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
211 IXGB_WRITE_FLUSH(&adapter->hw);
212 synchronize_irq(adapter->pdev->irq);
213}
214
215/**
216 * ixgb_irq_enable - Enable default interrupt generation settings
217 * @adapter: board private structure
218 **/
219
220static inline void
221ixgb_irq_enable(struct ixgb_adapter *adapter)
222{
223 if(atomic_dec_and_test(&adapter->irq_sem)) {
224 IXGB_WRITE_REG(&adapter->hw, IMS,
6dfbb6dd
MC		 225 IXGB_INT_RXT0 | IXGB_INT_RXDMT0 | IXGB_INT_TXDW |
226 IXGB_INT_LSC);
1da177e4
LT		 227 IXGB_WRITE_FLUSH(&adapter->hw);
228 }
229}
230
231int
232ixgb_up(struct ixgb_adapter *adapter)
233{
234 struct net_device *netdev = adapter->netdev;
235 int err;
236 int max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
237 struct ixgb_hw *hw = &adapter->hw;
238
239 /* hardware has been reset, we need to reload some things */
240
241 ixgb_set_multi(netdev);
242
243 ixgb_restore_vlan(adapter);
244
245 ixgb_configure_tx(adapter);
246 ixgb_setup_rctl(adapter);
247 ixgb_configure_rx(adapter);
248 ixgb_alloc_rx_buffers(adapter);
249
250#ifdef CONFIG_PCI_MSI
251 {
252 boolean_t pcix = (IXGB_READ_REG(&adapter->hw, STATUS) &
253 IXGB_STATUS_PCIX_MODE) ? TRUE : FALSE;
254 adapter->have_msi = TRUE;
255
256 if (!pcix)
257 adapter->have_msi = FALSE;
258 else if((err = pci_enable_msi(adapter->pdev))) {
ec9c3f5d 259 DPRINTK(PROBE, ERR,
1da177e4
LT		 260 "Unable to allocate MSI interrupt Error: %d\n", err);
261 adapter->have_msi = FALSE;
262 /* proceed to try to request regular interrupt */
263 }
264 }
265
266#endif
267 if((err = request_irq(adapter->pdev->irq, &ixgb_intr,
268 SA_SHIRQ | SA_SAMPLE_RANDOM,
ec9c3f5d
AK		 269 netdev->name, netdev))) {
270 DPRINTK(PROBE, ERR,
271 "Unable to allocate interrupt Error: %d\n", err);
1da177e4 272 return err;
ec9c3f5d 273 }
1da177e4
LT		 274
275 /* disable interrupts and get the hardware into a known state */
276 IXGB_WRITE_REG(&adapter->hw, IMC, 0xffffffff);
277
278 if((hw->max_frame_size != max_frame) ||
279 (hw->max_frame_size !=
280 (IXGB_READ_REG(hw, MFS) >> IXGB_MFS_SHIFT))) {
281
282 hw->max_frame_size = max_frame;
283
284 IXGB_WRITE_REG(hw, MFS, hw->max_frame_size << IXGB_MFS_SHIFT);
285
286 if(hw->max_frame_size >
287 IXGB_MAX_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH) {
288 uint32_t ctrl0 = IXGB_READ_REG(hw, CTRL0);
289
290 if(!(ctrl0 & IXGB_CTRL0_JFE)) {
291 ctrl0 |= IXGB_CTRL0_JFE;
292 IXGB_WRITE_REG(hw, CTRL0, ctrl0);
293 }
294 }
295 }
296
297 mod_timer(&adapter->watchdog_timer, jiffies);
298 ixgb_irq_enable(adapter);
299
300#ifdef CONFIG_IXGB_NAPI
301 netif_poll_enable(netdev);
302#endif
303 return 0;
304}
305
306void
307ixgb_down(struct ixgb_adapter *adapter, boolean_t kill_watchdog)
308{
309 struct net_device *netdev = adapter->netdev;
310
311 ixgb_irq_disable(adapter);
312 free_irq(adapter->pdev->irq, netdev);
313#ifdef CONFIG_PCI_MSI
314 if(adapter->have_msi == TRUE)
315 pci_disable_msi(adapter->pdev);
316
317#endif
318 if(kill_watchdog)
319 del_timer_sync(&adapter->watchdog_timer);
320#ifdef CONFIG_IXGB_NAPI
321 netif_poll_disable(netdev);
322#endif
323 adapter->link_speed = 0;
324 adapter->link_duplex = 0;
325 netif_carrier_off(netdev);
326 netif_stop_queue(netdev);
327
328 ixgb_reset(adapter);
329 ixgb_clean_tx_ring(adapter);
330 ixgb_clean_rx_ring(adapter);
331}
332
333void
334ixgb_reset(struct ixgb_adapter *adapter)
335{
336
337 ixgb_adapter_stop(&adapter->hw);
338 if(!ixgb_init_hw(&adapter->hw))
ec9c3f5d 339 DPRINTK(PROBE, ERR, "ixgb_init_hw failed.\n");
1da177e4
LT		 340}
341
342/**
343 * ixgb_probe - Device Initialization Routine
344 * @pdev: PCI device information struct
345 * @ent: entry in ixgb_pci_tbl
346 *
347 * Returns 0 on success, negative on failure
348 *
349 * ixgb_probe initializes an adapter identified by a pci_dev structure.
350 * The OS initialization, configuring of the adapter private structure,
351 * and a hardware reset occur.
352 **/
353
354static int __devinit
355ixgb_probe(struct pci_dev *pdev,
356 const struct pci_device_id *ent)
357{
358 struct net_device *netdev = NULL;
359 struct ixgb_adapter *adapter;
360 static int cards_found = 0;
361 unsigned long mmio_start;
362 int mmio_len;
363 int pci_using_dac;
364 int i;
365 int err;
366
367 if((err = pci_enable_device(pdev)))
368 return err;
369
c91e468a
AS		 370 if(!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
371 !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
1da177e4
LT		 372 pci_using_dac = 1;
373 } else {
c91e468a
AS		 374 if((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) ||
375 (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
ec9c3f5d
AK		 376 printk(KERN_ERR
377 "ixgb: No usable DMA configuration, aborting\n");
c91e468a 378 goto err_dma_mask;
1da177e4
LT		 379 }
380 pci_using_dac = 0;
381 }
382
383 if((err = pci_request_regions(pdev, ixgb_driver_name)))
c91e468a 384 goto err_request_regions;
1da177e4
LT		 385
386 pci_set_master(pdev);
387
388 netdev = alloc_etherdev(sizeof(struct ixgb_adapter));
389 if(!netdev) {
390 err = -ENOMEM;
391 goto err_alloc_etherdev;
392 }
393
394 SET_MODULE_OWNER(netdev);
395 SET_NETDEV_DEV(netdev, &pdev->dev);
396
397 pci_set_drvdata(pdev, netdev);
8908c6cd 398 adapter = netdev_priv(netdev);
1da177e4
LT		 399 adapter->netdev = netdev;
400 adapter->pdev = pdev;
401 adapter->hw.back = adapter;
ec9c3f5d 402 adapter->msg_enable = netif_msg_init(debug, DEFAULT_DEBUG_LEVEL_SHIFT);
1da177e4
LT		 403
404 mmio_start = pci_resource_start(pdev, BAR_0);
405 mmio_len = pci_resource_len(pdev, BAR_0);
406
407 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
408 if(!adapter->hw.hw_addr) {
409 err = -EIO;
410 goto err_ioremap;
411 }
412
413 for(i = BAR_1; i <= BAR_5; i++) {
414 if(pci_resource_len(pdev, i) == 0)
415 continue;
416 if(pci_resource_flags(pdev, i) & IORESOURCE_IO) {
417 adapter->hw.io_base = pci_resource_start(pdev, i);
418 break;
419 }
420 }
421
422 netdev->open = &ixgb_open;
423 netdev->stop = &ixgb_close;
424 netdev->hard_start_xmit = &ixgb_xmit_frame;
425 netdev->get_stats = &ixgb_get_stats;
426 netdev->set_multicast_list = &ixgb_set_multi;
427 netdev->set_mac_address = &ixgb_set_mac;
428 netdev->change_mtu = &ixgb_change_mtu;
429 ixgb_set_ethtool_ops(netdev);
430 netdev->tx_timeout = &ixgb_tx_timeout;
9b8118df 431 netdev->watchdog_timeo = 5 * HZ;
1da177e4
LT		 432#ifdef CONFIG_IXGB_NAPI
433 netdev->poll = &ixgb_clean;
434 netdev->weight = 64;
435#endif
436 netdev->vlan_rx_register = ixgb_vlan_rx_register;
437 netdev->vlan_rx_add_vid = ixgb_vlan_rx_add_vid;
438 netdev->vlan_rx_kill_vid = ixgb_vlan_rx_kill_vid;
439#ifdef CONFIG_NET_POLL_CONTROLLER
440 netdev->poll_controller = ixgb_netpoll;
441#endif
442
ec9c3f5d 443 strcpy(netdev->name, pci_name(pdev));
1da177e4
LT		 444 netdev->mem_start = mmio_start;
445 netdev->mem_end = mmio_start + mmio_len;
446 netdev->base_addr = adapter->hw.io_base;
447
448 adapter->bd_number = cards_found;
449 adapter->link_speed = 0;
450 adapter->link_duplex = 0;
451
452 /* setup the private structure */
453
454 if((err = ixgb_sw_init(adapter)))
455 goto err_sw_init;
456
457 netdev->features = NETIF_F_SG |
458 NETIF_F_HW_CSUM |
459 NETIF_F_HW_VLAN_TX |
460 NETIF_F_HW_VLAN_RX |
461 NETIF_F_HW_VLAN_FILTER;
462#ifdef NETIF_F_TSO
463 netdev->features |= NETIF_F_TSO;
464#endif
f017f14b
AK		 465#ifdef NETIF_F_LLTX
466 netdev->features |= NETIF_F_LLTX;
467#endif
1da177e4
LT		 468
469 if(pci_using_dac)
470 netdev->features |= NETIF_F_HIGHDMA;
471
472 /* make sure the EEPROM is good */
473
474 if(!ixgb_validate_eeprom_checksum(&adapter->hw)) {
ec9c3f5d 475 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
1da177e4
LT		 476 err = -EIO;
477 goto err_eeprom;
478 }
479
480 ixgb_get_ee_mac_addr(&adapter->hw, netdev->dev_addr);
df859c51 481 memcpy(netdev->perm_addr, netdev->dev_addr, netdev->addr_len);
1da177e4 482
df859c51 483 if(!is_valid_ether_addr(netdev->perm_addr)) {
ec9c3f5d 484 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
1da177e4
LT		 485 err = -EIO;
486 goto err_eeprom;
487 }
488
489 adapter->part_num = ixgb_get_ee_pba_number(&adapter->hw);
490
491 init_timer(&adapter->watchdog_timer);
492 adapter->watchdog_timer.function = &ixgb_watchdog;
493 adapter->watchdog_timer.data = (unsigned long)adapter;
494
495 INIT_WORK(&adapter->tx_timeout_task,
496 (void (*)(void *))ixgb_tx_timeout_task, netdev);
497
ec9c3f5d 498 strcpy(netdev->name, "eth%d");
1da177e4
LT		 499 if((err = register_netdev(netdev)))
500 goto err_register;
501
502 /* we're going to reset, so assume we have no link for now */
503
504 netif_carrier_off(netdev);
505 netif_stop_queue(netdev);
506
ec9c3f5d 507 DPRINTK(PROBE, INFO, "Intel(R) PRO/10GbE Network Connection\n");
1da177e4
LT		 508 ixgb_check_options(adapter);
509 /* reset the hardware with the new settings */
510
511 ixgb_reset(adapter);
512
513 cards_found++;
514 return 0;
515
516err_register:
517err_sw_init:
518err_eeprom:
519 iounmap(adapter->hw.hw_addr);
520err_ioremap:
521 free_netdev(netdev);
522err_alloc_etherdev:
523 pci_release_regions(pdev);
c91e468a
AS		 524err_request_regions:
525err_dma_mask:
526 pci_disable_device(pdev);
1da177e4
LT		 527 return err;
528}
529
530/**
531 * ixgb_remove - Device Removal Routine
532 * @pdev: PCI device information struct
533 *
534 * ixgb_remove is called by the PCI subsystem to alert the driver
535 * that it should release a PCI device. The could be caused by a
536 * Hot-Plug event, or because the driver is going to be removed from
537 * memory.
538 **/
539
540static void __devexit
541ixgb_remove(struct pci_dev *pdev)
542{
543 struct net_device *netdev = pci_get_drvdata(pdev);
8908c6cd 544 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 545
546 unregister_netdev(netdev);
547
548 iounmap(adapter->hw.hw_addr);
549 pci_release_regions(pdev);
550
551 free_netdev(netdev);
552}
553
554/**
555 * ixgb_sw_init - Initialize general software structures (struct ixgb_adapter)
556 * @adapter: board private structure to initialize
557 *
558 * ixgb_sw_init initializes the Adapter private data structure.
559 * Fields are initialized based on PCI device information and
560 * OS network device settings (MTU size).
561 **/
562
563static int __devinit
564ixgb_sw_init(struct ixgb_adapter *adapter)
565{
566 struct ixgb_hw *hw = &adapter->hw;
567 struct net_device *netdev = adapter->netdev;
568 struct pci_dev *pdev = adapter->pdev;
569
570 /* PCI config space info */
571
572 hw->vendor_id = pdev->vendor;
573 hw->device_id = pdev->device;
574 hw->subsystem_vendor_id = pdev->subsystem_vendor;
575 hw->subsystem_id = pdev->subsystem_device;
576
577 adapter->rx_buffer_len = IXGB_RXBUFFER_2048;
578
579 hw->max_frame_size = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
580
581 if((hw->device_id == IXGB_DEVICE_ID_82597EX)
940829e2
AK		 582 || (hw->device_id == IXGB_DEVICE_ID_82597EX_CX4)
583 || (hw->device_id == IXGB_DEVICE_ID_82597EX_LR)
584 || (hw->device_id == IXGB_DEVICE_ID_82597EX_SR))
1da177e4
LT		 585 hw->mac_type = ixgb_82597;
586 else {
587 /* should never have loaded on this device */
ec9c3f5d 588 DPRINTK(PROBE, ERR, "unsupported device id\n");
1da177e4
LT		 589 }
590
591 /* enable flow control to be programmed */
592 hw->fc.send_xon = 1;
593
594 atomic_set(&adapter->irq_sem, 1);
595 spin_lock_init(&adapter->tx_lock);
596
597 return 0;
598}
599
600/**
601 * ixgb_open - Called when a network interface is made active
602 * @netdev: network interface device structure
603 *
604 * Returns 0 on success, negative value on failure
605 *
606 * The open entry point is called when a network interface is made
607 * active by the system (IFF_UP). At this point all resources needed
608 * for transmit and receive operations are allocated, the interrupt
609 * handler is registered with the OS, the watchdog timer is started,
610 * and the stack is notified that the interface is ready.
611 **/
612
613static int
614ixgb_open(struct net_device *netdev)
615{
8908c6cd 616 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 617 int err;
618
619 /* allocate transmit descriptors */
620
621 if((err = ixgb_setup_tx_resources(adapter)))
622 goto err_setup_tx;
623
624 /* allocate receive descriptors */
625
626 if((err = ixgb_setup_rx_resources(adapter)))
627 goto err_setup_rx;
628
629 if((err = ixgb_up(adapter)))
630 goto err_up;
631
632 return 0;
633
634err_up:
635 ixgb_free_rx_resources(adapter);
636err_setup_rx:
637 ixgb_free_tx_resources(adapter);
638err_setup_tx:
639 ixgb_reset(adapter);
640
641 return err;
642}
643
644/**
645 * ixgb_close - Disables a network interface
646 * @netdev: network interface device structure
647 *
648 * Returns 0, this is not allowed to fail
649 *
650 * The close entry point is called when an interface is de-activated
651 * by the OS. The hardware is still under the drivers control, but
652 * needs to be disabled. A global MAC reset is issued to stop the
653 * hardware, and all transmit and receive resources are freed.
654 **/
655
656static int
657ixgb_close(struct net_device *netdev)
658{
8908c6cd 659 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 660
661 ixgb_down(adapter, TRUE);
662
663 ixgb_free_tx_resources(adapter);
664 ixgb_free_rx_resources(adapter);
665
666 return 0;
667}
668
669/**
670 * ixgb_setup_tx_resources - allocate Tx resources (Descriptors)
671 * @adapter: board private structure
672 *
673 * Return 0 on success, negative on failure
674 **/
675
676int
677ixgb_setup_tx_resources(struct ixgb_adapter *adapter)
678{
679 struct ixgb_desc_ring *txdr = &adapter->tx_ring;
680 struct pci_dev *pdev = adapter->pdev;
681 int size;
682
683 size = sizeof(struct ixgb_buffer) * txdr->count;
684 txdr->buffer_info = vmalloc(size);
685 if(!txdr->buffer_info) {
ec9c3f5d
AK		 686 DPRINTK(PROBE, ERR,
687 "Unable to allocate transmit descriptor ring memory\n");
1da177e4
LT		 688 return -ENOMEM;
689 }
690 memset(txdr->buffer_info, 0, size);
691
692 /* round up to nearest 4K */
693
694 txdr->size = txdr->count * sizeof(struct ixgb_tx_desc);
695 IXGB_ROUNDUP(txdr->size, 4096);
696
697 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
698 if(!txdr->desc) {
699 vfree(txdr->buffer_info);
ec9c3f5d
AK		 700 DPRINTK(PROBE, ERR,
701 "Unable to allocate transmit descriptor memory\n");
1da177e4
LT		 702 return -ENOMEM;
703 }
704 memset(txdr->desc, 0, txdr->size);
705
706 txdr->next_to_use = 0;
707 txdr->next_to_clean = 0;
708
709 return 0;
710}
711
712/**
713 * ixgb_configure_tx - Configure 82597 Transmit Unit after Reset.
714 * @adapter: board private structure
715 *
716 * Configure the Tx unit of the MAC after a reset.
717 **/
718
719static void
720ixgb_configure_tx(struct ixgb_adapter *adapter)
721{
722 uint64_t tdba = adapter->tx_ring.dma;
723 uint32_t tdlen = adapter->tx_ring.count * sizeof(struct ixgb_tx_desc);
724 uint32_t tctl;
725 struct ixgb_hw *hw = &adapter->hw;
726
727 /* Setup the Base and Length of the Tx Descriptor Ring
728 * tx_ring.dma can be either a 32 or 64 bit value
729 */
730
731 IXGB_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
732 IXGB_WRITE_REG(hw, TDBAH, (tdba >> 32));
733
734 IXGB_WRITE_REG(hw, TDLEN, tdlen);
735
736 /* Setup the HW Tx Head and Tail descriptor pointers */
737
738 IXGB_WRITE_REG(hw, TDH, 0);
739 IXGB_WRITE_REG(hw, TDT, 0);
740
741 /* don't set up txdctl, it induces performance problems if configured
742 * incorrectly */
743 /* Set the Tx Interrupt Delay register */
744
745 IXGB_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
746
747 /* Program the Transmit Control Register */
748
749 tctl = IXGB_TCTL_TCE | IXGB_TCTL_TXEN | IXGB_TCTL_TPDE;
750 IXGB_WRITE_REG(hw, TCTL, tctl);
751
752 /* Setup Transmit Descriptor Settings for this adapter */
753 adapter->tx_cmd_type =
754 IXGB_TX_DESC_TYPE
755 | (adapter->tx_int_delay_enable ? IXGB_TX_DESC_CMD_IDE : 0);
756}
757
758/**
759 * ixgb_setup_rx_resources - allocate Rx resources (Descriptors)
760 * @adapter: board private structure
761 *
762 * Returns 0 on success, negative on failure
763 **/
764
765int
766ixgb_setup_rx_resources(struct ixgb_adapter *adapter)
767{
768 struct ixgb_desc_ring *rxdr = &adapter->rx_ring;
769 struct pci_dev *pdev = adapter->pdev;
770 int size;
771
772 size = sizeof(struct ixgb_buffer) * rxdr->count;
773 rxdr->buffer_info = vmalloc(size);
774 if(!rxdr->buffer_info) {
ec9c3f5d
AK		 775 DPRINTK(PROBE, ERR,
776 "Unable to allocate receive descriptor ring\n");
1da177e4
LT		 777 return -ENOMEM;
778 }
779 memset(rxdr->buffer_info, 0, size);
780
781 /* Round up to nearest 4K */
782
783 rxdr->size = rxdr->count * sizeof(struct ixgb_rx_desc);
784 IXGB_ROUNDUP(rxdr->size, 4096);
785
786 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
787
788 if(!rxdr->desc) {
789 vfree(rxdr->buffer_info);
ec9c3f5d
AK		 790 DPRINTK(PROBE, ERR,
791 "Unable to allocate receive descriptors\n");
1da177e4
LT		 792 return -ENOMEM;
793 }
794 memset(rxdr->desc, 0, rxdr->size);
795
796 rxdr->next_to_clean = 0;
797 rxdr->next_to_use = 0;
798
799 return 0;
800}
801
802/**
803 * ixgb_setup_rctl - configure the receive control register
804 * @adapter: Board private structure
805 **/
806
807static void
808ixgb_setup_rctl(struct ixgb_adapter *adapter)
809{
810 uint32_t rctl;
811
812 rctl = IXGB_READ_REG(&adapter->hw, RCTL);
813
814 rctl &= ~(3 << IXGB_RCTL_MO_SHIFT);
815
816 rctl |=
817 IXGB_RCTL_BAM | IXGB_RCTL_RDMTS_1_2 |
818 IXGB_RCTL_RXEN | IXGB_RCTL_CFF |
819 (adapter->hw.mc_filter_type << IXGB_RCTL_MO_SHIFT);
820
821 rctl |= IXGB_RCTL_SECRC;
822
823 switch (adapter->rx_buffer_len) {
824 case IXGB_RXBUFFER_2048:
825 default:
826 rctl |= IXGB_RCTL_BSIZE_2048;
827 break;
828 case IXGB_RXBUFFER_4096:
829 rctl |= IXGB_RCTL_BSIZE_4096;
830 break;
831 case IXGB_RXBUFFER_8192:
832 rctl |= IXGB_RCTL_BSIZE_8192;
833 break;
834 case IXGB_RXBUFFER_16384:
835 rctl |= IXGB_RCTL_BSIZE_16384;
836 break;
837 }
838
839 IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
840}
841
842/**
843 * ixgb_configure_rx - Configure 82597 Receive Unit after Reset.
844 * @adapter: board private structure
845 *
846 * Configure the Rx unit of the MAC after a reset.
847 **/
848
849static void
850ixgb_configure_rx(struct ixgb_adapter *adapter)
851{
852 uint64_t rdba = adapter->rx_ring.dma;
853 uint32_t rdlen = adapter->rx_ring.count * sizeof(struct ixgb_rx_desc);
854 struct ixgb_hw *hw = &adapter->hw;
855 uint32_t rctl;
856 uint32_t rxcsum;
857 uint32_t rxdctl;
858
859 /* make sure receives are disabled while setting up the descriptors */
860
861 rctl = IXGB_READ_REG(hw, RCTL);
862 IXGB_WRITE_REG(hw, RCTL, rctl & ~IXGB_RCTL_RXEN);
863
864 /* set the Receive Delay Timer Register */
865
866 IXGB_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
867
868 /* Setup the Base and Length of the Rx Descriptor Ring */
869
870 IXGB_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
871 IXGB_WRITE_REG(hw, RDBAH, (rdba >> 32));
872
873 IXGB_WRITE_REG(hw, RDLEN, rdlen);
874
875 /* Setup the HW Rx Head and Tail Descriptor Pointers */
876 IXGB_WRITE_REG(hw, RDH, 0);
877 IXGB_WRITE_REG(hw, RDT, 0);
878
879 /* set up pre-fetching of receive buffers so we get some before we
880 * run out (default hardware behavior is to run out before fetching
881 * more). This sets up to fetch if HTHRESH rx descriptors are avail
882 * and the descriptors in hw cache are below PTHRESH. This avoids
883 * the hardware behavior of fetching <=512 descriptors in a single
884 * burst that pre-empts all other activity, usually causing fifo
885 * overflows. */
886 /* use WTHRESH to burst write 16 descriptors or burst when RXT0 */
887 rxdctl = RXDCTL_WTHRESH_DEFAULT << IXGB_RXDCTL_WTHRESH_SHIFT |
888 RXDCTL_HTHRESH_DEFAULT << IXGB_RXDCTL_HTHRESH_SHIFT |
889 RXDCTL_PTHRESH_DEFAULT << IXGB_RXDCTL_PTHRESH_SHIFT;
890 IXGB_WRITE_REG(hw, RXDCTL, rxdctl);
891
892 /* Enable Receive Checksum Offload for TCP and UDP */
893 if(adapter->rx_csum == TRUE) {
894 rxcsum = IXGB_READ_REG(hw, RXCSUM);
895 rxcsum |= IXGB_RXCSUM_TUOFL;
896 IXGB_WRITE_REG(hw, RXCSUM, rxcsum);
897 }
898
899 /* Enable Receives */
900
901 IXGB_WRITE_REG(hw, RCTL, rctl);
902}
903
904/**
905 * ixgb_free_tx_resources - Free Tx Resources
906 * @adapter: board private structure
907 *
908 * Free all transmit software resources
909 **/
910
911void
912ixgb_free_tx_resources(struct ixgb_adapter *adapter)
913{
914 struct pci_dev *pdev = adapter->pdev;
915
916 ixgb_clean_tx_ring(adapter);
917
918 vfree(adapter->tx_ring.buffer_info);
919 adapter->tx_ring.buffer_info = NULL;
920
921 pci_free_consistent(pdev, adapter->tx_ring.size,
922 adapter->tx_ring.desc, adapter->tx_ring.dma);
923
924 adapter->tx_ring.desc = NULL;
925}
926
927static inline void
928ixgb_unmap_and_free_tx_resource(struct ixgb_adapter *adapter,
929 struct ixgb_buffer *buffer_info)
930{
931 struct pci_dev *pdev = adapter->pdev;
1dfdd7df
AK		 932
933 if (buffer_info->dma)
934 pci_unmap_page(pdev, buffer_info->dma, buffer_info->length,
935 PCI_DMA_TODEVICE);
936
937 if (buffer_info->skb)
1da177e4 938 dev_kfree_skb_any(buffer_info->skb);
1dfdd7df
AK		 939
940 buffer_info->skb = NULL;
941 buffer_info->dma = 0;
942 buffer_info->time_stamp = 0;
943 /* these fields must always be initialized in tx
944 * buffer_info->length = 0;
945 * buffer_info->next_to_watch = 0; */
1da177e4
LT		 946}
947
948/**
949 * ixgb_clean_tx_ring - Free Tx Buffers
950 * @adapter: board private structure
951 **/
952
953static void
954ixgb_clean_tx_ring(struct ixgb_adapter *adapter)
955{
956 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
957 struct ixgb_buffer *buffer_info;
958 unsigned long size;
959 unsigned int i;
960
961 /* Free all the Tx ring sk_buffs */
962
963 for(i = 0; i < tx_ring->count; i++) {
964 buffer_info = &tx_ring->buffer_info[i];
965 ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
966 }
967
968 size = sizeof(struct ixgb_buffer) * tx_ring->count;
969 memset(tx_ring->buffer_info, 0, size);
970
971 /* Zero out the descriptor ring */
972
973 memset(tx_ring->desc, 0, tx_ring->size);
974
975 tx_ring->next_to_use = 0;
976 tx_ring->next_to_clean = 0;
977
978 IXGB_WRITE_REG(&adapter->hw, TDH, 0);
979 IXGB_WRITE_REG(&adapter->hw, TDT, 0);
980}
981
982/**
983 * ixgb_free_rx_resources - Free Rx Resources
984 * @adapter: board private structure
985 *
986 * Free all receive software resources
987 **/
988
989void
990ixgb_free_rx_resources(struct ixgb_adapter *adapter)
991{
992 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
993 struct pci_dev *pdev = adapter->pdev;
994
995 ixgb_clean_rx_ring(adapter);
996
997 vfree(rx_ring->buffer_info);
998 rx_ring->buffer_info = NULL;
999
1000 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
1001
1002 rx_ring->desc = NULL;
1003}
1004
1005/**
1006 * ixgb_clean_rx_ring - Free Rx Buffers
1007 * @adapter: board private structure
1008 **/
1009
1010static void
1011ixgb_clean_rx_ring(struct ixgb_adapter *adapter)
1012{
1013 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
1014 struct ixgb_buffer *buffer_info;
1015 struct pci_dev *pdev = adapter->pdev;
1016 unsigned long size;
1017 unsigned int i;
1018
1019 /* Free all the Rx ring sk_buffs */
1020
1021 for(i = 0; i < rx_ring->count; i++) {
1022 buffer_info = &rx_ring->buffer_info[i];
1023 if(buffer_info->skb) {
1024
1025 pci_unmap_single(pdev,
1026 buffer_info->dma,
1027 buffer_info->length,
1028 PCI_DMA_FROMDEVICE);
1029
1030 dev_kfree_skb(buffer_info->skb);
1031
1032 buffer_info->skb = NULL;
1033 }
1034 }
1035
1036 size = sizeof(struct ixgb_buffer) * rx_ring->count;
1037 memset(rx_ring->buffer_info, 0, size);
1038
1039 /* Zero out the descriptor ring */
1040
1041 memset(rx_ring->desc, 0, rx_ring->size);
1042
1043 rx_ring->next_to_clean = 0;
1044 rx_ring->next_to_use = 0;
1045
1046 IXGB_WRITE_REG(&adapter->hw, RDH, 0);
1047 IXGB_WRITE_REG(&adapter->hw, RDT, 0);
1048}
1049
1050/**
1051 * ixgb_set_mac - Change the Ethernet Address of the NIC
1052 * @netdev: network interface device structure
1053 * @p: pointer to an address structure
1054 *
1055 * Returns 0 on success, negative on failure
1056 **/
1057
1058static int
1059ixgb_set_mac(struct net_device *netdev, void *p)
1060{
8908c6cd 1061 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1062 struct sockaddr *addr = p;
1063
1064 if(!is_valid_ether_addr(addr->sa_data))
1065 return -EADDRNOTAVAIL;
1066
1067 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1068
1069 ixgb_rar_set(&adapter->hw, addr->sa_data, 0);
1070
1071 return 0;
1072}
1073
1074/**
1075 * ixgb_set_multi - Multicast and Promiscuous mode set
1076 * @netdev: network interface device structure
1077 *
1078 * The set_multi entry point is called whenever the multicast address
1079 * list or the network interface flags are updated. This routine is
1080 * responsible for configuring the hardware for proper multicast,
1081 * promiscuous mode, and all-multi behavior.
1082 **/
1083
1084static void
1085ixgb_set_multi(struct net_device *netdev)
1086{
8908c6cd 1087 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1088 struct ixgb_hw *hw = &adapter->hw;
1089 struct dev_mc_list *mc_ptr;
1090 uint32_t rctl;
1091 int i;
1092
1093 /* Check for Promiscuous and All Multicast modes */
1094
1095 rctl = IXGB_READ_REG(hw, RCTL);
1096
1097 if(netdev->flags & IFF_PROMISC) {
1098 rctl |= (IXGB_RCTL_UPE | IXGB_RCTL_MPE);
1099 } else if(netdev->flags & IFF_ALLMULTI) {
1100 rctl |= IXGB_RCTL_MPE;
1101 rctl &= ~IXGB_RCTL_UPE;
1102 } else {
1103 rctl &= ~(IXGB_RCTL_UPE | IXGB_RCTL_MPE);
1104 }
1105
1106 if(netdev->mc_count > IXGB_MAX_NUM_MULTICAST_ADDRESSES) {
1107 rctl |= IXGB_RCTL_MPE;
1108 IXGB_WRITE_REG(hw, RCTL, rctl);
1109 } else {
1110 uint8_t mta[netdev->mc_count * IXGB_ETH_LENGTH_OF_ADDRESS];
1111
1112 IXGB_WRITE_REG(hw, RCTL, rctl);
1113
1114 for(i = 0, mc_ptr = netdev->mc_list; mc_ptr;
1115 i++, mc_ptr = mc_ptr->next)
1116 memcpy(&mta[i * IXGB_ETH_LENGTH_OF_ADDRESS],
1117 mc_ptr->dmi_addr, IXGB_ETH_LENGTH_OF_ADDRESS);
1118
1119 ixgb_mc_addr_list_update(hw, mta, netdev->mc_count, 0);
1120 }
1121}
1122
1123/**
1124 * ixgb_watchdog - Timer Call-back
1125 * @data: pointer to netdev cast into an unsigned long
1126 **/
1127
1128static void
1129ixgb_watchdog(unsigned long data)
1130{
1131 struct ixgb_adapter *adapter = (struct ixgb_adapter *)data;
1132 struct net_device *netdev = adapter->netdev;
1133 struct ixgb_desc_ring *txdr = &adapter->tx_ring;
1134
1135 ixgb_check_for_link(&adapter->hw);
1136
1137 if (ixgb_check_for_bad_link(&adapter->hw)) {
1138 /* force the reset path */
1139 netif_stop_queue(netdev);
1140 }
1141
1142 if(adapter->hw.link_up) {
1143 if(!netif_carrier_ok(netdev)) {
ec9c3f5d
AK		 1144 DPRINTK(LINK, INFO,
1145 "NIC Link is Up 10000 Mbps Full Duplex\n");
1da177e4
LT		 1146 adapter->link_speed = 10000;
1147 adapter->link_duplex = FULL_DUPLEX;
1148 netif_carrier_on(netdev);
1149 netif_wake_queue(netdev);
1150 }
1151 } else {
1152 if(netif_carrier_ok(netdev)) {
1153 adapter->link_speed = 0;
1154 adapter->link_duplex = 0;
ec9c3f5d 1155 DPRINTK(LINK, INFO, "NIC Link is Down\n");
1da177e4
LT		 1156 netif_carrier_off(netdev);
1157 netif_stop_queue(netdev);
1158
1159 }
1160 }
1161
1162 ixgb_update_stats(adapter);
1163
1164 if(!netif_carrier_ok(netdev)) {
1165 if(IXGB_DESC_UNUSED(txdr) + 1 < txdr->count) {
1166 /* We've lost link, so the controller stops DMA,
1167 * but we've got queued Tx work that's never going
1168 * to get done, so reset controller to flush Tx.
1169 * (Do the reset outside of interrupt context). */
1170 schedule_work(&adapter->tx_timeout_task);
1171 }
1172 }
1173
1174 /* Force detection of hung controller every watchdog period */
1175 adapter->detect_tx_hung = TRUE;
1176
1177 /* generate an interrupt to force clean up of any stragglers */
1178 IXGB_WRITE_REG(&adapter->hw, ICS, IXGB_INT_TXDW);
1179
1180 /* Reset the timer */
1181 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
1182}
1183
1184#define IXGB_TX_FLAGS_CSUM 0x00000001
1185#define IXGB_TX_FLAGS_VLAN 0x00000002
1186#define IXGB_TX_FLAGS_TSO 0x00000004
1187
1188static inline int
1189ixgb_tso(struct ixgb_adapter *adapter, struct sk_buff *skb)
1190{
1191#ifdef NETIF_F_TSO
1192 struct ixgb_context_desc *context_desc;
1193 unsigned int i;
1194 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
1195 uint16_t ipcse, tucse, mss;
1196 int err;
1197
1198 if(likely(skb_shinfo(skb)->tso_size)) {
1199 if (skb_header_cloned(skb)) {
1200 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
1201 if (err)
1202 return err;
1203 }
1204
1205 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
1206 mss = skb_shinfo(skb)->tso_size;
1207 skb->nh.iph->tot_len = 0;
1208 skb->nh.iph->check = 0;
1209 skb->h.th->check = ~csum_tcpudp_magic(skb->nh.iph->saddr,
1210 skb->nh.iph->daddr,
1211 0, IPPROTO_TCP, 0);
1212 ipcss = skb->nh.raw - skb->data;
1213 ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
1214 ipcse = skb->h.raw - skb->data - 1;
1215 tucss = skb->h.raw - skb->data;
1216 tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
1217 tucse = 0;
1218
1219 i = adapter->tx_ring.next_to_use;
1220 context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i);
1221
1222 context_desc->ipcss = ipcss;
1223 context_desc->ipcso = ipcso;
1224 context_desc->ipcse = cpu_to_le16(ipcse);
1225 context_desc->tucss = tucss;
1226 context_desc->tucso = tucso;
1227 context_desc->tucse = cpu_to_le16(tucse);
1228 context_desc->mss = cpu_to_le16(mss);
1229 context_desc->hdr_len = hdr_len;
1230 context_desc->status = 0;
1231 context_desc->cmd_type_len = cpu_to_le32(
1232 IXGB_CONTEXT_DESC_TYPE
1233 | IXGB_CONTEXT_DESC_CMD_TSE
1234 | IXGB_CONTEXT_DESC_CMD_IP
1235 | IXGB_CONTEXT_DESC_CMD_TCP
1da177e4
LT		 1236 | IXGB_CONTEXT_DESC_CMD_IDE
1237 | (skb->len - (hdr_len)));
1238
06c2f9ec 1239
1da177e4
LT		 1240 if(++i == adapter->tx_ring.count) i = 0;
1241 adapter->tx_ring.next_to_use = i;
1242
1243 return 1;
1244 }
1245#endif
1246
1247 return 0;
1248}
1249
1250static inline boolean_t
1251ixgb_tx_csum(struct ixgb_adapter *adapter, struct sk_buff *skb)
1252{
1253 struct ixgb_context_desc *context_desc;
1254 unsigned int i;
1255 uint8_t css, cso;
1256
1257 if(likely(skb->ip_summed == CHECKSUM_HW)) {
1258 css = skb->h.raw - skb->data;
1259 cso = (skb->h.raw + skb->csum) - skb->data;
1260
1261 i = adapter->tx_ring.next_to_use;
1262 context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i);
1263
1264 context_desc->tucss = css;
1265 context_desc->tucso = cso;
1266 context_desc->tucse = 0;
1267 /* zero out any previously existing data in one instruction */
1268 *(uint32_t *)&(context_desc->ipcss) = 0;
1269 context_desc->status = 0;
1270 context_desc->hdr_len = 0;
1271 context_desc->mss = 0;
1272 context_desc->cmd_type_len =
1273 cpu_to_le32(IXGB_CONTEXT_DESC_TYPE
06c2f9ec 1274 | IXGB_TX_DESC_CMD_IDE);
1da177e4
LT		 1275
1276 if(++i == adapter->tx_ring.count) i = 0;
1277 adapter->tx_ring.next_to_use = i;
1278
1279 return TRUE;
1280 }
1281
1282 return FALSE;
1283}
1284
1285#define IXGB_MAX_TXD_PWR 14
1286#define IXGB_MAX_DATA_PER_TXD (1<<IXGB_MAX_TXD_PWR)
1287
1288static inline int
1289ixgb_tx_map(struct ixgb_adapter *adapter, struct sk_buff *skb,
1290 unsigned int first)
1291{
1292 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1293 struct ixgb_buffer *buffer_info;
1294 int len = skb->len;
1295 unsigned int offset = 0, size, count = 0, i;
96f9c2e2 1296 unsigned int mss = skb_shinfo(skb)->tso_size;
1da177e4
LT		 1297
1298 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
1299 unsigned int f;
ac79c82e 1300
1da177e4
LT		 1301 len -= skb->data_len;
1302
1303 i = tx_ring->next_to_use;
1304
1305 while(len) {
1306 buffer_info = &tx_ring->buffer_info[i];
1307 size = min(len, IXGB_MAX_JUMBO_FRAME_SIZE);
96f9c2e2
AK		 1308 /* Workaround for premature desc write-backs
1309 * in TSO mode. Append 4-byte sentinel desc */
1310 if(unlikely(mss && !nr_frags && size == len && size > 8))
1311 size -= 4;
1312
1da177e4
LT		 1313 buffer_info->length = size;
1314 buffer_info->dma =
1315 pci_map_single(adapter->pdev,
1316 skb->data + offset,
1317 size,
1318 PCI_DMA_TODEVICE);
1319 buffer_info->time_stamp = jiffies;
1dfdd7df 1320 buffer_info->next_to_watch = 0;
1da177e4
LT		 1321
1322 len -= size;
1323 offset += size;
1324 count++;
1325 if(++i == tx_ring->count) i = 0;
1326 }
1327
1328 for(f = 0; f < nr_frags; f++) {
1329 struct skb_frag_struct *frag;
1330
1331 frag = &skb_shinfo(skb)->frags[f];
1332 len = frag->size;
1333 offset = 0;
1334
1335 while(len) {
1336 buffer_info = &tx_ring->buffer_info[i];
1337 size = min(len, IXGB_MAX_JUMBO_FRAME_SIZE);
96f9c2e2
AK		 1338 /* Workaround for premature desc write-backs
1339 * in TSO mode. Append 4-byte sentinel desc */
1340 if(unlikely(mss && (f == (nr_frags-1)) && (size == len)
1341 && (size > 8)))
1342 size -= 4;
1343
1da177e4
LT		 1344 buffer_info->length = size;
1345 buffer_info->dma =
1346 pci_map_page(adapter->pdev,
1347 frag->page,
1348 frag->page_offset + offset,
1349 size,
1350 PCI_DMA_TODEVICE);
1351 buffer_info->time_stamp = jiffies;
1dfdd7df 1352 buffer_info->next_to_watch = 0;
1da177e4
LT		 1353
1354 len -= size;
1355 offset += size;
1356 count++;
1357 if(++i == tx_ring->count) i = 0;
1358 }
1359 }
1360 i = (i == 0) ? tx_ring->count - 1 : i - 1;
1361 tx_ring->buffer_info[i].skb = skb;
1362 tx_ring->buffer_info[first].next_to_watch = i;
1363
1364 return count;
1365}
1366
1367static inline void
1368ixgb_tx_queue(struct ixgb_adapter *adapter, int count, int vlan_id,int tx_flags)
1369{
1370 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1371 struct ixgb_tx_desc *tx_desc = NULL;
1372 struct ixgb_buffer *buffer_info;
1373 uint32_t cmd_type_len = adapter->tx_cmd_type;
1374 uint8_t status = 0;
1375 uint8_t popts = 0;
1376 unsigned int i;
1377
1378 if(tx_flags & IXGB_TX_FLAGS_TSO) {
1379 cmd_type_len |= IXGB_TX_DESC_CMD_TSE;
1380 popts |= (IXGB_TX_DESC_POPTS_IXSM | IXGB_TX_DESC_POPTS_TXSM);
1381 }
1382
1383 if(tx_flags & IXGB_TX_FLAGS_CSUM)
1384 popts |= IXGB_TX_DESC_POPTS_TXSM;
1385
1386 if(tx_flags & IXGB_TX_FLAGS_VLAN) {
1387 cmd_type_len |= IXGB_TX_DESC_CMD_VLE;
1388 }
1389
1390 i = tx_ring->next_to_use;
1391
1392 while(count--) {
1393 buffer_info = &tx_ring->buffer_info[i];
1394 tx_desc = IXGB_TX_DESC(*tx_ring, i);
1395 tx_desc->buff_addr = cpu_to_le64(buffer_info->dma);
1396 tx_desc->cmd_type_len =
1397 cpu_to_le32(cmd_type_len | buffer_info->length);
1398 tx_desc->status = status;
1399 tx_desc->popts = popts;
1400 tx_desc->vlan = cpu_to_le16(vlan_id);
1401
1402 if(++i == tx_ring->count) i = 0;
1403 }
1404
1405 tx_desc->cmd_type_len |= cpu_to_le32(IXGB_TX_DESC_CMD_EOP
1406 | IXGB_TX_DESC_CMD_RS );
1407
1408 /* Force memory writes to complete before letting h/w
1409 * know there are new descriptors to fetch. (Only
1410 * applicable for weak-ordered memory model archs,
1411 * such as IA-64). */
1412 wmb();
1413
1414 tx_ring->next_to_use = i;
1415 IXGB_WRITE_REG(&adapter->hw, TDT, i);
1416}
1417
1418/* Tx Descriptors needed, worst case */
1419#define TXD_USE_COUNT(S) (((S) >> IXGB_MAX_TXD_PWR) + \
1420 (((S) & (IXGB_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
1421#define DESC_NEEDED TXD_USE_COUNT(IXGB_MAX_DATA_PER_TXD) + \
96f9c2e2
AK		 1422 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1 \
1423 /* one more for TSO workaround */ + 1
1da177e4
LT		 1424
1425static int
1426ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
1427{
8908c6cd 1428 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1429 unsigned int first;
1430 unsigned int tx_flags = 0;
1431 unsigned long flags;
1432 int vlan_id = 0;
1433 int tso;
1434
1435 if(skb->len <= 0) {
1436 dev_kfree_skb_any(skb);
1437 return 0;
1438 }
1439
f017f14b
AK		 1440#ifdef NETIF_F_LLTX
1441 local_irq_save(flags);
1442 if (!spin_trylock(&adapter->tx_lock)) {
1443 /* Collision - tell upper layer to requeue */
1444 local_irq_restore(flags);
1445 return NETDEV_TX_LOCKED;
1446 }
1447#else
1da177e4 1448 spin_lock_irqsave(&adapter->tx_lock, flags);
f017f14b
AK		 1449#endif
1450
1da177e4
LT		 1451 if(unlikely(IXGB_DESC_UNUSED(&adapter->tx_ring) < DESC_NEEDED)) {
1452 netif_stop_queue(netdev);
1453 spin_unlock_irqrestore(&adapter->tx_lock, flags);
f017f14b 1454 return NETDEV_TX_BUSY;
1da177e4 1455 }
f017f14b
AK		 1456
1457#ifndef NETIF_F_LLTX
1da177e4 1458 spin_unlock_irqrestore(&adapter->tx_lock, flags);
f017f14b 1459#endif
1da177e4
LT		 1460
1461 if(adapter->vlgrp && vlan_tx_tag_present(skb)) {
1462 tx_flags |= IXGB_TX_FLAGS_VLAN;
1463 vlan_id = vlan_tx_tag_get(skb);
1464 }
1465
1466 first = adapter->tx_ring.next_to_use;
1467
1468 tso = ixgb_tso(adapter, skb);
1469 if (tso < 0) {
1470 dev_kfree_skb_any(skb);
f017f14b
AK		 1471#ifdef NETIF_F_LLTX
1472 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1473#endif
1da177e4
LT		 1474 return NETDEV_TX_OK;
1475 }
1476
96f9c2e2 1477 if (likely(tso))
1da177e4
LT		 1478 tx_flags |= IXGB_TX_FLAGS_TSO;
1479 else if(ixgb_tx_csum(adapter, skb))
1480 tx_flags |= IXGB_TX_FLAGS_CSUM;
1481
1482 ixgb_tx_queue(adapter, ixgb_tx_map(adapter, skb, first), vlan_id,
1483 tx_flags);
1484
1485 netdev->trans_start = jiffies;
1486
f017f14b
AK		 1487#ifdef NETIF_F_LLTX
1488 /* Make sure there is space in the ring for the next send. */
1489 if(unlikely(IXGB_DESC_UNUSED(&adapter->tx_ring) < DESC_NEEDED))
1490 netif_stop_queue(netdev);
1491
1492 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1493
1494#endif
1495 return NETDEV_TX_OK;
1da177e4
LT		 1496}
1497
1498/**
1499 * ixgb_tx_timeout - Respond to a Tx Hang
1500 * @netdev: network interface device structure
1501 **/
1502
1503static void
1504ixgb_tx_timeout(struct net_device *netdev)
1505{
8908c6cd 1506 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1507
1508 /* Do the reset outside of interrupt context */
1509 schedule_work(&adapter->tx_timeout_task);
1510}
1511
1512static void
1513ixgb_tx_timeout_task(struct net_device *netdev)
1514{
8908c6cd 1515 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4 1516
9b8118df 1517 adapter->tx_timeout_count++;
1da177e4
LT		 1518 ixgb_down(adapter, TRUE);
1519 ixgb_up(adapter);
1520}
1521
1522/**
1523 * ixgb_get_stats - Get System Network Statistics
1524 * @netdev: network interface device structure
1525 *
1526 * Returns the address of the device statistics structure.
1527 * The statistics are actually updated from the timer callback.
1528 **/
1529
1530static struct net_device_stats *
1531ixgb_get_stats(struct net_device *netdev)
1532{
8908c6cd 1533 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1534
1535 return &adapter->net_stats;
1536}
1537
1538/**
1539 * ixgb_change_mtu - Change the Maximum Transfer Unit
1540 * @netdev: network interface device structure
1541 * @new_mtu: new value for maximum frame size
1542 *
1543 * Returns 0 on success, negative on failure
1544 **/
1545
1546static int
1547ixgb_change_mtu(struct net_device *netdev, int new_mtu)
1548{
8908c6cd 1549 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1550 int max_frame = new_mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
1551 int old_max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
1552
1553
1554 if((max_frame < IXGB_MIN_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH)
1555 || (max_frame > IXGB_MAX_JUMBO_FRAME_SIZE + ENET_FCS_LENGTH)) {
ec9c3f5d 1556 DPRINTK(PROBE, ERR, "Invalid MTU setting %d\n", new_mtu);
1da177e4
LT		 1557 return -EINVAL;
1558 }
1559
1560 if((max_frame <= IXGB_MAX_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH)
1561 || (max_frame <= IXGB_RXBUFFER_2048)) {
1562 adapter->rx_buffer_len = IXGB_RXBUFFER_2048;
1563
1564 } else if(max_frame <= IXGB_RXBUFFER_4096) {
1565 adapter->rx_buffer_len = IXGB_RXBUFFER_4096;
1566
1567 } else if(max_frame <= IXGB_RXBUFFER_8192) {
1568 adapter->rx_buffer_len = IXGB_RXBUFFER_8192;
1569
1570 } else {
1571 adapter->rx_buffer_len = IXGB_RXBUFFER_16384;
1572 }
1573
1574 netdev->mtu = new_mtu;
1575
1576 if(old_max_frame != max_frame && netif_running(netdev)) {
1577
1578 ixgb_down(adapter, TRUE);
1579 ixgb_up(adapter);
1580 }
1581
1582 return 0;
1583}
1584
1585/**
1586 * ixgb_update_stats - Update the board statistics counters.
1587 * @adapter: board private structure
1588 **/
1589
1590void
1591ixgb_update_stats(struct ixgb_adapter *adapter)
1592{
5633684d
MC		 1593 struct net_device *netdev = adapter->netdev;
1594
1595 if((netdev->flags & IFF_PROMISC) || (netdev->flags & IFF_ALLMULTI) ||
1596 (netdev->mc_count > IXGB_MAX_NUM_MULTICAST_ADDRESSES)) {
1597 u64 multi = IXGB_READ_REG(&adapter->hw, MPRCL);
1598 u32 bcast_l = IXGB_READ_REG(&adapter->hw, BPRCL);
1599 u32 bcast_h = IXGB_READ_REG(&adapter->hw, BPRCH);
1600 u64 bcast = ((u64)bcast_h << 32) | bcast_l;
1601
1602 multi |= ((u64)IXGB_READ_REG(&adapter->hw, MPRCH) << 32);
1603 /* fix up multicast stats by removing broadcasts */
7b89178d
MC		 1604 if(multi >= bcast)
1605 multi -= bcast;
5633684d
MC		 1606
1607 adapter->stats.mprcl += (multi & 0xFFFFFFFF);
1608 adapter->stats.mprch += (multi >> 32);
1609 adapter->stats.bprcl += bcast_l;
1610 adapter->stats.bprch += bcast_h;
1611 } else {
1612 adapter->stats.mprcl += IXGB_READ_REG(&adapter->hw, MPRCL);
1613 adapter->stats.mprch += IXGB_READ_REG(&adapter->hw, MPRCH);
1614 adapter->stats.bprcl += IXGB_READ_REG(&adapter->hw, BPRCL);
1615 adapter->stats.bprch += IXGB_READ_REG(&adapter->hw, BPRCH);
1616 }
1da177e4
LT		 1617 adapter->stats.tprl += IXGB_READ_REG(&adapter->hw, TPRL);
1618 adapter->stats.tprh += IXGB_READ_REG(&adapter->hw, TPRH);
1619 adapter->stats.gprcl += IXGB_READ_REG(&adapter->hw, GPRCL);
1620 adapter->stats.gprch += IXGB_READ_REG(&adapter->hw, GPRCH);
1da177e4
LT		 1621 adapter->stats.uprcl += IXGB_READ_REG(&adapter->hw, UPRCL);
1622 adapter->stats.uprch += IXGB_READ_REG(&adapter->hw, UPRCH);
1623 adapter->stats.vprcl += IXGB_READ_REG(&adapter->hw, VPRCL);
1624 adapter->stats.vprch += IXGB_READ_REG(&adapter->hw, VPRCH);
1625 adapter->stats.jprcl += IXGB_READ_REG(&adapter->hw, JPRCL);
1626 adapter->stats.jprch += IXGB_READ_REG(&adapter->hw, JPRCH);
1627 adapter->stats.gorcl += IXGB_READ_REG(&adapter->hw, GORCL);
1628 adapter->stats.gorch += IXGB_READ_REG(&adapter->hw, GORCH);
1629 adapter->stats.torl += IXGB_READ_REG(&adapter->hw, TORL);
1630 adapter->stats.torh += IXGB_READ_REG(&adapter->hw, TORH);
1631 adapter->stats.rnbc += IXGB_READ_REG(&adapter->hw, RNBC);
1632 adapter->stats.ruc += IXGB_READ_REG(&adapter->hw, RUC);
1633 adapter->stats.roc += IXGB_READ_REG(&adapter->hw, ROC);
1634 adapter->stats.rlec += IXGB_READ_REG(&adapter->hw, RLEC);
1635 adapter->stats.crcerrs += IXGB_READ_REG(&adapter->hw, CRCERRS);
1636 adapter->stats.icbc += IXGB_READ_REG(&adapter->hw, ICBC);
1637 adapter->stats.ecbc += IXGB_READ_REG(&adapter->hw, ECBC);
1638 adapter->stats.mpc += IXGB_READ_REG(&adapter->hw, MPC);
1639 adapter->stats.tptl += IXGB_READ_REG(&adapter->hw, TPTL);
1640 adapter->stats.tpth += IXGB_READ_REG(&adapter->hw, TPTH);
1641 adapter->stats.gptcl += IXGB_READ_REG(&adapter->hw, GPTCL);
1642 adapter->stats.gptch += IXGB_READ_REG(&adapter->hw, GPTCH);
1643 adapter->stats.bptcl += IXGB_READ_REG(&adapter->hw, BPTCL);
1644 adapter->stats.bptch += IXGB_READ_REG(&adapter->hw, BPTCH);
1645 adapter->stats.mptcl += IXGB_READ_REG(&adapter->hw, MPTCL);
1646 adapter->stats.mptch += IXGB_READ_REG(&adapter->hw, MPTCH);
1647 adapter->stats.uptcl += IXGB_READ_REG(&adapter->hw, UPTCL);
1648 adapter->stats.uptch += IXGB_READ_REG(&adapter->hw, UPTCH);
1649 adapter->stats.vptcl += IXGB_READ_REG(&adapter->hw, VPTCL);
1650 adapter->stats.vptch += IXGB_READ_REG(&adapter->hw, VPTCH);
1651 adapter->stats.jptcl += IXGB_READ_REG(&adapter->hw, JPTCL);
1652 adapter->stats.jptch += IXGB_READ_REG(&adapter->hw, JPTCH);
1653 adapter->stats.gotcl += IXGB_READ_REG(&adapter->hw, GOTCL);
1654 adapter->stats.gotch += IXGB_READ_REG(&adapter->hw, GOTCH);
1655 adapter->stats.totl += IXGB_READ_REG(&adapter->hw, TOTL);
1656 adapter->stats.toth += IXGB_READ_REG(&adapter->hw, TOTH);
1657 adapter->stats.dc += IXGB_READ_REG(&adapter->hw, DC);
1658 adapter->stats.plt64c += IXGB_READ_REG(&adapter->hw, PLT64C);
1659 adapter->stats.tsctc += IXGB_READ_REG(&adapter->hw, TSCTC);
1660 adapter->stats.tsctfc += IXGB_READ_REG(&adapter->hw, TSCTFC);
1661 adapter->stats.ibic += IXGB_READ_REG(&adapter->hw, IBIC);
1662 adapter->stats.rfc += IXGB_READ_REG(&adapter->hw, RFC);
1663 adapter->stats.lfc += IXGB_READ_REG(&adapter->hw, LFC);
1664 adapter->stats.pfrc += IXGB_READ_REG(&adapter->hw, PFRC);
1665 adapter->stats.pftc += IXGB_READ_REG(&adapter->hw, PFTC);
1666 adapter->stats.mcfrc += IXGB_READ_REG(&adapter->hw, MCFRC);
1667 adapter->stats.mcftc += IXGB_READ_REG(&adapter->hw, MCFTC);
1668 adapter->stats.xonrxc += IXGB_READ_REG(&adapter->hw, XONRXC);
1669 adapter->stats.xontxc += IXGB_READ_REG(&adapter->hw, XONTXC);
1670 adapter->stats.xoffrxc += IXGB_READ_REG(&adapter->hw, XOFFRXC);
1671 adapter->stats.xofftxc += IXGB_READ_REG(&adapter->hw, XOFFTXC);
1672 adapter->stats.rjc += IXGB_READ_REG(&adapter->hw, RJC);
1673
1674 /* Fill out the OS statistics structure */
1675
1676 adapter->net_stats.rx_packets = adapter->stats.gprcl;
1677 adapter->net_stats.tx_packets = adapter->stats.gptcl;
1678 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
1679 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
1680 adapter->net_stats.multicast = adapter->stats.mprcl;
1681 adapter->net_stats.collisions = 0;
1682
1683 /* ignore RLEC as it reports errors for padded (<64bytes) frames
1684 * with a length in the type/len field */
1685 adapter->net_stats.rx_errors =
1686 /* adapter->stats.rnbc + */ adapter->stats.crcerrs +
1687 adapter->stats.ruc +
1688 adapter->stats.roc /*+ adapter->stats.rlec */ +
1689 adapter->stats.icbc +
1690 adapter->stats.ecbc + adapter->stats.mpc;
1691
1da177e4
LT		 1692 /* see above
1693 * adapter->net_stats.rx_length_errors = adapter->stats.rlec;
1694 */
1695
1696 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
1697 adapter->net_stats.rx_fifo_errors = adapter->stats.mpc;
1698 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
1699 adapter->net_stats.rx_over_errors = adapter->stats.mpc;
1700
1701 adapter->net_stats.tx_errors = 0;
1702 adapter->net_stats.rx_frame_errors = 0;
1703 adapter->net_stats.tx_aborted_errors = 0;
1704 adapter->net_stats.tx_carrier_errors = 0;
1705 adapter->net_stats.tx_fifo_errors = 0;
1706 adapter->net_stats.tx_heartbeat_errors = 0;
1707 adapter->net_stats.tx_window_errors = 0;
1708}
1709
1710#define IXGB_MAX_INTR 10
1711/**
1712 * ixgb_intr - Interrupt Handler
1713 * @irq: interrupt number
1714 * @data: pointer to a network interface device structure
1715 * @pt_regs: CPU registers structure
1716 **/
1717
1718static irqreturn_t
1719ixgb_intr(int irq, void *data, struct pt_regs *regs)
1720{
1721 struct net_device *netdev = data;
8908c6cd 1722 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1723 struct ixgb_hw *hw = &adapter->hw;
1724 uint32_t icr = IXGB_READ_REG(hw, ICR);
1725#ifndef CONFIG_IXGB_NAPI
1726 unsigned int i;
1727#endif
1728
1729 if(unlikely(!icr))
1730 return IRQ_NONE; /* Not our interrupt */
1731
1732 if(unlikely(icr & (IXGB_INT_RXSEQ | IXGB_INT_LSC))) {
1733 mod_timer(&adapter->watchdog_timer, jiffies);
1734 }
1735
1736#ifdef CONFIG_IXGB_NAPI
1737 if(netif_rx_schedule_prep(netdev)) {
1738
1739 /* Disable interrupts and register for poll. The flush
1740 of the posted write is intentionally left out.
1741 */
1742
1743 atomic_inc(&adapter->irq_sem);
1744 IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
1745 __netif_rx_schedule(netdev);
1746 }
1747#else
1748 /* yes, that is actually a & and it is meant to make sure that
1749 * every pass through this for loop checks both receive and
1750 * transmit queues for completed descriptors, intended to
1751 * avoid starvation issues and assist tx/rx fairness. */
1752 for(i = 0; i < IXGB_MAX_INTR; i++)
1753 if(!ixgb_clean_rx_irq(adapter) &
1754 !ixgb_clean_tx_irq(adapter))
1755 break;
1756#endif
1757 return IRQ_HANDLED;
1758}
1759
1760#ifdef CONFIG_IXGB_NAPI
1761/**
1762 * ixgb_clean - NAPI Rx polling callback
1763 * @adapter: board private structure
1764 **/
1765
1766static int
1767ixgb_clean(struct net_device *netdev, int *budget)
1768{
8908c6cd 1769 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1770 int work_to_do = min(*budget, netdev->quota);
1771 int tx_cleaned;
1772 int work_done = 0;
1773
1774 tx_cleaned = ixgb_clean_tx_irq(adapter);
1775 ixgb_clean_rx_irq(adapter, &work_done, work_to_do);
1776
1777 *budget -= work_done;
1778 netdev->quota -= work_done;
1779
1780 /* if no Tx and not enough Rx work done, exit the polling mode */
1781 if((!tx_cleaned && (work_done == 0)) || !netif_running(netdev)) {
1782 netif_rx_complete(netdev);
1783 ixgb_irq_enable(adapter);
1784 return 0;
1785 }
1786
1787 return 1;
1788}
1789#endif
1790
1791/**
1792 * ixgb_clean_tx_irq - Reclaim resources after transmit completes
1793 * @adapter: board private structure
1794 **/
1795
1796static boolean_t
1797ixgb_clean_tx_irq(struct ixgb_adapter *adapter)
1798{
1799 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1800 struct net_device *netdev = adapter->netdev;
1801 struct ixgb_tx_desc *tx_desc, *eop_desc;
1802 struct ixgb_buffer *buffer_info;
1803 unsigned int i, eop;
1804 boolean_t cleaned = FALSE;
1805
1806 i = tx_ring->next_to_clean;
1807 eop = tx_ring->buffer_info[i].next_to_watch;
1808 eop_desc = IXGB_TX_DESC(*tx_ring, eop);
1809
1810 while(eop_desc->status & IXGB_TX_DESC_STATUS_DD) {
1811
1812 for(cleaned = FALSE; !cleaned; ) {
1813 tx_desc = IXGB_TX_DESC(*tx_ring, i);
1814 buffer_info = &tx_ring->buffer_info[i];
1815
1816 if (tx_desc->popts
1817 & (IXGB_TX_DESC_POPTS_TXSM |
1818 IXGB_TX_DESC_POPTS_IXSM))
1819 adapter->hw_csum_tx_good++;
1820
1821 ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
1822
1823 *(uint32_t *)&(tx_desc->status) = 0;
1824
1825 cleaned = (i == eop);
1826 if(++i == tx_ring->count) i = 0;
1827 }
1828
1829 eop = tx_ring->buffer_info[i].next_to_watch;
1830 eop_desc = IXGB_TX_DESC(*tx_ring, eop);
1831 }
1832
1833 tx_ring->next_to_clean = i;
1834
1835 spin_lock(&adapter->tx_lock);
1836 if(cleaned && netif_queue_stopped(netdev) && netif_carrier_ok(netdev) &&
1837 (IXGB_DESC_UNUSED(tx_ring) > IXGB_TX_QUEUE_WAKE)) {
1838
1839 netif_wake_queue(netdev);
1840 }
1841 spin_unlock(&adapter->tx_lock);
1842
1843 if(adapter->detect_tx_hung) {
1844 /* detect a transmit hang in hardware, this serializes the
1845 * check with the clearing of time_stamp and movement of i */
1846 adapter->detect_tx_hung = FALSE;
9b8118df
AK		 1847 if (tx_ring->buffer_info[eop].dma &&
1848 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp + HZ)
1da177e4 1849 && !(IXGB_READ_REG(&adapter->hw, STATUS) &
9b8118df
AK		 1850 IXGB_STATUS_TXOFF)) {
1851 /* detected Tx unit hang */
1852 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
1853 " TDH <%x>\n"
1854 " TDT <%x>\n"
1855 " next_to_use <%x>\n"
1856 " next_to_clean <%x>\n"
1857 "buffer_info[next_to_clean]\n"
1858 " time_stamp <%lx>\n"
1859 " next_to_watch <%x>\n"
1860 " jiffies <%lx>\n"
1861 " next_to_watch.status <%x>\n",
1862 IXGB_READ_REG(&adapter->hw, TDH),
1863 IXGB_READ_REG(&adapter->hw, TDT),
1864 tx_ring->next_to_use,
1865 tx_ring->next_to_clean,
1866 tx_ring->buffer_info[eop].time_stamp,
1867 eop,
1868 jiffies,
1869 eop_desc->status);
1da177e4 1870 netif_stop_queue(netdev);
9b8118df 1871 }
1da177e4
LT		 1872 }
1873
1874 return cleaned;
1875}
1876
1877/**
1878 * ixgb_rx_checksum - Receive Checksum Offload for 82597.
1879 * @adapter: board private structure
1880 * @rx_desc: receive descriptor
1881 * @sk_buff: socket buffer with received data
1882 **/
1883
1884static inline void
1885ixgb_rx_checksum(struct ixgb_adapter *adapter,
1886 struct ixgb_rx_desc *rx_desc,
1887 struct sk_buff *skb)
1888{
1889 /* Ignore Checksum bit is set OR
1890 * TCP Checksum has not been calculated
1891 */
1892 if((rx_desc->status & IXGB_RX_DESC_STATUS_IXSM) ||
1893 (!(rx_desc->status & IXGB_RX_DESC_STATUS_TCPCS))) {
1894 skb->ip_summed = CHECKSUM_NONE;
1895 return;
1896 }
1897
1898 /* At this point we know the hardware did the TCP checksum */
1899 /* now look at the TCP checksum error bit */
1900 if(rx_desc->errors & IXGB_RX_DESC_ERRORS_TCPE) {
1901 /* let the stack verify checksum errors */
1902 skb->ip_summed = CHECKSUM_NONE;
1903 adapter->hw_csum_rx_error++;
1904 } else {
1905 /* TCP checksum is good */
1906 skb->ip_summed = CHECKSUM_UNNECESSARY;
1907 adapter->hw_csum_rx_good++;
1908 }
1909}
1910
1911/**
1912 * ixgb_clean_rx_irq - Send received data up the network stack,
1913 * @adapter: board private structure
1914 **/
1915
1916static boolean_t
1917#ifdef CONFIG_IXGB_NAPI
1918ixgb_clean_rx_irq(struct ixgb_adapter *adapter, int *work_done, int work_to_do)
1919#else
1920ixgb_clean_rx_irq(struct ixgb_adapter *adapter)
1921#endif
1922{
1923 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
1924 struct net_device *netdev = adapter->netdev;
1925 struct pci_dev *pdev = adapter->pdev;
1926 struct ixgb_rx_desc *rx_desc, *next_rxd;
1927 struct ixgb_buffer *buffer_info, *next_buffer, *next2_buffer;
1da177e4
LT		 1928 uint32_t length;
1929 unsigned int i, j;
1930 boolean_t cleaned = FALSE;
1931
1932 i = rx_ring->next_to_clean;
1933 rx_desc = IXGB_RX_DESC(*rx_ring, i);
1934 buffer_info = &rx_ring->buffer_info[i];
1935
1936 while(rx_desc->status & IXGB_RX_DESC_STATUS_DD) {
f404de1c
MC		 1937 struct sk_buff *skb, *next_skb;
1938 u8 status;
1da177e4
LT		 1939
1940#ifdef CONFIG_IXGB_NAPI
1941 if(*work_done >= work_to_do)
1942 break;
1943
1944 (*work_done)++;
1945#endif
f404de1c 1946 status = rx_desc->status;
1da177e4 1947 skb = buffer_info->skb;
1dfdd7df 1948 buffer_info->skb = NULL;
f404de1c 1949
1da177e4
LT		 1950 prefetch(skb->data);
1951
1952 if(++i == rx_ring->count) i = 0;
1953 next_rxd = IXGB_RX_DESC(*rx_ring, i);
1954 prefetch(next_rxd);
1955
1956 if((j = i + 1) == rx_ring->count) j = 0;
1957 next2_buffer = &rx_ring->buffer_info[j];
1958 prefetch(next2_buffer);
1959
1960 next_buffer = &rx_ring->buffer_info[i];
1961 next_skb = next_buffer->skb;
1962 prefetch(next_skb);
1963
1da177e4
LT		 1964 cleaned = TRUE;
1965
1966 pci_unmap_single(pdev,
1967 buffer_info->dma,
1968 buffer_info->length,
1969 PCI_DMA_FROMDEVICE);
1970
1971 length = le16_to_cpu(rx_desc->length);
1972
f404de1c 1973 if(unlikely(!(status & IXGB_RX_DESC_STATUS_EOP))) {
1da177e4
LT		 1974
1975 /* All receives must fit into a single buffer */
1976
1977 IXGB_DBG("Receive packet consumed multiple buffers "
1978 "length<%x>\n", length);
1979
1980 dev_kfree_skb_irq(skb);
f404de1c 1981 goto rxdesc_done;
1da177e4
LT		 1982 }
1983
1984 if (unlikely(rx_desc->errors
1985 & (IXGB_RX_DESC_ERRORS_CE | IXGB_RX_DESC_ERRORS_SE
1986 | IXGB_RX_DESC_ERRORS_P |
1987 IXGB_RX_DESC_ERRORS_RXE))) {
1988
1989 dev_kfree_skb_irq(skb);
f404de1c 1990 goto rxdesc_done;
1da177e4
LT		 1991 }
1992
6b900bb4
AK		 1993 /* code added for copybreak, this should improve
1994 * performance for small packets with large amounts
1995 * of reassembly being done in the stack */
1996#define IXGB_CB_LENGTH 256
1997 if (length < IXGB_CB_LENGTH) {
1998 struct sk_buff *new_skb =
1999 dev_alloc_skb(length + NET_IP_ALIGN);
2000 if (new_skb) {
2001 skb_reserve(new_skb, NET_IP_ALIGN);
2002 new_skb->dev = netdev;
2003 memcpy(new_skb->data - NET_IP_ALIGN,
2004 skb->data - NET_IP_ALIGN,
2005 length + NET_IP_ALIGN);
2006 /* save the skb in buffer_info as good */
2007 buffer_info->skb = skb;
2008 skb = new_skb;
2009 }
2010 }
2011 /* end copybreak code */
2012
1da177e4
LT		 2013 /* Good Receive */
2014 skb_put(skb, length);
2015
2016 /* Receive Checksum Offload */
2017 ixgb_rx_checksum(adapter, rx_desc, skb);
2018
2019 skb->protocol = eth_type_trans(skb, netdev);
2020#ifdef CONFIG_IXGB_NAPI
f404de1c 2021 if(adapter->vlgrp && (status & IXGB_RX_DESC_STATUS_VP)) {
1da177e4
LT		 2022 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
2023 le16_to_cpu(rx_desc->special) &
2024 IXGB_RX_DESC_SPECIAL_VLAN_MASK);
2025 } else {
2026 netif_receive_skb(skb);
2027 }
2028#else /* CONFIG_IXGB_NAPI */
f404de1c 2029 if(adapter->vlgrp && (status & IXGB_RX_DESC_STATUS_VP)) {
1da177e4
LT		 2030 vlan_hwaccel_rx(skb, adapter->vlgrp,
2031 le16_to_cpu(rx_desc->special) &
2032 IXGB_RX_DESC_SPECIAL_VLAN_MASK);
2033 } else {
2034 netif_rx(skb);
2035 }
2036#endif /* CONFIG_IXGB_NAPI */
2037 netdev->last_rx = jiffies;
2038
f404de1c
MC		 2039rxdesc_done:
2040 /* clean up descriptor, might be written over by hw */
1da177e4 2041 rx_desc->status = 0;
1da177e4 2042
f404de1c 2043 /* use prefetched values */
1da177e4
LT		 2044 rx_desc = next_rxd;
2045 buffer_info = next_buffer;
2046 }
2047
2048 rx_ring->next_to_clean = i;
2049
2050 ixgb_alloc_rx_buffers(adapter);
2051
2052 return cleaned;
2053}
2054
2055/**
2056 * ixgb_alloc_rx_buffers - Replace used receive buffers
2057 * @adapter: address of board private structure
2058 **/
2059
2060static void
2061ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter)
2062{
2063 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
2064 struct net_device *netdev = adapter->netdev;
2065 struct pci_dev *pdev = adapter->pdev;
2066 struct ixgb_rx_desc *rx_desc;
2067 struct ixgb_buffer *buffer_info;
2068 struct sk_buff *skb;
2069 unsigned int i;
2070 int num_group_tail_writes;
2071 long cleancount;
2072
2073 i = rx_ring->next_to_use;
2074 buffer_info = &rx_ring->buffer_info[i];
2075 cleancount = IXGB_DESC_UNUSED(rx_ring);
2076
2077 num_group_tail_writes = IXGB_RX_BUFFER_WRITE;
2078
41639fed
MC		 2079 /* leave three descriptors unused */
2080 while(--cleancount > 2) {
1dfdd7df
AK		 2081 /* recycle! its good for you */
2082 if (!(skb = buffer_info->skb))
2083 skb = dev_alloc_skb(adapter->rx_buffer_len
2084 + NET_IP_ALIGN);
2085 else {
2086 skb_trim(skb, 0);
2087 goto map_skb;
2088 }
1da177e4 2089
1dfdd7df 2090 if (unlikely(!skb)) {
1da177e4 2091 /* Better luck next round */
1dfdd7df 2092 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 2093 break;
2094 }
2095
2096 /* Make buffer alignment 2 beyond a 16 byte boundary
2097 * this will result in a 16 byte aligned IP header after
2098 * the 14 byte MAC header is removed
2099 */
2100 skb_reserve(skb, NET_IP_ALIGN);
2101
2102 skb->dev = netdev;
2103
2104 buffer_info->skb = skb;
2105 buffer_info->length = adapter->rx_buffer_len;
1dfdd7df
AK		 2106map_skb:
2107 buffer_info->dma = pci_map_single(pdev,
2108 skb->data,
2109 adapter->rx_buffer_len,
2110 PCI_DMA_FROMDEVICE);
1da177e4 2111
1dfdd7df 2112 rx_desc = IXGB_RX_DESC(*rx_ring, i);
1da177e4 2113 rx_desc->buff_addr = cpu_to_le64(buffer_info->dma);
41639fed
MC		 2114 /* guarantee DD bit not set now before h/w gets descriptor
2115 * this is the rest of the workaround for h/w double
2116 * writeback. */
2117 rx_desc->status = 0;
1da177e4 2118
1da177e4
LT		 2119
2120 if(++i == rx_ring->count) i = 0;
2121 buffer_info = &rx_ring->buffer_info[i];
2122 }
2123
1dfdd7df
AK		 2124 if (likely(rx_ring->next_to_use != i)) {
2125 rx_ring->next_to_use = i;
2126 if (unlikely(i-- == 0))
2127 i = (rx_ring->count - 1);
2128
2129 /* Force memory writes to complete before letting h/w
2130 * know there are new descriptors to fetch. (Only
2131 * applicable for weak-ordered memory model archs, such
2132 * as IA-64). */
2133 wmb();
2134 IXGB_WRITE_REG(&adapter->hw, RDT, i);
2135 }
1da177e4
LT		 2136}
2137
2138/**
2139 * ixgb_vlan_rx_register - enables or disables vlan tagging/stripping.
2140 *
2141 * @param netdev network interface device structure
2142 * @param grp indicates to enable or disable tagging/stripping
2143 **/
2144static void
2145ixgb_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
2146{
8908c6cd 2147 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2148 uint32_t ctrl, rctl;
2149
2150 ixgb_irq_disable(adapter);
2151 adapter->vlgrp = grp;
2152
2153 if(grp) {
2154 /* enable VLAN tag insert/strip */
2155 ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
2156 ctrl |= IXGB_CTRL0_VME;
2157 IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
2158
2159 /* enable VLAN receive filtering */
2160
2161 rctl = IXGB_READ_REG(&adapter->hw, RCTL);
2162 rctl |= IXGB_RCTL_VFE;
2163 rctl &= ~IXGB_RCTL_CFIEN;
2164 IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
2165 } else {
2166 /* disable VLAN tag insert/strip */
2167
2168 ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
2169 ctrl &= ~IXGB_CTRL0_VME;
2170 IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
2171
2172 /* disable VLAN filtering */
2173
2174 rctl = IXGB_READ_REG(&adapter->hw, RCTL);
2175 rctl &= ~IXGB_RCTL_VFE;
2176 IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
2177 }
2178
2179 ixgb_irq_enable(adapter);
2180}
2181
2182static void
2183ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
2184{
8908c6cd 2185 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2186 uint32_t vfta, index;
2187
2188 /* add VID to filter table */
2189
2190 index = (vid >> 5) & 0x7F;
2191 vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index);
2192 vfta |= (1 << (vid & 0x1F));
2193 ixgb_write_vfta(&adapter->hw, index, vfta);
2194}
2195
2196static void
2197ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
2198{
8908c6cd 2199 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2200 uint32_t vfta, index;
2201
2202 ixgb_irq_disable(adapter);
2203
2204 if(adapter->vlgrp)
2205 adapter->vlgrp->vlan_devices[vid] = NULL;
2206
2207 ixgb_irq_enable(adapter);
2208
2209 /* remove VID from filter table*/
2210
2211 index = (vid >> 5) & 0x7F;
2212 vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index);
2213 vfta &= ~(1 << (vid & 0x1F));
2214 ixgb_write_vfta(&adapter->hw, index, vfta);
2215}
2216
2217static void
2218ixgb_restore_vlan(struct ixgb_adapter *adapter)
2219{
2220 ixgb_vlan_rx_register(adapter->netdev, adapter->vlgrp);
2221
2222 if(adapter->vlgrp) {
2223 uint16_t vid;
2224 for(vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
2225 if(!adapter->vlgrp->vlan_devices[vid])
2226 continue;
2227 ixgb_vlan_rx_add_vid(adapter->netdev, vid);
2228 }
2229 }
2230}
2231
1da177e4
LT		 2232#ifdef CONFIG_NET_POLL_CONTROLLER
2233/*
2234 * Polling 'interrupt' - used by things like netconsole to send skbs
2235 * without having to re-enable interrupts. It's not called while
2236 * the interrupt routine is executing.
2237 */
2238
2239static void ixgb_netpoll(struct net_device *dev)
2240{
2241 struct ixgb_adapter *adapter = dev->priv;
ac79c82e 2242
1da177e4
LT		 2243 disable_irq(adapter->pdev->irq);
2244 ixgb_intr(adapter->pdev->irq, dev, NULL);
2245 enable_irq(adapter->pdev->irq);
2246}
2247#endif
2248
2249/* ixgb_main.c */
Empty description
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