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c85eb619 EG |
1 | /****************************************************************************** |
2 | * | |
3 | * This file is provided under a dual BSD/GPLv2 license. When using or | |
4 | * redistributing this file, you may do so under either license. | |
5 | * | |
6 | * GPL LICENSE SUMMARY | |
7 | * | |
8 | * Copyright(c) 2007 - 2011 Intel Corporation. All rights reserved. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of version 2 of the GNU General Public License as | |
12 | * published by the Free Software Foundation. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, but | |
15 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
17 | * General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110, | |
22 | * USA | |
23 | * | |
24 | * The full GNU General Public License is included in this distribution | |
25 | * in the file called LICENSE.GPL. | |
26 | * | |
27 | * Contact Information: | |
28 | * Intel Linux Wireless <[email protected]> | |
29 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
30 | * | |
31 | * BSD LICENSE | |
32 | * | |
33 | * Copyright(c) 2005 - 2011 Intel Corporation. All rights reserved. | |
34 | * All rights reserved. | |
35 | * | |
36 | * Redistribution and use in source and binary forms, with or without | |
37 | * modification, are permitted provided that the following conditions | |
38 | * are met: | |
39 | * | |
40 | * * Redistributions of source code must retain the above copyright | |
41 | * notice, this list of conditions and the following disclaimer. | |
42 | * * Redistributions in binary form must reproduce the above copyright | |
43 | * notice, this list of conditions and the following disclaimer in | |
44 | * the documentation and/or other materials provided with the | |
45 | * distribution. | |
46 | * * Neither the name Intel Corporation nor the names of its | |
47 | * contributors may be used to endorse or promote products derived | |
48 | * from this software without specific prior written permission. | |
49 | * | |
50 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | |
51 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | |
52 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR | |
53 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT | |
54 | * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, | |
55 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT | |
56 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | |
57 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY | |
58 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | |
59 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | |
60 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
61 | * | |
62 | *****************************************************************************/ | |
a0f6b0a2 | 63 | #include "iwl-dev.h" |
c85eb619 EG |
64 | #include "iwl-trans.h" |
65 | ||
66 | static int iwl_trans_rx_alloc(struct iwl_priv *priv) | |
67 | { | |
68 | struct iwl_rx_queue *rxq = &priv->rxq; | |
69 | struct device *dev = priv->bus.dev; | |
70 | ||
71 | memset(&priv->rxq, 0, sizeof(priv->rxq)); | |
72 | ||
73 | spin_lock_init(&rxq->lock); | |
74 | INIT_LIST_HEAD(&rxq->rx_free); | |
75 | INIT_LIST_HEAD(&rxq->rx_used); | |
76 | ||
77 | if (WARN_ON(rxq->bd || rxq->rb_stts)) | |
78 | return -EINVAL; | |
79 | ||
80 | /* Allocate the circular buffer of Read Buffer Descriptors (RBDs) */ | |
a0f6b0a2 EG |
81 | rxq->bd = dma_alloc_coherent(dev, sizeof(__le32) * RX_QUEUE_SIZE, |
82 | &rxq->bd_dma, GFP_KERNEL); | |
c85eb619 EG |
83 | if (!rxq->bd) |
84 | goto err_bd; | |
a0f6b0a2 | 85 | memset(rxq->bd, 0, sizeof(__le32) * RX_QUEUE_SIZE); |
c85eb619 EG |
86 | |
87 | /*Allocate the driver's pointer to receive buffer status */ | |
88 | rxq->rb_stts = dma_alloc_coherent(dev, sizeof(*rxq->rb_stts), | |
89 | &rxq->rb_stts_dma, GFP_KERNEL); | |
90 | if (!rxq->rb_stts) | |
91 | goto err_rb_stts; | |
92 | memset(rxq->rb_stts, 0, sizeof(*rxq->rb_stts)); | |
93 | ||
94 | return 0; | |
95 | ||
96 | err_rb_stts: | |
a0f6b0a2 EG |
97 | dma_free_coherent(dev, sizeof(__le32) * RX_QUEUE_SIZE, |
98 | rxq->bd, rxq->bd_dma); | |
c85eb619 EG |
99 | memset(&rxq->bd_dma, 0, sizeof(rxq->bd_dma)); |
100 | rxq->bd = NULL; | |
101 | err_bd: | |
102 | return -ENOMEM; | |
103 | } | |
104 | ||
a0f6b0a2 | 105 | static void iwl_trans_rxq_free_rx_bufs(struct iwl_priv *priv) |
c85eb619 EG |
106 | { |
107 | struct iwl_rx_queue *rxq = &priv->rxq; | |
a0f6b0a2 | 108 | int i; |
c85eb619 EG |
109 | |
110 | /* Fill the rx_used queue with _all_ of the Rx buffers */ | |
111 | for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) { | |
112 | /* In the reset function, these buffers may have been allocated | |
113 | * to an SKB, so we need to unmap and free potential storage */ | |
114 | if (rxq->pool[i].page != NULL) { | |
115 | dma_unmap_page(priv->bus.dev, rxq->pool[i].page_dma, | |
116 | PAGE_SIZE << priv->hw_params.rx_page_order, | |
117 | DMA_FROM_DEVICE); | |
118 | __iwl_free_pages(priv, rxq->pool[i].page); | |
119 | rxq->pool[i].page = NULL; | |
120 | } | |
121 | list_add_tail(&rxq->pool[i].list, &rxq->rx_used); | |
122 | } | |
a0f6b0a2 EG |
123 | } |
124 | ||
125 | static int iwl_trans_rx_init(struct iwl_priv *priv) | |
126 | { | |
127 | struct iwl_rx_queue *rxq = &priv->rxq; | |
128 | int i, err; | |
129 | unsigned long flags; | |
130 | ||
131 | if (!rxq->bd) { | |
132 | err = iwl_trans_rx_alloc(priv); | |
133 | if (err) | |
134 | return err; | |
135 | } | |
136 | ||
137 | spin_lock_irqsave(&rxq->lock, flags); | |
138 | INIT_LIST_HEAD(&rxq->rx_free); | |
139 | INIT_LIST_HEAD(&rxq->rx_used); | |
140 | ||
141 | iwl_trans_rxq_free_rx_bufs(priv); | |
c85eb619 EG |
142 | |
143 | for (i = 0; i < RX_QUEUE_SIZE; i++) | |
144 | rxq->queue[i] = NULL; | |
145 | ||
146 | /* Set us so that we have processed and used all buffers, but have | |
147 | * not restocked the Rx queue with fresh buffers */ | |
148 | rxq->read = rxq->write = 0; | |
149 | rxq->write_actual = 0; | |
150 | rxq->free_count = 0; | |
151 | spin_unlock_irqrestore(&rxq->lock, flags); | |
152 | ||
153 | return 0; | |
154 | } | |
155 | ||
a0f6b0a2 EG |
156 | static void iwl_trans_rx_free(struct iwl_priv *priv) |
157 | { | |
158 | struct iwl_rx_queue *rxq = &priv->rxq; | |
159 | unsigned long flags; | |
160 | ||
161 | /*if rxq->bd is NULL, it means that nothing has been allocated, | |
162 | * exit now */ | |
163 | if (!rxq->bd) { | |
164 | IWL_DEBUG_INFO(priv, "Free NULL rx context\n"); | |
165 | return; | |
166 | } | |
167 | ||
168 | spin_lock_irqsave(&rxq->lock, flags); | |
169 | iwl_trans_rxq_free_rx_bufs(priv); | |
170 | spin_unlock_irqrestore(&rxq->lock, flags); | |
171 | ||
172 | dma_free_coherent(priv->bus.dev, sizeof(__le32) * RX_QUEUE_SIZE, | |
173 | rxq->bd, rxq->bd_dma); | |
174 | memset(&rxq->bd_dma, 0, sizeof(rxq->bd_dma)); | |
175 | rxq->bd = NULL; | |
176 | ||
177 | if (rxq->rb_stts) | |
178 | dma_free_coherent(priv->bus.dev, | |
179 | sizeof(struct iwl_rb_status), | |
180 | rxq->rb_stts, rxq->rb_stts_dma); | |
181 | else | |
182 | IWL_DEBUG_INFO(priv, "Free rxq->rb_stts which is NULL\n"); | |
183 | memset(&rxq->rb_stts_dma, 0, sizeof(rxq->rb_stts_dma)); | |
184 | rxq->rb_stts = NULL; | |
185 | } | |
186 | ||
c85eb619 EG |
187 | static const struct iwl_trans_ops trans_ops = { |
188 | .rx_init = iwl_trans_rx_init, | |
a0f6b0a2 | 189 | .rx_free = iwl_trans_rx_free, |
c85eb619 EG |
190 | }; |
191 | ||
192 | void iwl_trans_register(struct iwl_trans *trans) | |
193 | { | |
194 | trans->ops = &trans_ops; | |
195 | } |