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[linux.git] / sound / pci / fm801.c
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c942fddf 1// SPDX-License-Identifier: GPL-2.0-or-later
1da177e4
LT		 2/*
3 * The driver for the ForteMedia FM801 based soundcards
c1017a4c 4 * Copyright (c) by Jaroslav Kysela <[email protected]>
1da177e4
LT		 5 */
6
1da177e4
LT		 7#include <linux/delay.h>
8#include <linux/init.h>
9#include <linux/interrupt.h>
215dacc2 10#include <linux/io.h>
1da177e4
LT		 11#include <linux/pci.h>
12#include <linux/slab.h>
65a77217 13#include <linux/module.h>
1da177e4
LT		 14#include <sound/core.h>
15#include <sound/pcm.h>
666c70ff 16#include <sound/tlv.h>
1da177e4
LT		 17#include <sound/ac97_codec.h>
18#include <sound/mpu401.h>
19#include <sound/opl3.h>
20#include <sound/initval.h>
21
efce4bb9 22#ifdef CONFIG_SND_FM801_TEA575X_BOOL
d647f0b7 23#include <media/drv-intf/tea575x.h>
1da177e4
LT		 24#endif
25
c1017a4c 26MODULE_AUTHOR("Jaroslav Kysela <[email protected]>");
1da177e4
LT		 27MODULE_DESCRIPTION("ForteMedia FM801");
28MODULE_LICENSE("GPL");
1da177e4
LT		 29
30static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
31static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
a67ff6a5 32static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
1da177e4
LT		 33/*
34 * Enable TEA575x tuner
35 * 1 = MediaForte 256-PCS
d7ba858a 36 * 2 = MediaForte 256-PCP
1da177e4 37 * 3 = MediaForte 64-PCR
fb716c0b 38 * 16 = setup tuner only (this is additional bit), i.e. SF64-PCR FM card
1da177e4
LT		 39 * High 16-bits are video (radio) device number + 1
40 */
6581f4e7 41static int tea575x_tuner[SNDRV_CARDS];
d4ecc83b 42static int radio_nr[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = -1};
1da177e4
LT		 43
44module_param_array(index, int, NULL, 0444);
45MODULE_PARM_DESC(index, "Index value for the FM801 soundcard.");
46module_param_array(id, charp, NULL, 0444);
47MODULE_PARM_DESC(id, "ID string for the FM801 soundcard.");
48module_param_array(enable, bool, NULL, 0444);
49MODULE_PARM_DESC(enable, "Enable FM801 soundcard.");
50module_param_array(tea575x_tuner, int, NULL, 0444);
d7ba858a 51MODULE_PARM_DESC(tea575x_tuner, "TEA575x tuner access method (0 = auto, 1 = SF256-PCS, 2=SF256-PCP, 3=SF64-PCR, 8=disable, +16=tuner-only).");
d4ecc83b
HV		 52module_param_array(radio_nr, int, NULL, 0444);
53MODULE_PARM_DESC(radio_nr, "Radio device numbers");
54
fb716c0b 55
c37279b9 56#define TUNER_DISABLED (1<<3)
fb716c0b
OZ		 57#define TUNER_ONLY (1<<4)
58#define TUNER_TYPE_MASK (~TUNER_ONLY & 0xFFFF)
1da177e4
LT		 59
60/*
61 * Direct registers
62 */
63
215dacc2
AS		 64#define fm801_writew(chip,reg,value) outw((value), chip->port + FM801_##reg)
65#define fm801_readw(chip,reg) inw(chip->port + FM801_##reg)
66
67#define fm801_writel(chip,reg,value) outl((value), chip->port + FM801_##reg)
1da177e4
LT		 68
69#define FM801_PCM_VOL 0x00 /* PCM Output Volume */
70#define FM801_FM_VOL 0x02 /* FM Output Volume */
71#define FM801_I2S_VOL 0x04 /* I2S Volume */
72#define FM801_REC_SRC 0x06 /* Record Source */
73#define FM801_PLY_CTRL 0x08 /* Playback Control */
74#define FM801_PLY_COUNT 0x0a /* Playback Count */
75#define FM801_PLY_BUF1 0x0c /* Playback Bufer I */
76#define FM801_PLY_BUF2 0x10 /* Playback Buffer II */
77#define FM801_CAP_CTRL 0x14 /* Capture Control */
78#define FM801_CAP_COUNT 0x16 /* Capture Count */
79#define FM801_CAP_BUF1 0x18 /* Capture Buffer I */
80#define FM801_CAP_BUF2 0x1c /* Capture Buffer II */
81#define FM801_CODEC_CTRL 0x22 /* Codec Control */
82#define FM801_I2S_MODE 0x24 /* I2S Mode Control */
83#define FM801_VOLUME 0x26 /* Volume Up/Down/Mute Status */
84#define FM801_I2C_CTRL 0x29 /* I2C Control */
85#define FM801_AC97_CMD 0x2a /* AC'97 Command */
86#define FM801_AC97_DATA 0x2c /* AC'97 Data */
87#define FM801_MPU401_DATA 0x30 /* MPU401 Data */
88#define FM801_MPU401_CMD 0x31 /* MPU401 Command */
89#define FM801_GPIO_CTRL 0x52 /* General Purpose I/O Control */
90#define FM801_GEN_CTRL 0x54 /* General Control */
91#define FM801_IRQ_MASK 0x56 /* Interrupt Mask */
92#define FM801_IRQ_STATUS 0x5a /* Interrupt Status */
93#define FM801_OPL3_BANK0 0x68 /* OPL3 Status Read / Bank 0 Write */
94#define FM801_OPL3_DATA0 0x69 /* OPL3 Data 0 Write */
95#define FM801_OPL3_BANK1 0x6a /* OPL3 Bank 1 Write */
96#define FM801_OPL3_DATA1 0x6b /* OPL3 Bank 1 Write */
97#define FM801_POWERDOWN 0x70 /* Blocks Power Down Control */
98
b1e9ed26
TI		 99/* codec access */
100#define FM801_AC97_READ (1<<7) /* read=1, write=0 */
101#define FM801_AC97_VALID (1<<8) /* port valid=1 */
102#define FM801_AC97_BUSY (1<<9) /* busy=1 */
103#define FM801_AC97_ADDR_SHIFT 10 /* codec id (2bit) */
1da177e4
LT		 104
105/* playback and record control register bits */
106#define FM801_BUF1_LAST (1<<1)
107#define FM801_BUF2_LAST (1<<2)
108#define FM801_START (1<<5)
109#define FM801_PAUSE (1<<6)
110#define FM801_IMMED_STOP (1<<7)
111#define FM801_RATE_SHIFT 8
112#define FM801_RATE_MASK (15 << FM801_RATE_SHIFT)
113#define FM801_CHANNELS_4 (1<<12) /* playback only */
114#define FM801_CHANNELS_6 (2<<12) /* playback only */
115#define FM801_CHANNELS_6MS (3<<12) /* playback only */
116#define FM801_CHANNELS_MASK (3<<12)
117#define FM801_16BIT (1<<14)
118#define FM801_STEREO (1<<15)
119
120/* IRQ status bits */
121#define FM801_IRQ_PLAYBACK (1<<8)
122#define FM801_IRQ_CAPTURE (1<<9)
123#define FM801_IRQ_VOLUME (1<<14)
124#define FM801_IRQ_MPU (1<<15)
125
126/* GPIO control register */
127#define FM801_GPIO_GP0 (1<<0) /* read/write */
128#define FM801_GPIO_GP1 (1<<1)
129#define FM801_GPIO_GP2 (1<<2)
130#define FM801_GPIO_GP3 (1<<3)
131#define FM801_GPIO_GP(x) (1<<(0+(x)))
132#define FM801_GPIO_GD0 (1<<8) /* directions: 1 = input, 0 = output*/
133#define FM801_GPIO_GD1 (1<<9)
134#define FM801_GPIO_GD2 (1<<10)
135#define FM801_GPIO_GD3 (1<<11)
136#define FM801_GPIO_GD(x) (1<<(8+(x)))
137#define FM801_GPIO_GS0 (1<<12) /* function select: */
138#define FM801_GPIO_GS1 (1<<13) /* 1 = GPIO */
139#define FM801_GPIO_GS2 (1<<14) /* 0 = other (S/PDIF, VOL) */
140#define FM801_GPIO_GS3 (1<<15)
141#define FM801_GPIO_GS(x) (1<<(12+(x)))
142
052c233e
AS		 143/**
144 * struct fm801 - describes FM801 chip
af8c5dff
PLB		 145 * @dev: device for this chio
146 * @irq: irq number
052c233e
AS		 147 * @port: I/O port number
148 * @multichannel: multichannel support
149 * @secondary: secondary codec
150 * @secondary_addr: address of the secondary codec
151 * @tea575x_tuner: tuner access method & flags
152 * @ply_ctrl: playback control
153 * @cap_ctrl: capture control
af8c5dff
PLB		 154 * @ply_buffer: playback buffer
155 * @ply_buf: playback buffer index
156 * @ply_count: playback buffer count
157 * @ply_size: playback buffer size
158 * @ply_pos: playback position
159 * @cap_buffer: capture buffer
160 * @cap_buf: capture buffer index
161 * @cap_count: capture buffer count
162 * @cap_size: capture buffer size
163 * @cap_pos: capture position
164 * @ac97_bus: ac97 bus handle
165 * @ac97: ac97 handle
166 * @ac97_sec: ac97 secondary handle
167 * @card: ALSA card
168 * @pcm: PCM devices
169 * @rmidi: rmidi device
170 * @playback_substream: substream for playback
171 * @capture_substream: substream for capture
172 * @p_dma_size: playback DMA size
173 * @c_dma_size: capture DMA size
174 * @reg_lock: lock
175 * @proc_entry: /proc entry
176 * @v4l2_dev: v4l2 device
177 * @tea: tea575a structure
178 * @saved_regs: context saved during suspend
1da177e4 179 */
a5f22156 180struct fm801 {
d3d33aab 181 struct device *dev;
1da177e4
LT		 182 int irq;
183
052c233e
AS		 184 unsigned long port;
185 unsigned int multichannel: 1,
186 secondary: 1;
187 unsigned char secondary_addr;
188 unsigned int tea575x_tuner;
1da177e4 189
052c233e
AS		 190 unsigned short ply_ctrl;
191 unsigned short cap_ctrl;
1da177e4
LT		 192
193 unsigned long ply_buffer;
194 unsigned int ply_buf;
195 unsigned int ply_count;
196 unsigned int ply_size;
197 unsigned int ply_pos;
198
199 unsigned long cap_buffer;
200 unsigned int cap_buf;
201 unsigned int cap_count;
202 unsigned int cap_size;
203 unsigned int cap_pos;
204
a5f22156
TI		 205 struct snd_ac97_bus *ac97_bus;
206 struct snd_ac97 *ac97;
207 struct snd_ac97 *ac97_sec;
1da177e4 208
a5f22156
TI		 209 struct snd_card *card;
210 struct snd_pcm *pcm;
211 struct snd_rawmidi *rmidi;
212 struct snd_pcm_substream *playback_substream;
213 struct snd_pcm_substream *capture_substream;
1da177e4
LT		 214 unsigned int p_dma_size;
215 unsigned int c_dma_size;
216
217 spinlock_t reg_lock;
a5f22156 218 struct snd_info_entry *proc_entry;
1da177e4 219
fdb62b50 220#ifdef CONFIG_SND_FM801_TEA575X_BOOL
d4ecc83b 221 struct v4l2_device v4l2_dev;
a5f22156 222 struct snd_tea575x tea;
1da177e4 223#endif
b1e9ed26 224
b1e9ed26 225 u16 saved_regs[0x20];
1da177e4
LT		 226};
227
4b5c15f7
AS		 228/*
229 * IO accessors
230 */
231
232static inline void fm801_iowrite16(struct fm801 *chip, unsigned short offset, u16 value)
233{
234 outw(value, chip->port + offset);
235}
236
237static inline u16 fm801_ioread16(struct fm801 *chip, unsigned short offset)
238{
239 return inw(chip->port + offset);
240}
241
9baa3c34 242static const struct pci_device_id snd_fm801_ids[] = {
1da177e4 243 { 0x1319, 0x0801, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, 0, }, /* FM801 */
26be8659 244 { 0x5213, 0x0510, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, 0, }, /* Gallant Odyssey Sound 4 */
1da177e4
LT		 245 { 0, }
246};
247
248MODULE_DEVICE_TABLE(pci, snd_fm801_ids);
249
250/*
251 * common I/O routines
252 */
253
02fd1a76
AS		 254static bool fm801_ac97_is_ready(struct fm801 *chip, unsigned int iterations)
255{
256 unsigned int idx;
257
258 for (idx = 0; idx < iterations; idx++) {
259 if (!(fm801_readw(chip, AC97_CMD) & FM801_AC97_BUSY))
260 return true;
261 udelay(10);
262 }
263 return false;
264}
265
266static bool fm801_ac97_is_valid(struct fm801 *chip, unsigned int iterations)
267{
268 unsigned int idx;
269
270 for (idx = 0; idx < iterations; idx++) {
271 if (fm801_readw(chip, AC97_CMD) & FM801_AC97_VALID)
272 return true;
273 udelay(10);
274 }
275 return false;
276}
277
a5f22156 278static int snd_fm801_update_bits(struct fm801 *chip, unsigned short reg,
1da177e4
LT		 279 unsigned short mask, unsigned short value)
280{
281 int change;
282 unsigned long flags;
283 unsigned short old, new;
284
285 spin_lock_irqsave(&chip->reg_lock, flags);
4b5c15f7 286 old = fm801_ioread16(chip, reg);
1da177e4
LT		 287 new = (old & ~mask) | value;
288 change = old != new;
289 if (change)
4b5c15f7 290 fm801_iowrite16(chip, reg, new);
1da177e4
LT		 291 spin_unlock_irqrestore(&chip->reg_lock, flags);
292 return change;
293}
294
a5f22156 295static void snd_fm801_codec_write(struct snd_ac97 *ac97,
1da177e4
LT		 296 unsigned short reg,
297 unsigned short val)
298{
a5f22156 299 struct fm801 *chip = ac97->private_data;
1da177e4
LT		 300
301 /*
302 * Wait until the codec interface is not ready..
303 */
02fd1a76
AS		 304 if (!fm801_ac97_is_ready(chip, 100)) {
305 dev_err(chip->card->dev, "AC'97 interface is busy (1)\n");
306 return;
1da177e4 307 }
1da177e4 308
1da177e4 309 /* write data and address */
215dacc2
AS		 310 fm801_writew(chip, AC97_DATA, val);
311 fm801_writew(chip, AC97_CMD, reg | (ac97->addr << FM801_AC97_ADDR_SHIFT));
1da177e4
LT		 312 /*
313 * Wait until the write command is not completed..
02fd1a76
AS		 314 */
315 if (!fm801_ac97_is_ready(chip, 1000))
316 dev_err(chip->card->dev, "AC'97 interface #%d is busy (2)\n",
317 ac97->num);
1da177e4
LT		 318}
319
a5f22156 320static unsigned short snd_fm801_codec_read(struct snd_ac97 *ac97, unsigned short reg)
1da177e4 321{
a5f22156 322 struct fm801 *chip = ac97->private_data;
1da177e4
LT		 323
324 /*
325 * Wait until the codec interface is not ready..
326 */
02fd1a76
AS		 327 if (!fm801_ac97_is_ready(chip, 100)) {
328 dev_err(chip->card->dev, "AC'97 interface is busy (1)\n");
329 return 0;
1da177e4 330 }
1da177e4 331
1da177e4 332 /* read command */
215dacc2
AS		 333 fm801_writew(chip, AC97_CMD,
334 reg | (ac97->addr << FM801_AC97_ADDR_SHIFT) | FM801_AC97_READ);
02fd1a76
AS		 335 if (!fm801_ac97_is_ready(chip, 100)) {
336 dev_err(chip->card->dev, "AC'97 interface #%d is busy (2)\n",
337 ac97->num);
338 return 0;
1da177e4 339 }
1da177e4 340
02fd1a76
AS		 341 if (!fm801_ac97_is_valid(chip, 1000)) {
342 dev_err(chip->card->dev,
343 "AC'97 interface #%d is not valid (2)\n", ac97->num);
344 return 0;
1da177e4 345 }
1da177e4 346
215dacc2 347 return fm801_readw(chip, AC97_DATA);
1da177e4
LT		 348}
349
d71a13f4 350static const unsigned int rates[] = {
1da177e4
LT		 351 5500, 8000, 9600, 11025,
352 16000, 19200, 22050, 32000,
353 38400, 44100, 48000
354};
355
d71a13f4 356static const struct snd_pcm_hw_constraint_list hw_constraints_rates = {
1da177e4
LT		 357 .count = ARRAY_SIZE(rates),
358 .list = rates,
359 .mask = 0,
360};
361
d71a13f4 362static const unsigned int channels[] = {
1da177e4
LT		 363 2, 4, 6
364};
365
d71a13f4 366static const struct snd_pcm_hw_constraint_list hw_constraints_channels = {
5e4968e2 367 .count = ARRAY_SIZE(channels),
1da177e4
LT		 368 .list = channels,
369 .mask = 0,
370};
371
372/*
373 * Sample rate routines
374 */
375
376static unsigned short snd_fm801_rate_bits(unsigned int rate)
377{
378 unsigned int idx;
379
380 for (idx = 0; idx < ARRAY_SIZE(rates); idx++)
381 if (rates[idx] == rate)
382 return idx;
383 snd_BUG();
384 return ARRAY_SIZE(rates) - 1;
385}
386
387/*
388 * PCM part
389 */
390
a5f22156 391static int snd_fm801_playback_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 392 int cmd)
393{
a5f22156 394 struct fm801 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 395
396 spin_lock(&chip->reg_lock);
397 switch (cmd) {
398 case SNDRV_PCM_TRIGGER_START:
399 chip->ply_ctrl &= ~(FM801_BUF1_LAST |
400 FM801_BUF2_LAST |
401 FM801_PAUSE);
402 chip->ply_ctrl |= FM801_START |
403 FM801_IMMED_STOP;
404 break;
405 case SNDRV_PCM_TRIGGER_STOP:
406 chip->ply_ctrl &= ~(FM801_START | FM801_PAUSE);
407 break;
408 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
b1e9ed26 409 case SNDRV_PCM_TRIGGER_SUSPEND:
1da177e4
LT		 410 chip->ply_ctrl |= FM801_PAUSE;
411 break;
412 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
b1e9ed26 413 case SNDRV_PCM_TRIGGER_RESUME:
1da177e4
LT		 414 chip->ply_ctrl &= ~FM801_PAUSE;
415 break;
416 default:
417 spin_unlock(&chip->reg_lock);
418 snd_BUG();
419 return -EINVAL;
420 }
215dacc2 421 fm801_writew(chip, PLY_CTRL, chip->ply_ctrl);
1da177e4
LT		 422 spin_unlock(&chip->reg_lock);
423 return 0;
424}
425
a5f22156 426static int snd_fm801_capture_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 427 int cmd)
428{
a5f22156 429 struct fm801 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 430
431 spin_lock(&chip->reg_lock);
432 switch (cmd) {
433 case SNDRV_PCM_TRIGGER_START:
434 chip->cap_ctrl &= ~(FM801_BUF1_LAST |
435 FM801_BUF2_LAST |
436 FM801_PAUSE);
437 chip->cap_ctrl |= FM801_START |
438 FM801_IMMED_STOP;
439 break;
440 case SNDRV_PCM_TRIGGER_STOP:
441 chip->cap_ctrl &= ~(FM801_START | FM801_PAUSE);
442 break;
443 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
b1e9ed26 444 case SNDRV_PCM_TRIGGER_SUSPEND:
1da177e4
LT		 445 chip->cap_ctrl |= FM801_PAUSE;
446 break;
447 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
b1e9ed26 448 case SNDRV_PCM_TRIGGER_RESUME:
1da177e4
LT		 449 chip->cap_ctrl &= ~FM801_PAUSE;
450 break;
451 default:
452 spin_unlock(&chip->reg_lock);
453 snd_BUG();
454 return -EINVAL;
455 }
215dacc2 456 fm801_writew(chip, CAP_CTRL, chip->cap_ctrl);
1da177e4
LT		 457 spin_unlock(&chip->reg_lock);
458 return 0;
459}
460
a5f22156 461static int snd_fm801_playback_prepare(struct snd_pcm_substream *substream)
1da177e4 462{
a5f22156
TI		 463 struct fm801 *chip = snd_pcm_substream_chip(substream);
464 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 465
466 chip->ply_size = snd_pcm_lib_buffer_bytes(substream);
467 chip->ply_count = snd_pcm_lib_period_bytes(substream);
468 spin_lock_irq(&chip->reg_lock);
469 chip->ply_ctrl &= ~(FM801_START | FM801_16BIT |
470 FM801_STEREO | FM801_RATE_MASK |
471 FM801_CHANNELS_MASK);
472 if (snd_pcm_format_width(runtime->format) == 16)
473 chip->ply_ctrl |= FM801_16BIT;
474 if (runtime->channels > 1) {
475 chip->ply_ctrl |= FM801_STEREO;
476 if (runtime->channels == 4)
477 chip->ply_ctrl |= FM801_CHANNELS_4;
478 else if (runtime->channels == 6)
479 chip->ply_ctrl |= FM801_CHANNELS_6;
480 }
481 chip->ply_ctrl |= snd_fm801_rate_bits(runtime->rate) << FM801_RATE_SHIFT;
482 chip->ply_buf = 0;
215dacc2
AS		 483 fm801_writew(chip, PLY_CTRL, chip->ply_ctrl);
484 fm801_writew(chip, PLY_COUNT, chip->ply_count - 1);
1da177e4
LT		 485 chip->ply_buffer = runtime->dma_addr;
486 chip->ply_pos = 0;
215dacc2
AS		 487 fm801_writel(chip, PLY_BUF1, chip->ply_buffer);
488 fm801_writel(chip, PLY_BUF2,
489 chip->ply_buffer + (chip->ply_count % chip->ply_size));
1da177e4
LT		 490 spin_unlock_irq(&chip->reg_lock);
491 return 0;
492}
493
a5f22156 494static int snd_fm801_capture_prepare(struct snd_pcm_substream *substream)
1da177e4 495{
a5f22156
TI		 496 struct fm801 *chip = snd_pcm_substream_chip(substream);
497 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 498
499 chip->cap_size = snd_pcm_lib_buffer_bytes(substream);
500 chip->cap_count = snd_pcm_lib_period_bytes(substream);
501 spin_lock_irq(&chip->reg_lock);
502 chip->cap_ctrl &= ~(FM801_START | FM801_16BIT |
503 FM801_STEREO | FM801_RATE_MASK);
504 if (snd_pcm_format_width(runtime->format) == 16)
505 chip->cap_ctrl |= FM801_16BIT;
506 if (runtime->channels > 1)
507 chip->cap_ctrl |= FM801_STEREO;
508 chip->cap_ctrl |= snd_fm801_rate_bits(runtime->rate) << FM801_RATE_SHIFT;
509 chip->cap_buf = 0;
215dacc2
AS		 510 fm801_writew(chip, CAP_CTRL, chip->cap_ctrl);
511 fm801_writew(chip, CAP_COUNT, chip->cap_count - 1);
1da177e4
LT		 512 chip->cap_buffer = runtime->dma_addr;
513 chip->cap_pos = 0;
215dacc2
AS		 514 fm801_writel(chip, CAP_BUF1, chip->cap_buffer);
515 fm801_writel(chip, CAP_BUF2,
516 chip->cap_buffer + (chip->cap_count % chip->cap_size));
1da177e4
LT		 517 spin_unlock_irq(&chip->reg_lock);
518 return 0;
519}
520
a5f22156 521static snd_pcm_uframes_t snd_fm801_playback_pointer(struct snd_pcm_substream *substream)
1da177e4 522{
a5f22156 523 struct fm801 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 524 size_t ptr;
525
526 if (!(chip->ply_ctrl & FM801_START))
527 return 0;
528 spin_lock(&chip->reg_lock);
215dacc2
AS		 529 ptr = chip->ply_pos + (chip->ply_count - 1) - fm801_readw(chip, PLY_COUNT);
530 if (fm801_readw(chip, IRQ_STATUS) & FM801_IRQ_PLAYBACK) {
1da177e4
LT		 531 ptr += chip->ply_count;
532 ptr %= chip->ply_size;
533 }
534 spin_unlock(&chip->reg_lock);
535 return bytes_to_frames(substream->runtime, ptr);
536}
537
a5f22156 538static snd_pcm_uframes_t snd_fm801_capture_pointer(struct snd_pcm_substream *substream)
1da177e4 539{
a5f22156 540 struct fm801 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 541 size_t ptr;
542
543 if (!(chip->cap_ctrl & FM801_START))
544 return 0;
545 spin_lock(&chip->reg_lock);
215dacc2
AS		 546 ptr = chip->cap_pos + (chip->cap_count - 1) - fm801_readw(chip, CAP_COUNT);
547 if (fm801_readw(chip, IRQ_STATUS) & FM801_IRQ_CAPTURE) {
1da177e4
LT		 548 ptr += chip->cap_count;
549 ptr %= chip->cap_size;
550 }
551 spin_unlock(&chip->reg_lock);
552 return bytes_to_frames(substream->runtime, ptr);
553}
554
7d12e780 555static irqreturn_t snd_fm801_interrupt(int irq, void *dev_id)
1da177e4 556{
a5f22156 557 struct fm801 *chip = dev_id;
1da177e4
LT		 558 unsigned short status;
559 unsigned int tmp;
560
215dacc2 561 status = fm801_readw(chip, IRQ_STATUS);
1da177e4
LT		 562 status &= FM801_IRQ_PLAYBACK|FM801_IRQ_CAPTURE|FM801_IRQ_MPU|FM801_IRQ_VOLUME;
563 if (! status)
564 return IRQ_NONE;
565 /* ack first */
215dacc2 566 fm801_writew(chip, IRQ_STATUS, status);
1da177e4
LT		 567 if (chip->pcm && (status & FM801_IRQ_PLAYBACK) && chip->playback_substream) {
568 spin_lock(&chip->reg_lock);
569 chip->ply_buf++;
570 chip->ply_pos += chip->ply_count;
571 chip->ply_pos %= chip->ply_size;
572 tmp = chip->ply_pos + chip->ply_count;
573 tmp %= chip->ply_size;
215dacc2
AS		 574 if (chip->ply_buf & 1)
575 fm801_writel(chip, PLY_BUF1, chip->ply_buffer + tmp);
576 else
577 fm801_writel(chip, PLY_BUF2, chip->ply_buffer + tmp);
1da177e4
LT		 578 spin_unlock(&chip->reg_lock);
579 snd_pcm_period_elapsed(chip->playback_substream);
580 }
581 if (chip->pcm && (status & FM801_IRQ_CAPTURE) && chip->capture_substream) {
582 spin_lock(&chip->reg_lock);
583 chip->cap_buf++;
584 chip->cap_pos += chip->cap_count;
585 chip->cap_pos %= chip->cap_size;
586 tmp = chip->cap_pos + chip->cap_count;
587 tmp %= chip->cap_size;
215dacc2
AS		 588 if (chip->cap_buf & 1)
589 fm801_writel(chip, CAP_BUF1, chip->cap_buffer + tmp);
590 else
591 fm801_writel(chip, CAP_BUF2, chip->cap_buffer + tmp);
1da177e4
LT		 592 spin_unlock(&chip->reg_lock);
593 snd_pcm_period_elapsed(chip->capture_substream);
594 }
595 if (chip->rmidi && (status & FM801_IRQ_MPU))
7d12e780 596 snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data);
997c87da
AS		 597 if (status & FM801_IRQ_VOLUME) {
598 /* TODO */
599 }
1da177e4
LT		 600
601 return IRQ_HANDLED;
602}
603
dee49895 604static const struct snd_pcm_hardware snd_fm801_playback =
1da177e4
LT		 605{
606 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
607 SNDRV_PCM_INFO_BLOCK_TRANSFER |
b1e9ed26 608 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME |
1da177e4
LT		 609 SNDRV_PCM_INFO_MMAP_VALID),
610 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
611 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
612 .rate_min = 5500,
613 .rate_max = 48000,
614 .channels_min = 1,
615 .channels_max = 2,
616 .buffer_bytes_max = (128*1024),
617 .period_bytes_min = 64,
618 .period_bytes_max = (128*1024),
619 .periods_min = 1,
620 .periods_max = 1024,
621 .fifo_size = 0,
622};
623
dee49895 624static const struct snd_pcm_hardware snd_fm801_capture =
1da177e4
LT		 625{
626 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
627 SNDRV_PCM_INFO_BLOCK_TRANSFER |
b1e9ed26 628 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME |
1da177e4
LT		 629 SNDRV_PCM_INFO_MMAP_VALID),
630 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
631 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
632 .rate_min = 5500,
633 .rate_max = 48000,
634 .channels_min = 1,
635 .channels_max = 2,
636 .buffer_bytes_max = (128*1024),
637 .period_bytes_min = 64,
638 .period_bytes_max = (128*1024),
639 .periods_min = 1,
640 .periods_max = 1024,
641 .fifo_size = 0,
642};
643
a5f22156 644static int snd_fm801_playback_open(struct snd_pcm_substream *substream)
1da177e4 645{
a5f22156
TI		 646 struct fm801 *chip = snd_pcm_substream_chip(substream);
647 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 648 int err;
649
650 chip->playback_substream = substream;
651 runtime->hw = snd_fm801_playback;
a5f22156
TI		 652 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
653 &hw_constraints_rates);
1da177e4
LT		 654 if (chip->multichannel) {
655 runtime->hw.channels_max = 6;
a5f22156
TI		 656 snd_pcm_hw_constraint_list(runtime, 0,
657 SNDRV_PCM_HW_PARAM_CHANNELS,
658 &hw_constraints_channels);
1da177e4 659 }
68f441ab
TI		 660 err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
661 if (err < 0)
1da177e4
LT		 662 return err;
663 return 0;
664}
665
a5f22156 666static int snd_fm801_capture_open(struct snd_pcm_substream *substream)
1da177e4 667{
a5f22156
TI		 668 struct fm801 *chip = snd_pcm_substream_chip(substream);
669 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 670 int err;
671
672 chip->capture_substream = substream;
673 runtime->hw = snd_fm801_capture;
a5f22156
TI		 674 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
675 &hw_constraints_rates);
68f441ab
TI		 676 err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
677 if (err < 0)
1da177e4
LT		 678 return err;
679 return 0;
680}
681
a5f22156 682static int snd_fm801_playback_close(struct snd_pcm_substream *substream)
1da177e4 683{
a5f22156 684 struct fm801 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 685
686 chip->playback_substream = NULL;
687 return 0;
688}
689
a5f22156 690static int snd_fm801_capture_close(struct snd_pcm_substream *substream)
1da177e4 691{
a5f22156 692 struct fm801 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 693
694 chip->capture_substream = NULL;
695 return 0;
696}
697
6769e988 698static const struct snd_pcm_ops snd_fm801_playback_ops = {
1da177e4
LT		 699 .open = snd_fm801_playback_open,
700 .close = snd_fm801_playback_close,
1da177e4
LT		 701 .prepare = snd_fm801_playback_prepare,
702 .trigger = snd_fm801_playback_trigger,
703 .pointer = snd_fm801_playback_pointer,
704};
705
6769e988 706static const struct snd_pcm_ops snd_fm801_capture_ops = {
1da177e4
LT		 707 .open = snd_fm801_capture_open,
708 .close = snd_fm801_capture_close,
1da177e4
LT		 709 .prepare = snd_fm801_capture_prepare,
710 .trigger = snd_fm801_capture_trigger,
711 .pointer = snd_fm801_capture_pointer,
712};
713
483337f9 714static int snd_fm801_pcm(struct fm801 *chip, int device)
1da177e4 715{
d3d33aab 716 struct pci_dev *pdev = to_pci_dev(chip->dev);
a5f22156 717 struct snd_pcm *pcm;
1da177e4
LT		 718 int err;
719
68f441ab
TI		 720 err = snd_pcm_new(chip->card, "FM801", device, 1, 1, &pcm);
721 if (err < 0)
1da177e4
LT		 722 return err;
723
724 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_fm801_playback_ops);
725 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_fm801_capture_ops);
726
727 pcm->private_data = chip;
1da177e4
LT		 728 pcm->info_flags = 0;
729 strcpy(pcm->name, "FM801");
730 chip->pcm = pcm;
731
247ed102
TI		 732 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, &pdev->dev,
733 chip->multichannel ? 128*1024 : 64*1024, 128*1024);
1da177e4 734
483337f9 735 return snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK,
e36e3b86
TI		 736 snd_pcm_alt_chmaps,
737 chip->multichannel ? 6 : 2, 0,
738 NULL);
1da177e4
LT		 739}
740
741/*
742 * TEA5757 radio
743 */
744
fdb62b50 745#ifdef CONFIG_SND_FM801_TEA575X_BOOL
1da177e4 746
938a1566
OZ		 747/* GPIO to TEA575x maps */
748struct snd_fm801_tea575x_gpio {
749 u8 data, clk, wren, most;
d7ba858a 750 char *name;
938a1566 751};
1da177e4 752
fb537cd0 753static const struct snd_fm801_tea575x_gpio snd_fm801_tea575x_gpios[] = {
d7ba858a
OZ		 754 { .data = 1, .clk = 3, .wren = 2, .most = 0, .name = "SF256-PCS" },
755 { .data = 1, .clk = 0, .wren = 2, .most = 3, .name = "SF256-PCP" },
756 { .data = 2, .clk = 0, .wren = 1, .most = 3, .name = "SF64-PCR" },
938a1566 757};
1da177e4 758
8e699d2c
TI		 759#define get_tea575x_gpio(chip) \
760 (&snd_fm801_tea575x_gpios[((chip)->tea575x_tuner & TUNER_TYPE_MASK) - 1])
761
938a1566 762static void snd_fm801_tea575x_set_pins(struct snd_tea575x *tea, u8 pins)
1da177e4 763{
a5f22156 764 struct fm801 *chip = tea->private_data;
215dacc2 765 unsigned short reg = fm801_readw(chip, GPIO_CTRL);
8e699d2c 766 struct snd_fm801_tea575x_gpio gpio = *get_tea575x_gpio(chip);
1da177e4 767
938a1566
OZ		 768 reg &= ~(FM801_GPIO_GP(gpio.data) |
769 FM801_GPIO_GP(gpio.clk) |
770 FM801_GPIO_GP(gpio.wren));
1da177e4 771
938a1566
OZ		 772 reg |= (pins & TEA575X_DATA) ? FM801_GPIO_GP(gpio.data) : 0;
773 reg |= (pins & TEA575X_CLK) ? FM801_GPIO_GP(gpio.clk) : 0;
774 /* WRITE_ENABLE is inverted */
775 reg |= (pins & TEA575X_WREN) ? 0 : FM801_GPIO_GP(gpio.wren);
1da177e4 776
215dacc2 777 fm801_writew(chip, GPIO_CTRL, reg);
1da177e4
LT		 778}
779
938a1566 780static u8 snd_fm801_tea575x_get_pins(struct snd_tea575x *tea)
1da177e4 781{
a5f22156 782 struct fm801 *chip = tea->private_data;
215dacc2 783 unsigned short reg = fm801_readw(chip, GPIO_CTRL);
8e699d2c 784 struct snd_fm801_tea575x_gpio gpio = *get_tea575x_gpio(chip);
effded75
DC		 785 u8 ret;
786
787 ret = 0;
788 if (reg & FM801_GPIO_GP(gpio.data))
789 ret |= TEA575X_DATA;
790 if (reg & FM801_GPIO_GP(gpio.most))
791 ret |= TEA575X_MOST;
792 return ret;
1da177e4
LT		 793}
794
938a1566 795static void snd_fm801_tea575x_set_direction(struct snd_tea575x *tea, bool output)
1da177e4 796{
a5f22156 797 struct fm801 *chip = tea->private_data;
215dacc2 798 unsigned short reg = fm801_readw(chip, GPIO_CTRL);
8e699d2c 799 struct snd_fm801_tea575x_gpio gpio = *get_tea575x_gpio(chip);
1da177e4 800
1da177e4 801 /* use GPIO lines and set write enable bit */
938a1566
OZ		 802 reg |= FM801_GPIO_GS(gpio.data) |
803 FM801_GPIO_GS(gpio.wren) |
804 FM801_GPIO_GS(gpio.clk) |
805 FM801_GPIO_GS(gpio.most);
806 if (output) {
807 /* all of lines are in the write direction */
808 /* clear data and clock lines */
809 reg &= ~(FM801_GPIO_GD(gpio.data) |
810 FM801_GPIO_GD(gpio.wren) |
811 FM801_GPIO_GD(gpio.clk) |
812 FM801_GPIO_GP(gpio.data) |
813 FM801_GPIO_GP(gpio.clk) |
814 FM801_GPIO_GP(gpio.wren));
815 } else {
816 /* use GPIO lines, set data direction to input */
817 reg |= FM801_GPIO_GD(gpio.data) |
818 FM801_GPIO_GD(gpio.most) |
819 FM801_GPIO_GP(gpio.data) |
820 FM801_GPIO_GP(gpio.most) |
821 FM801_GPIO_GP(gpio.wren);
822 /* all of lines are in the write direction, except data */
823 /* clear data, write enable and clock lines */
824 reg &= ~(FM801_GPIO_GD(gpio.wren) |
825 FM801_GPIO_GD(gpio.clk) |
826 FM801_GPIO_GP(gpio.clk));
1da177e4
LT		 827 }
828
215dacc2 829 fm801_writew(chip, GPIO_CTRL, reg);
69252128
AS		 830}
831
22dbec26 832static const struct snd_tea575x_ops snd_fm801_tea_ops = {
938a1566
OZ		 833 .set_pins = snd_fm801_tea575x_set_pins,
834 .get_pins = snd_fm801_tea575x_get_pins,
835 .set_direction = snd_fm801_tea575x_set_direction,
1da177e4
LT		 836};
837#endif
838
839/*
840 * Mixer routines
841 */
842
843#define FM801_SINGLE(xname, reg, shift, mask, invert) \
844{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_fm801_info_single, \
845 .get = snd_fm801_get_single, .put = snd_fm801_put_single, \
846 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
847
a5f22156
TI		 848static int snd_fm801_info_single(struct snd_kcontrol *kcontrol,
849 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 850{
851 int mask = (kcontrol->private_value >> 16) & 0xff;
852
853 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
854 uinfo->count = 1;
855 uinfo->value.integer.min = 0;
856 uinfo->value.integer.max = mask;
857 return 0;
858}
859
a5f22156
TI		 860static int snd_fm801_get_single(struct snd_kcontrol *kcontrol,
861 struct snd_ctl_elem_value *ucontrol)
1da177e4 862{
a5f22156 863 struct fm801 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 864 int reg = kcontrol->private_value & 0xff;
865 int shift = (kcontrol->private_value >> 8) & 0xff;
866 int mask = (kcontrol->private_value >> 16) & 0xff;
867 int invert = (kcontrol->private_value >> 24) & 0xff;
4b5c15f7 868 long *value = ucontrol->value.integer.value;
1da177e4 869
4b5c15f7 870 value[0] = (fm801_ioread16(chip, reg) >> shift) & mask;
1da177e4 871 if (invert)
4b5c15f7 872 value[0] = mask - value[0];
1da177e4
LT		 873 return 0;
874}
875
a5f22156
TI		 876static int snd_fm801_put_single(struct snd_kcontrol *kcontrol,
877 struct snd_ctl_elem_value *ucontrol)
1da177e4 878{
a5f22156 879 struct fm801 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 880 int reg = kcontrol->private_value & 0xff;
881 int shift = (kcontrol->private_value >> 8) & 0xff;
882 int mask = (kcontrol->private_value >> 16) & 0xff;
883 int invert = (kcontrol->private_value >> 24) & 0xff;
884 unsigned short val;
885
886 val = (ucontrol->value.integer.value[0] & mask);
887 if (invert)
888 val = mask - val;
889 return snd_fm801_update_bits(chip, reg, mask << shift, val << shift);
890}
891
892#define FM801_DOUBLE(xname, reg, shift_left, shift_right, mask, invert) \
893{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_fm801_info_double, \
894 .get = snd_fm801_get_double, .put = snd_fm801_put_double, \
895 .private_value = reg | (shift_left << 8) | (shift_right << 12) | (mask << 16) | (invert << 24) }
666c70ff
TI		 896#define FM801_DOUBLE_TLV(xname, reg, shift_left, shift_right, mask, invert, xtlv) \
897{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
898 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
899 .name = xname, .info = snd_fm801_info_double, \
900 .get = snd_fm801_get_double, .put = snd_fm801_put_double, \
901 .private_value = reg | (shift_left << 8) | (shift_right << 12) | (mask << 16) | (invert << 24), \
902 .tlv = { .p = (xtlv) } }
1da177e4 903
a5f22156
TI		 904static int snd_fm801_info_double(struct snd_kcontrol *kcontrol,
905 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 906{
907 int mask = (kcontrol->private_value >> 16) & 0xff;
908
909 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
910 uinfo->count = 2;
911 uinfo->value.integer.min = 0;
912 uinfo->value.integer.max = mask;
913 return 0;
914}
915
a5f22156
TI		 916static int snd_fm801_get_double(struct snd_kcontrol *kcontrol,
917 struct snd_ctl_elem_value *ucontrol)
1da177e4 918{
a5f22156 919 struct fm801 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 920 int reg = kcontrol->private_value & 0xff;
921 int shift_left = (kcontrol->private_value >> 8) & 0x0f;
922 int shift_right = (kcontrol->private_value >> 12) & 0x0f;
923 int mask = (kcontrol->private_value >> 16) & 0xff;
924 int invert = (kcontrol->private_value >> 24) & 0xff;
4b5c15f7 925 long *value = ucontrol->value.integer.value;
1da177e4
LT		 926
927 spin_lock_irq(&chip->reg_lock);
4b5c15f7
AS		 928 value[0] = (fm801_ioread16(chip, reg) >> shift_left) & mask;
929 value[1] = (fm801_ioread16(chip, reg) >> shift_right) & mask;
1da177e4
LT		 930 spin_unlock_irq(&chip->reg_lock);
931 if (invert) {
4b5c15f7
AS		 932 value[0] = mask - value[0];
933 value[1] = mask - value[1];
1da177e4
LT		 934 }
935 return 0;
936}
937
a5f22156
TI		 938static int snd_fm801_put_double(struct snd_kcontrol *kcontrol,
939 struct snd_ctl_elem_value *ucontrol)
1da177e4 940{
a5f22156 941 struct fm801 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 942 int reg = kcontrol->private_value & 0xff;
943 int shift_left = (kcontrol->private_value >> 8) & 0x0f;
944 int shift_right = (kcontrol->private_value >> 12) & 0x0f;
945 int mask = (kcontrol->private_value >> 16) & 0xff;
946 int invert = (kcontrol->private_value >> 24) & 0xff;
947 unsigned short val1, val2;
948
949 val1 = ucontrol->value.integer.value[0] & mask;
950 val2 = ucontrol->value.integer.value[1] & mask;
951 if (invert) {
952 val1 = mask - val1;
953 val2 = mask - val2;
954 }
955 return snd_fm801_update_bits(chip, reg,
956 (mask << shift_left) | (mask << shift_right),
957 (val1 << shift_left ) | (val2 << shift_right));
958}
959
a5f22156
TI		 960static int snd_fm801_info_mux(struct snd_kcontrol *kcontrol,
961 struct snd_ctl_elem_info *uinfo)
1da177e4 962{
ca776a28 963 static const char * const texts[5] = {
1da177e4
LT		 964 "AC97 Primary", "FM", "I2S", "PCM", "AC97 Secondary"
965 };
966
ca776a28 967 return snd_ctl_enum_info(uinfo, 1, 5, texts);
1da177e4
LT		 968}
969
a5f22156
TI		 970static int snd_fm801_get_mux(struct snd_kcontrol *kcontrol,
971 struct snd_ctl_elem_value *ucontrol)
1da177e4 972{
a5f22156 973 struct fm801 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 974 unsigned short val;
975
215dacc2 976 val = fm801_readw(chip, REC_SRC) & 7;
1da177e4
LT		 977 if (val > 4)
978 val = 4;
979 ucontrol->value.enumerated.item[0] = val;
980 return 0;
981}
982
a5f22156
TI		 983static int snd_fm801_put_mux(struct snd_kcontrol *kcontrol,
984 struct snd_ctl_elem_value *ucontrol)
1da177e4 985{
a5f22156 986 struct fm801 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 987 unsigned short val;
988
68f441ab
TI		 989 val = ucontrol->value.enumerated.item[0];
990 if (val > 4)
1da177e4
LT		 991 return -EINVAL;
992 return snd_fm801_update_bits(chip, FM801_REC_SRC, 7, val);
993}
994
0cb29ea0 995static const DECLARE_TLV_DB_SCALE(db_scale_dsp, -3450, 150, 0);
666c70ff 996
a5f22156 997#define FM801_CONTROLS ARRAY_SIZE(snd_fm801_controls)
1da177e4 998
b4e5e707 999static const struct snd_kcontrol_new snd_fm801_controls[] = {
666c70ff
TI		 1000FM801_DOUBLE_TLV("Wave Playback Volume", FM801_PCM_VOL, 0, 8, 31, 1,
1001 db_scale_dsp),
1da177e4 1002FM801_SINGLE("Wave Playback Switch", FM801_PCM_VOL, 15, 1, 1),
666c70ff
TI		 1003FM801_DOUBLE_TLV("I2S Playback Volume", FM801_I2S_VOL, 0, 8, 31, 1,
1004 db_scale_dsp),
1da177e4 1005FM801_SINGLE("I2S Playback Switch", FM801_I2S_VOL, 15, 1, 1),
666c70ff
TI		 1006FM801_DOUBLE_TLV("FM Playback Volume", FM801_FM_VOL, 0, 8, 31, 1,
1007 db_scale_dsp),
1da177e4
LT		 1008FM801_SINGLE("FM Playback Switch", FM801_FM_VOL, 15, 1, 1),
1009{
1010 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1011 .name = "Digital Capture Source",
1012 .info = snd_fm801_info_mux,
1013 .get = snd_fm801_get_mux,
1014 .put = snd_fm801_put_mux,
1015}
1016};
1017
a5f22156 1018#define FM801_CONTROLS_MULTI ARRAY_SIZE(snd_fm801_controls_multi)
1da177e4 1019
b4e5e707 1020static const struct snd_kcontrol_new snd_fm801_controls_multi[] = {
1da177e4
LT		 1021FM801_SINGLE("AC97 2ch->4ch Copy Switch", FM801_CODEC_CTRL, 7, 1, 0),
1022FM801_SINGLE("AC97 18-bit Switch", FM801_CODEC_CTRL, 10, 1, 0),
10e8d78a
CL		 1023FM801_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), FM801_I2S_MODE, 8, 1, 0),
1024FM801_SINGLE(SNDRV_CTL_NAME_IEC958("Raw Data ",PLAYBACK,SWITCH), FM801_I2S_MODE, 9, 1, 0),
1025FM801_SINGLE(SNDRV_CTL_NAME_IEC958("Raw Data ",CAPTURE,SWITCH), FM801_I2S_MODE, 10, 1, 0),
1026FM801_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), FM801_GEN_CTRL, 2, 1, 0),
1da177e4
LT		 1027};
1028
e23e7a14 1029static int snd_fm801_mixer(struct fm801 *chip)
1da177e4 1030{
a5f22156 1031 struct snd_ac97_template ac97;
1da177e4
LT		 1032 unsigned int i;
1033 int err;
51055da5 1034 static const struct snd_ac97_bus_ops ops = {
1da177e4
LT		 1035 .write = snd_fm801_codec_write,
1036 .read = snd_fm801_codec_read,
1037 };
1038
68f441ab
TI		 1039 err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus);
1040 if (err < 0)
1da177e4 1041 return err;
1da177e4
LT		 1042
1043 memset(&ac97, 0, sizeof(ac97));
1044 ac97.private_data = chip;
68f441ab
TI		 1045 err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97);
1046 if (err < 0)
1da177e4
LT		 1047 return err;
1048 if (chip->secondary) {
1049 ac97.num = 1;
1050 ac97.addr = chip->secondary_addr;
68f441ab
TI		 1051 err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97_sec);
1052 if (err < 0)
1da177e4
LT		 1053 return err;
1054 }
ef1ffbe7
ZJ		 1055 for (i = 0; i < FM801_CONTROLS; i++) {
1056 err = snd_ctl_add(chip->card,
1057 snd_ctl_new1(&snd_fm801_controls[i], chip));
1058 if (err < 0)
1059 return err;
1060 }
1da177e4 1061 if (chip->multichannel) {
ef1ffbe7
ZJ		 1062 for (i = 0; i < FM801_CONTROLS_MULTI; i++) {
1063 err = snd_ctl_add(chip->card,
1064 snd_ctl_new1(&snd_fm801_controls_multi[i], chip));
1065 if (err < 0)
1066 return err;
1067 }
1da177e4
LT		 1068 }
1069 return 0;
1070}
1071
1072/*
1073 * initialization routines
1074 */
1075
b1e9ed26
TI		 1076static int wait_for_codec(struct fm801 *chip, unsigned int codec_id,
1077 unsigned short reg, unsigned long waits)
1078{
1079 unsigned long timeout = jiffies + waits;
1080
215dacc2
AS		 1081 fm801_writew(chip, AC97_CMD,
1082 reg | (codec_id << FM801_AC97_ADDR_SHIFT) | FM801_AC97_READ);
b1e9ed26
TI		 1083 udelay(5);
1084 do {
215dacc2
AS		 1085 if ((fm801_readw(chip, AC97_CMD) &
1086 (FM801_AC97_VALID | FM801_AC97_BUSY)) == FM801_AC97_VALID)
b1e9ed26
TI		 1087 return 0;
1088 schedule_timeout_uninterruptible(1);
1089 } while (time_after(timeout, jiffies));
1090 return -EIO;
1091}
1092
b56fa687 1093static int reset_codec(struct fm801 *chip)
b1e9ed26 1094{
b1e9ed26 1095 /* codec cold reset + AC'97 warm reset */
215dacc2
AS		 1096 fm801_writew(chip, CODEC_CTRL, (1 << 5) | (1 << 6));
1097 fm801_readw(chip, CODEC_CTRL); /* flush posting data */
b1e9ed26 1098 udelay(100);
215dacc2 1099 fm801_writew(chip, CODEC_CTRL, 0);
b1e9ed26 1100
b56fa687
AS		 1101 return wait_for_codec(chip, 0, AC97_RESET, msecs_to_jiffies(750));
1102}
1103
1104static void snd_fm801_chip_multichannel_init(struct fm801 *chip)
1105{
1106 unsigned short cmdw;
b1e9ed26
TI		 1107
1108 if (chip->multichannel) {
1109 if (chip->secondary_addr) {
1110 wait_for_codec(chip, chip->secondary_addr,
1111 AC97_VENDOR_ID1, msecs_to_jiffies(50));
1112 } else {
1113 /* my card has the secondary codec */
1114 /* at address #3, so the loop is inverted */
58e4334e
HH		 1115 int i;
1116 for (i = 3; i > 0; i--) {
1117 if (!wait_for_codec(chip, i, AC97_VENDOR_ID1,
b1e9ed26 1118 msecs_to_jiffies(50))) {
215dacc2 1119 cmdw = fm801_readw(chip, AC97_DATA);
b1e9ed26
TI		 1120 if (cmdw != 0xffff && cmdw != 0) {
1121 chip->secondary = 1;
58e4334e 1122 chip->secondary_addr = i;
b1e9ed26
TI		 1123 break;
1124 }
1125 }
1126 }
1127 }
1128
1129 /* the recovery phase, it seems that probing for non-existing codec might */
1130 /* cause timeout problems */
1131 wait_for_codec(chip, 0, AC97_VENDOR_ID1, msecs_to_jiffies(750));
1132 }
b56fa687 1133}
b1e9ed26 1134
b56fa687
AS		 1135static void snd_fm801_chip_init(struct fm801 *chip)
1136{
1137 unsigned short cmdw;
6bbe13ec 1138
b1e9ed26 1139 /* init volume */
215dacc2
AS		 1140 fm801_writew(chip, PCM_VOL, 0x0808);
1141 fm801_writew(chip, FM_VOL, 0x9f1f);
1142 fm801_writew(chip, I2S_VOL, 0x8808);
b1e9ed26
TI		 1143
1144 /* I2S control - I2S mode */
215dacc2 1145 fm801_writew(chip, I2S_MODE, 0x0003);
b1e9ed26 1146
6bbe13ec 1147 /* interrupt setup */
215dacc2 1148 cmdw = fm801_readw(chip, IRQ_MASK);
6bbe13ec
JK		 1149 if (chip->irq < 0)
1150 cmdw |= 0x00c3; /* mask everything, no PCM nor MPU */
1151 else
1152 cmdw &= ~0x0083; /* unmask MPU, PLAYBACK & CAPTURE */
215dacc2 1153 fm801_writew(chip, IRQ_MASK, cmdw);
b1e9ed26
TI		 1154
1155 /* interrupt clear */
215dacc2
AS		 1156 fm801_writew(chip, IRQ_STATUS,
1157 FM801_IRQ_PLAYBACK | FM801_IRQ_CAPTURE | FM801_IRQ_MPU);
b1e9ed26
TI		 1158}
1159
47c41339 1160static void snd_fm801_free(struct snd_card *card)
1da177e4 1161{
47c41339 1162 struct fm801 *chip = card->private_data;
1da177e4
LT		 1163 unsigned short cmdw;
1164
1da177e4 1165 /* interrupt setup - mask everything */
215dacc2 1166 cmdw = fm801_readw(chip, IRQ_MASK);
1da177e4 1167 cmdw |= 0x00c3;
215dacc2 1168 fm801_writew(chip, IRQ_MASK, cmdw);
1da177e4 1169
fdb62b50 1170#ifdef CONFIG_SND_FM801_TEA575X_BOOL
d4ecc83b 1171 if (!(chip->tea575x_tuner & TUNER_DISABLED)) {
c37279b9 1172 snd_tea575x_exit(&chip->tea);
d4ecc83b
HV		 1173 v4l2_device_unregister(&chip->v4l2_dev);
1174 }
1da177e4 1175#endif
1da177e4
LT		 1176}
1177
e23e7a14
BP		 1178static int snd_fm801_create(struct snd_card *card,
1179 struct pci_dev *pci,
1180 int tea575x_tuner,
47c41339 1181 int radio_nr)
1da177e4 1182{
47c41339 1183 struct fm801 *chip = card->private_data;
1da177e4 1184 int err;
1da177e4 1185
68f441ab
TI		 1186 err = pcim_enable_device(pci);
1187 if (err < 0)
1da177e4 1188 return err;
1da177e4
LT		 1189 spin_lock_init(&chip->reg_lock);
1190 chip->card = card;
d3d33aab 1191 chip->dev = &pci->dev;
1da177e4 1192 chip->irq = -1;
6bbe13ec 1193 chip->tea575x_tuner = tea575x_tuner;
68f441ab
TI		 1194 err = pci_request_regions(pci, "FM801");
1195 if (err < 0)
1da177e4 1196 return err;
1da177e4 1197 chip->port = pci_resource_start(pci, 0);
b56fa687
AS		 1198
1199 if (pci->revision >= 0xb1) /* FM801-AU */
1200 chip->multichannel = 1;
1201
1202 if (!(chip->tea575x_tuner & TUNER_ONLY)) {
1203 if (reset_codec(chip) < 0) {
1204 dev_info(chip->card->dev,
1205 "Primary AC'97 codec not found, assume SF64-PCR (tuner-only)\n");
1206 chip->tea575x_tuner = 3 | TUNER_ONLY;
1207 } else {
1208 snd_fm801_chip_multichannel_init(chip);
1209 }
1210 }
1211
b56fa687 1212 if ((chip->tea575x_tuner & TUNER_ONLY) == 0) {
5618955c
AS		 1213 if (devm_request_irq(&pci->dev, pci->irq, snd_fm801_interrupt,
1214 IRQF_SHARED, KBUILD_MODNAME, chip)) {
1215 dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq);
6bbe13ec
JK		 1216 return -EBUSY;
1217 }
1218 chip->irq = pci->irq;
e41dbd20 1219 card->sync_irq = chip->irq;
6bbe13ec 1220 pci_set_master(pci);
1da177e4 1221 }
1da177e4 1222
47c41339 1223 card->private_free = snd_fm801_free;
610e1ae9
AS		 1224 snd_fm801_chip_init(chip);
1225
fdb62b50 1226#ifdef CONFIG_SND_FM801_TEA575X_BOOL
d4ecc83b 1227 err = v4l2_device_register(&pci->dev, &chip->v4l2_dev);
47c41339 1228 if (err < 0)
d4ecc83b 1229 return err;
d4ecc83b
HV		 1230 chip->tea.v4l2_dev = &chip->v4l2_dev;
1231 chip->tea.radio_nr = radio_nr;
d7ba858a
OZ		 1232 chip->tea.private_data = chip;
1233 chip->tea.ops = &snd_fm801_tea_ops;
10ca7201 1234 sprintf(chip->tea.bus_info, "PCI:%s", pci_name(pci));
b56fa687
AS		 1235 if ((chip->tea575x_tuner & TUNER_TYPE_MASK) > 0 &&
1236 (chip->tea575x_tuner & TUNER_TYPE_MASK) < 4) {
5daf53a6 1237 if (snd_tea575x_init(&chip->tea, THIS_MODULE)) {
9c7f9abf 1238 dev_err(card->dev, "TEA575x radio not found\n");
96760015
DC		 1239 return -ENODEV;
1240 }
b56fa687
AS		 1241 } else if ((chip->tea575x_tuner & TUNER_TYPE_MASK) == 0) {
1242 unsigned int tuner_only = chip->tea575x_tuner & TUNER_ONLY;
dbec6719 1243
d7ba858a
OZ		 1244 /* autodetect tuner connection */
1245 for (tea575x_tuner = 1; tea575x_tuner <= 3; tea575x_tuner++) {
1246 chip->tea575x_tuner = tea575x_tuner;
5daf53a6 1247 if (!snd_tea575x_init(&chip->tea, THIS_MODULE)) {
9c7f9abf
TI		 1248 dev_info(card->dev,
1249 "detected TEA575x radio type %s\n",
8e699d2c 1250 get_tea575x_gpio(chip)->name);
d7ba858a
OZ		 1251 break;
1252 }
1253 }
96760015 1254 if (tea575x_tuner == 4) {
9c7f9abf 1255 dev_err(card->dev, "TEA575x radio not found\n");
c37279b9 1256 chip->tea575x_tuner = TUNER_DISABLED;
96760015 1257 }
dbec6719
AS		 1258
1259 chip->tea575x_tuner |= tuner_only;
96760015 1260 }
c37279b9 1261 if (!(chip->tea575x_tuner & TUNER_DISABLED)) {
75b1a8f9 1262 strscpy(chip->tea.card, get_tea575x_gpio(chip)->name,
c37279b9
BH		 1263 sizeof(chip->tea.card));
1264 }
1da177e4 1265#endif
1da177e4
LT		 1266 return 0;
1267}
1268
7f611274
TI		 1269static int __snd_card_fm801_probe(struct pci_dev *pci,
1270 const struct pci_device_id *pci_id)
1da177e4
LT		 1271{
1272 static int dev;
a5f22156
TI		 1273 struct snd_card *card;
1274 struct fm801 *chip;
1275 struct snd_opl3 *opl3;
1da177e4
LT		 1276 int err;
1277
1278 if (dev >= SNDRV_CARDS)
1279 return -ENODEV;
1280 if (!enable[dev]) {
1281 dev++;
1282 return -ENOENT;
1283 }
1284
47c41339
TI		 1285 err = snd_devm_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
1286 sizeof(*chip), &card);
e58de7ba
TI		 1287 if (err < 0)
1288 return err;
47c41339
TI		 1289 chip = card->private_data;
1290 err = snd_fm801_create(card, pci, tea575x_tuner[dev], radio_nr[dev]);
1291 if (err < 0)
1da177e4 1292 return err;
1da177e4
LT		 1293
1294 strcpy(card->driver, "FM801");
1295 strcpy(card->shortname, "ForteMedia FM801-");
1296 strcat(card->shortname, chip->multichannel ? "AU" : "AS");
1297 sprintf(card->longname, "%s at 0x%lx, irq %i",
1298 card->shortname, chip->port, chip->irq);
1299
fb716c0b 1300 if (chip->tea575x_tuner & TUNER_ONLY)
e0a5d82a
AS		 1301 goto __fm801_tuner_only;
1302
68f441ab 1303 err = snd_fm801_pcm(chip, 0);
47c41339 1304 if (err < 0)
1da177e4 1305 return err;
68f441ab 1306 err = snd_fm801_mixer(chip);
47c41339 1307 if (err < 0)
1da177e4 1308 return err;
68f441ab
TI		 1309 err = snd_mpu401_uart_new(card, 0, MPU401_HW_FM801,
1310 chip->port + FM801_MPU401_DATA,
1311 MPU401_INFO_INTEGRATED |
1312 MPU401_INFO_IRQ_HOOK,
1313 -1, &chip->rmidi);
47c41339 1314 if (err < 0)
1da177e4 1315 return err;
68f441ab
TI		 1316 err = snd_opl3_create(card, chip->port + FM801_OPL3_BANK0,
1317 chip->port + FM801_OPL3_BANK1,
1318 OPL3_HW_OPL3_FM801, 1, &opl3);
47c41339 1319 if (err < 0)
1da177e4 1320 return err;
68f441ab 1321 err = snd_opl3_hwdep_new(opl3, 0, 1, NULL);
47c41339 1322 if (err < 0)
1da177e4 1323 return err;
1da177e4 1324
e0a5d82a 1325 __fm801_tuner_only:
68f441ab 1326 err = snd_card_register(card);
47c41339 1327 if (err < 0)
1da177e4 1328 return err;
1da177e4
LT		 1329 pci_set_drvdata(pci, card);
1330 dev++;
1331 return 0;
1332}
1333
7f611274
TI		 1334static int snd_card_fm801_probe(struct pci_dev *pci,
1335 const struct pci_device_id *pci_id)
1336{
1337 return snd_card_free_on_error(&pci->dev, __snd_card_fm801_probe(pci, pci_id));
1338}
1339
8045d0fc 1340static const unsigned char saved_regs[] = {
b1e9ed26
TI		 1341 FM801_PCM_VOL, FM801_I2S_VOL, FM801_FM_VOL, FM801_REC_SRC,
1342 FM801_PLY_CTRL, FM801_PLY_COUNT, FM801_PLY_BUF1, FM801_PLY_BUF2,
1343 FM801_CAP_CTRL, FM801_CAP_COUNT, FM801_CAP_BUF1, FM801_CAP_BUF2,
1344 FM801_CODEC_CTRL, FM801_I2S_MODE, FM801_VOLUME, FM801_GEN_CTRL,
1345};
1346
68cb2b55 1347static int snd_fm801_suspend(struct device *dev)
b1e9ed26 1348{
68cb2b55 1349 struct snd_card *card = dev_get_drvdata(dev);
b1e9ed26
TI		 1350 struct fm801 *chip = card->private_data;
1351 int i;
1352
1353 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
14da04b5 1354
b1e9ed26 1355 for (i = 0; i < ARRAY_SIZE(saved_regs); i++)
37ba8fca
AS		 1356 chip->saved_regs[i] = fm801_ioread16(chip, saved_regs[i]);
1357
14da04b5
AS		 1358 if (chip->tea575x_tuner & TUNER_ONLY) {
1359 /* FIXME: tea575x suspend */
1360 } else {
14da04b5
AS		 1361 snd_ac97_suspend(chip->ac97);
1362 snd_ac97_suspend(chip->ac97_sec);
1363 }
1364
b1e9ed26
TI		 1365 return 0;
1366}
1367
68cb2b55 1368static int snd_fm801_resume(struct device *dev)
b1e9ed26 1369{
68cb2b55 1370 struct snd_card *card = dev_get_drvdata(dev);
b1e9ed26
TI		 1371 struct fm801 *chip = card->private_data;
1372 int i;
1373
b56fa687
AS		 1374 if (chip->tea575x_tuner & TUNER_ONLY) {
1375 snd_fm801_chip_init(chip);
1376 } else {
1377 reset_codec(chip);
1378 snd_fm801_chip_multichannel_init(chip);
1379 snd_fm801_chip_init(chip);
14da04b5
AS		 1380 snd_ac97_resume(chip->ac97);
1381 snd_ac97_resume(chip->ac97_sec);
b56fa687 1382 }
14da04b5 1383
b1e9ed26 1384 for (i = 0; i < ARRAY_SIZE(saved_regs); i++)
4b5c15f7 1385 fm801_iowrite16(chip, saved_regs[i], chip->saved_regs[i]);
b1e9ed26 1386
cb41f271
AS		 1387#ifdef CONFIG_SND_FM801_TEA575X_BOOL
1388 if (!(chip->tea575x_tuner & TUNER_DISABLED))
1389 snd_tea575x_set_freq(&chip->tea);
1390#endif
b1e9ed26
TI		 1391
1392 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1393 return 0;
1394}
68cb2b55 1395
e6c2f5ec 1396static DEFINE_SIMPLE_DEV_PM_OPS(snd_fm801_pm, snd_fm801_suspend, snd_fm801_resume);
b1e9ed26 1397
e9f66d9b 1398static struct pci_driver fm801_driver = {
3733e424 1399 .name = KBUILD_MODNAME,
1da177e4
LT		 1400 .id_table = snd_fm801_ids,
1401 .probe = snd_card_fm801_probe,
68cb2b55 1402 .driver = {
e6c2f5ec 1403 .pm = &snd_fm801_pm,
68cb2b55 1404 },
1da177e4
LT		 1405};
1406
e9f66d9b 1407module_pci_driver(fm801_driver);
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