[linux.git] / drivers / pcmcia / cardbus.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * cardbus.c -- 16-bit PCMCIA core support
 *
 * The initial developer of the original code is David A. Hinds
 * <[email protected]>.  Portions created by David A. Hinds
 * are Copyright (C) 1999 David A. Hinds.  All Rights Reserved.
 *
 * (C) 1999		David A. Hinds
 */

/*
 * Cardbus handling has been re-written to be more of a PCI bridge thing,
 * and the PCI code basically does all the resource handling.
 *
 *		Linus, Jan 2000
 */


#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/pci.h>

#include <pcmcia/ss.h>
#include <pcmcia/cistpl.h>

#include "cs_internal.h"

static void cardbus_config_irq_and_cls(struct pci_bus *bus, int irq)
{
	struct pci_dev *dev;

	list_for_each_entry(dev, &bus->devices, bus_list) {
		u8 irq_pin;

		/*
		 * Since there is only one interrupt available to
		 * CardBus devices, all devices downstream of this
		 * device must be using this IRQ.
		 */
		pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &irq_pin);
		if (irq_pin) {
			dev->irq = irq;
			pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
		}

		/*
		 * Some controllers transfer very slowly with 0 CLS.
		 * Configure it.  This may fail as CLS configuration
		 * is mandatory only for MWI.
		 */
		pci_set_cacheline_size(dev);

		if (dev->subordinate)
			cardbus_config_irq_and_cls(dev->subordinate, irq);
	}
}

/**
 * cb_alloc() - add CardBus device
 * @s:		the pcmcia_socket where the CardBus device is located
 *
 * cb_alloc() allocates the kernel data structures for a Cardbus device
 * and handles the lowest level PCI device setup issues.
 */
int __ref cb_alloc(struct pcmcia_socket *s)
{
	struct pci_bus *bus = s->cb_dev->subordinate;
	struct pci_dev *dev;
	unsigned int max, pass;

	pci_lock_rescan_remove();

	s->functions = pci_scan_slot(bus, PCI_DEVFN(0, 0));
	pci_fixup_cardbus(bus);

	max = bus->busn_res.start;
	for (pass = 0; pass < 2; pass++)
		for_each_pci_bridge(dev, bus)
			max = pci_scan_bridge(bus, dev, max, pass);

	/*
	 * Size all resources below the CardBus controller.
	 */
	pci_bus_size_bridges(bus);
	pci_bus_assign_resources(bus);
	cardbus_config_irq_and_cls(bus, s->pci_irq);

	/* socket specific tune function */
	if (s->tune_bridge)
		s->tune_bridge(s, bus);

	pci_bus_add_devices(bus);

	pci_unlock_rescan_remove();
	return 0;
}

/**
 * cb_free() - remove CardBus device
 * @s:		the pcmcia_socket where the CardBus device was located
 *
 * cb_free() handles the lowest level PCI device cleanup.
 */
void cb_free(struct pcmcia_socket *s)
{
	struct pci_dev *bridge, *dev, *tmp;
	struct pci_bus *bus;

	bridge = s->cb_dev;
	if (!bridge)
		return;

	bus = bridge->subordinate;
	if (!bus)
		return;

	pci_lock_rescan_remove();

	list_for_each_entry_safe(dev, tmp, &bus->devices, bus_list)
		pci_stop_and_remove_bus_device(dev);

	pci_unlock_rescan_remove();
}
Commit	Line	Data
d2912cb1	1	// SPDX-License-Identifier: GPL-2.0-only
1da177e4 LT	2	/*
	3	* cardbus.c -- 16-bit PCMCIA core support
	4	*
1da177e4 LT	5	* The initial developer of the original code is David A. Hinds
	6	* <[email protected]>. Portions created by David A. Hinds
	7	* are Copyright (C) 1999 David A. Hinds. All Rights Reserved.
	8	*
	9	* (C) 1999 David A. Hinds
	10	*/
	11
	12	/*
	13	* Cardbus handling has been re-written to be more of a PCI bridge thing,
	14	* and the PCI code basically does all the resource handling.
	15	*
	16	* Linus, Jan 2000
	17	*/
	18
	19
1da177e4	20	#include <linux/kernel.h>
57197b9b	21	#include <linux/module.h>
1da177e4	22	#include <linux/pci.h>
1da177e4	23
1da177e4	24	#include <pcmcia/ss.h>
990a1b50	25	#include <pcmcia/cistpl.h>
1da177e4	26
990a1b50	27	#include "cs_internal.h"
1da177e4	28
15ea76d4	29	static void cardbus_config_irq_and_cls(struct pci_bus *bus, int irq)
1da177e4 LT	30	{
	31	struct pci_dev *dev;
	32
	33	list_for_each_entry(dev, &bus->devices, bus_list) {
	34	u8 irq_pin;
	35
15ea76d4 TH	36	/*
	37	* Since there is only one interrupt available to
	38	* CardBus devices, all devices downstream of this
	39	* device must be using this IRQ.
	40	*/
1da177e4 LT	41	pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &irq_pin);
	42	if (irq_pin) {
	43	dev->irq = irq;
	44	pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
	45	}
	46
15ea76d4 TH	47	/*
	48	* Some controllers transfer very slowly with 0 CLS.
	49	* Configure it. This may fail as CLS configuration
	50	* is mandatory only for MWI.
	51	*/
	52	pci_set_cacheline_size(dev);
	53
1da177e4	54	if (dev->subordinate)
15ea76d4	55	cardbus_config_irq_and_cls(dev->subordinate, irq);
1da177e4 LT	56	}
	57	}
	58
57197b9b DB	59	/**
	60	* cb_alloc() - add CardBus device
	61	* @s: the pcmcia_socket where the CardBus device is located
	62	*
	63	* cb_alloc() allocates the kernel data structures for a Cardbus device
	64	* and handles the lowest level PCI device setup issues.
	65	*/
9fea84f4	66	int __ref cb_alloc(struct pcmcia_socket *s)
1da177e4 LT	67	{
	68	struct pci_bus *bus = s->cb_dev->subordinate;
	69	struct pci_dev *dev;
	70	unsigned int max, pass;
	71
5ef68e88 RW	72	pci_lock_rescan_remove();
5ef68e88 RW	73
1da177e4	74	s->functions = pci_scan_slot(bus, PCI_DEVFN(0, 0));
6e83ee07	75	pci_fixup_cardbus(bus);
1da177e4	76
b918c62e	77	max = bus->busn_res.start;
1da177e4	78	for (pass = 0; pass < 2; pass++)
24a0c654 AS	79	for_each_pci_bridge(dev, bus)
24a0c654 AS	80	max = pci_scan_bridge(bus, dev, max, pass);
1da177e4 LT	81
	82	/*
	83	* Size all resources below the CardBus controller.
	84	*/
	85	pci_bus_size_bridges(bus);
	86	pci_bus_assign_resources(bus);
15ea76d4	87	cardbus_config_irq_and_cls(bus, s->pci_irq);
8c3520d4 DR	88
	89	/* socket specific tune function */
	90	if (s->tune_bridge)
	91	s->tune_bridge(s, bus);
	92
1da177e4 LT	93	pci_bus_add_devices(bus);
1da177e4 LT	94
5ef68e88	95	pci_unlock_rescan_remove();
4c89e88b	96	return 0;
1da177e4 LT	97	}
1da177e4 LT	98
57197b9b DB	99	/**
	100	* cb_free() - remove CardBus device
	101	* @s: the pcmcia_socket where the CardBus device was located
	102	*
	103	* cb_free() handles the lowest level PCI device cleanup.
	104	*/
9fea84f4	105	void cb_free(struct pcmcia_socket *s)
1da177e4	106	{
0a140577 BH	107	struct pci_dev bridge, dev, *tmp;
0a140577 BH	108	struct pci_bus *bus;
1da177e4	109
0a140577 BH	110	bridge = s->cb_dev;
	111	if (!bridge)
	112	return;
	113
	114	bus = bridge->subordinate;
	115	if (!bus)
	116	return;
	117
5ef68e88 RW	118	pci_lock_rescan_remove();
5ef68e88 RW	119
0a140577 BH	120	list_for_each_entry_safe(dev, tmp, &bus->devices, bus_list)
0a140577 BH	121	pci_stop_and_remove_bus_device(dev);
5ef68e88 RW	122
5ef68e88 RW	123	pci_unlock_rescan_remove();
1da177e4	124	}