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16216333 | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
4984c6f5 PZ |
2 | /* |
3 | * Generic on-chip SRAM allocation driver | |
4 | * | |
5 | * Copyright (C) 2012 Philipp Zabel, Pengutronix | |
4984c6f5 PZ |
6 | */ |
7 | ||
4984c6f5 | 8 | #include <linux/clk.h> |
2ae2e288 | 9 | #include <linux/delay.h> |
98ce2d27 | 10 | #include <linux/genalloc.h> |
4984c6f5 | 11 | #include <linux/io.h> |
2da19688 | 12 | #include <linux/list_sort.h> |
d9c58aeb | 13 | #include <linux/of.h> |
98ce2d27 | 14 | #include <linux/of_address.h> |
4984c6f5 | 15 | #include <linux/platform_device.h> |
2ae2e288 | 16 | #include <linux/regmap.h> |
4984c6f5 | 17 | #include <linux/slab.h> |
2ae2e288 AB |
18 | #include <linux/mfd/syscon.h> |
19 | #include <soc/at91/atmel-secumod.h> | |
4984c6f5 | 20 | |
cdd1737c | 21 | #include "sram.h" |
665d82fb | 22 | |
cdd1737c | 23 | #define SRAM_GRANULARITY 32 |
2da19688 | 24 | |
b4c3fcb3 | 25 | static ssize_t sram_read(struct file *filp, struct kobject *kobj, |
c3b8c358 | 26 | const struct bin_attribute *attr, |
b4c3fcb3 VZ |
27 | char *buf, loff_t pos, size_t count) |
28 | { | |
29 | struct sram_partition *part; | |
30 | ||
31 | part = container_of(attr, struct sram_partition, battr); | |
32 | ||
33 | mutex_lock(&part->lock); | |
525d12f2 | 34 | memcpy_fromio(buf, part->base + pos, count); |
b4c3fcb3 VZ |
35 | mutex_unlock(&part->lock); |
36 | ||
37 | return count; | |
38 | } | |
39 | ||
40 | static ssize_t sram_write(struct file *filp, struct kobject *kobj, | |
c3b8c358 | 41 | const struct bin_attribute *attr, |
b4c3fcb3 VZ |
42 | char *buf, loff_t pos, size_t count) |
43 | { | |
44 | struct sram_partition *part; | |
45 | ||
46 | part = container_of(attr, struct sram_partition, battr); | |
47 | ||
48 | mutex_lock(&part->lock); | |
525d12f2 | 49 | memcpy_toio(part->base + pos, buf, count); |
b4c3fcb3 VZ |
50 | mutex_unlock(&part->lock); |
51 | ||
52 | return count; | |
53 | } | |
54 | ||
55 | static int sram_add_pool(struct sram_dev *sram, struct sram_reserve *block, | |
56 | phys_addr_t start, struct sram_partition *part) | |
57 | { | |
58 | int ret; | |
59 | ||
60 | part->pool = devm_gen_pool_create(sram->dev, ilog2(SRAM_GRANULARITY), | |
61 | NUMA_NO_NODE, block->label); | |
62 | if (IS_ERR(part->pool)) | |
63 | return PTR_ERR(part->pool); | |
64 | ||
65 | ret = gen_pool_add_virt(part->pool, (unsigned long)part->base, start, | |
66 | block->size, NUMA_NO_NODE); | |
67 | if (ret < 0) { | |
68 | dev_err(sram->dev, "failed to register subpool: %d\n", ret); | |
69 | return ret; | |
70 | } | |
71 | ||
72 | return 0; | |
73 | } | |
74 | ||
75 | static int sram_add_export(struct sram_dev *sram, struct sram_reserve *block, | |
76 | phys_addr_t start, struct sram_partition *part) | |
77 | { | |
78 | sysfs_bin_attr_init(&part->battr); | |
79 | part->battr.attr.name = devm_kasprintf(sram->dev, GFP_KERNEL, | |
80 | "%llx.sram", | |
81 | (unsigned long long)start); | |
82 | if (!part->battr.attr.name) | |
83 | return -ENOMEM; | |
84 | ||
85 | part->battr.attr.mode = S_IRUSR | S_IWUSR; | |
c3b8c358 TW |
86 | part->battr.read_new = sram_read; |
87 | part->battr.write_new = sram_write; | |
b4c3fcb3 VZ |
88 | part->battr.size = block->size; |
89 | ||
90 | return device_create_bin_file(sram->dev, &part->battr); | |
91 | } | |
92 | ||
93 | static int sram_add_partition(struct sram_dev *sram, struct sram_reserve *block, | |
94 | phys_addr_t start) | |
95 | { | |
96 | int ret; | |
97 | struct sram_partition *part = &sram->partition[sram->partitions]; | |
98 | ||
99 | mutex_init(&part->lock); | |
fec29bf0 MP |
100 | |
101 | if (sram->config && sram->config->map_only_reserved) { | |
102 | void __iomem *virt_base; | |
103 | ||
104 | if (sram->no_memory_wc) | |
105 | virt_base = devm_ioremap_resource(sram->dev, &block->res); | |
106 | else | |
107 | virt_base = devm_ioremap_resource_wc(sram->dev, &block->res); | |
108 | ||
109 | if (IS_ERR(virt_base)) { | |
110 | dev_err(sram->dev, "could not map SRAM at %pr\n", &block->res); | |
111 | return PTR_ERR(virt_base); | |
112 | } | |
113 | ||
114 | part->base = virt_base; | |
115 | } else { | |
116 | part->base = sram->virt_base + block->start; | |
117 | } | |
b4c3fcb3 VZ |
118 | |
119 | if (block->pool) { | |
120 | ret = sram_add_pool(sram, block, start, part); | |
121 | if (ret) | |
122 | return ret; | |
123 | } | |
124 | if (block->export) { | |
125 | ret = sram_add_export(sram, block, start, part); | |
126 | if (ret) | |
127 | return ret; | |
128 | } | |
37afff0d DG |
129 | if (block->protect_exec) { |
130 | ret = sram_check_protect_exec(sram, block, part); | |
131 | if (ret) | |
132 | return ret; | |
133 | ||
134 | ret = sram_add_pool(sram, block, start, part); | |
135 | if (ret) | |
136 | return ret; | |
137 | ||
138 | sram_add_protect_exec(part); | |
139 | } | |
140 | ||
b4c3fcb3 VZ |
141 | sram->partitions++; |
142 | ||
143 | return 0; | |
144 | } | |
145 | ||
146 | static void sram_free_partitions(struct sram_dev *sram) | |
147 | { | |
148 | struct sram_partition *part; | |
149 | ||
150 | if (!sram->partitions) | |
151 | return; | |
152 | ||
153 | part = &sram->partition[sram->partitions - 1]; | |
154 | for (; sram->partitions; sram->partitions--, part--) { | |
155 | if (part->battr.size) | |
156 | device_remove_bin_file(sram->dev, &part->battr); | |
157 | ||
158 | if (part->pool && | |
159 | gen_pool_avail(part->pool) < gen_pool_size(part->pool)) | |
160 | dev_err(sram->dev, "removed pool while SRAM allocated\n"); | |
161 | } | |
162 | } | |
163 | ||
4f0f586b ST |
164 | static int sram_reserve_cmp(void *priv, const struct list_head *a, |
165 | const struct list_head *b) | |
2da19688 HS |
166 | { |
167 | struct sram_reserve *ra = list_entry(a, struct sram_reserve, list); | |
168 | struct sram_reserve *rb = list_entry(b, struct sram_reserve, list); | |
169 | ||
170 | return ra->start - rb->start; | |
171 | } | |
172 | ||
a0a5be0b | 173 | static int sram_reserve_regions(struct sram_dev *sram, struct resource *res) |
4984c6f5 | 174 | { |
a0a5be0b | 175 | struct device_node *np = sram->dev->of_node, *child; |
2da19688 HS |
176 | unsigned long size, cur_start, cur_size; |
177 | struct sram_reserve *rblocks, *block; | |
178 | struct list_head reserve_list; | |
b4c3fcb3 VZ |
179 | unsigned int nblocks, exports = 0; |
180 | const char *label; | |
a0a5be0b | 181 | int ret = 0; |
4984c6f5 | 182 | |
2da19688 HS |
183 | INIT_LIST_HEAD(&reserve_list); |
184 | ||
f3cbfa5d | 185 | size = resource_size(res); |
4984c6f5 | 186 | |
2da19688 HS |
187 | /* |
188 | * We need an additional block to mark the end of the memory region | |
189 | * after the reserved blocks from the dt are processed. | |
190 | */ | |
191 | nblocks = (np) ? of_get_available_child_count(np) + 1 : 1; | |
6396bb22 | 192 | rblocks = kcalloc(nblocks, sizeof(*rblocks), GFP_KERNEL); |
ee895ccd VZ |
193 | if (!rblocks) |
194 | return -ENOMEM; | |
4984c6f5 | 195 | |
2da19688 HS |
196 | block = &rblocks[0]; |
197 | for_each_available_child_of_node(np, child) { | |
198 | struct resource child_res; | |
199 | ||
200 | ret = of_address_to_resource(child, 0, &child_res); | |
201 | if (ret < 0) { | |
665d82fb | 202 | dev_err(sram->dev, |
34d0eb50 RH |
203 | "could not get address for node %pOF\n", |
204 | child); | |
2da19688 HS |
205 | goto err_chunks; |
206 | } | |
207 | ||
208 | if (child_res.start < res->start || child_res.end > res->end) { | |
665d82fb | 209 | dev_err(sram->dev, |
34d0eb50 RH |
210 | "reserved block %pOF outside the sram area\n", |
211 | child); | |
2da19688 HS |
212 | ret = -EINVAL; |
213 | goto err_chunks; | |
214 | } | |
215 | ||
216 | block->start = child_res.start - res->start; | |
217 | block->size = resource_size(&child_res); | |
fec29bf0 | 218 | block->res = child_res; |
2da19688 HS |
219 | list_add_tail(&block->list, &reserve_list); |
220 | ||
d7d744ab RH |
221 | block->export = of_property_read_bool(child, "export"); |
222 | block->pool = of_property_read_bool(child, "pool"); | |
223 | block->protect_exec = of_property_read_bool(child, "protect-exec"); | |
37afff0d DG |
224 | |
225 | if ((block->export || block->pool || block->protect_exec) && | |
226 | block->size) { | |
b4c3fcb3 VZ |
227 | exports++; |
228 | ||
229 | label = NULL; | |
230 | ret = of_property_read_string(child, "label", &label); | |
231 | if (ret && ret != -EINVAL) { | |
232 | dev_err(sram->dev, | |
34d0eb50 RH |
233 | "%pOF has invalid label name\n", |
234 | child); | |
b4c3fcb3 VZ |
235 | goto err_chunks; |
236 | } | |
237 | if (!label) | |
21e5a2d1 | 238 | block->label = devm_kasprintf(sram->dev, GFP_KERNEL, |
f8ea9502 | 239 | "%s", of_node_full_name(child)); |
21e5a2d1 LW |
240 | else |
241 | block->label = devm_kstrdup(sram->dev, | |
242 | label, GFP_KERNEL); | |
ddc5c9a3 PB |
243 | if (!block->label) { |
244 | ret = -ENOMEM; | |
b4c3fcb3 | 245 | goto err_chunks; |
ddc5c9a3 | 246 | } |
b4c3fcb3 VZ |
247 | |
248 | dev_dbg(sram->dev, "found %sblock '%s' 0x%x-0x%x\n", | |
249 | block->export ? "exported " : "", block->label, | |
250 | block->start, block->start + block->size); | |
251 | } else { | |
252 | dev_dbg(sram->dev, "found reserved block 0x%x-0x%x\n", | |
253 | block->start, block->start + block->size); | |
254 | } | |
2da19688 HS |
255 | |
256 | block++; | |
257 | } | |
b4c3fcb3 | 258 | child = NULL; |
2da19688 HS |
259 | |
260 | /* the last chunk marks the end of the region */ | |
261 | rblocks[nblocks - 1].start = size; | |
262 | rblocks[nblocks - 1].size = 0; | |
263 | list_add_tail(&rblocks[nblocks - 1].list, &reserve_list); | |
264 | ||
265 | list_sort(NULL, &reserve_list, sram_reserve_cmp); | |
266 | ||
b4c3fcb3 | 267 | if (exports) { |
a86854d0 KC |
268 | sram->partition = devm_kcalloc(sram->dev, |
269 | exports, sizeof(*sram->partition), | |
b4c3fcb3 VZ |
270 | GFP_KERNEL); |
271 | if (!sram->partition) { | |
272 | ret = -ENOMEM; | |
273 | goto err_chunks; | |
274 | } | |
275 | } | |
2da19688 | 276 | |
b4c3fcb3 | 277 | cur_start = 0; |
2da19688 HS |
278 | list_for_each_entry(block, &reserve_list, list) { |
279 | /* can only happen if sections overlap */ | |
280 | if (block->start < cur_start) { | |
665d82fb | 281 | dev_err(sram->dev, |
2da19688 HS |
282 | "block at 0x%x starts after current offset 0x%lx\n", |
283 | block->start, cur_start); | |
284 | ret = -EINVAL; | |
b4c3fcb3 | 285 | sram_free_partitions(sram); |
2da19688 HS |
286 | goto err_chunks; |
287 | } | |
288 | ||
37afff0d DG |
289 | if ((block->export || block->pool || block->protect_exec) && |
290 | block->size) { | |
b4c3fcb3 VZ |
291 | ret = sram_add_partition(sram, block, |
292 | res->start + block->start); | |
293 | if (ret) { | |
294 | sram_free_partitions(sram); | |
295 | goto err_chunks; | |
296 | } | |
297 | } | |
298 | ||
2da19688 HS |
299 | /* current start is in a reserved block, so continue after it */ |
300 | if (block->start == cur_start) { | |
301 | cur_start = block->start + block->size; | |
302 | continue; | |
303 | } | |
304 | ||
305 | /* | |
306 | * allocate the space between the current starting | |
307 | * address and the following reserved block, or the | |
308 | * end of the region. | |
309 | */ | |
310 | cur_size = block->start - cur_start; | |
311 | ||
fec29bf0 MP |
312 | if (sram->pool) { |
313 | dev_dbg(sram->dev, "adding chunk 0x%lx-0x%lx\n", | |
314 | cur_start, cur_start + cur_size); | |
665d82fb | 315 | |
fec29bf0 MP |
316 | ret = gen_pool_add_virt(sram->pool, |
317 | (unsigned long)sram->virt_base + cur_start, | |
318 | res->start + cur_start, cur_size, -1); | |
319 | if (ret < 0) { | |
320 | sram_free_partitions(sram); | |
321 | goto err_chunks; | |
322 | } | |
b4c3fcb3 | 323 | } |
2da19688 HS |
324 | |
325 | /* next allocation after this reserved block */ | |
326 | cur_start = block->start + block->size; | |
327 | } | |
328 | ||
3104389e | 329 | err_chunks: |
330 | of_node_put(child); | |
2da19688 HS |
331 | kfree(rblocks); |
332 | ||
a0a5be0b VZ |
333 | return ret; |
334 | } | |
335 | ||
2ae2e288 AB |
336 | static int atmel_securam_wait(void) |
337 | { | |
338 | struct regmap *regmap; | |
339 | u32 val; | |
340 | ||
341 | regmap = syscon_regmap_lookup_by_compatible("atmel,sama5d2-secumod"); | |
342 | if (IS_ERR(regmap)) | |
343 | return -ENODEV; | |
344 | ||
345 | return regmap_read_poll_timeout(regmap, AT91_SECUMOD_RAMRDY, val, | |
346 | val & AT91_SECUMOD_RAMRDY_READY, | |
347 | 10000, 500000); | |
348 | } | |
349 | ||
fec29bf0 MP |
350 | static const struct sram_config atmel_securam_config = { |
351 | .init = atmel_securam_wait, | |
352 | }; | |
353 | ||
354 | /* | |
355 | * SYSRAM contains areas that are not accessible by the | |
356 | * kernel, such as the first 256K that is reserved for TZ. | |
357 | * Accesses to those areas (including speculative accesses) | |
358 | * trigger SErrors. As such we must map only the areas of | |
359 | * SYSRAM specified in the device tree. | |
360 | */ | |
361 | static const struct sram_config tegra_sysram_config = { | |
362 | .map_only_reserved = true, | |
363 | }; | |
364 | ||
2ae2e288 AB |
365 | static const struct of_device_id sram_dt_ids[] = { |
366 | { .compatible = "mmio-sram" }, | |
fec29bf0 MP |
367 | { .compatible = "atmel,sama5d2-securam", .data = &atmel_securam_config }, |
368 | { .compatible = "nvidia,tegra186-sysram", .data = &tegra_sysram_config }, | |
369 | { .compatible = "nvidia,tegra194-sysram", .data = &tegra_sysram_config }, | |
2925fc1c | 370 | { .compatible = "nvidia,tegra234-sysram", .data = &tegra_sysram_config }, |
2ae2e288 AB |
371 | {} |
372 | }; | |
2ae2e288 | 373 | |
a0a5be0b VZ |
374 | static int sram_probe(struct platform_device *pdev) |
375 | { | |
fec29bf0 | 376 | const struct sram_config *config; |
a0a5be0b | 377 | struct sram_dev *sram; |
a0a5be0b | 378 | int ret; |
39b27e89 | 379 | struct resource *res; |
9263271a | 380 | struct clk *clk; |
fec29bf0 MP |
381 | |
382 | config = of_device_get_match_data(&pdev->dev); | |
a0a5be0b VZ |
383 | |
384 | sram = devm_kzalloc(&pdev->dev, sizeof(*sram), GFP_KERNEL); | |
385 | if (!sram) | |
386 | return -ENOMEM; | |
387 | ||
388 | sram->dev = &pdev->dev; | |
fec29bf0 MP |
389 | sram->no_memory_wc = of_property_read_bool(pdev->dev.of_node, "no-memory-wc"); |
390 | sram->config = config; | |
391 | ||
392 | if (!config || !config->map_only_reserved) { | |
393 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
394 | if (sram->no_memory_wc) | |
395 | sram->virt_base = devm_ioremap_resource(&pdev->dev, res); | |
396 | else | |
397 | sram->virt_base = devm_ioremap_resource_wc(&pdev->dev, res); | |
398 | if (IS_ERR(sram->virt_base)) { | |
399 | dev_err(&pdev->dev, "could not map SRAM registers\n"); | |
400 | return PTR_ERR(sram->virt_base); | |
401 | } | |
a0a5be0b | 402 | |
fec29bf0 MP |
403 | sram->pool = devm_gen_pool_create(sram->dev, ilog2(SRAM_GRANULARITY), |
404 | NUMA_NO_NODE, NULL); | |
405 | if (IS_ERR(sram->pool)) | |
406 | return PTR_ERR(sram->pool); | |
444b0111 | 407 | } |
a0a5be0b | 408 | |
9263271a UKK |
409 | clk = devm_clk_get_optional_enabled(sram->dev, NULL); |
410 | if (IS_ERR(clk)) | |
411 | return PTR_ERR(clk); | |
ee895ccd | 412 | |
444b0111 BG |
413 | ret = sram_reserve_regions(sram, |
414 | platform_get_resource(pdev, IORESOURCE_MEM, 0)); | |
d5b9653d | 415 | if (ret) |
9263271a | 416 | return ret; |
d5b9653d | 417 | |
4984c6f5 PZ |
418 | platform_set_drvdata(pdev, sram); |
419 | ||
fec29bf0 MP |
420 | if (config && config->init) { |
421 | ret = config->init(); | |
2ae2e288 | 422 | if (ret) |
d5b9653d | 423 | goto err_free_partitions; |
2ae2e288 AB |
424 | } |
425 | ||
fec29bf0 MP |
426 | if (sram->pool) |
427 | dev_dbg(sram->dev, "SRAM pool: %zu KiB @ 0x%p\n", | |
428 | gen_pool_size(sram->pool) / 1024, sram->virt_base); | |
4984c6f5 PZ |
429 | |
430 | return 0; | |
f294d009 | 431 | |
d5b9653d JH |
432 | err_free_partitions: |
433 | sram_free_partitions(sram); | |
f294d009 JH |
434 | |
435 | return ret; | |
4984c6f5 PZ |
436 | } |
437 | ||
74b32514 | 438 | static void sram_remove(struct platform_device *pdev) |
4984c6f5 PZ |
439 | { |
440 | struct sram_dev *sram = platform_get_drvdata(pdev); | |
441 | ||
b4c3fcb3 VZ |
442 | sram_free_partitions(sram); |
443 | ||
fec29bf0 | 444 | if (sram->pool && gen_pool_avail(sram->pool) < gen_pool_size(sram->pool)) |
665d82fb | 445 | dev_err(sram->dev, "removed while SRAM allocated\n"); |
4984c6f5 PZ |
446 | } |
447 | ||
4984c6f5 PZ |
448 | static struct platform_driver sram_driver = { |
449 | .driver = { | |
450 | .name = "sram", | |
2aa488a6 | 451 | .of_match_table = sram_dt_ids, |
4984c6f5 PZ |
452 | }, |
453 | .probe = sram_probe, | |
e70140ba | 454 | .remove = sram_remove, |
4984c6f5 PZ |
455 | }; |
456 | ||
457 | static int __init sram_init(void) | |
458 | { | |
459 | return platform_driver_register(&sram_driver); | |
460 | } | |
461 | ||
462 | postcore_initcall(sram_init); |