[linux.git] / drivers / gpio / gpio-mpc5200.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * MPC52xx gpio driver
 *
 * Copyright (c) 2008 Sascha Hauer <[email protected]>, Pengutronix
 */

#include <linux/of.h>
#include <linux/kernel.h>
#include <linux/slab.h>
#include <linux/gpio/legacy-of-mm-gpiochip.h>
#include <linux/io.h>
#include <linux/platform_device.h>
#include <linux/module.h>

#include <asm/mpc52xx.h>
#include <sysdev/fsl_soc.h>

static DEFINE_SPINLOCK(gpio_lock);

struct mpc52xx_gpiochip {
	struct of_mm_gpio_chip mmchip;
	unsigned int shadow_dvo;
	unsigned int shadow_gpioe;
	unsigned int shadow_ddr;
};

/*
 * GPIO LIB API implementation for wakeup GPIOs.
 *
 * There's a maximum of 8 wakeup GPIOs. Which of these are available
 * for use depends on your board setup.
 *
 * 0 -> GPIO_WKUP_7
 * 1 -> GPIO_WKUP_6
 * 2 -> PSC6_1
 * 3 -> PSC6_0
 * 4 -> ETH_17
 * 5 -> PSC3_9
 * 6 -> PSC2_4
 * 7 -> PSC1_4
 *
 */
static int mpc52xx_wkup_gpio_get(struct gpio_chip *gc, unsigned int gpio)
{
	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
	struct mpc52xx_gpio_wkup __iomem *regs = mm_gc->regs;
	unsigned int ret;

	ret = (in_8(&regs->wkup_ival) >> (7 - gpio)) & 1;

	pr_debug("%s: gpio: %d ret: %d\n", __func__, gpio, ret);

	return ret;
}

static inline void
__mpc52xx_wkup_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
{
	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
	struct mpc52xx_gpiochip *chip = gpiochip_get_data(gc);
	struct mpc52xx_gpio_wkup __iomem *regs = mm_gc->regs;

	if (val)
		chip->shadow_dvo |= 1 << (7 - gpio);
	else
		chip->shadow_dvo &= ~(1 << (7 - gpio));

	out_8(&regs->wkup_dvo, chip->shadow_dvo);
}

static void
mpc52xx_wkup_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
{
	unsigned long flags;

	spin_lock_irqsave(&gpio_lock, flags);

	__mpc52xx_wkup_gpio_set(gc, gpio, val);

	spin_unlock_irqrestore(&gpio_lock, flags);

	pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);
}

static int mpc52xx_wkup_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
{
	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
	struct mpc52xx_gpiochip *chip = gpiochip_get_data(gc);
	struct mpc52xx_gpio_wkup __iomem *regs = mm_gc->regs;
	unsigned long flags;

	spin_lock_irqsave(&gpio_lock, flags);

	/* set the direction */
	chip->shadow_ddr &= ~(1 << (7 - gpio));
	out_8(&regs->wkup_ddr, chip->shadow_ddr);

	/* and enable the pin */
	chip->shadow_gpioe |= 1 << (7 - gpio);
	out_8(&regs->wkup_gpioe, chip->shadow_gpioe);

	spin_unlock_irqrestore(&gpio_lock, flags);

	return 0;
}

static int
mpc52xx_wkup_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
{
	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
	struct mpc52xx_gpio_wkup __iomem *regs = mm_gc->regs;
	struct mpc52xx_gpiochip *chip = gpiochip_get_data(gc);
	unsigned long flags;

	spin_lock_irqsave(&gpio_lock, flags);

	__mpc52xx_wkup_gpio_set(gc, gpio, val);

	/* Then set direction */
	chip->shadow_ddr |= 1 << (7 - gpio);
	out_8(&regs->wkup_ddr, chip->shadow_ddr);

	/* Finally enable the pin */
	chip->shadow_gpioe |= 1 << (7 - gpio);
	out_8(&regs->wkup_gpioe, chip->shadow_gpioe);

	spin_unlock_irqrestore(&gpio_lock, flags);

	pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);

	return 0;
}

static int mpc52xx_wkup_gpiochip_probe(struct platform_device *ofdev)
{
	struct mpc52xx_gpiochip *chip;
	struct mpc52xx_gpio_wkup __iomem *regs;
	struct gpio_chip *gc;
	int ret;

	chip = devm_kzalloc(&ofdev->dev, sizeof(*chip), GFP_KERNEL);
	if (!chip)
		return -ENOMEM;

	platform_set_drvdata(ofdev, chip);

	gc = &chip->mmchip.gc;

	gc->ngpio            = 8;
	gc->direction_input  = mpc52xx_wkup_gpio_dir_in;
	gc->direction_output = mpc52xx_wkup_gpio_dir_out;
	gc->get              = mpc52xx_wkup_gpio_get;
	gc->set              = mpc52xx_wkup_gpio_set;

	ret = of_mm_gpiochip_add_data(ofdev->dev.of_node, &chip->mmchip, chip);
	if (ret)
		return ret;

	regs = chip->mmchip.regs;
	chip->shadow_gpioe = in_8(&regs->wkup_gpioe);
	chip->shadow_ddr = in_8(&regs->wkup_ddr);
	chip->shadow_dvo = in_8(&regs->wkup_dvo);

	return 0;
}

static void mpc52xx_gpiochip_remove(struct platform_device *ofdev)
{
	struct mpc52xx_gpiochip *chip = platform_get_drvdata(ofdev);

	of_mm_gpiochip_remove(&chip->mmchip);
}

static const struct of_device_id mpc52xx_wkup_gpiochip_match[] = {
	{ .compatible = "fsl,mpc5200-gpio-wkup", },
	{}
};

static struct platform_driver mpc52xx_wkup_gpiochip_driver = {
	.driver = {
		.name = "mpc5200-gpio-wkup",
		.of_match_table = mpc52xx_wkup_gpiochip_match,
	},
	.probe = mpc52xx_wkup_gpiochip_probe,
	.remove_new = mpc52xx_gpiochip_remove,
};

/*
 * GPIO LIB API implementation for simple GPIOs
 *
 * There's a maximum of 32 simple GPIOs. Which of these are available
 * for use depends on your board setup.
 * The numbering reflects the bit numbering in the port registers:
 *
 *  0..1  > reserved
 *  2..3  > IRDA
 *  4..7  > ETHR
 *  8..11 > reserved
 * 12..15 > USB
 * 16..17 > reserved
 * 18..23 > PSC3
 * 24..27 > PSC2
 * 28..31 > PSC1
 */
static int mpc52xx_simple_gpio_get(struct gpio_chip *gc, unsigned int gpio)
{
	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
	struct mpc52xx_gpio __iomem *regs = mm_gc->regs;
	unsigned int ret;

	ret = (in_be32(&regs->simple_ival) >> (31 - gpio)) & 1;

	return ret;
}

static inline void
__mpc52xx_simple_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
{
	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
	struct mpc52xx_gpiochip *chip = gpiochip_get_data(gc);
	struct mpc52xx_gpio __iomem *regs = mm_gc->regs;

	if (val)
		chip->shadow_dvo |= 1 << (31 - gpio);
	else
		chip->shadow_dvo &= ~(1 << (31 - gpio));
	out_be32(&regs->simple_dvo, chip->shadow_dvo);
}

static void
mpc52xx_simple_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
{
	unsigned long flags;

	spin_lock_irqsave(&gpio_lock, flags);

	__mpc52xx_simple_gpio_set(gc, gpio, val);

	spin_unlock_irqrestore(&gpio_lock, flags);

	pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);
}

static int mpc52xx_simple_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
{
	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
	struct mpc52xx_gpiochip *chip = gpiochip_get_data(gc);
	struct mpc52xx_gpio __iomem *regs = mm_gc->regs;
	unsigned long flags;

	spin_lock_irqsave(&gpio_lock, flags);

	/* set the direction */
	chip->shadow_ddr &= ~(1 << (31 - gpio));
	out_be32(&regs->simple_ddr, chip->shadow_ddr);

	/* and enable the pin */
	chip->shadow_gpioe |= 1 << (31 - gpio);
	out_be32(&regs->simple_gpioe, chip->shadow_gpioe);

	spin_unlock_irqrestore(&gpio_lock, flags);

	return 0;
}

static int
mpc52xx_simple_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
{
	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
	struct mpc52xx_gpiochip *chip = gpiochip_get_data(gc);
	struct mpc52xx_gpio __iomem *regs = mm_gc->regs;
	unsigned long flags;

	spin_lock_irqsave(&gpio_lock, flags);

	/* First set initial value */
	__mpc52xx_simple_gpio_set(gc, gpio, val);

	/* Then set direction */
	chip->shadow_ddr |= 1 << (31 - gpio);
	out_be32(&regs->simple_ddr, chip->shadow_ddr);

	/* Finally enable the pin */
	chip->shadow_gpioe |= 1 << (31 - gpio);
	out_be32(&regs->simple_gpioe, chip->shadow_gpioe);

	spin_unlock_irqrestore(&gpio_lock, flags);

	pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);

	return 0;
}

static int mpc52xx_simple_gpiochip_probe(struct platform_device *ofdev)
{
	struct mpc52xx_gpiochip *chip;
	struct gpio_chip *gc;
	struct mpc52xx_gpio __iomem *regs;
	int ret;

	chip = devm_kzalloc(&ofdev->dev, sizeof(*chip), GFP_KERNEL);
	if (!chip)
		return -ENOMEM;

	platform_set_drvdata(ofdev, chip);

	gc = &chip->mmchip.gc;

	gc->ngpio            = 32;
	gc->direction_input  = mpc52xx_simple_gpio_dir_in;
	gc->direction_output = mpc52xx_simple_gpio_dir_out;
	gc->get              = mpc52xx_simple_gpio_get;
	gc->set              = mpc52xx_simple_gpio_set;

	ret = of_mm_gpiochip_add_data(ofdev->dev.of_node, &chip->mmchip, chip);
	if (ret)
		return ret;

	regs = chip->mmchip.regs;
	chip->shadow_gpioe = in_be32(&regs->simple_gpioe);
	chip->shadow_ddr = in_be32(&regs->simple_ddr);
	chip->shadow_dvo = in_be32(&regs->simple_dvo);

	return 0;
}

static const struct of_device_id mpc52xx_simple_gpiochip_match[] = {
	{ .compatible = "fsl,mpc5200-gpio", },
	{}
};

static struct platform_driver mpc52xx_simple_gpiochip_driver = {
	.driver = {
		.name = "mpc5200-gpio",
		.of_match_table = mpc52xx_simple_gpiochip_match,
	},
	.probe = mpc52xx_simple_gpiochip_probe,
	.remove_new = mpc52xx_gpiochip_remove,
};

static struct platform_driver * const drivers[] = {
	&mpc52xx_wkup_gpiochip_driver,
	&mpc52xx_simple_gpiochip_driver,
};

static int __init mpc52xx_gpio_init(void)
{
	return platform_register_drivers(drivers, ARRAY_SIZE(drivers));
}

/* Make sure we get initialised before anyone else tries to use us */
subsys_initcall(mpc52xx_gpio_init);

static void __exit mpc52xx_gpio_exit(void)
{
	platform_unregister_drivers(drivers, ARRAY_SIZE(drivers));
}
module_exit(mpc52xx_gpio_exit);

MODULE_DESCRIPTION("Freescale MPC52xx gpio driver");
MODULE_AUTHOR("Sascha Hauer <[email protected]");
MODULE_LICENSE("GPL v2");
Commit	Line	Data
45051539	1	// SPDX-License-Identifier: GPL-2.0-only
3cd2550c SH	2	/*
	3	* MPC52xx gpio driver
	4	*
	5	* Copyright (c) 2008 Sascha Hauer <[email protected]>, Pengutronix
3cd2550c SH	6	*/
	7
	8	#include <linux/of.h>
	9	#include <linux/kernel.h>
5a0e3ad6	10	#include <linux/slab.h>
a99cc668	11	#include <linux/gpio/legacy-of-mm-gpiochip.h>
3cd2550c	12	#include <linux/io.h>
e91d0f05	13	#include <linux/platform_device.h>
bb207ef1	14	#include <linux/module.h>
3cd2550c	15
3cd2550c SH	16	#include <asm/mpc52xx.h>
	17	#include <sysdev/fsl_soc.h>
	18
	19	static DEFINE_SPINLOCK(gpio_lock);
	20
	21	struct mpc52xx_gpiochip {
	22	struct of_mm_gpio_chip mmchip;
	23	unsigned int shadow_dvo;
	24	unsigned int shadow_gpioe;
	25	unsigned int shadow_ddr;
	26	};
	27
	28	/*
	29	* GPIO LIB API implementation for wakeup GPIOs.
	30	*
	31	* There's a maximum of 8 wakeup GPIOs. Which of these are available
	32	* for use depends on your board setup.
	33	*
	34	* 0 -> GPIO_WKUP_7
	35	* 1 -> GPIO_WKUP_6
	36	* 2 -> PSC6_1
	37	* 3 -> PSC6_0
	38	* 4 -> ETH_17
	39	* 5 -> PSC3_9
	40	* 6 -> PSC2_4
	41	* 7 -> PSC1_4
	42	*
	43	*/
	44	static int mpc52xx_wkup_gpio_get(struct gpio_chip *gc, unsigned int gpio)
	45	{
	46	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
	47	struct mpc52xx_gpio_wkup __iomem *regs = mm_gc->regs;
	48	unsigned int ret;
	49
	50	ret = (in_8(&regs->wkup_ival) >> (7 - gpio)) & 1;
	51
	52	pr_debug("%s: gpio: %d ret: %d\n", __func__, gpio, ret);
	53
	54	return ret;
	55	}
	56
	57	static inline void
	58	__mpc52xx_wkup_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
	59	{
	60	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
837c2705	61	struct mpc52xx_gpiochip *chip = gpiochip_get_data(gc);
3cd2550c SH	62	struct mpc52xx_gpio_wkup __iomem *regs = mm_gc->regs;
	63
	64	if (val)
	65	chip->shadow_dvo \|= 1 << (7 - gpio);
	66	else
	67	chip->shadow_dvo &= ~(1 << (7 - gpio));
	68
	69	out_8(&regs->wkup_dvo, chip->shadow_dvo);
	70	}
	71
	72	static void
	73	mpc52xx_wkup_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
	74	{
	75	unsigned long flags;
	76
	77	spin_lock_irqsave(&gpio_lock, flags);
	78
	79	__mpc52xx_wkup_gpio_set(gc, gpio, val);
	80
	81	spin_unlock_irqrestore(&gpio_lock, flags);
	82
	83	pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);
	84	}
	85
	86	static int mpc52xx_wkup_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
	87	{
	88	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
837c2705	89	struct mpc52xx_gpiochip *chip = gpiochip_get_data(gc);
93072457	90	struct mpc52xx_gpio_wkup __iomem *regs = mm_gc->regs;
3cd2550c SH	91	unsigned long flags;
	92
	93	spin_lock_irqsave(&gpio_lock, flags);
	94
	95	/* set the direction */
	96	chip->shadow_ddr &= ~(1 << (7 - gpio));
	97	out_8(&regs->wkup_ddr, chip->shadow_ddr);
	98
	99	/* and enable the pin */
	100	chip->shadow_gpioe \|= 1 << (7 - gpio);
	101	out_8(&regs->wkup_gpioe, chip->shadow_gpioe);
	102
	103	spin_unlock_irqrestore(&gpio_lock, flags);
	104
	105	return 0;
	106	}
	107
	108	static int
	109	mpc52xx_wkup_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
	110	{
	111	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
93072457	112	struct mpc52xx_gpio_wkup __iomem *regs = mm_gc->regs;
837c2705	113	struct mpc52xx_gpiochip *chip = gpiochip_get_data(gc);
3cd2550c SH	114	unsigned long flags;
	115
	116	spin_lock_irqsave(&gpio_lock, flags);
	117
	118	__mpc52xx_wkup_gpio_set(gc, gpio, val);
	119
	120	/* Then set direction */
	121	chip->shadow_ddr \|= 1 << (7 - gpio);
	122	out_8(&regs->wkup_ddr, chip->shadow_ddr);
	123
	124	/* Finally enable the pin */
	125	chip->shadow_gpioe \|= 1 << (7 - gpio);
	126	out_8(&regs->wkup_gpioe, chip->shadow_gpioe);
	127
	128	spin_unlock_irqrestore(&gpio_lock, flags);
	129
	130	pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);
	131
	132	return 0;
	133	}
	134
3836309d	135	static int mpc52xx_wkup_gpiochip_probe(struct platform_device *ofdev)
3cd2550c SH	136	{
3cd2550c SH	137	struct mpc52xx_gpiochip *chip;
93072457	138	struct mpc52xx_gpio_wkup __iomem *regs;
a19e3da5	139	struct gpio_chip *gc;
3cd2550c SH	140	int ret;
3cd2550c SH	141
f91b2dbb	142	chip = devm_kzalloc(&ofdev->dev, sizeof(*chip), GFP_KERNEL);
3cd2550c SH	143	if (!chip)
	144	return -ENOMEM;
	145
f91b2dbb RR	146	platform_set_drvdata(ofdev, chip);
f91b2dbb RR	147
a19e3da5	148	gc = &chip->mmchip.gc;
3cd2550c	149
a19e3da5 AV	150	gc->ngpio = 8;
	151	gc->direction_input = mpc52xx_wkup_gpio_dir_in;
	152	gc->direction_output = mpc52xx_wkup_gpio_dir_out;
	153	gc->get = mpc52xx_wkup_gpio_get;
	154	gc->set = mpc52xx_wkup_gpio_set;
3cd2550c	155
837c2705	156	ret = of_mm_gpiochip_add_data(ofdev->dev.of_node, &chip->mmchip, chip);
3cd2550c SH	157	if (ret)
	158	return ret;
	159
	160	regs = chip->mmchip.regs;
	161	chip->shadow_gpioe = in_8(&regs->wkup_gpioe);
	162	chip->shadow_ddr = in_8(&regs->wkup_ddr);
	163	chip->shadow_dvo = in_8(&regs->wkup_dvo);
	164
	165	return 0;
	166	}
	167
0ede8698	168	static void mpc52xx_gpiochip_remove(struct platform_device *ofdev)
3cd2550c	169	{
f91b2dbb RR	170	struct mpc52xx_gpiochip *chip = platform_get_drvdata(ofdev);
	171
	172	of_mm_gpiochip_remove(&chip->mmchip);
3cd2550c SH	173	}
	174
	175	static const struct of_device_id mpc52xx_wkup_gpiochip_match[] = {
6eae1ace	176	{ .compatible = "fsl,mpc5200-gpio-wkup", },
3cd2550c SH	177	{}
	178	};
	179
00006124	180	static struct platform_driver mpc52xx_wkup_gpiochip_driver = {
4018294b	181	.driver = {
6eae1ace	182	.name = "mpc5200-gpio-wkup",
4018294b GL	183	.of_match_table = mpc52xx_wkup_gpiochip_match,
4018294b GL	184	},
3cd2550c	185	.probe = mpc52xx_wkup_gpiochip_probe,
0ede8698	186	.remove_new = mpc52xx_gpiochip_remove,
3cd2550c SH	187	};
	188
	189	/*
	190	* GPIO LIB API implementation for simple GPIOs
	191	*
	192	* There's a maximum of 32 simple GPIOs. Which of these are available
	193	* for use depends on your board setup.
	194	* The numbering reflects the bit numbering in the port registers:
	195	*
	196	* 0..1 > reserved
	197	* 2..3 > IRDA
	198	* 4..7 > ETHR
	199	* 8..11 > reserved
	200	* 12..15 > USB
	201	* 16..17 > reserved
	202	* 18..23 > PSC3
	203	* 24..27 > PSC2
	204	* 28..31 > PSC1
	205	*/
	206	static int mpc52xx_simple_gpio_get(struct gpio_chip *gc, unsigned int gpio)
	207	{
	208	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
	209	struct mpc52xx_gpio __iomem *regs = mm_gc->regs;
	210	unsigned int ret;
	211
	212	ret = (in_be32(&regs->simple_ival) >> (31 - gpio)) & 1;
	213
	214	return ret;
	215	}
	216
	217	static inline void
	218	__mpc52xx_simple_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
	219	{
	220	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
837c2705	221	struct mpc52xx_gpiochip *chip = gpiochip_get_data(gc);
3cd2550c SH	222	struct mpc52xx_gpio __iomem *regs = mm_gc->regs;
	223
	224	if (val)
	225	chip->shadow_dvo \|= 1 << (31 - gpio);
	226	else
	227	chip->shadow_dvo &= ~(1 << (31 - gpio));
	228	out_be32(&regs->simple_dvo, chip->shadow_dvo);
	229	}
	230
	231	static void
	232	mpc52xx_simple_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
	233	{
	234	unsigned long flags;
	235
	236	spin_lock_irqsave(&gpio_lock, flags);
	237
	238	__mpc52xx_simple_gpio_set(gc, gpio, val);
	239
	240	spin_unlock_irqrestore(&gpio_lock, flags);
	241
	242	pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);
	243	}
	244
	245	static int mpc52xx_simple_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
	246	{
	247	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
837c2705	248	struct mpc52xx_gpiochip *chip = gpiochip_get_data(gc);
93072457	249	struct mpc52xx_gpio __iomem *regs = mm_gc->regs;
3cd2550c SH	250	unsigned long flags;
	251
	252	spin_lock_irqsave(&gpio_lock, flags);
	253
	254	/* set the direction */
	255	chip->shadow_ddr &= ~(1 << (31 - gpio));
	256	out_be32(&regs->simple_ddr, chip->shadow_ddr);
	257
	258	/* and enable the pin */
	259	chip->shadow_gpioe \|= 1 << (31 - gpio);
	260	out_be32(&regs->simple_gpioe, chip->shadow_gpioe);
	261
	262	spin_unlock_irqrestore(&gpio_lock, flags);
	263
	264	return 0;
	265	}
	266
	267	static int
	268	mpc52xx_simple_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
	269	{
	270	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
837c2705	271	struct mpc52xx_gpiochip *chip = gpiochip_get_data(gc);
93072457	272	struct mpc52xx_gpio __iomem *regs = mm_gc->regs;
3cd2550c SH	273	unsigned long flags;
	274
	275	spin_lock_irqsave(&gpio_lock, flags);
	276
	277	/* First set initial value */
	278	__mpc52xx_simple_gpio_set(gc, gpio, val);
	279
	280	/* Then set direction */
	281	chip->shadow_ddr \|= 1 << (31 - gpio);
	282	out_be32(&regs->simple_ddr, chip->shadow_ddr);
	283
	284	/* Finally enable the pin */
	285	chip->shadow_gpioe \|= 1 << (31 - gpio);
	286	out_be32(&regs->simple_gpioe, chip->shadow_gpioe);
	287
	288	spin_unlock_irqrestore(&gpio_lock, flags);
	289
	290	pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);
	291
	292	return 0;
	293	}
	294
3836309d	295	static int mpc52xx_simple_gpiochip_probe(struct platform_device *ofdev)
3cd2550c SH	296	{
3cd2550c SH	297	struct mpc52xx_gpiochip *chip;
a19e3da5	298	struct gpio_chip *gc;
93072457	299	struct mpc52xx_gpio __iomem *regs;
3cd2550c SH	300	int ret;
3cd2550c SH	301
f91b2dbb	302	chip = devm_kzalloc(&ofdev->dev, sizeof(*chip), GFP_KERNEL);
3cd2550c SH	303	if (!chip)
	304	return -ENOMEM;
	305
f91b2dbb RR	306	platform_set_drvdata(ofdev, chip);
f91b2dbb RR	307
a19e3da5	308	gc = &chip->mmchip.gc;
3cd2550c	309
a19e3da5 AV	310	gc->ngpio = 32;
	311	gc->direction_input = mpc52xx_simple_gpio_dir_in;
	312	gc->direction_output = mpc52xx_simple_gpio_dir_out;
	313	gc->get = mpc52xx_simple_gpio_get;
	314	gc->set = mpc52xx_simple_gpio_set;
3cd2550c	315
837c2705	316	ret = of_mm_gpiochip_add_data(ofdev->dev.of_node, &chip->mmchip, chip);
3cd2550c SH	317	if (ret)
	318	return ret;
	319
	320	regs = chip->mmchip.regs;
	321	chip->shadow_gpioe = in_be32(&regs->simple_gpioe);
	322	chip->shadow_ddr = in_be32(&regs->simple_ddr);
	323	chip->shadow_dvo = in_be32(&regs->simple_dvo);
	324
	325	return 0;
	326	}
	327
	328	static const struct of_device_id mpc52xx_simple_gpiochip_match[] = {
6eae1ace	329	{ .compatible = "fsl,mpc5200-gpio", },
3cd2550c SH	330	{}
	331	};
	332
00006124	333	static struct platform_driver mpc52xx_simple_gpiochip_driver = {
4018294b	334	.driver = {
6eae1ace	335	.name = "mpc5200-gpio",
4018294b GL	336	.of_match_table = mpc52xx_simple_gpiochip_match,
4018294b GL	337	},
3cd2550c	338	.probe = mpc52xx_simple_gpiochip_probe,
0ede8698	339	.remove_new = mpc52xx_gpiochip_remove,
3cd2550c SH	340	};
3cd2550c SH	341
20d7090f TR	342	static struct platform_driver * const drivers[] = {
	343	&mpc52xx_wkup_gpiochip_driver,
	344	&mpc52xx_simple_gpiochip_driver,
	345	};
	346
3cd2550c SH	347	static int __init mpc52xx_gpio_init(void)
3cd2550c SH	348	{
20d7090f	349	return platform_register_drivers(drivers, ARRAY_SIZE(drivers));
3cd2550c SH	350	}
3cd2550c SH	351
3cd2550c SH	352	/* Make sure we get initialised before anyone else tries to use us */
	353	subsys_initcall(mpc52xx_gpio_init);
	354
f91b2dbb RR	355	static void __exit mpc52xx_gpio_exit(void)
f91b2dbb RR	356	{
20d7090f	357	platform_unregister_drivers(drivers, ARRAY_SIZE(drivers));
f91b2dbb RR	358	}
f91b2dbb RR	359	module_exit(mpc52xx_gpio_exit);
3cd2550c SH	360
	361	MODULE_DESCRIPTION("Freescale MPC52xx gpio driver");
	362	MODULE_AUTHOR("Sascha Hauer <[email protected]");
	363	MODULE_LICENSE("GPL v2");
	364