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Commit | Line | Data |
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b2441318 | 1 | // SPDX-License-Identifier: GPL-2.0 |
2c2e6ecf DD |
2 | /* |
3 | * cpuidle-powernv - idle state cpuidle driver. | |
4 | * Adapted from drivers/cpuidle/cpuidle-pseries | |
5 | * | |
6 | */ | |
7 | ||
8 | #include <linux/kernel.h> | |
9 | #include <linux/module.h> | |
10 | #include <linux/init.h> | |
11 | #include <linux/moduleparam.h> | |
12 | #include <linux/cpuidle.h> | |
13 | #include <linux/cpu.h> | |
14 | #include <linux/notifier.h> | |
0d948730 | 15 | #include <linux/clockchips.h> |
0888839c | 16 | #include <linux/of.h> |
92c83ff5 | 17 | #include <linux/slab.h> |
2c2e6ecf DD |
18 | |
19 | #include <asm/machdep.h> | |
20 | #include <asm/firmware.h> | |
8eb8ac89 | 21 | #include <asm/opal.h> |
591ac0cb | 22 | #include <asm/runlatch.h> |
09206b60 | 23 | #include <asm/cpuidle.h> |
2c2e6ecf | 24 | |
9e9fc6f0 GS |
25 | /* |
26 | * Expose only those Hardware idle states via the cpuidle framework | |
27 | * that have latency value below POWERNV_THRESHOLD_LATENCY_NS. | |
28 | */ | |
3005c597 SP |
29 | #define POWERNV_THRESHOLD_LATENCY_NS 200000 |
30 | ||
ed61390b | 31 | static struct cpuidle_driver powernv_idle_driver = { |
2c2e6ecf DD |
32 | .name = "powernv_idle", |
33 | .owner = THIS_MODULE, | |
34 | }; | |
35 | ||
624e46d0 NP |
36 | static int max_idle_state __read_mostly; |
37 | static struct cpuidle_state *cpuidle_state_table __read_mostly; | |
3005c597 | 38 | |
09206b60 GS |
39 | struct stop_psscr_table { |
40 | u64 val; | |
41 | u64 mask; | |
42 | }; | |
43 | ||
624e46d0 | 44 | static struct stop_psscr_table stop_psscr_table[CPUIDLE_STATE_MAX] __read_mostly; |
3005c597 | 45 | |
0a4ec6aa | 46 | static u64 default_snooze_timeout __read_mostly; |
624e46d0 | 47 | static bool snooze_timeout_en __read_mostly; |
2c2e6ecf | 48 | |
0a4ec6aa GS |
49 | static u64 get_snooze_timeout(struct cpuidle_device *dev, |
50 | struct cpuidle_driver *drv, | |
51 | int index) | |
52 | { | |
53 | int i; | |
54 | ||
55 | if (unlikely(!snooze_timeout_en)) | |
56 | return default_snooze_timeout; | |
57 | ||
58 | for (i = index + 1; i < drv->state_count; i++) { | |
59 | struct cpuidle_state *s = &drv->states[i]; | |
60 | struct cpuidle_state_usage *su = &dev->states_usage[i]; | |
61 | ||
62 | if (s->disabled || su->disable) | |
63 | continue; | |
64 | ||
65 | return s->target_residency * tb_ticks_per_usec; | |
66 | } | |
67 | ||
68 | return default_snooze_timeout; | |
69 | } | |
70 | ||
2c2e6ecf DD |
71 | static int snooze_loop(struct cpuidle_device *dev, |
72 | struct cpuidle_driver *drv, | |
73 | int index) | |
74 | { | |
78eaa10f SB |
75 | u64 snooze_exit_time; |
76 | ||
2c2e6ecf DD |
77 | set_thread_flag(TIF_POLLING_NRFLAG); |
78 | ||
3fc5ee92 NP |
79 | local_irq_enable(); |
80 | ||
0a4ec6aa | 81 | snooze_exit_time = get_tb() + get_snooze_timeout(dev, drv, index); |
591ac0cb | 82 | ppc64_runlatch_off(); |
26eb48a9 | 83 | HMT_very_low(); |
2c2e6ecf | 84 | while (!need_resched()) { |
7ded4291 NP |
85 | if (likely(snooze_timeout_en) && get_tb() > snooze_exit_time) { |
86 | /* | |
87 | * Task has not woken up but we are exiting the polling | |
88 | * loop anyway. Require a barrier after polling is | |
89 | * cleared to order subsequent test of need_resched(). | |
90 | */ | |
91 | clear_thread_flag(TIF_POLLING_NRFLAG); | |
92 | smp_mb(); | |
78eaa10f | 93 | break; |
7ded4291 | 94 | } |
2c2e6ecf DD |
95 | } |
96 | ||
97 | HMT_medium(); | |
591ac0cb | 98 | ppc64_runlatch_on(); |
2c2e6ecf | 99 | clear_thread_flag(TIF_POLLING_NRFLAG); |
3fc5ee92 | 100 | |
f1343d04 NP |
101 | local_irq_disable(); |
102 | ||
2c2e6ecf DD |
103 | return index; |
104 | } | |
105 | ||
106 | static int nap_loop(struct cpuidle_device *dev, | |
107 | struct cpuidle_driver *drv, | |
108 | int index) | |
109 | { | |
2201f994 NP |
110 | power7_idle_type(PNV_THREAD_NAP); |
111 | ||
2c2e6ecf DD |
112 | return index; |
113 | } | |
114 | ||
cc5a2f7b | 115 | /* Register for fastsleep only in oneshot mode of broadcast */ |
116 | #ifdef CONFIG_TICK_ONESHOT | |
0d948730 PM |
117 | static int fastsleep_loop(struct cpuidle_device *dev, |
118 | struct cpuidle_driver *drv, | |
119 | int index) | |
120 | { | |
121 | unsigned long old_lpcr = mfspr(SPRN_LPCR); | |
122 | unsigned long new_lpcr; | |
123 | ||
124 | if (unlikely(system_state < SYSTEM_RUNNING)) | |
125 | return index; | |
126 | ||
127 | new_lpcr = old_lpcr; | |
9b6a68d9 MN |
128 | /* Do not exit powersave upon decrementer as we've setup the timer |
129 | * offload. | |
0d948730 | 130 | */ |
9b6a68d9 | 131 | new_lpcr &= ~LPCR_PECE1; |
0d948730 PM |
132 | |
133 | mtspr(SPRN_LPCR, new_lpcr); | |
2201f994 NP |
134 | |
135 | power7_idle_type(PNV_THREAD_SLEEP); | |
0d948730 PM |
136 | |
137 | mtspr(SPRN_LPCR, old_lpcr); | |
138 | ||
139 | return index; | |
140 | } | |
cc5a2f7b | 141 | #endif |
3005c597 SP |
142 | |
143 | static int stop_loop(struct cpuidle_device *dev, | |
144 | struct cpuidle_driver *drv, | |
145 | int index) | |
146 | { | |
2201f994 | 147 | power9_idle_type(stop_psscr_table[index].val, |
09206b60 | 148 | stop_psscr_table[index].mask); |
3005c597 SP |
149 | return index; |
150 | } | |
151 | ||
2c2e6ecf DD |
152 | /* |
153 | * States for dedicated partition case. | |
154 | */ | |
169f3fae | 155 | static struct cpuidle_state powernv_states[CPUIDLE_STATE_MAX] = { |
2c2e6ecf DD |
156 | { /* Snooze */ |
157 | .name = "snooze", | |
158 | .desc = "snooze", | |
2c2e6ecf DD |
159 | .exit_latency = 0, |
160 | .target_residency = 0, | |
957efced | 161 | .enter = snooze_loop }, |
2c2e6ecf DD |
162 | }; |
163 | ||
10fcca9d | 164 | static int powernv_cpuidle_cpu_online(unsigned int cpu) |
2c2e6ecf | 165 | { |
10fcca9d | 166 | struct cpuidle_device *dev = per_cpu(cpuidle_devices, cpu); |
2c2e6ecf DD |
167 | |
168 | if (dev && cpuidle_get_driver()) { | |
10fcca9d SAS |
169 | cpuidle_pause_and_lock(); |
170 | cpuidle_enable_device(dev); | |
171 | cpuidle_resume_and_unlock(); | |
172 | } | |
173 | return 0; | |
174 | } | |
2c2e6ecf | 175 | |
10fcca9d SAS |
176 | static int powernv_cpuidle_cpu_dead(unsigned int cpu) |
177 | { | |
178 | struct cpuidle_device *dev = per_cpu(cpuidle_devices, cpu); | |
2c2e6ecf | 179 | |
10fcca9d SAS |
180 | if (dev && cpuidle_get_driver()) { |
181 | cpuidle_pause_and_lock(); | |
182 | cpuidle_disable_device(dev); | |
183 | cpuidle_resume_and_unlock(); | |
2c2e6ecf | 184 | } |
10fcca9d | 185 | return 0; |
2c2e6ecf DD |
186 | } |
187 | ||
2c2e6ecf DD |
188 | /* |
189 | * powernv_cpuidle_driver_init() | |
190 | */ | |
191 | static int powernv_cpuidle_driver_init(void) | |
192 | { | |
193 | int idle_state; | |
194 | struct cpuidle_driver *drv = &powernv_idle_driver; | |
195 | ||
196 | drv->state_count = 0; | |
197 | ||
198 | for (idle_state = 0; idle_state < max_idle_state; ++idle_state) { | |
199 | /* Is the state not enabled? */ | |
200 | if (cpuidle_state_table[idle_state].enter == NULL) | |
201 | continue; | |
202 | ||
203 | drv->states[drv->state_count] = /* structure copy */ | |
204 | cpuidle_state_table[idle_state]; | |
205 | ||
206 | drv->state_count += 1; | |
207 | } | |
208 | ||
293d264f VS |
209 | /* |
210 | * On the PowerNV platform cpu_present may be less than cpu_possible in | |
211 | * cases when firmware detects the CPU, but it is not available to the | |
212 | * OS. If CONFIG_HOTPLUG_CPU=n, then such CPUs are not hotplugable at | |
213 | * run time and hence cpu_devices are not created for those CPUs by the | |
214 | * generic topology_init(). | |
215 | * | |
216 | * drv->cpumask defaults to cpu_possible_mask in | |
217 | * __cpuidle_driver_init(). This breaks cpuidle on PowerNV where | |
218 | * cpu_devices are not created for CPUs in cpu_possible_mask that | |
219 | * cannot be hot-added later at run time. | |
220 | * | |
221 | * Trying cpuidle_register_device() on a CPU without a cpu_device is | |
222 | * incorrect, so pass a correct CPU mask to the generic cpuidle driver. | |
223 | */ | |
224 | ||
225 | drv->cpumask = (struct cpumask *)cpu_present_mask; | |
226 | ||
2c2e6ecf DD |
227 | return 0; |
228 | } | |
229 | ||
9e9fc6f0 GS |
230 | static inline void add_powernv_state(int index, const char *name, |
231 | unsigned int flags, | |
232 | int (*idle_fn)(struct cpuidle_device *, | |
233 | struct cpuidle_driver *, | |
234 | int), | |
235 | unsigned int target_residency, | |
236 | unsigned int exit_latency, | |
09206b60 | 237 | u64 psscr_val, u64 psscr_mask) |
9e9fc6f0 GS |
238 | { |
239 | strlcpy(powernv_states[index].name, name, CPUIDLE_NAME_LEN); | |
240 | strlcpy(powernv_states[index].desc, name, CPUIDLE_NAME_LEN); | |
241 | powernv_states[index].flags = flags; | |
242 | powernv_states[index].target_residency = target_residency; | |
243 | powernv_states[index].exit_latency = exit_latency; | |
244 | powernv_states[index].enter = idle_fn; | |
09206b60 GS |
245 | stop_psscr_table[index].val = psscr_val; |
246 | stop_psscr_table[index].mask = psscr_mask; | |
9e9fc6f0 GS |
247 | } |
248 | ||
ecad4502 GS |
249 | /* |
250 | * Returns 0 if prop1_len == prop2_len. Else returns -1 | |
251 | */ | |
252 | static inline int validate_dt_prop_sizes(const char *prop1, int prop1_len, | |
253 | const char *prop2, int prop2_len) | |
254 | { | |
255 | if (prop1_len == prop2_len) | |
256 | return 0; | |
257 | ||
258 | pr_warn("cpuidle-powernv: array sizes don't match for %s and %s\n", | |
259 | prop1, prop2); | |
260 | return -1; | |
261 | } | |
262 | ||
785a12af | 263 | extern u32 pnv_get_supported_cpuidle_states(void); |
0888839c PM |
264 | static int powernv_add_idle_states(void) |
265 | { | |
266 | struct device_node *power_mgt; | |
0888839c | 267 | int nr_idle_states = 1; /* Snooze */ |
ecad4502 | 268 | int dt_idle_states, count; |
957efced SP |
269 | u32 latency_ns[CPUIDLE_STATE_MAX]; |
270 | u32 residency_ns[CPUIDLE_STATE_MAX]; | |
271 | u32 flags[CPUIDLE_STATE_MAX]; | |
3005c597 | 272 | u64 psscr_val[CPUIDLE_STATE_MAX]; |
09206b60 | 273 | u64 psscr_mask[CPUIDLE_STATE_MAX]; |
3005c597 | 274 | const char *names[CPUIDLE_STATE_MAX]; |
09206b60 | 275 | u32 has_stop_states = 0; |
92c83ff5 | 276 | int i, rc; |
785a12af GS |
277 | u32 supported_flags = pnv_get_supported_cpuidle_states(); |
278 | ||
0888839c PM |
279 | |
280 | /* Currently we have snooze statically defined */ | |
281 | ||
282 | power_mgt = of_find_node_by_path("/ibm,opal/power-mgt"); | |
283 | if (!power_mgt) { | |
284 | pr_warn("opal: PowerMgmt Node not found\n"); | |
92c83ff5 | 285 | goto out; |
0888839c PM |
286 | } |
287 | ||
70734a78 PM |
288 | /* Read values of any property to determine the num of idle states */ |
289 | dt_idle_states = of_property_count_u32_elems(power_mgt, "ibm,cpu-idle-state-flags"); | |
290 | if (dt_idle_states < 0) { | |
291 | pr_warn("cpuidle-powernv: no idle states found in the DT\n"); | |
92c83ff5 | 292 | goto out; |
0888839c PM |
293 | } |
294 | ||
ecad4502 GS |
295 | count = of_property_count_u32_elems(power_mgt, |
296 | "ibm,cpu-idle-state-latencies-ns"); | |
297 | ||
298 | if (validate_dt_prop_sizes("ibm,cpu-idle-state-flags", dt_idle_states, | |
299 | "ibm,cpu-idle-state-latencies-ns", | |
300 | count) != 0) | |
301 | goto out; | |
302 | ||
303 | count = of_property_count_strings(power_mgt, | |
304 | "ibm,cpu-idle-state-names"); | |
305 | if (validate_dt_prop_sizes("ibm,cpu-idle-state-flags", dt_idle_states, | |
306 | "ibm,cpu-idle-state-names", | |
307 | count) != 0) | |
308 | goto out; | |
309 | ||
957efced SP |
310 | /* |
311 | * Since snooze is used as first idle state, max idle states allowed is | |
312 | * CPUIDLE_STATE_MAX -1 | |
313 | */ | |
314 | if (dt_idle_states > CPUIDLE_STATE_MAX - 1) { | |
315 | pr_warn("cpuidle-powernv: discovered idle states more than allowed"); | |
316 | dt_idle_states = CPUIDLE_STATE_MAX - 1; | |
317 | } | |
318 | ||
70734a78 PM |
319 | if (of_property_read_u32_array(power_mgt, |
320 | "ibm,cpu-idle-state-flags", flags, dt_idle_states)) { | |
321 | pr_warn("cpuidle-powernv : missing ibm,cpu-idle-state-flags in DT\n"); | |
957efced | 322 | goto out; |
70734a78 | 323 | } |
92c83ff5 | 324 | |
957efced SP |
325 | if (of_property_read_u32_array(power_mgt, |
326 | "ibm,cpu-idle-state-latencies-ns", latency_ns, | |
327 | dt_idle_states)) { | |
92c83ff5 | 328 | pr_warn("cpuidle-powernv: missing ibm,cpu-idle-state-latencies-ns in DT\n"); |
957efced | 329 | goto out; |
74aa51b5 | 330 | } |
3005c597 SP |
331 | if (of_property_read_string_array(power_mgt, |
332 | "ibm,cpu-idle-state-names", names, dt_idle_states) < 0) { | |
333 | pr_warn("cpuidle-powernv: missing ibm,cpu-idle-state-names in DT\n"); | |
334 | goto out; | |
335 | } | |
336 | ||
337 | /* | |
338 | * If the idle states use stop instruction, probe for psscr values | |
09206b60 | 339 | * and psscr mask which are necessary to specify required stop level. |
3005c597 | 340 | */ |
09206b60 GS |
341 | has_stop_states = (flags[0] & |
342 | (OPAL_PM_STOP_INST_FAST | OPAL_PM_STOP_INST_DEEP)); | |
343 | if (has_stop_states) { | |
ecad4502 GS |
344 | count = of_property_count_u64_elems(power_mgt, |
345 | "ibm,cpu-idle-state-psscr"); | |
346 | if (validate_dt_prop_sizes("ibm,cpu-idle-state-flags", | |
347 | dt_idle_states, | |
348 | "ibm,cpu-idle-state-psscr", | |
349 | count) != 0) | |
350 | goto out; | |
351 | ||
352 | count = of_property_count_u64_elems(power_mgt, | |
353 | "ibm,cpu-idle-state-psscr-mask"); | |
354 | if (validate_dt_prop_sizes("ibm,cpu-idle-state-flags", | |
355 | dt_idle_states, | |
356 | "ibm,cpu-idle-state-psscr-mask", | |
357 | count) != 0) | |
358 | goto out; | |
359 | ||
3005c597 SP |
360 | if (of_property_read_u64_array(power_mgt, |
361 | "ibm,cpu-idle-state-psscr", psscr_val, dt_idle_states)) { | |
09206b60 | 362 | pr_warn("cpuidle-powernv: missing ibm,cpu-idle-state-psscr in DT\n"); |
3005c597 SP |
363 | goto out; |
364 | } | |
74aa51b5 | 365 | |
09206b60 GS |
366 | if (of_property_read_u64_array(power_mgt, |
367 | "ibm,cpu-idle-state-psscr-mask", | |
368 | psscr_mask, dt_idle_states)) { | |
369 | pr_warn("cpuidle-powernv:Missing ibm,cpu-idle-state-psscr-mask in DT\n"); | |
370 | goto out; | |
371 | } | |
372 | } | |
373 | ||
ecad4502 GS |
374 | count = of_property_count_u32_elems(power_mgt, |
375 | "ibm,cpu-idle-state-residency-ns"); | |
376 | ||
377 | if (count < 0) { | |
378 | rc = count; | |
379 | } else if (validate_dt_prop_sizes("ibm,cpu-idle-state-flags", | |
380 | dt_idle_states, | |
381 | "ibm,cpu-idle-state-residency-ns", | |
382 | count) != 0) { | |
383 | goto out; | |
384 | } else { | |
385 | rc = of_property_read_u32_array(power_mgt, | |
386 | "ibm,cpu-idle-state-residency-ns", | |
387 | residency_ns, dt_idle_states); | |
388 | } | |
0888839c PM |
389 | |
390 | for (i = 0; i < dt_idle_states; i++) { | |
9e9fc6f0 | 391 | unsigned int exit_latency, target_residency; |
f9122ee4 | 392 | bool stops_timebase = false; |
785a12af GS |
393 | |
394 | /* | |
395 | * Skip the platform idle state whose flag isn't in | |
396 | * the supported_cpuidle_states flag mask. | |
397 | */ | |
398 | if ((flags[i] & supported_flags) != flags[i]) | |
399 | continue; | |
3005c597 SP |
400 | /* |
401 | * If an idle state has exit latency beyond | |
402 | * POWERNV_THRESHOLD_LATENCY_NS then don't use it | |
403 | * in cpu-idle. | |
404 | */ | |
405 | if (latency_ns[i] > POWERNV_THRESHOLD_LATENCY_NS) | |
406 | continue; | |
9e9fc6f0 GS |
407 | /* |
408 | * Firmware passes residency and latency values in ns. | |
409 | * cpuidle expects it in us. | |
410 | */ | |
8d4e10e9 | 411 | exit_latency = DIV_ROUND_UP(latency_ns[i], 1000); |
9e9fc6f0 | 412 | if (!rc) |
8d4e10e9 | 413 | target_residency = DIV_ROUND_UP(residency_ns[i], 1000); |
9e9fc6f0 GS |
414 | else |
415 | target_residency = 0; | |
0888839c | 416 | |
09206b60 GS |
417 | if (has_stop_states) { |
418 | int err = validate_psscr_val_mask(&psscr_val[i], | |
419 | &psscr_mask[i], | |
420 | flags[i]); | |
421 | if (err) { | |
422 | report_invalid_psscr_val(psscr_val[i], err); | |
423 | continue; | |
424 | } | |
425 | } | |
426 | ||
f9122ee4 GS |
427 | if (flags[i] & OPAL_PM_TIMEBASE_STOP) |
428 | stops_timebase = true; | |
429 | ||
92c83ff5 | 430 | /* |
9e9fc6f0 GS |
431 | * For nap and fastsleep, use default target_residency |
432 | * values if f/w does not expose it. | |
74aa51b5 | 433 | */ |
70734a78 | 434 | if (flags[i] & OPAL_PM_NAP_ENABLED) { |
9e9fc6f0 GS |
435 | if (!rc) |
436 | target_residency = 100; | |
0888839c | 437 | /* Add NAP state */ |
9e9fc6f0 GS |
438 | add_powernv_state(nr_idle_states, "Nap", |
439 | CPUIDLE_FLAG_NONE, nap_loop, | |
09206b60 | 440 | target_residency, exit_latency, 0, 0); |
f9122ee4 | 441 | } else if (has_stop_states && !stops_timebase) { |
9e9fc6f0 GS |
442 | add_powernv_state(nr_idle_states, names[i], |
443 | CPUIDLE_FLAG_NONE, stop_loop, | |
444 | target_residency, exit_latency, | |
09206b60 | 445 | psscr_val[i], psscr_mask[i]); |
cc5a2f7b | 446 | } |
447 | ||
448 | /* | |
449 | * All cpuidle states with CPUIDLE_FLAG_TIMER_STOP set must come | |
450 | * within this config dependency check. | |
451 | */ | |
452 | #ifdef CONFIG_TICK_ONESHOT | |
f9122ee4 GS |
453 | else if (flags[i] & OPAL_PM_SLEEP_ENABLED || |
454 | flags[i] & OPAL_PM_SLEEP_ENABLED_ER1) { | |
9e9fc6f0 GS |
455 | if (!rc) |
456 | target_residency = 300000; | |
0888839c | 457 | /* Add FASTSLEEP state */ |
9e9fc6f0 GS |
458 | add_powernv_state(nr_idle_states, "FastSleep", |
459 | CPUIDLE_FLAG_TIMER_STOP, | |
460 | fastsleep_loop, | |
09206b60 | 461 | target_residency, exit_latency, 0, 0); |
f9122ee4 | 462 | } else if (has_stop_states && stops_timebase) { |
9e9fc6f0 GS |
463 | add_powernv_state(nr_idle_states, names[i], |
464 | CPUIDLE_FLAG_TIMER_STOP, stop_loop, | |
465 | target_residency, exit_latency, | |
09206b60 | 466 | psscr_val[i], psscr_mask[i]); |
0888839c | 467 | } |
cc5a2f7b | 468 | #endif |
f9122ee4 GS |
469 | else |
470 | continue; | |
92c83ff5 | 471 | nr_idle_states++; |
0888839c | 472 | } |
92c83ff5 | 473 | out: |
0888839c PM |
474 | return nr_idle_states; |
475 | } | |
476 | ||
2c2e6ecf DD |
477 | /* |
478 | * powernv_idle_probe() | |
479 | * Choose state table for shared versus dedicated partition | |
480 | */ | |
481 | static int powernv_idle_probe(void) | |
482 | { | |
2c2e6ecf DD |
483 | if (cpuidle_disable != IDLE_NO_OVERRIDE) |
484 | return -ENODEV; | |
485 | ||
e4d54f71 | 486 | if (firmware_has_feature(FW_FEATURE_OPAL)) { |
2c2e6ecf | 487 | cpuidle_state_table = powernv_states; |
0888839c PM |
488 | /* Device tree can indicate more idle states */ |
489 | max_idle_state = powernv_add_idle_states(); | |
0a4ec6aa GS |
490 | default_snooze_timeout = TICK_USEC * tb_ticks_per_usec; |
491 | if (max_idle_state > 1) | |
78eaa10f | 492 | snooze_timeout_en = true; |
2c2e6ecf DD |
493 | } else |
494 | return -ENODEV; | |
495 | ||
496 | return 0; | |
497 | } | |
498 | ||
499 | static int __init powernv_processor_idle_init(void) | |
500 | { | |
501 | int retval; | |
502 | ||
503 | retval = powernv_idle_probe(); | |
504 | if (retval) | |
505 | return retval; | |
506 | ||
507 | powernv_cpuidle_driver_init(); | |
508 | retval = cpuidle_register(&powernv_idle_driver, NULL); | |
509 | if (retval) { | |
510 | printk(KERN_DEBUG "Registration of powernv driver failed.\n"); | |
511 | return retval; | |
512 | } | |
513 | ||
10fcca9d SAS |
514 | retval = cpuhp_setup_state_nocalls(CPUHP_AP_ONLINE_DYN, |
515 | "cpuidle/powernv:online", | |
516 | powernv_cpuidle_cpu_online, NULL); | |
517 | WARN_ON(retval < 0); | |
518 | retval = cpuhp_setup_state_nocalls(CPUHP_CPUIDLE_DEAD, | |
519 | "cpuidle/powernv:dead", NULL, | |
520 | powernv_cpuidle_cpu_dead); | |
521 | WARN_ON(retval < 0); | |
2c2e6ecf DD |
522 | printk(KERN_DEBUG "powernv_idle_driver registered\n"); |
523 | return 0; | |
524 | } | |
525 | ||
526 | device_initcall(powernv_processor_idle_init); |