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iwl3945: Change crypto parameter name
[linux.git] / drivers / net / wireless / iwlwifi / iwl-agn.c
CommitLineData
b481de9c
ZY		 1/******************************************************************************
2 *
eb7ae89c 3 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
b481de9c
ZY		 4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
759ef89f 25 * Intel Linux Wireless <[email protected]>
b481de9c
ZY		 26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
b481de9c
ZY		 30#include <linux/kernel.h>
31#include <linux/module.h>
b481de9c
ZY		 32#include <linux/init.h>
33#include <linux/pci.h>
34#include <linux/dma-mapping.h>
35#include <linux/delay.h>
36#include <linux/skbuff.h>
37#include <linux/netdevice.h>
38#include <linux/wireless.h>
39#include <linux/firmware.h>
b481de9c
ZY		 40#include <linux/etherdevice.h>
41#include <linux/if_arp.h>
42
b481de9c
ZY		 43#include <net/mac80211.h>
44
45#include <asm/div64.h>
46
a3139c59
SO		 47#define DRV_NAME "iwlagn"
48
6bc913bd 49#include "iwl-eeprom.h"
3e0d4cb1 50#include "iwl-dev.h"
fee1247a 51#include "iwl-core.h"
3395f6e9 52#include "iwl-io.h"
b481de9c 53#include "iwl-helpers.h"
6974e363 54#include "iwl-sta.h"
f0832f13 55#include "iwl-calib.h"
b481de9c 56
416e1438 57
b481de9c
ZY		 58/******************************************************************************
59 *
60 * module boiler plate
61 *
62 ******************************************************************************/
63
b481de9c
ZY		 64/*
65 * module name, copyright, version, etc.
b481de9c 66 */
d783b061 67#define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
b481de9c 68
0a6857e7 69#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY		 70#define VD "d"
71#else
72#define VD
73#endif
74
4fc22b21 75#ifdef CONFIG_IWLAGN_SPECTRUM_MEASUREMENT
b481de9c
ZY		 76#define VS "s"
77#else
78#define VS
79#endif
80
df48c323 81#define DRV_VERSION IWLWIFI_VERSION VD VS
b481de9c 82
b481de9c
ZY		 83
84MODULE_DESCRIPTION(DRV_DESCRIPTION);
85MODULE_VERSION(DRV_VERSION);
a7b75207 86MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
b481de9c 87MODULE_LICENSE("GPL");
4fc22b21 88MODULE_ALIAS("iwl4965");
b481de9c 89
b481de9c 90/*************** STATION TABLE MANAGEMENT ****
9fbab516 91 * mac80211 should be examined to determine if sta_info is duplicating
b481de9c
ZY		 92 * the functionality provided here
93 */
94
95/**************************************************************/
96
b481de9c 97
b481de9c 98
5b9f8cd3 99static void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
deb09c43 100{
c1adf9fb 101 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
deb09c43
EG		 102
103 if (hw_decrypt)
104 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
105 else
106 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
107
108}
109
b481de9c 110/**
54559703 111 * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
01ebd063 112 * @priv: staging_rxon is compared to active_rxon
b481de9c 113 *
9fbab516
BC		 114 * If the RXON structure is changing enough to require a new tune,
115 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
116 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
b481de9c 117 */
54559703 118static int iwl_full_rxon_required(struct iwl_priv *priv)
b481de9c
ZY		 119{
120
121 /* These items are only settable from the full RXON command */
5d1e2325 122 if (!(iwl_is_associated(priv)) ||
b481de9c
ZY		 123 compare_ether_addr(priv->staging_rxon.bssid_addr,
124 priv->active_rxon.bssid_addr) ||
125 compare_ether_addr(priv->staging_rxon.node_addr,
126 priv->active_rxon.node_addr) ||
127 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
128 priv->active_rxon.wlap_bssid_addr) ||
129 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
130 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
131 (priv->staging_rxon.air_propagation !=
132 priv->active_rxon.air_propagation) ||
133 (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
134 priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
135 (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
136 priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
b481de9c
ZY		 137 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
138 return 1;
139
140 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
141 * be updated with the RXON_ASSOC command -- however only some
142 * flag transitions are allowed using RXON_ASSOC */
143
144 /* Check if we are not switching bands */
145 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
146 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
147 return 1;
148
149 /* Check if we are switching association toggle */
150 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
151 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
152 return 1;
153
154 return 0;
155}
156
b481de9c 157/**
5b9f8cd3 158 * iwl_commit_rxon - commit staging_rxon to hardware
b481de9c 159 *
01ebd063 160 * The RXON command in staging_rxon is committed to the hardware and
b481de9c
ZY		 161 * the active_rxon structure is updated with the new data. This
162 * function correctly transitions out of the RXON_ASSOC_MSK state if
163 * a HW tune is required based on the RXON structure changes.
164 */
5b9f8cd3 165static int iwl_commit_rxon(struct iwl_priv *priv)
b481de9c
ZY		 166{
167 /* cast away the const for active_rxon in this function */
c1adf9fb 168 struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
43d59b32
EG		 169 int ret;
170 bool new_assoc =
171 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
b481de9c 172
fee1247a 173 if (!iwl_is_alive(priv))
43d59b32 174 return -EBUSY;
b481de9c
ZY		 175
176 /* always get timestamp with Rx frame */
177 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
a326a5d0
EG		 178 /* allow CTS-to-self if possible. this is relevant only for
179 * 5000, but will not damage 4965 */
180 priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
b481de9c 181
a3139c59 182 ret = iwl_agn_check_rxon_cmd(priv);
43d59b32 183 if (ret) {
15b1687c 184 IWL_ERR(priv, "Invalid RXON configuration. Not committing.\n");
b481de9c
ZY		 185 return -EINVAL;
186 }
187
188 /* If we don't need to send a full RXON, we can use
5b9f8cd3 189 * iwl_rxon_assoc_cmd which is used to reconfigure filter
b481de9c 190 * and other flags for the current radio configuration. */
54559703 191 if (!iwl_full_rxon_required(priv)) {
43d59b32
EG		 192 ret = iwl_send_rxon_assoc(priv);
193 if (ret) {
15b1687c 194 IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret);
43d59b32 195 return ret;
b481de9c
ZY		 196 }
197
198 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
b481de9c
ZY		 199 return 0;
200 }
201
202 /* station table will be cleared */
203 priv->assoc_station_added = 0;
204
b481de9c
ZY		 205 /* If we are currently associated and the new config requires
206 * an RXON_ASSOC and the new config wants the associated mask enabled,
207 * we must clear the associated from the active configuration
208 * before we apply the new config */
43d59b32 209 if (iwl_is_associated(priv) && new_assoc) {
b481de9c
ZY		 210 IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
211 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
212
43d59b32 213 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
c1adf9fb 214 sizeof(struct iwl_rxon_cmd),
b481de9c
ZY		 215 &priv->active_rxon);
216
217 /* If the mask clearing failed then we set
218 * active_rxon back to what it was previously */
43d59b32 219 if (ret) {
b481de9c 220 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
15b1687c 221 IWL_ERR(priv, "Error clearing ASSOC_MSK (%d)\n", ret);
43d59b32 222 return ret;
b481de9c 223 }
b481de9c
ZY		 224 }
225
226 IWL_DEBUG_INFO("Sending RXON\n"
227 "* with%s RXON_FILTER_ASSOC_MSK\n"
228 "* channel = %d\n"
e174961c 229 "* bssid = %pM\n",
43d59b32 230 (new_assoc ? "" : "out"),
b481de9c 231 le16_to_cpu(priv->staging_rxon.channel),
e174961c 232 priv->staging_rxon.bssid_addr);
b481de9c 233
5b9f8cd3 234 iwl_set_rxon_hwcrypto(priv, !priv->hw_params.sw_crypto);
43d59b32
EG		 235
236 /* Apply the new configuration
237 * RXON unassoc clears the station table in uCode, send it before
238 * we add the bcast station. If assoc bit is set, we will send RXON
239 * after having added the bcast and bssid station.
240 */
241 if (!new_assoc) {
242 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
c1adf9fb 243 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
43d59b32 244 if (ret) {
15b1687c 245 IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
43d59b32
EG		 246 return ret;
247 }
248 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
b481de9c
ZY		 249 }
250
37deb2a0 251 iwl_clear_stations_table(priv);
556f8db7 252
b481de9c
ZY		 253 if (!priv->error_recovering)
254 priv->start_calib = 0;
255
b481de9c 256 /* Add the broadcast address so we can send broadcast frames */
4f40e4d9 257 if (iwl_rxon_add_station(priv, iwl_bcast_addr, 0) ==
43d59b32 258 IWL_INVALID_STATION) {
15b1687c 259 IWL_ERR(priv, "Error adding BROADCAST address for transmit.\n");
b481de9c
ZY		 260 return -EIO;
261 }
262
263 /* If we have set the ASSOC_MSK and we are in BSS mode then
264 * add the IWL_AP_ID to the station rate table */
9185159d 265 if (new_assoc) {
05c914fe 266 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
9185159d
TW		 267 ret = iwl_rxon_add_station(priv,
268 priv->active_rxon.bssid_addr, 1);
269 if (ret == IWL_INVALID_STATION) {
15b1687c
WT		 270 IWL_ERR(priv,
271 "Error adding AP address for TX.\n");
9185159d
TW		 272 return -EIO;
273 }
274 priv->assoc_station_added = 1;
275 if (priv->default_wep_key &&
276 iwl_send_static_wepkey_cmd(priv, 0))
15b1687c
WT		 277 IWL_ERR(priv,
278 "Could not send WEP static key.\n");
b481de9c 279 }
43d59b32
EG		 280
281 /* Apply the new configuration
282 * RXON assoc doesn't clear the station table in uCode,
283 */
284 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
285 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
286 if (ret) {
15b1687c 287 IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
43d59b32
EG		 288 return ret;
289 }
290 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
b481de9c
ZY		 291 }
292
36da7d70
ZY		 293 iwl_init_sensitivity(priv);
294
295 /* If we issue a new RXON command which required a tune then we must
296 * send a new TXPOWER command or we won't be able to Tx any frames */
297 ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
298 if (ret) {
15b1687c 299 IWL_ERR(priv, "Error sending TX power (%d)\n", ret);
36da7d70
ZY		 300 return ret;
301 }
302
b481de9c
ZY		 303 return 0;
304}
305
5b9f8cd3 306void iwl_update_chain_flags(struct iwl_priv *priv)
5da4b55f
MA		 307{
308
c7de35cd 309 iwl_set_rxon_chain(priv);
5b9f8cd3 310 iwl_commit_rxon(priv);
5da4b55f
MA		 311}
312
5b9f8cd3 313static int iwl_send_bt_config(struct iwl_priv *priv)
b481de9c 314{
2aa6ab86 315 struct iwl_bt_cmd bt_cmd = {
b481de9c
ZY		 316 .flags = 3,
317 .lead_time = 0xAA,
318 .max_kill = 1,
319 .kill_ack_mask = 0,
320 .kill_cts_mask = 0,
321 };
322
857485c0 323 return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
2aa6ab86 324 sizeof(struct iwl_bt_cmd), &bt_cmd);
b481de9c
ZY		 325}
326
fcab423d 327static void iwl_clear_free_frames(struct iwl_priv *priv)
b481de9c
ZY		 328{
329 struct list_head *element;
330
331 IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
332 priv->frames_count);
333
334 while (!list_empty(&priv->free_frames)) {
335 element = priv->free_frames.next;
336 list_del(element);
fcab423d 337 kfree(list_entry(element, struct iwl_frame, list));
b481de9c
ZY		 338 priv->frames_count--;
339 }
340
341 if (priv->frames_count) {
39aadf8c 342 IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
b481de9c
ZY		 343 priv->frames_count);
344 priv->frames_count = 0;
345 }
346}
347
fcab423d 348static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
b481de9c 349{
fcab423d 350 struct iwl_frame *frame;
b481de9c
ZY		 351 struct list_head *element;
352 if (list_empty(&priv->free_frames)) {
353 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
354 if (!frame) {
15b1687c 355 IWL_ERR(priv, "Could not allocate frame!\n");
b481de9c
ZY		 356 return NULL;
357 }
358
359 priv->frames_count++;
360 return frame;
361 }
362
363 element = priv->free_frames.next;
364 list_del(element);
fcab423d 365 return list_entry(element, struct iwl_frame, list);
b481de9c
ZY		 366}
367
fcab423d 368static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
b481de9c
ZY		 369{
370 memset(frame, 0, sizeof(*frame));
371 list_add(&frame->list, &priv->free_frames);
372}
373
4bf64efd
TW		 374static unsigned int iwl_fill_beacon_frame(struct iwl_priv *priv,
375 struct ieee80211_hdr *hdr,
73ec1cc2 376 int left)
b481de9c 377{
3109ece1 378 if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
05c914fe
JB		 379 ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
380 (priv->iw_mode != NL80211_IFTYPE_AP)))
b481de9c
ZY		 381 return 0;
382
383 if (priv->ibss_beacon->len > left)
384 return 0;
385
386 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
387
388 return priv->ibss_beacon->len;
389}
390
5b9f8cd3 391static u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv)
b481de9c 392{
39e88504
GC		 393 int i;
394 int rate_mask;
395
396 /* Set rate mask*/
397 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
dbce56a4 398 rate_mask = priv->active_rate_basic & IWL_CCK_RATES_MASK;
39e88504 399 else
dbce56a4 400 rate_mask = priv->active_rate_basic & IWL_OFDM_RATES_MASK;
b481de9c 401
39e88504 402 /* Find lowest valid rate */
b481de9c 403 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
1826dcc0 404 i = iwl_rates[i].next_ieee) {
b481de9c 405 if (rate_mask & (1 << i))
1826dcc0 406 return iwl_rates[i].plcp;
b481de9c
ZY		 407 }
408
39e88504
GC		 409 /* No valid rate was found. Assign the lowest one */
410 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
411 return IWL_RATE_1M_PLCP;
412 else
413 return IWL_RATE_6M_PLCP;
b481de9c
ZY		 414}
415
5b9f8cd3 416static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
4bf64efd
TW		 417 struct iwl_frame *frame, u8 rate)
418{
419 struct iwl_tx_beacon_cmd *tx_beacon_cmd;
420 unsigned int frame_size;
421
422 tx_beacon_cmd = &frame->u.beacon;
423 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
424
425 tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
426 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
427
428 frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
4bf64efd
TW		 429 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
430
431 BUG_ON(frame_size > MAX_MPDU_SIZE);
432 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
433
434 if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP))
435 tx_beacon_cmd->tx.rate_n_flags =
436 iwl_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK);
437 else
438 tx_beacon_cmd->tx.rate_n_flags =
439 iwl_hw_set_rate_n_flags(rate, 0);
440
441 tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
442 TX_CMD_FLG_TSF_MSK |
443 TX_CMD_FLG_STA_RATE_MSK;
444
445 return sizeof(*tx_beacon_cmd) + frame_size;
446}
5b9f8cd3 447static int iwl_send_beacon_cmd(struct iwl_priv *priv)
b481de9c 448{
fcab423d 449 struct iwl_frame *frame;
b481de9c
ZY		 450 unsigned int frame_size;
451 int rc;
452 u8 rate;
453
fcab423d 454 frame = iwl_get_free_frame(priv);
b481de9c
ZY		 455
456 if (!frame) {
15b1687c 457 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
b481de9c
ZY		 458 "command.\n");
459 return -ENOMEM;
460 }
461
5b9f8cd3 462 rate = iwl_rate_get_lowest_plcp(priv);
b481de9c 463
5b9f8cd3 464 frame_size = iwl_hw_get_beacon_cmd(priv, frame, rate);
b481de9c 465
857485c0 466 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
b481de9c
ZY		 467 &frame->u.cmd[0]);
468
fcab423d 469 iwl_free_frame(priv, frame);
b481de9c
ZY		 470
471 return rc;
472}
473
b481de9c
ZY		 474/******************************************************************************
475 *
476 * Misc. internal state and helper functions
477 *
478 ******************************************************************************/
b481de9c 479
5b9f8cd3 480static void iwl_ht_conf(struct iwl_priv *priv,
d1141dfb
EG		 481 struct ieee80211_bss_conf *bss_conf)
482{
ae5eb026 483 struct ieee80211_sta_ht_cap *ht_conf;
d1141dfb 484 struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
ae5eb026 485 struct ieee80211_sta *sta;
d1141dfb
EG		 486
487 IWL_DEBUG_MAC80211("enter: \n");
488
d1141dfb
EG		 489 if (!iwl_conf->is_ht)
490 return;
491
ae5eb026
JB		 492
493 /*
494 * It is totally wrong to base global information on something
495 * that is valid only when associated, alas, this driver works
496 * that way and I don't know how to fix it.
497 */
498
499 rcu_read_lock();
500 sta = ieee80211_find_sta(priv->hw, priv->bssid);
501 if (!sta) {
502 rcu_read_unlock();
503 return;
504 }
505 ht_conf = &sta->ht_cap;
506
d1141dfb 507 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
a9841013 508 iwl_conf->sgf |= HT_SHORT_GI_20MHZ;
d1141dfb 509 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
a9841013 510 iwl_conf->sgf |= HT_SHORT_GI_40MHZ;
d1141dfb
EG		 511
512 iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
513 iwl_conf->max_amsdu_size =
514 !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
515
516 iwl_conf->supported_chan_width =
d9fe60de 517 !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40);
ae5eb026 518
094d05dc
S		 519 /*
520 * XXX: The HT configuration needs to be moved into iwl_mac_config()
521 * to be done there correctly.
522 */
523
524 iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_NONE;
de27e64e 525 if (conf_is_ht40_minus(&priv->hw->conf))
094d05dc 526 iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_BELOW;
de27e64e 527 else if (conf_is_ht40_plus(&priv->hw->conf))
094d05dc
S		 528 iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
529
d1141dfb 530 /* If no above or below channel supplied disable FAT channel */
d9fe60de 531 if (iwl_conf->extension_chan_offset != IEEE80211_HT_PARAM_CHA_SEC_ABOVE &&
094d05dc 532 iwl_conf->extension_chan_offset != IEEE80211_HT_PARAM_CHA_SEC_BELOW)
d1141dfb
EG		 533 iwl_conf->supported_chan_width = 0;
534
12837be1
RR		 535 iwl_conf->sm_ps = (u8)((ht_conf->cap & IEEE80211_HT_CAP_SM_PS) >> 2);
536
d9fe60de 537 memcpy(&iwl_conf->mcs, &ht_conf->mcs, 16);
d1141dfb 538
094d05dc 539 iwl_conf->tx_chan_width = iwl_conf->supported_chan_width != 0;
d1141dfb 540 iwl_conf->ht_protection =
ae5eb026 541 bss_conf->ht.operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
d1141dfb 542 iwl_conf->non_GF_STA_present =
ae5eb026
JB		 543 !!(bss_conf->ht.operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
544
545 rcu_read_unlock();
d1141dfb 546
d1141dfb
EG		 547 IWL_DEBUG_MAC80211("leave\n");
548}
549
b481de9c
ZY		 550/*
551 * QoS support
552*/
1ff50bda 553static void iwl_activate_qos(struct iwl_priv *priv, u8 force)
b481de9c 554{
b481de9c
ZY		 555 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
556 return;
557
b481de9c
ZY		 558 priv->qos_data.def_qos_parm.qos_flags = 0;
559
560 if (priv->qos_data.qos_cap.q_AP.queue_request &&
561 !priv->qos_data.qos_cap.q_AP.txop_request)
562 priv->qos_data.def_qos_parm.qos_flags |=
563 QOS_PARAM_FLG_TXOP_TYPE_MSK;
b481de9c
ZY		 564 if (priv->qos_data.qos_active)
565 priv->qos_data.def_qos_parm.qos_flags |=
566 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
567
fd105e79 568 if (priv->current_ht_config.is_ht)
f1f1f5c7 569 priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
f1f1f5c7 570
3109ece1 571 if (force || iwl_is_associated(priv)) {
f1f1f5c7
TW		 572 IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
573 priv->qos_data.qos_active,
574 priv->qos_data.def_qos_parm.qos_flags);
b481de9c 575
1ff50bda
EG		 576 iwl_send_cmd_pdu_async(priv, REPLY_QOS_PARAM,
577 sizeof(struct iwl_qosparam_cmd),
578 &priv->qos_data.def_qos_parm, NULL);
b481de9c
ZY		 579 }
580}
581
b481de9c 582#define MAX_UCODE_BEACON_INTERVAL 4096
b481de9c 583
3195c1f3 584static u16 iwl_adjust_beacon_interval(u16 beacon_val)
b481de9c
ZY		 585{
586 u16 new_val = 0;
587 u16 beacon_factor = 0;
588
3195c1f3
TW		 589 beacon_factor = (beacon_val + MAX_UCODE_BEACON_INTERVAL)
590 / MAX_UCODE_BEACON_INTERVAL;
b481de9c
ZY		 591 new_val = beacon_val / beacon_factor;
592
3195c1f3 593 return new_val;
b481de9c
ZY		 594}
595
3195c1f3 596static void iwl_setup_rxon_timing(struct iwl_priv *priv)
b481de9c 597{
3195c1f3
TW		 598 u64 tsf;
599 s32 interval_tm, rem;
b481de9c
ZY		 600 unsigned long flags;
601 struct ieee80211_conf *conf = NULL;
602 u16 beacon_int = 0;
603
604 conf = ieee80211_get_hw_conf(priv->hw);
605
606 spin_lock_irqsave(&priv->lock, flags);
3195c1f3 607 priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
b5d7be5e 608 priv->rxon_timing.listen_interval = cpu_to_le16(conf->listen_interval);
b481de9c 609
05c914fe 610 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
3195c1f3 611 beacon_int = iwl_adjust_beacon_interval(priv->beacon_int);
b481de9c
ZY		 612 priv->rxon_timing.atim_window = 0;
613 } else {
3195c1f3
TW		 614 beacon_int = iwl_adjust_beacon_interval(conf->beacon_int);
615
b481de9c
ZY		 616 /* TODO: we need to get atim_window from upper stack
617 * for now we set to 0 */
618 priv->rxon_timing.atim_window = 0;
619 }
620
3195c1f3 621 priv->rxon_timing.beacon_interval = cpu_to_le16(beacon_int);
b481de9c 622
3195c1f3
TW		 623 tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
624 interval_tm = beacon_int * 1024;
625 rem = do_div(tsf, interval_tm);
626 priv->rxon_timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
627
628 spin_unlock_irqrestore(&priv->lock, flags);
629 IWL_DEBUG_ASSOC("beacon interval %d beacon timer %d beacon tim %d\n",
630 le16_to_cpu(priv->rxon_timing.beacon_interval),
631 le32_to_cpu(priv->rxon_timing.beacon_init_val),
632 le16_to_cpu(priv->rxon_timing.atim_window));
b481de9c
ZY		 633}
634
82a66bbb
TW		 635static void iwl_set_flags_for_band(struct iwl_priv *priv,
636 enum ieee80211_band band)
b481de9c 637{
8318d78a 638 if (band == IEEE80211_BAND_5GHZ) {
b481de9c
ZY		 639 priv->staging_rxon.flags &=
640 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
641 | RXON_FLG_CCK_MSK);
642 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
643 } else {
5b9f8cd3 644 /* Copied from iwl_post_associate() */
b481de9c
ZY		 645 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
646 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
647 else
648 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
649
05c914fe 650 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
b481de9c
ZY		 651 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
652
653 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
654 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
655 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
656 }
657}
658
659/*
01ebd063 660 * initialize rxon structure with default values from eeprom
b481de9c 661 */
5b9f8cd3 662static void iwl_connection_init_rx_config(struct iwl_priv *priv, int mode)
b481de9c 663{
bf85ea4f 664 const struct iwl_channel_info *ch_info;
b481de9c
ZY		 665
666 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
667
60294de3 668 switch (mode) {
05c914fe 669 case NL80211_IFTYPE_AP:
b481de9c
ZY		 670 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
671 break;
672
05c914fe 673 case NL80211_IFTYPE_STATION:
b481de9c
ZY		 674 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
675 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
676 break;
677
05c914fe 678 case NL80211_IFTYPE_ADHOC:
b481de9c
ZY		 679 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
680 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
681 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
682 RXON_FILTER_ACCEPT_GRP_MSK;
683 break;
684
05c914fe 685 case NL80211_IFTYPE_MONITOR:
b481de9c
ZY		 686 priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
687 priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
688 RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
689 break;
69dc5d9d 690 default:
15b1687c 691 IWL_ERR(priv, "Unsupported interface type %d\n", mode);
69dc5d9d 692 break;
b481de9c
ZY		 693 }
694
695#if 0
696 /* TODO: Figure out when short_preamble would be set and cache from
697 * that */
698 if (!hw_to_local(priv->hw)->short_preamble)
699 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
700 else
701 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
702#endif
703
8622e705 704 ch_info = iwl_get_channel_info(priv, priv->band,
25b3f57c 705 le16_to_cpu(priv->active_rxon.channel));
b481de9c
ZY		 706
707 if (!ch_info)
708 ch_info = &priv->channel_info[0];
709
710 /*
711 * in some case A channels are all non IBSS
712 * in this case force B/G channel
713 */
05c914fe 714 if ((priv->iw_mode == NL80211_IFTYPE_ADHOC) &&
b481de9c
ZY		 715 !(is_channel_ibss(ch_info)))
716 ch_info = &priv->channel_info[0];
717
718 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
8318d78a 719 priv->band = ch_info->band;
b481de9c 720
82a66bbb 721 iwl_set_flags_for_band(priv, priv->band);
b481de9c
ZY		 722
723 priv->staging_rxon.ofdm_basic_rates =
724 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
725 priv->staging_rxon.cck_basic_rates =
726 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
727
728 priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
729 RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
730 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
731 memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
732 priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
733 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
c7de35cd 734 iwl_set_rxon_chain(priv);
b481de9c
ZY		 735}
736
5b9f8cd3 737static int iwl_set_mode(struct iwl_priv *priv, int mode)
b481de9c 738{
5b9f8cd3 739 iwl_connection_init_rx_config(priv, mode);
b481de9c
ZY		 740 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
741
37deb2a0 742 iwl_clear_stations_table(priv);
b481de9c 743
fde3571f 744 /* dont commit rxon if rf-kill is on*/
fee1247a 745 if (!iwl_is_ready_rf(priv))
fde3571f
MA		 746 return -EAGAIN;
747
748 cancel_delayed_work(&priv->scan_check);
2a421b91 749 if (iwl_scan_cancel_timeout(priv, 100)) {
39aadf8c 750 IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
fde3571f
MA		 751 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
752 return -EAGAIN;
753 }
754
5b9f8cd3 755 iwl_commit_rxon(priv);
b481de9c
ZY		 756
757 return 0;
758}
759
5b9f8cd3 760static void iwl_set_rate(struct iwl_priv *priv)
b481de9c 761{
8318d78a 762 const struct ieee80211_supported_band *hw = NULL;
b481de9c
ZY		 763 struct ieee80211_rate *rate;
764 int i;
765
d1141dfb 766 hw = iwl_get_hw_mode(priv, priv->band);
c4ba9621 767 if (!hw) {
15b1687c 768 IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
c4ba9621
SA		 769 return;
770 }
b481de9c
ZY		 771
772 priv->active_rate = 0;
773 priv->active_rate_basic = 0;
774
8318d78a
JB		 775 for (i = 0; i < hw->n_bitrates; i++) {
776 rate = &(hw->bitrates[i]);
777 if (rate->hw_value < IWL_RATE_COUNT)
778 priv->active_rate |= (1 << rate->hw_value);
b481de9c
ZY		 779 }
780
781 IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
782 priv->active_rate, priv->active_rate_basic);
783
784 /*
785 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
786 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
787 * OFDM
788 */
789 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
790 priv->staging_rxon.cck_basic_rates =
791 ((priv->active_rate_basic &
792 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
793 else
794 priv->staging_rxon.cck_basic_rates =
795 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
796
797 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
798 priv->staging_rxon.ofdm_basic_rates =
799 ((priv->active_rate_basic &
800 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
801 IWL_FIRST_OFDM_RATE) & 0xFF;
802 else
803 priv->staging_rxon.ofdm_basic_rates =
804 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
805}
806
b481de9c 807
b481de9c
ZY		 808/******************************************************************************
809 *
810 * Generic RX handler implementations
811 *
812 ******************************************************************************/
885ba202
TW		 813static void iwl_rx_reply_alive(struct iwl_priv *priv,
814 struct iwl_rx_mem_buffer *rxb)
b481de9c 815{
db11d634 816 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
885ba202 817 struct iwl_alive_resp *palive;
b481de9c
ZY		 818 struct delayed_work *pwork;
819
820 palive = &pkt->u.alive_frame;
821
822 IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
823 "0x%01X 0x%01X\n",
824 palive->is_valid, palive->ver_type,
825 palive->ver_subtype);
826
827 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
828 IWL_DEBUG_INFO("Initialization Alive received.\n");
829 memcpy(&priv->card_alive_init,
830 &pkt->u.alive_frame,
885ba202 831 sizeof(struct iwl_init_alive_resp));
b481de9c
ZY		 832 pwork = &priv->init_alive_start;
833 } else {
834 IWL_DEBUG_INFO("Runtime Alive received.\n");
835 memcpy(&priv->card_alive, &pkt->u.alive_frame,
885ba202 836 sizeof(struct iwl_alive_resp));
b481de9c
ZY		 837 pwork = &priv->alive_start;
838 }
839
840 /* We delay the ALIVE response by 5ms to
841 * give the HW RF Kill time to activate... */
842 if (palive->is_valid == UCODE_VALID_OK)
843 queue_delayed_work(priv->workqueue, pwork,
844 msecs_to_jiffies(5));
845 else
39aadf8c 846 IWL_WARN(priv, "uCode did not respond OK.\n");
b481de9c
ZY		 847}
848
5b9f8cd3 849static void iwl_rx_reply_error(struct iwl_priv *priv,
a55360e4 850 struct iwl_rx_mem_buffer *rxb)
b481de9c 851{
db11d634 852 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c 853
15b1687c 854 IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
b481de9c
ZY		 855 "seq 0x%04X ser 0x%08X\n",
856 le32_to_cpu(pkt->u.err_resp.error_type),
857 get_cmd_string(pkt->u.err_resp.cmd_id),
858 pkt->u.err_resp.cmd_id,
859 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
860 le32_to_cpu(pkt->u.err_resp.error_info));
861}
862
863#define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
864
5b9f8cd3 865static void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
b481de9c 866{
db11d634 867 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
c1adf9fb 868 struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
2aa6ab86 869 struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
b481de9c
ZY		 870 IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
871 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
872 rxon->channel = csa->channel;
873 priv->staging_rxon.channel = csa->channel;
874}
875
5b9f8cd3 876static void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
a55360e4 877 struct iwl_rx_mem_buffer *rxb)
b481de9c 878{
0a6857e7 879#ifdef CONFIG_IWLWIFI_DEBUG
db11d634 880 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2aa6ab86 881 struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
b481de9c
ZY		 882 IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
883 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
884#endif
885}
886
5b9f8cd3 887static void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
a55360e4 888 struct iwl_rx_mem_buffer *rxb)
b481de9c 889{
db11d634 890 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY		 891 IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
892 "notification for %s:\n",
893 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
bf403db8 894 iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
b481de9c
ZY		 895}
896
5b9f8cd3 897static void iwl_bg_beacon_update(struct work_struct *work)
b481de9c 898{
c79dd5b5
TW		 899 struct iwl_priv *priv =
900 container_of(work, struct iwl_priv, beacon_update);
b481de9c
ZY		 901 struct sk_buff *beacon;
902
903 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
e039fa4a 904 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
b481de9c
ZY		 905
906 if (!beacon) {
15b1687c 907 IWL_ERR(priv, "update beacon failed\n");
b481de9c
ZY		 908 return;
909 }
910
911 mutex_lock(&priv->mutex);
912 /* new beacon skb is allocated every time; dispose previous.*/
913 if (priv->ibss_beacon)
914 dev_kfree_skb(priv->ibss_beacon);
915
916 priv->ibss_beacon = beacon;
917 mutex_unlock(&priv->mutex);
918
5b9f8cd3 919 iwl_send_beacon_cmd(priv);
b481de9c
ZY		 920}
921
4e39317d 922/**
5b9f8cd3 923 * iwl_bg_statistics_periodic - Timer callback to queue statistics
4e39317d
EG		 924 *
925 * This callback is provided in order to send a statistics request.
926 *
927 * This timer function is continually reset to execute within
928 * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
929 * was received. We need to ensure we receive the statistics in order
930 * to update the temperature used for calibrating the TXPOWER.
931 */
5b9f8cd3 932static void iwl_bg_statistics_periodic(unsigned long data)
4e39317d
EG		 933{
934 struct iwl_priv *priv = (struct iwl_priv *)data;
935
936 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
937 return;
938
61780ee3
MA		 939 /* dont send host command if rf-kill is on */
940 if (!iwl_is_ready_rf(priv))
941 return;
942
4e39317d
EG		 943 iwl_send_statistics_request(priv, CMD_ASYNC);
944}
945
5b9f8cd3 946static void iwl_rx_beacon_notif(struct iwl_priv *priv,
a55360e4 947 struct iwl_rx_mem_buffer *rxb)
b481de9c 948{
0a6857e7 949#ifdef CONFIG_IWLWIFI_DEBUG
db11d634 950 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2aa6ab86
TW		 951 struct iwl4965_beacon_notif *beacon =
952 (struct iwl4965_beacon_notif *)pkt->u.raw;
e7d326ac 953 u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
b481de9c
ZY		 954
955 IWL_DEBUG_RX("beacon status %x retries %d iss %d "
956 "tsf %d %d rate %d\n",
25a6572c 957 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
b481de9c
ZY		 958 beacon->beacon_notify_hdr.failure_frame,
959 le32_to_cpu(beacon->ibss_mgr_status),
960 le32_to_cpu(beacon->high_tsf),
961 le32_to_cpu(beacon->low_tsf), rate);
962#endif
963
05c914fe 964 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
b481de9c
ZY		 965 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
966 queue_work(priv->workqueue, &priv->beacon_update);
967}
968
b481de9c
ZY		 969/* Handle notification from uCode that card's power state is changing
970 * due to software, hardware, or critical temperature RFKILL */
5b9f8cd3 971static void iwl_rx_card_state_notif(struct iwl_priv *priv,
a55360e4 972 struct iwl_rx_mem_buffer *rxb)
b481de9c 973{
db11d634 974 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY		 975 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
976 unsigned long status = priv->status;
977
978 IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
979 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
980 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
981
982 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
983 RF_CARD_DISABLED)) {
984
3395f6e9 985 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c
ZY		 986 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
987
3395f6e9
TW		 988 if (!iwl_grab_nic_access(priv)) {
989 iwl_write_direct32(
b481de9c
ZY		 990 priv, HBUS_TARG_MBX_C,
991 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
992
3395f6e9 993 iwl_release_nic_access(priv);
b481de9c
ZY		 994 }
995
996 if (!(flags & RXON_CARD_DISABLED)) {
3395f6e9 997 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c 998 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3395f6e9
TW		 999 if (!iwl_grab_nic_access(priv)) {
1000 iwl_write_direct32(
b481de9c
ZY		 1001 priv, HBUS_TARG_MBX_C,
1002 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
1003
3395f6e9 1004 iwl_release_nic_access(priv);
b481de9c
ZY		 1005 }
1006 }
1007
1008 if (flags & RF_CARD_DISABLED) {
3395f6e9 1009 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c 1010 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
3395f6e9
TW		 1011 iwl_read32(priv, CSR_UCODE_DRV_GP1);
1012 if (!iwl_grab_nic_access(priv))
1013 iwl_release_nic_access(priv);
b481de9c
ZY		 1014 }
1015 }
1016
1017 if (flags & HW_CARD_DISABLED)
1018 set_bit(STATUS_RF_KILL_HW, &priv->status);
1019 else
1020 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1021
1022
1023 if (flags & SW_CARD_DISABLED)
1024 set_bit(STATUS_RF_KILL_SW, &priv->status);
1025 else
1026 clear_bit(STATUS_RF_KILL_SW, &priv->status);
1027
1028 if (!(flags & RXON_CARD_DISABLED))
2a421b91 1029 iwl_scan_cancel(priv);
b481de9c
ZY		 1030
1031 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
1032 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
1033 (test_bit(STATUS_RF_KILL_SW, &status) !=
1034 test_bit(STATUS_RF_KILL_SW, &priv->status)))
1035 queue_work(priv->workqueue, &priv->rf_kill);
1036 else
1037 wake_up_interruptible(&priv->wait_command_queue);
1038}
1039
5b9f8cd3 1040int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
e2e3c57b
TW		 1041{
1042 int ret;
1043 unsigned long flags;
1044
1045 spin_lock_irqsave(&priv->lock, flags);
1046 ret = iwl_grab_nic_access(priv);
1047 if (ret)
1048 goto err;
1049
1050 if (src == IWL_PWR_SRC_VAUX) {
1051 u32 val;
e7b63581 1052 ret = pci_read_config_dword(priv->pci_dev, PCI_CFG_POWER_SOURCE,
e2e3c57b
TW		 1053 &val);
1054
1055 if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT)
1056 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
1057 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
1058 ~APMG_PS_CTRL_MSK_PWR_SRC);
1059 } else {
1060 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
1061 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
1062 ~APMG_PS_CTRL_MSK_PWR_SRC);
1063 }
1064
1065 iwl_release_nic_access(priv);
1066err:
1067 spin_unlock_irqrestore(&priv->lock, flags);
1068 return ret;
1069}
1070
b481de9c 1071/**
5b9f8cd3 1072 * iwl_setup_rx_handlers - Initialize Rx handler callbacks
b481de9c
ZY		 1073 *
1074 * Setup the RX handlers for each of the reply types sent from the uCode
1075 * to the host.
1076 *
1077 * This function chains into the hardware specific files for them to setup
1078 * any hardware specific handlers as well.
1079 */
653fa4a0 1080static void iwl_setup_rx_handlers(struct iwl_priv *priv)
b481de9c 1081{
885ba202 1082 priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
5b9f8cd3
EG		 1083 priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
1084 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
5b9f8cd3 1085 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
b481de9c 1086 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
5b9f8cd3
EG		 1087 iwl_rx_pm_debug_statistics_notif;
1088 priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
b481de9c 1089
9fbab516
BC		 1090 /*
1091 * The same handler is used for both the REPLY to a discrete
1092 * statistics request from the host as well as for the periodic
1093 * statistics notifications (after received beacons) from the uCode.
b481de9c 1094 */
8f91aecb
EG		 1095 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_rx_statistics;
1096 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
2a421b91 1097
21c339bf 1098 iwl_setup_spectrum_handlers(priv);
2a421b91
TW		 1099 iwl_setup_rx_scan_handlers(priv);
1100
37a44211 1101 /* status change handler */
5b9f8cd3 1102 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
b481de9c 1103
c1354754
TW		 1104 priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
1105 iwl_rx_missed_beacon_notif;
37a44211 1106 /* Rx handlers */
1781a07f
EG		 1107 priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl_rx_reply_rx_phy;
1108 priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl_rx_reply_rx;
653fa4a0
EG		 1109 /* block ack */
1110 priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl_rx_reply_compressed_ba;
9fbab516 1111 /* Set up hardware specific Rx handlers */
d4789efe 1112 priv->cfg->ops->lib->rx_handler_setup(priv);
b481de9c
ZY		 1113}
1114
b481de9c 1115/**
a55360e4 1116 * iwl_rx_handle - Main entry function for receiving responses from uCode
b481de9c
ZY		 1117 *
1118 * Uses the priv->rx_handlers callback function array to invoke
1119 * the appropriate handlers, including command responses,
1120 * frame-received notifications, and other notifications.
1121 */
a55360e4 1122void iwl_rx_handle(struct iwl_priv *priv)
b481de9c 1123{
a55360e4 1124 struct iwl_rx_mem_buffer *rxb;
db11d634 1125 struct iwl_rx_packet *pkt;
a55360e4 1126 struct iwl_rx_queue *rxq = &priv->rxq;
b481de9c
ZY		 1127 u32 r, i;
1128 int reclaim;
1129 unsigned long flags;
5c0eef96 1130 u8 fill_rx = 0;
d68ab680 1131 u32 count = 8;
b481de9c 1132
6440adb5
BC		 1133 /* uCode's read index (stored in shared DRAM) indicates the last Rx
1134 * buffer that the driver may process (last buffer filled by ucode). */
8d86422a 1135 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
b481de9c
ZY		 1136 i = rxq->read;
1137
1138 /* Rx interrupt, but nothing sent from uCode */
1139 if (i == r)
f3d67999 1140 IWL_DEBUG(IWL_DL_RX, "r = %d, i = %d\n", r, i);
b481de9c 1141
a55360e4 1142 if (iwl_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
5c0eef96
MA		 1143 fill_rx = 1;
1144
b481de9c
ZY		 1145 while (i != r) {
1146 rxb = rxq->queue[i];
1147
9fbab516 1148 /* If an RXB doesn't have a Rx queue slot associated with it,
b481de9c
ZY		 1149 * then a bug has been introduced in the queue refilling
1150 * routines -- catch it here */
1151 BUG_ON(rxb == NULL);
1152
1153 rxq->queue[i] = NULL;
1154
e91af0af
JB		 1155 dma_sync_single_range_for_cpu(
1156 &priv->pci_dev->dev, rxb->real_dma_addr,
1157 rxb->aligned_dma_addr - rxb->real_dma_addr,
1158 priv->hw_params.rx_buf_size,
1159 PCI_DMA_FROMDEVICE);
db11d634 1160 pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY		 1161
1162 /* Reclaim a command buffer only if this packet is a response
1163 * to a (driver-originated) command.
1164 * If the packet (e.g. Rx frame) originated from uCode,
1165 * there is no command buffer to reclaim.
1166 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
1167 * but apparently a few don't get set; catch them here. */
1168 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
1169 (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
857485c0 1170 (pkt->hdr.cmd != REPLY_RX) &&
7dddaf1a 1171 (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
cfe01709 1172 (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
b481de9c
ZY		 1173 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
1174 (pkt->hdr.cmd != REPLY_TX);
1175
1176 /* Based on type of command response or notification,
1177 * handle those that need handling via function in
5b9f8cd3 1178 * rx_handlers table. See iwl_setup_rx_handlers() */
b481de9c 1179 if (priv->rx_handlers[pkt->hdr.cmd]) {
f3d67999
EK		 1180 IWL_DEBUG(IWL_DL_RX, "r = %d, i = %d, %s, 0x%02x\n", r,
1181 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
b481de9c
ZY		 1182 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
1183 } else {
1184 /* No handling needed */
f3d67999 1185 IWL_DEBUG(IWL_DL_RX,
b481de9c
ZY		 1186 "r %d i %d No handler needed for %s, 0x%02x\n",
1187 r, i, get_cmd_string(pkt->hdr.cmd),
1188 pkt->hdr.cmd);
1189 }
1190
1191 if (reclaim) {
9fbab516 1192 /* Invoke any callbacks, transfer the skb to caller, and
857485c0 1193 * fire off the (possibly) blocking iwl_send_cmd()
b481de9c
ZY		 1194 * as we reclaim the driver command queue */
1195 if (rxb && rxb->skb)
17b88929 1196 iwl_tx_cmd_complete(priv, rxb);
b481de9c 1197 else
39aadf8c 1198 IWL_WARN(priv, "Claim null rxb?\n");
b481de9c
ZY		 1199 }
1200
1201 /* For now we just don't re-use anything. We can tweak this
1202 * later to try and re-use notification packets and SKBs that
1203 * fail to Rx correctly */
1204 if (rxb->skb != NULL) {
1205 priv->alloc_rxb_skb--;
1206 dev_kfree_skb_any(rxb->skb);
1207 rxb->skb = NULL;
1208 }
1209
4018517a
JB		 1210 pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
1211 priv->hw_params.rx_buf_size + 256,
9ee1ba47 1212 PCI_DMA_FROMDEVICE);
b481de9c
ZY		 1213 spin_lock_irqsave(&rxq->lock, flags);
1214 list_add_tail(&rxb->list, &priv->rxq.rx_used);
1215 spin_unlock_irqrestore(&rxq->lock, flags);
1216 i = (i + 1) & RX_QUEUE_MASK;
5c0eef96
MA		 1217 /* If there are a lot of unused frames,
1218 * restock the Rx queue so ucode wont assert. */
1219 if (fill_rx) {
1220 count++;
1221 if (count >= 8) {
1222 priv->rxq.read = i;
f1bc4ac6 1223 iwl_rx_queue_restock(priv);
5c0eef96
MA		 1224 count = 0;
1225 }
1226 }
b481de9c
ZY		 1227 }
1228
1229 /* Backtrack one entry */
1230 priv->rxq.read = i;
a55360e4
TW		 1231 iwl_rx_queue_restock(priv);
1232}
a55360e4 1233
0a6857e7 1234#ifdef CONFIG_IWLWIFI_DEBUG
5b9f8cd3 1235static void iwl_print_rx_config_cmd(struct iwl_priv *priv)
b481de9c 1236{
c1adf9fb 1237 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
0795af57 1238
b481de9c 1239 IWL_DEBUG_RADIO("RX CONFIG:\n");
bf403db8 1240 iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
b481de9c
ZY		 1241 IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
1242 IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
1243 IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
1244 le32_to_cpu(rxon->filter_flags));
1245 IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
1246 IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
1247 rxon->ofdm_basic_rates);
1248 IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
e174961c
JB		 1249 IWL_DEBUG_RADIO("u8[6] node_addr: %pM\n", rxon->node_addr);
1250 IWL_DEBUG_RADIO("u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
b481de9c
ZY		 1251 IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
1252}
1253#endif
1254
0359facc
MA		 1255/* call this function to flush any scheduled tasklet */
1256static inline void iwl_synchronize_irq(struct iwl_priv *priv)
1257{
a96a27f9 1258 /* wait to make sure we flush pending tasklet*/
0359facc
MA		 1259 synchronize_irq(priv->pci_dev->irq);
1260 tasklet_kill(&priv->irq_tasklet);
1261}
1262
b481de9c 1263/**
5b9f8cd3 1264 * iwl_irq_handle_error - called for HW or SW error interrupt from card
b481de9c 1265 */
5b9f8cd3 1266static void iwl_irq_handle_error(struct iwl_priv *priv)
b481de9c 1267{
5b9f8cd3 1268 /* Set the FW error flag -- cleared on iwl_down */
b481de9c
ZY		 1269 set_bit(STATUS_FW_ERROR, &priv->status);
1270
1271 /* Cancel currently queued command. */
1272 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1273
0a6857e7 1274#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 1275 if (priv->debug_level & IWL_DL_FW_ERRORS) {
ede0cba4 1276 iwl_dump_nic_error_log(priv);
189a2b59 1277 iwl_dump_nic_event_log(priv);
5b9f8cd3 1278 iwl_print_rx_config_cmd(priv);
b481de9c
ZY		 1279 }
1280#endif
1281
1282 wake_up_interruptible(&priv->wait_command_queue);
1283
1284 /* Keep the restart process from trying to send host
1285 * commands by clearing the INIT status bit */
1286 clear_bit(STATUS_READY, &priv->status);
1287
1288 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
f3d67999 1289 IWL_DEBUG(IWL_DL_FW_ERRORS,
b481de9c
ZY		 1290 "Restarting adapter due to uCode error.\n");
1291
3109ece1 1292 if (iwl_is_associated(priv)) {
b481de9c
ZY		 1293 memcpy(&priv->recovery_rxon, &priv->active_rxon,
1294 sizeof(priv->recovery_rxon));
1295 priv->error_recovering = 1;
1296 }
3a1081e8
EK		 1297 if (priv->cfg->mod_params->restart_fw)
1298 queue_work(priv->workqueue, &priv->restart);
b481de9c
ZY		 1299 }
1300}
1301
5b9f8cd3 1302static void iwl_error_recovery(struct iwl_priv *priv)
b481de9c
ZY		 1303{
1304 unsigned long flags;
1305
1306 memcpy(&priv->staging_rxon, &priv->recovery_rxon,
1307 sizeof(priv->staging_rxon));
1308 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5b9f8cd3 1309 iwl_commit_rxon(priv);
b481de9c 1310
4f40e4d9 1311 iwl_rxon_add_station(priv, priv->bssid, 1);
b481de9c
ZY		 1312
1313 spin_lock_irqsave(&priv->lock, flags);
1314 priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
1315 priv->error_recovering = 0;
1316 spin_unlock_irqrestore(&priv->lock, flags);
1317}
1318
5b9f8cd3 1319static void iwl_irq_tasklet(struct iwl_priv *priv)
b481de9c
ZY		 1320{
1321 u32 inta, handled = 0;
1322 u32 inta_fh;
1323 unsigned long flags;
0a6857e7 1324#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY		 1325 u32 inta_mask;
1326#endif
1327
1328 spin_lock_irqsave(&priv->lock, flags);
1329
1330 /* Ack/clear/reset pending uCode interrupts.
1331 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1332 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
3395f6e9
TW		 1333 inta = iwl_read32(priv, CSR_INT);
1334 iwl_write32(priv, CSR_INT, inta);
b481de9c
ZY		 1335
1336 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1337 * Any new interrupts that happen after this, either while we're
1338 * in this tasklet, or later, will show up in next ISR/tasklet. */
3395f6e9
TW		 1339 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1340 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
b481de9c 1341
0a6857e7 1342#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 1343 if (priv->debug_level & IWL_DL_ISR) {
9fbab516 1344 /* just for debug */
3395f6e9 1345 inta_mask = iwl_read32(priv, CSR_INT_MASK);
b481de9c
ZY		 1346 IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1347 inta, inta_mask, inta_fh);
1348 }
1349#endif
1350
1351 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1352 * atomic, make sure that inta covers all the interrupts that
1353 * we've discovered, even if FH interrupt came in just after
1354 * reading CSR_INT. */
6f83eaa1 1355 if (inta_fh & CSR49_FH_INT_RX_MASK)
b481de9c 1356 inta |= CSR_INT_BIT_FH_RX;
6f83eaa1 1357 if (inta_fh & CSR49_FH_INT_TX_MASK)
b481de9c
ZY		 1358 inta |= CSR_INT_BIT_FH_TX;
1359
1360 /* Now service all interrupt bits discovered above. */
1361 if (inta & CSR_INT_BIT_HW_ERR) {
15b1687c 1362 IWL_ERR(priv, "Microcode HW error detected. Restarting.\n");
b481de9c
ZY		 1363
1364 /* Tell the device to stop sending interrupts */
5b9f8cd3 1365 iwl_disable_interrupts(priv);
b481de9c 1366
5b9f8cd3 1367 iwl_irq_handle_error(priv);
b481de9c
ZY		 1368
1369 handled |= CSR_INT_BIT_HW_ERR;
1370
1371 spin_unlock_irqrestore(&priv->lock, flags);
1372
1373 return;
1374 }
1375
0a6857e7 1376#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 1377 if (priv->debug_level & (IWL_DL_ISR)) {
b481de9c 1378 /* NIC fires this, but we don't use it, redundant with WAKEUP */
25c03d8e
JP		 1379 if (inta & CSR_INT_BIT_SCD)
1380 IWL_DEBUG_ISR("Scheduler finished to transmit "
1381 "the frame/frames.\n");
b481de9c
ZY		 1382
1383 /* Alive notification via Rx interrupt will do the real work */
1384 if (inta & CSR_INT_BIT_ALIVE)
1385 IWL_DEBUG_ISR("Alive interrupt\n");
1386 }
1387#endif
1388 /* Safely ignore these bits for debug checks below */
25c03d8e 1389 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
b481de9c 1390
9fbab516 1391 /* HW RF KILL switch toggled */
b481de9c
ZY		 1392 if (inta & CSR_INT_BIT_RF_KILL) {
1393 int hw_rf_kill = 0;
3395f6e9 1394 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
b481de9c
ZY		 1395 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1396 hw_rf_kill = 1;
1397
f3d67999 1398 IWL_DEBUG(IWL_DL_RF_KILL, "RF_KILL bit toggled to %s.\n",
c3056065 1399 hw_rf_kill ? "disable radio" : "enable radio");
b481de9c 1400
a9efa652
EG		 1401 /* driver only loads ucode once setting the interface up.
1402 * the driver as well won't allow loading if RFKILL is set
1403 * therefore no need to restart the driver from this handler
1404 */
edb34228 1405 if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
53e49093 1406 clear_bit(STATUS_RF_KILL_HW, &priv->status);
edb34228
MA		 1407 if (priv->is_open && !iwl_is_rfkill(priv))
1408 queue_work(priv->workqueue, &priv->up);
1409 }
b481de9c
ZY		 1410
1411 handled |= CSR_INT_BIT_RF_KILL;
1412 }
1413
9fbab516 1414 /* Chip got too hot and stopped itself */
b481de9c 1415 if (inta & CSR_INT_BIT_CT_KILL) {
15b1687c 1416 IWL_ERR(priv, "Microcode CT kill error detected.\n");
b481de9c
ZY		 1417 handled |= CSR_INT_BIT_CT_KILL;
1418 }
1419
1420 /* Error detected by uCode */
1421 if (inta & CSR_INT_BIT_SW_ERR) {
15b1687c
WT		 1422 IWL_ERR(priv, "Microcode SW error detected. "
1423 " Restarting 0x%X.\n", inta);
5b9f8cd3 1424 iwl_irq_handle_error(priv);
b481de9c
ZY		 1425 handled |= CSR_INT_BIT_SW_ERR;
1426 }
1427
1428 /* uCode wakes up after power-down sleep */
1429 if (inta & CSR_INT_BIT_WAKEUP) {
1430 IWL_DEBUG_ISR("Wakeup interrupt\n");
a55360e4 1431 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
babcebfa
TW		 1432 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1433 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1434 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1435 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1436 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1437 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
b481de9c
ZY		 1438
1439 handled |= CSR_INT_BIT_WAKEUP;
1440 }
1441
1442 /* All uCode command responses, including Tx command responses,
1443 * Rx "responses" (frame-received notification), and other
1444 * notifications from uCode come through here*/
1445 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
a55360e4 1446 iwl_rx_handle(priv);
b481de9c
ZY		 1447 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1448 }
1449
1450 if (inta & CSR_INT_BIT_FH_TX) {
1451 IWL_DEBUG_ISR("Tx interrupt\n");
1452 handled |= CSR_INT_BIT_FH_TX;
dbb983b7
RR		 1453 /* FH finished to write, send event */
1454 priv->ucode_write_complete = 1;
1455 wake_up_interruptible(&priv->wait_command_queue);
b481de9c
ZY		 1456 }
1457
1458 if (inta & ~handled)
15b1687c 1459 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
b481de9c
ZY		 1460
1461 if (inta & ~CSR_INI_SET_MASK) {
39aadf8c 1462 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
b481de9c 1463 inta & ~CSR_INI_SET_MASK);
39aadf8c 1464 IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
b481de9c
ZY		 1465 }
1466
1467 /* Re-enable all interrupts */
0359facc
MA		 1468 /* only Re-enable if diabled by irq */
1469 if (test_bit(STATUS_INT_ENABLED, &priv->status))
5b9f8cd3 1470 iwl_enable_interrupts(priv);
b481de9c 1471
0a6857e7 1472#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 1473 if (priv->debug_level & (IWL_DL_ISR)) {
3395f6e9
TW		 1474 inta = iwl_read32(priv, CSR_INT);
1475 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1476 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
b481de9c
ZY		 1477 IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1478 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1479 }
1480#endif
1481 spin_unlock_irqrestore(&priv->lock, flags);
1482}
1483
5b9f8cd3 1484static irqreturn_t iwl_isr(int irq, void *data)
b481de9c 1485{
c79dd5b5 1486 struct iwl_priv *priv = data;
b481de9c
ZY		 1487 u32 inta, inta_mask;
1488 u32 inta_fh;
1489 if (!priv)
1490 return IRQ_NONE;
1491
1492 spin_lock(&priv->lock);
1493
1494 /* Disable (but don't clear!) interrupts here to avoid
1495 * back-to-back ISRs and sporadic interrupts from our NIC.
1496 * If we have something to service, the tasklet will re-enable ints.
1497 * If we *don't* have something, we'll re-enable before leaving here. */
3395f6e9
TW		 1498 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1499 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
b481de9c
ZY		 1500
1501 /* Discover which interrupts are active/pending */
3395f6e9
TW		 1502 inta = iwl_read32(priv, CSR_INT);
1503 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
b481de9c
ZY		 1504
1505 /* Ignore interrupt if there's nothing in NIC to service.
1506 * This may be due to IRQ shared with another device,
1507 * or due to sporadic interrupts thrown from our NIC. */
1508 if (!inta && !inta_fh) {
1509 IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
1510 goto none;
1511 }
1512
1513 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
66fbb541
ON		 1514 /* Hardware disappeared. It might have already raised
1515 * an interrupt */
39aadf8c 1516 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
66fbb541 1517 goto unplugged;
b481de9c
ZY		 1518 }
1519
1520 IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1521 inta, inta_mask, inta_fh);
1522
25c03d8e
JP		 1523 inta &= ~CSR_INT_BIT_SCD;
1524
5b9f8cd3 1525 /* iwl_irq_tasklet() will service interrupts and re-enable them */
25c03d8e
JP		 1526 if (likely(inta || inta_fh))
1527 tasklet_schedule(&priv->irq_tasklet);
b481de9c 1528
66fbb541
ON		 1529 unplugged:
1530 spin_unlock(&priv->lock);
b481de9c
ZY		 1531 return IRQ_HANDLED;
1532
1533 none:
1534 /* re-enable interrupts here since we don't have anything to service. */
0359facc
MA		 1535 /* only Re-enable if diabled by irq */
1536 if (test_bit(STATUS_INT_ENABLED, &priv->status))
5b9f8cd3 1537 iwl_enable_interrupts(priv);
b481de9c
ZY		 1538 spin_unlock(&priv->lock);
1539 return IRQ_NONE;
1540}
1541
b481de9c
ZY		 1542/******************************************************************************
1543 *
1544 * uCode download functions
1545 *
1546 ******************************************************************************/
1547
5b9f8cd3 1548static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
b481de9c 1549{
98c92211
TW		 1550 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1551 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1552 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1553 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1554 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1555 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c
ZY		 1556}
1557
5b9f8cd3 1558static void iwl_nic_start(struct iwl_priv *priv)
edcdf8b2
RR		 1559{
1560 /* Remove all resets to allow NIC to operate */
1561 iwl_write32(priv, CSR_RESET, 0);
1562}
1563
1564
b481de9c 1565/**
5b9f8cd3 1566 * iwl_read_ucode - Read uCode images from disk file.
b481de9c
ZY		 1567 *
1568 * Copy into buffers for card to fetch via bus-mastering
1569 */
5b9f8cd3 1570static int iwl_read_ucode(struct iwl_priv *priv)
b481de9c 1571{
14b3d338 1572 struct iwl_ucode *ucode;
a0987a8d 1573 int ret = -EINVAL, index;
b481de9c 1574 const struct firmware *ucode_raw;
a0987a8d
RC		 1575 const char *name_pre = priv->cfg->fw_name_pre;
1576 const unsigned int api_max = priv->cfg->ucode_api_max;
1577 const unsigned int api_min = priv->cfg->ucode_api_min;
1578 char buf[25];
b481de9c
ZY		 1579 u8 *src;
1580 size_t len;
a0987a8d 1581 u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
b481de9c
ZY		 1582
1583 /* Ask kernel firmware_class module to get the boot firmware off disk.
1584 * request_firmware() is synchronous, file is in memory on return. */
a0987a8d
RC		 1585 for (index = api_max; index >= api_min; index--) {
1586 sprintf(buf, "%s%d%s", name_pre, index, ".ucode");
1587 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
1588 if (ret < 0) {
15b1687c 1589 IWL_ERR(priv, "%s firmware file req failed: %d\n",
a0987a8d
RC		 1590 buf, ret);
1591 if (ret == -ENOENT)
1592 continue;
1593 else
1594 goto error;
1595 } else {
1596 if (index < api_max)
15b1687c
WT		 1597 IWL_ERR(priv, "Loaded firmware %s, "
1598 "which is deprecated. "
1599 "Please use API v%u instead.\n",
a0987a8d 1600 buf, api_max);
15b1687c 1601
a0987a8d
RC		 1602 IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
1603 buf, ucode_raw->size);
1604 break;
1605 }
b481de9c
ZY		 1606 }
1607
a0987a8d
RC		 1608 if (ret < 0)
1609 goto error;
b481de9c
ZY		 1610
1611 /* Make sure that we got at least our header! */
1612 if (ucode_raw->size < sizeof(*ucode)) {
15b1687c 1613 IWL_ERR(priv, "File size way too small!\n");
90e759d1 1614 ret = -EINVAL;
b481de9c
ZY		 1615 goto err_release;
1616 }
1617
1618 /* Data from ucode file: header followed by uCode images */
1619 ucode = (void *)ucode_raw->data;
1620
c02b3acd 1621 priv->ucode_ver = le32_to_cpu(ucode->ver);
a0987a8d 1622 api_ver = IWL_UCODE_API(priv->ucode_ver);
b481de9c
ZY		 1623 inst_size = le32_to_cpu(ucode->inst_size);
1624 data_size = le32_to_cpu(ucode->data_size);
1625 init_size = le32_to_cpu(ucode->init_size);
1626 init_data_size = le32_to_cpu(ucode->init_data_size);
1627 boot_size = le32_to_cpu(ucode->boot_size);
1628
a0987a8d
RC		 1629 /* api_ver should match the api version forming part of the
1630 * firmware filename ... but we don't check for that and only rely
1631 * on the API version read from firware header from here on forward */
1632
1633 if (api_ver < api_min || api_ver > api_max) {
15b1687c 1634 IWL_ERR(priv, "Driver unable to support your firmware API. "
a0987a8d
RC		 1635 "Driver supports v%u, firmware is v%u.\n",
1636 api_max, api_ver);
1637 priv->ucode_ver = 0;
1638 ret = -EINVAL;
1639 goto err_release;
1640 }
1641 if (api_ver != api_max)
978785a3 1642 IWL_ERR(priv, "Firmware has old API version. Expected v%u, "
a0987a8d
RC		 1643 "got v%u. New firmware can be obtained "
1644 "from http://www.intellinuxwireless.org.\n",
1645 api_max, api_ver);
1646
978785a3
TW		 1647 IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
1648 IWL_UCODE_MAJOR(priv->ucode_ver),
1649 IWL_UCODE_MINOR(priv->ucode_ver),
1650 IWL_UCODE_API(priv->ucode_ver),
1651 IWL_UCODE_SERIAL(priv->ucode_ver));
a0987a8d
RC		 1652
1653 IWL_DEBUG_INFO("f/w package hdr ucode version raw = 0x%x\n",
1654 priv->ucode_ver);
b481de9c
ZY		 1655 IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
1656 inst_size);
1657 IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
1658 data_size);
1659 IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
1660 init_size);
1661 IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
1662 init_data_size);
1663 IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
1664 boot_size);
1665
1666 /* Verify size of file vs. image size info in file's header */
1667 if (ucode_raw->size < sizeof(*ucode) +
1668 inst_size + data_size + init_size +
1669 init_data_size + boot_size) {
1670
1671 IWL_DEBUG_INFO("uCode file size %d too small\n",
1672 (int)ucode_raw->size);
90e759d1 1673 ret = -EINVAL;
b481de9c
ZY		 1674 goto err_release;
1675 }
1676
1677 /* Verify that uCode images will fit in card's SRAM */
099b40b7 1678 if (inst_size > priv->hw_params.max_inst_size) {
90e759d1
TW		 1679 IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
1680 inst_size);
1681 ret = -EINVAL;
b481de9c
ZY		 1682 goto err_release;
1683 }
1684
099b40b7 1685 if (data_size > priv->hw_params.max_data_size) {
90e759d1
TW		 1686 IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
1687 data_size);
1688 ret = -EINVAL;
b481de9c
ZY		 1689 goto err_release;
1690 }
099b40b7 1691 if (init_size > priv->hw_params.max_inst_size) {
b481de9c 1692 IWL_DEBUG_INFO
90e759d1
TW		 1693 ("uCode init instr len %d too large to fit in\n",
1694 init_size);
1695 ret = -EINVAL;
b481de9c
ZY		 1696 goto err_release;
1697 }
099b40b7 1698 if (init_data_size > priv->hw_params.max_data_size) {
b481de9c 1699 IWL_DEBUG_INFO
90e759d1
TW		 1700 ("uCode init data len %d too large to fit in\n",
1701 init_data_size);
1702 ret = -EINVAL;
b481de9c
ZY		 1703 goto err_release;
1704 }
099b40b7 1705 if (boot_size > priv->hw_params.max_bsm_size) {
b481de9c 1706 IWL_DEBUG_INFO
90e759d1
TW		 1707 ("uCode boot instr len %d too large to fit in\n",
1708 boot_size);
1709 ret = -EINVAL;
b481de9c
ZY		 1710 goto err_release;
1711 }
1712
1713 /* Allocate ucode buffers for card's bus-master loading ... */
1714
1715 /* Runtime instructions and 2 copies of data:
1716 * 1) unmodified from disk
1717 * 2) backup cache for save/restore during power-downs */
1718 priv->ucode_code.len = inst_size;
98c92211 1719 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
b481de9c
ZY		 1720
1721 priv->ucode_data.len = data_size;
98c92211 1722 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
b481de9c
ZY		 1723
1724 priv->ucode_data_backup.len = data_size;
98c92211 1725 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
b481de9c
ZY		 1726
1727 /* Initialization instructions and data */
90e759d1
TW		 1728 if (init_size && init_data_size) {
1729 priv->ucode_init.len = init_size;
98c92211 1730 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
90e759d1
TW		 1731
1732 priv->ucode_init_data.len = init_data_size;
98c92211 1733 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
90e759d1
TW		 1734
1735 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
1736 goto err_pci_alloc;
1737 }
b481de9c
ZY		 1738
1739 /* Bootstrap (instructions only, no data) */
90e759d1
TW		 1740 if (boot_size) {
1741 priv->ucode_boot.len = boot_size;
98c92211 1742 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c 1743
90e759d1
TW		 1744 if (!priv->ucode_boot.v_addr)
1745 goto err_pci_alloc;
1746 }
b481de9c
ZY		 1747
1748 /* Copy images into buffers for card's bus-master reads ... */
1749
1750 /* Runtime instructions (first block of data in file) */
1751 src = &ucode->data[0];
1752 len = priv->ucode_code.len;
90e759d1 1753 IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
b481de9c
ZY		 1754 memcpy(priv->ucode_code.v_addr, src, len);
1755 IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
1756 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
1757
1758 /* Runtime data (2nd block)
5b9f8cd3 1759 * NOTE: Copy into backup buffer will be done in iwl_up() */
b481de9c
ZY		 1760 src = &ucode->data[inst_size];
1761 len = priv->ucode_data.len;
90e759d1 1762 IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
b481de9c
ZY		 1763 memcpy(priv->ucode_data.v_addr, src, len);
1764 memcpy(priv->ucode_data_backup.v_addr, src, len);
1765
1766 /* Initialization instructions (3rd block) */
1767 if (init_size) {
1768 src = &ucode->data[inst_size + data_size];
1769 len = priv->ucode_init.len;
90e759d1
TW		 1770 IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
1771 len);
b481de9c
ZY		 1772 memcpy(priv->ucode_init.v_addr, src, len);
1773 }
1774
1775 /* Initialization data (4th block) */
1776 if (init_data_size) {
1777 src = &ucode->data[inst_size + data_size + init_size];
1778 len = priv->ucode_init_data.len;
90e759d1
TW		 1779 IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n",
1780 len);
b481de9c
ZY		 1781 memcpy(priv->ucode_init_data.v_addr, src, len);
1782 }
1783
1784 /* Bootstrap instructions (5th block) */
1785 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
1786 len = priv->ucode_boot.len;
90e759d1 1787 IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len);
b481de9c
ZY		 1788 memcpy(priv->ucode_boot.v_addr, src, len);
1789
1790 /* We have our copies now, allow OS release its copies */
1791 release_firmware(ucode_raw);
1792 return 0;
1793
1794 err_pci_alloc:
15b1687c 1795 IWL_ERR(priv, "failed to allocate pci memory\n");
90e759d1 1796 ret = -ENOMEM;
5b9f8cd3 1797 iwl_dealloc_ucode_pci(priv);
b481de9c
ZY		 1798
1799 err_release:
1800 release_firmware(ucode_raw);
1801
1802 error:
90e759d1 1803 return ret;
b481de9c
ZY		 1804}
1805
ada17513
MA		 1806/* temporary */
1807static int iwl_mac_beacon_update(struct ieee80211_hw *hw,
1808 struct sk_buff *skb);
1809
b481de9c 1810/**
4a4a9e81 1811 * iwl_alive_start - called after REPLY_ALIVE notification received
b481de9c 1812 * from protocol/runtime uCode (initialization uCode's
4a4a9e81 1813 * Alive gets handled by iwl_init_alive_start()).
b481de9c 1814 */
4a4a9e81 1815static void iwl_alive_start(struct iwl_priv *priv)
b481de9c 1816{
57aab75a 1817 int ret = 0;
b481de9c
ZY		 1818
1819 IWL_DEBUG_INFO("Runtime Alive received.\n");
1820
1821 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
1822 /* We had an error bringing up the hardware, so take it
1823 * all the way back down so we can try again */
1824 IWL_DEBUG_INFO("Alive failed.\n");
1825 goto restart;
1826 }
1827
1828 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
1829 * This is a paranoid check, because we would not have gotten the
1830 * "runtime" alive if code weren't properly loaded. */
b0692f2f 1831 if (iwl_verify_ucode(priv)) {
b481de9c
ZY		 1832 /* Runtime instruction load was bad;
1833 * take it all the way back down so we can try again */
1834 IWL_DEBUG_INFO("Bad runtime uCode load.\n");
1835 goto restart;
1836 }
1837
37deb2a0 1838 iwl_clear_stations_table(priv);
57aab75a
TW		 1839 ret = priv->cfg->ops->lib->alive_notify(priv);
1840 if (ret) {
39aadf8c
WT		 1841 IWL_WARN(priv,
1842 "Could not complete ALIVE transition [ntf]: %d\n", ret);
b481de9c
ZY		 1843 goto restart;
1844 }
1845
5b9f8cd3 1846 /* After the ALIVE response, we can send host commands to the uCode */
b481de9c
ZY		 1847 set_bit(STATUS_ALIVE, &priv->status);
1848
fee1247a 1849 if (iwl_is_rfkill(priv))
b481de9c
ZY		 1850 return;
1851
36d6825b 1852 ieee80211_wake_queues(priv->hw);
b481de9c
ZY		 1853
1854 priv->active_rate = priv->rates_mask;
1855 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
1856
3109ece1 1857 if (iwl_is_associated(priv)) {
c1adf9fb
GG		 1858 struct iwl_rxon_cmd *active_rxon =
1859 (struct iwl_rxon_cmd *)&priv->active_rxon;
b481de9c
ZY		 1860
1861 memcpy(&priv->staging_rxon, &priv->active_rxon,
1862 sizeof(priv->staging_rxon));
1863 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1864 } else {
1865 /* Initialize our rx_config data */
5b9f8cd3 1866 iwl_connection_init_rx_config(priv, priv->iw_mode);
b481de9c
ZY		 1867 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1868 }
1869
9fbab516 1870 /* Configure Bluetooth device coexistence support */
5b9f8cd3 1871 iwl_send_bt_config(priv);
b481de9c 1872
4a4a9e81
TW		 1873 iwl_reset_run_time_calib(priv);
1874
b481de9c 1875 /* Configure the adapter for unassociated operation */
5b9f8cd3 1876 iwl_commit_rxon(priv);
b481de9c
ZY		 1877
1878 /* At this point, the NIC is initialized and operational */
47f4a587 1879 iwl_rf_kill_ct_config(priv);
5a66926a 1880
fe00b5a5
RC		 1881 iwl_leds_register(priv);
1882
b481de9c 1883 IWL_DEBUG_INFO("ALIVE processing complete.\n");
a9f46786 1884 set_bit(STATUS_READY, &priv->status);
5a66926a 1885 wake_up_interruptible(&priv->wait_command_queue);
b481de9c
ZY		 1886
1887 if (priv->error_recovering)
5b9f8cd3 1888 iwl_error_recovery(priv);
b481de9c 1889
58d0f361 1890 iwl_power_update_mode(priv, 1);
c46fbefa 1891
ada17513
MA		 1892 /* reassociate for ADHOC mode */
1893 if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
1894 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
1895 priv->vif);
1896 if (beacon)
1897 iwl_mac_beacon_update(priv->hw, beacon);
1898 }
1899
1900
c46fbefa 1901 if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
5b9f8cd3 1902 iwl_set_mode(priv, priv->iw_mode);
c46fbefa 1903
b481de9c
ZY		 1904 return;
1905
1906 restart:
1907 queue_work(priv->workqueue, &priv->restart);
1908}
1909
4e39317d 1910static void iwl_cancel_deferred_work(struct iwl_priv *priv);
b481de9c 1911
5b9f8cd3 1912static void __iwl_down(struct iwl_priv *priv)
b481de9c
ZY		 1913{
1914 unsigned long flags;
1915 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
b481de9c
ZY		 1916
1917 IWL_DEBUG_INFO(DRV_NAME " is going down\n");
1918
b481de9c
ZY		 1919 if (!exit_pending)
1920 set_bit(STATUS_EXIT_PENDING, &priv->status);
1921
ab53d8af
MA		 1922 iwl_leds_unregister(priv);
1923
37deb2a0 1924 iwl_clear_stations_table(priv);
b481de9c
ZY		 1925
1926 /* Unblock any waiting calls */
1927 wake_up_interruptible_all(&priv->wait_command_queue);
1928
b481de9c
ZY		 1929 /* Wipe out the EXIT_PENDING status bit if we are not actually
1930 * exiting the module */
1931 if (!exit_pending)
1932 clear_bit(STATUS_EXIT_PENDING, &priv->status);
1933
1934 /* stop and reset the on-board processor */
3395f6e9 1935 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
b481de9c
ZY		 1936
1937 /* tell the device to stop sending interrupts */
0359facc 1938 spin_lock_irqsave(&priv->lock, flags);
5b9f8cd3 1939 iwl_disable_interrupts(priv);
0359facc
MA		 1940 spin_unlock_irqrestore(&priv->lock, flags);
1941 iwl_synchronize_irq(priv);
b481de9c
ZY		 1942
1943 if (priv->mac80211_registered)
1944 ieee80211_stop_queues(priv->hw);
1945
5b9f8cd3 1946 /* If we have not previously called iwl_init() then
b481de9c 1947 * clear all bits but the RF Kill and SUSPEND bits and return */
fee1247a 1948 if (!iwl_is_init(priv)) {
b481de9c
ZY		 1949 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
1950 STATUS_RF_KILL_HW |
1951 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
1952 STATUS_RF_KILL_SW |
9788864e
RC		 1953 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
1954 STATUS_GEO_CONFIGURED |
b481de9c 1955 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
052ec3f1
MA		 1956 STATUS_IN_SUSPEND |
1957 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
1958 STATUS_EXIT_PENDING;
b481de9c
ZY		 1959 goto exit;
1960 }
1961
1962 /* ...otherwise clear out all the status bits but the RF Kill and
1963 * SUSPEND bits and continue taking the NIC down. */
1964 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
1965 STATUS_RF_KILL_HW |
1966 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
1967 STATUS_RF_KILL_SW |
9788864e
RC		 1968 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
1969 STATUS_GEO_CONFIGURED |
b481de9c
ZY		 1970 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
1971 STATUS_IN_SUSPEND |
1972 test_bit(STATUS_FW_ERROR, &priv->status) <<
052ec3f1
MA		 1973 STATUS_FW_ERROR |
1974 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
1975 STATUS_EXIT_PENDING;
b481de9c
ZY		 1976
1977 spin_lock_irqsave(&priv->lock, flags);
3395f6e9 1978 iwl_clear_bit(priv, CSR_GP_CNTRL,
9fbab516 1979 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
b481de9c
ZY		 1980 spin_unlock_irqrestore(&priv->lock, flags);
1981
da1bc453 1982 iwl_txq_ctx_stop(priv);
b3bbacb7 1983 iwl_rxq_stop(priv);
b481de9c
ZY		 1984
1985 spin_lock_irqsave(&priv->lock, flags);
3395f6e9
TW		 1986 if (!iwl_grab_nic_access(priv)) {
1987 iwl_write_prph(priv, APMG_CLK_DIS_REG,
b481de9c 1988 APMG_CLK_VAL_DMA_CLK_RQT);
3395f6e9 1989 iwl_release_nic_access(priv);
b481de9c
ZY		 1990 }
1991 spin_unlock_irqrestore(&priv->lock, flags);
1992
1993 udelay(5);
1994
7f066108 1995 /* FIXME: apm_ops.suspend(priv) */
d535311e
GG		 1996 if (exit_pending || test_bit(STATUS_IN_SUSPEND, &priv->status))
1997 priv->cfg->ops->lib->apm_ops.stop(priv);
1998 else
1999 priv->cfg->ops->lib->apm_ops.reset(priv);
b481de9c 2000 exit:
885ba202 2001 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
b481de9c
ZY		 2002
2003 if (priv->ibss_beacon)
2004 dev_kfree_skb(priv->ibss_beacon);
2005 priv->ibss_beacon = NULL;
2006
2007 /* clear out any free frames */
fcab423d 2008 iwl_clear_free_frames(priv);
b481de9c
ZY		 2009}
2010
5b9f8cd3 2011static void iwl_down(struct iwl_priv *priv)
b481de9c
ZY		 2012{
2013 mutex_lock(&priv->mutex);
5b9f8cd3 2014 __iwl_down(priv);
b481de9c 2015 mutex_unlock(&priv->mutex);
b24d22b1 2016
4e39317d 2017 iwl_cancel_deferred_work(priv);
b481de9c
ZY		 2018}
2019
2020#define MAX_HW_RESTARTS 5
2021
5b9f8cd3 2022static int __iwl_up(struct iwl_priv *priv)
b481de9c 2023{
57aab75a
TW		 2024 int i;
2025 int ret;
b481de9c
ZY		 2026
2027 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
39aadf8c 2028 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
b481de9c
ZY		 2029 return -EIO;
2030 }
2031
e903fbd4 2032 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
15b1687c 2033 IWL_ERR(priv, "ucode not available for device bringup\n");
e903fbd4
RC		 2034 return -EIO;
2035 }
2036
e655b9f0 2037 /* If platform's RF_KILL switch is NOT set to KILL */
c1842d61 2038 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
e655b9f0 2039 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3bff19c2 2040 else
e655b9f0 2041 set_bit(STATUS_RF_KILL_HW, &priv->status);
3bff19c2 2042
c1842d61 2043 if (iwl_is_rfkill(priv)) {
5b9f8cd3 2044 iwl_enable_interrupts(priv);
39aadf8c 2045 IWL_WARN(priv, "Radio disabled by %s RF Kill switch\n",
3bff19c2 2046 test_bit(STATUS_RF_KILL_HW, &priv->status) ? "HW" : "SW");
c1842d61 2047 return 0;
b481de9c
ZY		 2048 }
2049
3395f6e9 2050 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
b481de9c 2051
1053d35f 2052 ret = iwl_hw_nic_init(priv);
57aab75a 2053 if (ret) {
15b1687c 2054 IWL_ERR(priv, "Unable to init nic\n");
57aab75a 2055 return ret;
b481de9c
ZY		 2056 }
2057
2058 /* make sure rfkill handshake bits are cleared */
3395f6e9
TW		 2059 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2060 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c
ZY		 2061 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2062
2063 /* clear (again), then enable host interrupts */
3395f6e9 2064 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
5b9f8cd3 2065 iwl_enable_interrupts(priv);
b481de9c
ZY		 2066
2067 /* really make sure rfkill handshake bits are cleared */
3395f6e9
TW		 2068 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2069 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
b481de9c
ZY		 2070
2071 /* Copy original ucode data image from disk into backup cache.
2072 * This will be used to initialize the on-board processor's
2073 * data SRAM for a clean start when the runtime program first loads. */
2074 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
5a66926a 2075 priv->ucode_data.len);
b481de9c 2076
b481de9c
ZY		 2077 for (i = 0; i < MAX_HW_RESTARTS; i++) {
2078
37deb2a0 2079 iwl_clear_stations_table(priv);
b481de9c
ZY		 2080
2081 /* load bootstrap state machine,
2082 * load bootstrap program into processor's memory,
2083 * prepare to load the "initialize" uCode */
57aab75a 2084 ret = priv->cfg->ops->lib->load_ucode(priv);
b481de9c 2085
57aab75a 2086 if (ret) {
15b1687c
WT		 2087 IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
2088 ret);
b481de9c
ZY		 2089 continue;
2090 }
2091
f3d5b45b
EG		 2092 /* Clear out the uCode error bit if it is set */
2093 clear_bit(STATUS_FW_ERROR, &priv->status);
2094
b481de9c 2095 /* start card; "initialize" will load runtime ucode */
5b9f8cd3 2096 iwl_nic_start(priv);
b481de9c 2097
b481de9c
ZY		 2098 IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
2099
2100 return 0;
2101 }
2102
2103 set_bit(STATUS_EXIT_PENDING, &priv->status);
5b9f8cd3 2104 __iwl_down(priv);
64e72c3e 2105 clear_bit(STATUS_EXIT_PENDING, &priv->status);
b481de9c
ZY		 2106
2107 /* tried to restart and config the device for as long as our
2108 * patience could withstand */
15b1687c 2109 IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
b481de9c
ZY		 2110 return -EIO;
2111}
2112
2113
2114/*****************************************************************************
2115 *
2116 * Workqueue callbacks
2117 *
2118 *****************************************************************************/
2119
4a4a9e81 2120static void iwl_bg_init_alive_start(struct work_struct *data)
b481de9c 2121{
c79dd5b5
TW		 2122 struct iwl_priv *priv =
2123 container_of(data, struct iwl_priv, init_alive_start.work);
b481de9c
ZY		 2124
2125 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2126 return;
2127
2128 mutex_lock(&priv->mutex);
f3ccc08c 2129 priv->cfg->ops->lib->init_alive_start(priv);
b481de9c
ZY		 2130 mutex_unlock(&priv->mutex);
2131}
2132
4a4a9e81 2133static void iwl_bg_alive_start(struct work_struct *data)
b481de9c 2134{
c79dd5b5
TW		 2135 struct iwl_priv *priv =
2136 container_of(data, struct iwl_priv, alive_start.work);
b481de9c
ZY		 2137
2138 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2139 return;
2140
2141 mutex_lock(&priv->mutex);
4a4a9e81 2142 iwl_alive_start(priv);
b481de9c
ZY		 2143 mutex_unlock(&priv->mutex);
2144}
2145
5b9f8cd3 2146static void iwl_bg_rf_kill(struct work_struct *work)
b481de9c 2147{
c79dd5b5 2148 struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill);
b481de9c
ZY		 2149
2150 wake_up_interruptible(&priv->wait_command_queue);
2151
2152 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2153 return;
2154
2155 mutex_lock(&priv->mutex);
2156
fee1247a 2157 if (!iwl_is_rfkill(priv)) {
f3d67999 2158 IWL_DEBUG(IWL_DL_RF_KILL,
b481de9c
ZY		 2159 "HW and/or SW RF Kill no longer active, restarting "
2160 "device\n");
2161 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
2162 queue_work(priv->workqueue, &priv->restart);
2163 } else {
ad97edd2
MA		 2164 /* make sure mac80211 stop sending Tx frame */
2165 if (priv->mac80211_registered)
2166 ieee80211_stop_queues(priv->hw);
b481de9c
ZY		 2167
2168 if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
2169 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
2170 "disabled by SW switch\n");
2171 else
39aadf8c 2172 IWL_WARN(priv, "Radio Frequency Kill Switch is On:\n"
b481de9c
ZY		 2173 "Kill switch must be turned off for "
2174 "wireless networking to work.\n");
2175 }
2176 mutex_unlock(&priv->mutex);
80fcc9e2 2177 iwl_rfkill_set_hw_state(priv);
b481de9c
ZY		 2178}
2179
16e727e8
EG		 2180static void iwl_bg_run_time_calib_work(struct work_struct *work)
2181{
2182 struct iwl_priv *priv = container_of(work, struct iwl_priv,
2183 run_time_calib_work);
2184
2185 mutex_lock(&priv->mutex);
2186
2187 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
2188 test_bit(STATUS_SCANNING, &priv->status)) {
2189 mutex_unlock(&priv->mutex);
2190 return;
2191 }
2192
2193 if (priv->start_calib) {
2194 iwl_chain_noise_calibration(priv, &priv->statistics);
2195
2196 iwl_sensitivity_calibration(priv, &priv->statistics);
2197 }
2198
2199 mutex_unlock(&priv->mutex);
2200 return;
2201}
2202
5b9f8cd3 2203static void iwl_bg_up(struct work_struct *data)
b481de9c 2204{
c79dd5b5 2205 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
b481de9c
ZY		 2206
2207 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2208 return;
2209
2210 mutex_lock(&priv->mutex);
5b9f8cd3 2211 __iwl_up(priv);
b481de9c 2212 mutex_unlock(&priv->mutex);
80fcc9e2 2213 iwl_rfkill_set_hw_state(priv);
b481de9c
ZY		 2214}
2215
5b9f8cd3 2216static void iwl_bg_restart(struct work_struct *data)
b481de9c 2217{
c79dd5b5 2218 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
b481de9c
ZY		 2219
2220 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2221 return;
2222
5b9f8cd3 2223 iwl_down(priv);
b481de9c
ZY		 2224 queue_work(priv->workqueue, &priv->up);
2225}
2226
5b9f8cd3 2227static void iwl_bg_rx_replenish(struct work_struct *data)
b481de9c 2228{
c79dd5b5
TW		 2229 struct iwl_priv *priv =
2230 container_of(data, struct iwl_priv, rx_replenish);
b481de9c
ZY		 2231
2232 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2233 return;
2234
2235 mutex_lock(&priv->mutex);
a55360e4 2236 iwl_rx_replenish(priv);
b481de9c
ZY		 2237 mutex_unlock(&priv->mutex);
2238}
2239
7878a5a4
MA		 2240#define IWL_DELAY_NEXT_SCAN (HZ*2)
2241
5b9f8cd3 2242static void iwl_post_associate(struct iwl_priv *priv)
b481de9c 2243{
b481de9c 2244 struct ieee80211_conf *conf = NULL;
857485c0 2245 int ret = 0;
1ff50bda 2246 unsigned long flags;
b481de9c 2247
05c914fe 2248 if (priv->iw_mode == NL80211_IFTYPE_AP) {
15b1687c 2249 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
b481de9c
ZY		 2250 return;
2251 }
2252
e174961c
JB		 2253 IWL_DEBUG_ASSOC("Associated as %d to: %pM\n",
2254 priv->assoc_id, priv->active_rxon.bssid_addr);
b481de9c
ZY		 2255
2256
2257 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2258 return;
2259
b481de9c 2260
508e32e1 2261 if (!priv->vif || !priv->is_open)
948c171c 2262 return;
508e32e1 2263
c90a74ba 2264 iwl_power_cancel_timeout(priv);
2a421b91 2265 iwl_scan_cancel_timeout(priv, 200);
052c4b9f 2266
b481de9c
ZY		 2267 conf = ieee80211_get_hw_conf(priv->hw);
2268
2269 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5b9f8cd3 2270 iwl_commit_rxon(priv);
b481de9c 2271
3195c1f3 2272 iwl_setup_rxon_timing(priv);
857485c0 2273 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
b481de9c 2274 sizeof(priv->rxon_timing), &priv->rxon_timing);
857485c0 2275 if (ret)
39aadf8c 2276 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
b481de9c
ZY		 2277 "Attempting to continue.\n");
2278
2279 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2280
42eb7c64 2281 iwl_set_rxon_ht(priv, &priv->current_ht_config);
4f85f5b3 2282
c7de35cd 2283 iwl_set_rxon_chain(priv);
b481de9c
ZY		 2284 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2285
2286 IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
2287 priv->assoc_id, priv->beacon_int);
2288
2289 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2290 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2291 else
2292 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2293
2294 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2295 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2296 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2297 else
2298 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2299
05c914fe 2300 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
b481de9c
ZY		 2301 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2302
2303 }
2304
5b9f8cd3 2305 iwl_commit_rxon(priv);
b481de9c
ZY		 2306
2307 switch (priv->iw_mode) {
05c914fe 2308 case NL80211_IFTYPE_STATION:
b481de9c
ZY		 2309 break;
2310
05c914fe 2311 case NL80211_IFTYPE_ADHOC:
b481de9c 2312
c46fbefa
AK		 2313 /* assume default assoc id */
2314 priv->assoc_id = 1;
b481de9c 2315
4f40e4d9 2316 iwl_rxon_add_station(priv, priv->bssid, 0);
5b9f8cd3 2317 iwl_send_beacon_cmd(priv);
b481de9c
ZY		 2318
2319 break;
2320
2321 default:
15b1687c 2322 IWL_ERR(priv, "%s Should not be called in %d mode\n",
3ac7f146 2323 __func__, priv->iw_mode);
b481de9c
ZY		 2324 break;
2325 }
2326
05c914fe 2327 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
b481de9c
ZY		 2328 priv->assoc_station_added = 1;
2329
1ff50bda
EG		 2330 spin_lock_irqsave(&priv->lock, flags);
2331 iwl_activate_qos(priv, 0);
2332 spin_unlock_irqrestore(&priv->lock, flags);
292ae174 2333
04816448
GE		 2334 /* the chain noise calibration will enabled PM upon completion
2335 * If chain noise has already been run, then we need to enable
2336 * power management here */
2337 if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
2338 iwl_power_enable_management(priv);
c90a74ba
EG		 2339
2340 /* Enable Rx differential gain and sensitivity calibrations */
2341 iwl_chain_noise_reset(priv);
2342 priv->start_calib = 1;
2343
508e32e1
RC		 2344}
2345
b481de9c
ZY		 2346/*****************************************************************************
2347 *
2348 * mac80211 entry point functions
2349 *
2350 *****************************************************************************/
2351
154b25ce 2352#define UCODE_READY_TIMEOUT (4 * HZ)
5a66926a 2353
5b9f8cd3 2354static int iwl_mac_start(struct ieee80211_hw *hw)
b481de9c 2355{
c79dd5b5 2356 struct iwl_priv *priv = hw->priv;
5a66926a 2357 int ret;
cf88c433 2358 u16 pci_cmd;
b481de9c
ZY		 2359
2360 IWL_DEBUG_MAC80211("enter\n");
2361
5a66926a 2362 if (pci_enable_device(priv->pci_dev)) {
15b1687c 2363 IWL_ERR(priv, "Fail to pci_enable_device\n");
5a66926a
ZY		 2364 return -ENODEV;
2365 }
2366 pci_restore_state(priv->pci_dev);
2367 pci_enable_msi(priv->pci_dev);
2368
cf88c433
TW		 2369 /* enable interrupts if needed: hw bug w/a */
2370 pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
2371 if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
2372 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
2373 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
2374 }
2375
5b9f8cd3 2376 ret = request_irq(priv->pci_dev->irq, iwl_isr, IRQF_SHARED,
5a66926a
ZY		 2377 DRV_NAME, priv);
2378 if (ret) {
15b1687c 2379 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
5a66926a
ZY		 2380 goto out_disable_msi;
2381 }
2382
b481de9c
ZY		 2383 /* we should be verifying the device is ready to be opened */
2384 mutex_lock(&priv->mutex);
2385
c1adf9fb 2386 memset(&priv->staging_rxon, 0, sizeof(struct iwl_rxon_cmd));
5a66926a
ZY		 2387 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
2388 * ucode filename and max sizes are card-specific. */
b481de9c 2389
5a66926a 2390 if (!priv->ucode_code.len) {
5b9f8cd3 2391 ret = iwl_read_ucode(priv);
5a66926a 2392 if (ret) {
15b1687c 2393 IWL_ERR(priv, "Could not read microcode: %d\n", ret);
5a66926a
ZY		 2394 mutex_unlock(&priv->mutex);
2395 goto out_release_irq;
2396 }
2397 }
b481de9c 2398
5b9f8cd3 2399 ret = __iwl_up(priv);
5a66926a 2400
b481de9c 2401 mutex_unlock(&priv->mutex);
5a66926a 2402
80fcc9e2
AG		 2403 iwl_rfkill_set_hw_state(priv);
2404
e655b9f0
ZY		 2405 if (ret)
2406 goto out_release_irq;
2407
c1842d61
TW		 2408 if (iwl_is_rfkill(priv))
2409 goto out;
2410
e655b9f0
ZY		 2411 IWL_DEBUG_INFO("Start UP work done.\n");
2412
2413 if (test_bit(STATUS_IN_SUSPEND, &priv->status))
2414 return 0;
2415
fe9b6b72 2416 /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
5a66926a 2417 * mac80211 will not be run successfully. */
154b25ce
EG		 2418 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
2419 test_bit(STATUS_READY, &priv->status),
2420 UCODE_READY_TIMEOUT);
2421 if (!ret) {
2422 if (!test_bit(STATUS_READY, &priv->status)) {
15b1687c 2423 IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
154b25ce
EG		 2424 jiffies_to_msecs(UCODE_READY_TIMEOUT));
2425 ret = -ETIMEDOUT;
2426 goto out_release_irq;
5a66926a 2427 }
fe9b6b72 2428 }
0a078ffa 2429
c1842d61 2430out:
0a078ffa 2431 priv->is_open = 1;
b481de9c
ZY		 2432 IWL_DEBUG_MAC80211("leave\n");
2433 return 0;
5a66926a
ZY		 2434
2435out_release_irq:
2436 free_irq(priv->pci_dev->irq, priv);
2437out_disable_msi:
2438 pci_disable_msi(priv->pci_dev);
e655b9f0
ZY		 2439 pci_disable_device(priv->pci_dev);
2440 priv->is_open = 0;
2441 IWL_DEBUG_MAC80211("leave - failed\n");
5a66926a 2442 return ret;
b481de9c
ZY		 2443}
2444
5b9f8cd3 2445static void iwl_mac_stop(struct ieee80211_hw *hw)
b481de9c 2446{
c79dd5b5 2447 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 2448
2449 IWL_DEBUG_MAC80211("enter\n");
948c171c 2450
e655b9f0
ZY		 2451 if (!priv->is_open) {
2452 IWL_DEBUG_MAC80211("leave - skip\n");
2453 return;
2454 }
2455
b481de9c 2456 priv->is_open = 0;
5a66926a 2457
fee1247a 2458 if (iwl_is_ready_rf(priv)) {
e655b9f0
ZY		 2459 /* stop mac, cancel any scan request and clear
2460 * RXON_FILTER_ASSOC_MSK BIT
2461 */
5a66926a 2462 mutex_lock(&priv->mutex);
2a421b91 2463 iwl_scan_cancel_timeout(priv, 100);
fde3571f 2464 mutex_unlock(&priv->mutex);
fde3571f
MA		 2465 }
2466
5b9f8cd3 2467 iwl_down(priv);
5a66926a
ZY		 2468
2469 flush_workqueue(priv->workqueue);
2470 free_irq(priv->pci_dev->irq, priv);
2471 pci_disable_msi(priv->pci_dev);
2472 pci_save_state(priv->pci_dev);
2473 pci_disable_device(priv->pci_dev);
948c171c 2474
b481de9c 2475 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY		 2476}
2477
5b9f8cd3 2478static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
b481de9c 2479{
c79dd5b5 2480 struct iwl_priv *priv = hw->priv;
b481de9c 2481
f3674227 2482 IWL_DEBUG_MACDUMP("enter\n");
b481de9c 2483
b481de9c 2484 IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
e039fa4a 2485 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
b481de9c 2486
e039fa4a 2487 if (iwl_tx_skb(priv, skb))
b481de9c
ZY		 2488 dev_kfree_skb_any(skb);
2489
f3674227 2490 IWL_DEBUG_MACDUMP("leave\n");
637f8837 2491 return NETDEV_TX_OK;
b481de9c
ZY		 2492}
2493
5b9f8cd3 2494static int iwl_mac_add_interface(struct ieee80211_hw *hw,
b481de9c
ZY		 2495 struct ieee80211_if_init_conf *conf)
2496{
c79dd5b5 2497 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 2498 unsigned long flags;
2499
32bfd35d 2500 IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
b481de9c 2501
32bfd35d
JB		 2502 if (priv->vif) {
2503 IWL_DEBUG_MAC80211("leave - vif != NULL\n");
75849d28 2504 return -EOPNOTSUPP;
b481de9c
ZY		 2505 }
2506
2507 spin_lock_irqsave(&priv->lock, flags);
32bfd35d 2508 priv->vif = conf->vif;
60294de3 2509 priv->iw_mode = conf->type;
b481de9c
ZY		 2510
2511 spin_unlock_irqrestore(&priv->lock, flags);
2512
2513 mutex_lock(&priv->mutex);
864792e3
TW		 2514
2515 if (conf->mac_addr) {
e174961c 2516 IWL_DEBUG_MAC80211("Set %pM\n", conf->mac_addr);
864792e3
TW		 2517 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
2518 }
b481de9c 2519
5b9f8cd3 2520 if (iwl_set_mode(priv, conf->type) == -EAGAIN)
c46fbefa
AK		 2521 /* we are not ready, will run again when ready */
2522 set_bit(STATUS_MODE_PENDING, &priv->status);
5a66926a 2523
b481de9c
ZY		 2524 mutex_unlock(&priv->mutex);
2525
5a66926a 2526 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY		 2527 return 0;
2528}
2529
2530/**
5b9f8cd3 2531 * iwl_mac_config - mac80211 config callback
b481de9c
ZY		 2532 *
2533 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
2534 * be set inappropriately and the driver currently sets the hardware up to
2535 * use it whenever needed.
2536 */
5b9f8cd3 2537static int iwl_mac_config(struct ieee80211_hw *hw, u32 changed)
b481de9c 2538{
c79dd5b5 2539 struct iwl_priv *priv = hw->priv;
bf85ea4f 2540 const struct iwl_channel_info *ch_info;
e8975581 2541 struct ieee80211_conf *conf = &hw->conf;
b481de9c 2542 unsigned long flags;
76bb77e0 2543 int ret = 0;
82a66bbb 2544 u16 channel;
b481de9c
ZY		 2545
2546 mutex_lock(&priv->mutex);
8318d78a 2547 IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
b481de9c 2548
de27e64e 2549 priv->current_ht_config.is_ht = conf_is_ht(conf);
ae5eb026 2550
14a08a7f 2551 if (conf->radio_enabled && iwl_radio_kill_sw_enable_radio(priv)) {
64e72c3e 2552 IWL_DEBUG_MAC80211("leave - RF-KILL - waiting for uCode\n");
14a08a7f 2553 goto out;
64e72c3e
MA		 2554 }
2555
14a08a7f
EG		 2556 if (!conf->radio_enabled)
2557 iwl_radio_kill_sw_disable_radio(priv);
2558
fee1247a 2559 if (!iwl_is_ready(priv)) {
b481de9c 2560 IWL_DEBUG_MAC80211("leave - not ready\n");
76bb77e0
ZY		 2561 ret = -EIO;
2562 goto out;
b481de9c
ZY		 2563 }
2564
1ea87396 2565 if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
b481de9c 2566 test_bit(STATUS_SCANNING, &priv->status))) {
a0646470 2567 IWL_DEBUG_MAC80211("leave - scanning\n");
b481de9c 2568 mutex_unlock(&priv->mutex);
a0646470 2569 return 0;
b481de9c
ZY		 2570 }
2571
82a66bbb
TW		 2572 channel = ieee80211_frequency_to_channel(conf->channel->center_freq);
2573 ch_info = iwl_get_channel_info(priv, conf->channel->band, channel);
b481de9c 2574 if (!is_channel_valid(ch_info)) {
b481de9c 2575 IWL_DEBUG_MAC80211("leave - invalid channel\n");
76bb77e0
ZY		 2576 ret = -EINVAL;
2577 goto out;
b481de9c
ZY		 2578 }
2579
05c914fe 2580 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
398f9e76 2581 !is_channel_ibss(ch_info)) {
15b1687c 2582 IWL_ERR(priv, "channel %d in band %d not IBSS channel\n",
398f9e76
AK		 2583 conf->channel->hw_value, conf->channel->band);
2584 ret = -EINVAL;
2585 goto out;
2586 }
2587
82a66bbb
TW		 2588 spin_lock_irqsave(&priv->lock, flags);
2589
b5d7be5e 2590
78330fdd 2591 /* if we are switching from ht to 2.4 clear flags
b481de9c
ZY		 2592 * from any ht related info since 2.4 does not
2593 * support ht */
82a66bbb 2594 if ((le16_to_cpu(priv->staging_rxon.channel) != channel)
b481de9c
ZY		 2595#ifdef IEEE80211_CONF_CHANNEL_SWITCH
2596 && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH)
2597#endif
2598 )
2599 priv->staging_rxon.flags = 0;
b481de9c 2600
17e72782 2601 iwl_set_rxon_channel(priv, conf->channel);
b481de9c 2602
82a66bbb 2603 iwl_set_flags_for_band(priv, conf->channel->band);
b481de9c
ZY		 2604
2605 /* The list of supported rates and rate mask can be different
8318d78a 2606 * for each band; since the band may have changed, reset
b481de9c 2607 * the rate mask to what mac80211 lists */
5b9f8cd3 2608 iwl_set_rate(priv);
b481de9c
ZY		 2609
2610 spin_unlock_irqrestore(&priv->lock, flags);
2611
2612#ifdef IEEE80211_CONF_CHANNEL_SWITCH
2613 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
5b9f8cd3 2614 iwl_hw_channel_switch(priv, conf->channel);
76bb77e0 2615 goto out;
b481de9c
ZY		 2616 }
2617#endif
2618
b481de9c
ZY		 2619 if (!conf->radio_enabled) {
2620 IWL_DEBUG_MAC80211("leave - radio disabled\n");
76bb77e0 2621 goto out;
b481de9c
ZY		 2622 }
2623
fee1247a 2624 if (iwl_is_rfkill(priv)) {
b481de9c 2625 IWL_DEBUG_MAC80211("leave - RF kill\n");
76bb77e0
ZY		 2626 ret = -EIO;
2627 goto out;
b481de9c
ZY		 2628 }
2629
e602cb18
EK		 2630 if (conf->flags & IEEE80211_CONF_PS)
2631 ret = iwl_power_set_user_mode(priv, IWL_POWER_INDEX_3);
2632 else
2633 ret = iwl_power_set_user_mode(priv, IWL_POWER_MODE_CAM);
2634 if (ret)
2635 IWL_DEBUG_MAC80211("Error setting power level\n");
2636
630fe9b6
TW		 2637 IWL_DEBUG_MAC80211("TX Power old=%d new=%d\n",
2638 priv->tx_power_user_lmt, conf->power_level);
2639
2640 iwl_set_tx_power(priv, conf->power_level, false);
2641
5b9f8cd3 2642 iwl_set_rate(priv);
b481de9c
ZY		 2643
2644 if (memcmp(&priv->active_rxon,
2645 &priv->staging_rxon, sizeof(priv->staging_rxon)))
5b9f8cd3 2646 iwl_commit_rxon(priv);
b481de9c
ZY		 2647 else
2648 IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
2649
2650 IWL_DEBUG_MAC80211("leave\n");
2651
a0646470 2652out:
5a66926a 2653 mutex_unlock(&priv->mutex);
76bb77e0 2654 return ret;
b481de9c
ZY		 2655}
2656
5b9f8cd3 2657static void iwl_config_ap(struct iwl_priv *priv)
b481de9c 2658{
857485c0 2659 int ret = 0;
1ff50bda 2660 unsigned long flags;
b481de9c 2661
d986bcd1 2662 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
b481de9c
ZY		 2663 return;
2664
2665 /* The following should be done only at AP bring up */
3195c1f3 2666 if (!iwl_is_associated(priv)) {
b481de9c
ZY		 2667
2668 /* RXON - unassoc (to set timing command) */
2669 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5b9f8cd3 2670 iwl_commit_rxon(priv);
b481de9c
ZY		 2671
2672 /* RXON Timing */
3195c1f3 2673 iwl_setup_rxon_timing(priv);
857485c0 2674 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
b481de9c 2675 sizeof(priv->rxon_timing), &priv->rxon_timing);
857485c0 2676 if (ret)
39aadf8c 2677 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
b481de9c
ZY		 2678 "Attempting to continue.\n");
2679
c7de35cd 2680 iwl_set_rxon_chain(priv);
b481de9c
ZY		 2681
2682 /* FIXME: what should be the assoc_id for AP? */
2683 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2684 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2685 priv->staging_rxon.flags |=
2686 RXON_FLG_SHORT_PREAMBLE_MSK;
2687 else
2688 priv->staging_rxon.flags &=
2689 ~RXON_FLG_SHORT_PREAMBLE_MSK;
2690
2691 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2692 if (priv->assoc_capability &
2693 WLAN_CAPABILITY_SHORT_SLOT_TIME)
2694 priv->staging_rxon.flags |=
2695 RXON_FLG_SHORT_SLOT_MSK;
2696 else
2697 priv->staging_rxon.flags &=
2698 ~RXON_FLG_SHORT_SLOT_MSK;
2699
05c914fe 2700 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
b481de9c
ZY		 2701 priv->staging_rxon.flags &=
2702 ~RXON_FLG_SHORT_SLOT_MSK;
2703 }
2704 /* restore RXON assoc */
2705 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
5b9f8cd3 2706 iwl_commit_rxon(priv);
1ff50bda
EG		 2707 spin_lock_irqsave(&priv->lock, flags);
2708 iwl_activate_qos(priv, 1);
2709 spin_unlock_irqrestore(&priv->lock, flags);
4f40e4d9 2710 iwl_rxon_add_station(priv, iwl_bcast_addr, 0);
e1493deb 2711 }
5b9f8cd3 2712 iwl_send_beacon_cmd(priv);
b481de9c
ZY		 2713
2714 /* FIXME - we need to add code here to detect a totally new
2715 * configuration, reset the AP, unassoc, rxon timing, assoc,
2716 * clear sta table, add BCAST sta... */
2717}
2718
9d139c81 2719
5b9f8cd3 2720static int iwl_mac_config_interface(struct ieee80211_hw *hw,
32bfd35d 2721 struct ieee80211_vif *vif,
b481de9c
ZY		 2722 struct ieee80211_if_conf *conf)
2723{
c79dd5b5 2724 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 2725 int rc;
2726
2727 if (conf == NULL)
2728 return -EIO;
2729
b716bb91
EG		 2730 if (priv->vif != vif) {
2731 IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
b716bb91
EG		 2732 return 0;
2733 }
2734
05c914fe 2735 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
9d139c81
JB		 2736 conf->changed & IEEE80211_IFCC_BEACON) {
2737 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
2738 if (!beacon)
2739 return -ENOMEM;
ada17513 2740 mutex_lock(&priv->mutex);
5b9f8cd3 2741 rc = iwl_mac_beacon_update(hw, beacon);
ada17513 2742 mutex_unlock(&priv->mutex);
9d139c81
JB		 2743 if (rc)
2744 return rc;
2745 }
2746
fee1247a 2747 if (!iwl_is_alive(priv))
5a66926a
ZY		 2748 return -EAGAIN;
2749
b481de9c
ZY		 2750 mutex_lock(&priv->mutex);
2751
b481de9c 2752 if (conf->bssid)
e174961c 2753 IWL_DEBUG_MAC80211("bssid: %pM\n", conf->bssid);
b481de9c 2754
4150c572
JB		 2755/*
2756 * very dubious code was here; the probe filtering flag is never set:
2757 *
b481de9c
ZY		 2758 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
2759 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
4150c572 2760 */
b481de9c 2761
05c914fe 2762 if (priv->iw_mode == NL80211_IFTYPE_AP) {
b481de9c
ZY		 2763 if (!conf->bssid) {
2764 conf->bssid = priv->mac_addr;
2765 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
e174961c
JB		 2766 IWL_DEBUG_MAC80211("bssid was set to: %pM\n",
2767 conf->bssid);
b481de9c
ZY		 2768 }
2769 if (priv->ibss_beacon)
2770 dev_kfree_skb(priv->ibss_beacon);
2771
9d139c81 2772 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
b481de9c
ZY		 2773 }
2774
fee1247a 2775 if (iwl_is_rfkill(priv))
fde3571f
MA		 2776 goto done;
2777
b481de9c
ZY		 2778 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
2779 !is_multicast_ether_addr(conf->bssid)) {
2780 /* If there is currently a HW scan going on in the background
2781 * then we need to cancel it else the RXON below will fail. */
2a421b91 2782 if (iwl_scan_cancel_timeout(priv, 100)) {
39aadf8c 2783 IWL_WARN(priv, "Aborted scan still in progress "
b481de9c
ZY		 2784 "after 100ms\n");
2785 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
2786 mutex_unlock(&priv->mutex);
2787 return -EAGAIN;
2788 }
2789 memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
2790
2791 /* TODO: Audit driver for usage of these members and see
2792 * if mac80211 deprecates them (priv->bssid looks like it
2793 * shouldn't be there, but I haven't scanned the IBSS code
2794 * to verify) - jpk */
2795 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
2796
05c914fe 2797 if (priv->iw_mode == NL80211_IFTYPE_AP)
5b9f8cd3 2798 iwl_config_ap(priv);
b481de9c 2799 else {
5b9f8cd3 2800 rc = iwl_commit_rxon(priv);
05c914fe 2801 if ((priv->iw_mode == NL80211_IFTYPE_STATION) && rc)
4f40e4d9 2802 iwl_rxon_add_station(
b481de9c
ZY		 2803 priv, priv->active_rxon.bssid_addr, 1);
2804 }
2805
2806 } else {
2a421b91 2807 iwl_scan_cancel_timeout(priv, 100);
b481de9c 2808 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5b9f8cd3 2809 iwl_commit_rxon(priv);
b481de9c
ZY		 2810 }
2811
fde3571f 2812 done:
b481de9c
ZY		 2813 IWL_DEBUG_MAC80211("leave\n");
2814 mutex_unlock(&priv->mutex);
2815
2816 return 0;
2817}
2818
5b9f8cd3 2819static void iwl_configure_filter(struct ieee80211_hw *hw,
4150c572
JB		 2820 unsigned int changed_flags,
2821 unsigned int *total_flags,
2822 int mc_count, struct dev_addr_list *mc_list)
2823{
4419e39b 2824 struct iwl_priv *priv = hw->priv;
352bc8de
ZY		 2825 __le32 *filter_flags = &priv->staging_rxon.filter_flags;
2826
2827 IWL_DEBUG_MAC80211("Enter: changed: 0x%x, total: 0x%x\n",
2828 changed_flags, *total_flags);
25b3f57c 2829
352bc8de
ZY		 2830 if (changed_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS)) {
2831 if (*total_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS))
2832 *filter_flags |= RXON_FILTER_PROMISC_MSK;
2833 else
2834 *filter_flags &= ~RXON_FILTER_PROMISC_MSK;
2835 }
2836 if (changed_flags & FIF_ALLMULTI) {
2837 if (*total_flags & FIF_ALLMULTI)
2838 *filter_flags |= RXON_FILTER_ACCEPT_GRP_MSK;
2839 else
2840 *filter_flags &= ~RXON_FILTER_ACCEPT_GRP_MSK;
2841 }
2842 if (changed_flags & FIF_CONTROL) {
2843 if (*total_flags & FIF_CONTROL)
2844 *filter_flags |= RXON_FILTER_CTL2HOST_MSK;
2845 else
2846 *filter_flags &= ~RXON_FILTER_CTL2HOST_MSK;
2847 }
2848 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
2849 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
2850 *filter_flags |= RXON_FILTER_BCON_AWARE_MSK;
2851 else
2852 *filter_flags &= ~RXON_FILTER_BCON_AWARE_MSK;
4419e39b 2853 }
352bc8de
ZY		 2854
2855 /* We avoid iwl_commit_rxon here to commit the new filter flags
2856 * since mac80211 will call ieee80211_hw_config immediately.
2857 * (mc_list is not supported at this time). Otherwise, we need to
2858 * queue a background iwl_commit_rxon work.
2859 */
2860
2861 *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
25b3f57c 2862 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
4150c572
JB		 2863}
2864
5b9f8cd3 2865static void iwl_mac_remove_interface(struct ieee80211_hw *hw,
b481de9c
ZY		 2866 struct ieee80211_if_init_conf *conf)
2867{
c79dd5b5 2868 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 2869
2870 IWL_DEBUG_MAC80211("enter\n");
2871
2872 mutex_lock(&priv->mutex);
948c171c 2873
fee1247a 2874 if (iwl_is_ready_rf(priv)) {
2a421b91 2875 iwl_scan_cancel_timeout(priv, 100);
fde3571f 2876 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5b9f8cd3 2877 iwl_commit_rxon(priv);
fde3571f 2878 }
32bfd35d
JB		 2879 if (priv->vif == conf->vif) {
2880 priv->vif = NULL;
b481de9c 2881 memset(priv->bssid, 0, ETH_ALEN);
b481de9c
ZY		 2882 }
2883 mutex_unlock(&priv->mutex);
2884
2885 IWL_DEBUG_MAC80211("leave\n");
2886
2887}
471b3efd 2888
3109ece1 2889#define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
5b9f8cd3 2890static void iwl_bss_info_changed(struct ieee80211_hw *hw,
471b3efd
JB		 2891 struct ieee80211_vif *vif,
2892 struct ieee80211_bss_conf *bss_conf,
2893 u32 changes)
220173b0 2894{
c79dd5b5 2895 struct iwl_priv *priv = hw->priv;
220173b0 2896
3109ece1
TW		 2897 IWL_DEBUG_MAC80211("changes = 0x%X\n", changes);
2898
471b3efd 2899 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
3109ece1
TW		 2900 IWL_DEBUG_MAC80211("ERP_PREAMBLE %d\n",
2901 bss_conf->use_short_preamble);
471b3efd 2902 if (bss_conf->use_short_preamble)
220173b0
TW		 2903 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2904 else
2905 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2906 }
2907
471b3efd 2908 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
3109ece1 2909 IWL_DEBUG_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot);
8318d78a 2910 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
220173b0
TW		 2911 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
2912 else
2913 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
2914 }
2915
98952d5d 2916 if (changes & BSS_CHANGED_HT) {
5b9f8cd3 2917 iwl_ht_conf(priv, bss_conf);
c7de35cd 2918 iwl_set_rxon_chain(priv);
98952d5d
TW		 2919 }
2920
471b3efd 2921 if (changes & BSS_CHANGED_ASSOC) {
3109ece1 2922 IWL_DEBUG_MAC80211("ASSOC %d\n", bss_conf->assoc);
508e32e1
RC		 2923 /* This should never happen as this function should
2924 * never be called from interrupt context. */
2925 if (WARN_ON_ONCE(in_interrupt()))
2926 return;
3109ece1
TW		 2927 if (bss_conf->assoc) {
2928 priv->assoc_id = bss_conf->aid;
2929 priv->beacon_int = bss_conf->beacon_int;
b5d7be5e 2930 priv->power_data.dtim_period = bss_conf->dtim_period;
3109ece1
TW		 2931 priv->timestamp = bss_conf->timestamp;
2932 priv->assoc_capability = bss_conf->assoc_capability;
9ccacb86
TW		 2933
2934 /* we have just associated, don't start scan too early
2935 * leave time for EAPOL exchange to complete
2936 */
3109ece1
TW		 2937 priv->next_scan_jiffies = jiffies +
2938 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
508e32e1 2939 mutex_lock(&priv->mutex);
5b9f8cd3 2940 iwl_post_associate(priv);
508e32e1 2941 mutex_unlock(&priv->mutex);
3109ece1
TW		 2942 } else {
2943 priv->assoc_id = 0;
2944 IWL_DEBUG_MAC80211("DISASSOC %d\n", bss_conf->assoc);
2945 }
2946 } else if (changes && iwl_is_associated(priv) && priv->assoc_id) {
2947 IWL_DEBUG_MAC80211("Associated Changes %d\n", changes);
7e8c519e 2948 iwl_send_rxon_assoc(priv);
471b3efd
JB		 2949 }
2950
220173b0 2951}
b481de9c 2952
cb43dc25 2953static int iwl_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t ssid_len)
b481de9c 2954{
b481de9c 2955 unsigned long flags;
c79dd5b5 2956 struct iwl_priv *priv = hw->priv;
8d09a5e1 2957 int ret;
b481de9c
ZY		 2958
2959 IWL_DEBUG_MAC80211("enter\n");
2960
052c4b9f 2961 mutex_lock(&priv->mutex);
b481de9c
ZY		 2962 spin_lock_irqsave(&priv->lock, flags);
2963
fee1247a 2964 if (!iwl_is_ready_rf(priv)) {
cb43dc25 2965 ret = -EIO;
b481de9c
ZY		 2966 IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
2967 goto out_unlock;
2968 }
2969
8d09a5e1
TW		 2970 /* We don't schedule scan within next_scan_jiffies period.
2971 * Avoid scanning during possible EAPOL exchange, return
2972 * success immediately.
2973 */
7878a5a4 2974 if (priv->next_scan_jiffies &&
cb43dc25 2975 time_after(priv->next_scan_jiffies, jiffies)) {
681c0050 2976 IWL_DEBUG_SCAN("scan rejected: within next scan period\n");
8d09a5e1
TW		 2977 queue_work(priv->workqueue, &priv->scan_completed);
2978 ret = 0;
7878a5a4
MA		 2979 goto out_unlock;
2980 }
8d09a5e1 2981
b481de9c 2982 /* if we just finished scan ask for delay */
681c0050 2983 if (iwl_is_associated(priv) && priv->last_scan_jiffies &&
cb43dc25 2984 time_after(priv->last_scan_jiffies + IWL_DELAY_NEXT_SCAN, jiffies)) {
681c0050 2985 IWL_DEBUG_SCAN("scan rejected: within previous scan period\n");
8d09a5e1
TW		 2986 queue_work(priv->workqueue, &priv->scan_completed);
2987 ret = 0;
b481de9c
ZY		 2988 goto out_unlock;
2989 }
8d09a5e1 2990
cb43dc25 2991 if (ssid_len) {
b481de9c 2992 priv->one_direct_scan = 1;
cb43dc25 2993 priv->direct_ssid_len = min_t(u8, ssid_len, IW_ESSID_MAX_SIZE);
b481de9c 2994 memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
cb43dc25 2995 } else {
948c171c 2996 priv->one_direct_scan = 0;
cb43dc25 2997 }
b481de9c 2998
cb43dc25 2999 ret = iwl_scan_initiate(priv);
b481de9c
ZY		 3000
3001 IWL_DEBUG_MAC80211("leave\n");
3002
3003out_unlock:
3004 spin_unlock_irqrestore(&priv->lock, flags);
052c4b9f 3005 mutex_unlock(&priv->mutex);
b481de9c 3006
cb43dc25 3007 return ret;
b481de9c
ZY		 3008}
3009
5b9f8cd3 3010static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
ab885f8c
EG		 3011 struct ieee80211_key_conf *keyconf, const u8 *addr,
3012 u32 iv32, u16 *phase1key)
3013{
ab885f8c 3014
9f58671e 3015 struct iwl_priv *priv = hw->priv;
ab885f8c
EG		 3016 IWL_DEBUG_MAC80211("enter\n");
3017
9f58671e 3018 iwl_update_tkip_key(priv, keyconf, addr, iv32, phase1key);
ab885f8c
EG		 3019
3020 IWL_DEBUG_MAC80211("leave\n");
3021}
3022
5b9f8cd3 3023static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
dc822b5d
JB		 3024 struct ieee80211_vif *vif,
3025 struct ieee80211_sta *sta,
b481de9c
ZY		 3026 struct ieee80211_key_conf *key)
3027{
c79dd5b5 3028 struct iwl_priv *priv = hw->priv;
deb09c43
EG		 3029 int ret = 0;
3030 u8 sta_id = IWL_INVALID_STATION;
6974e363 3031 u8 is_default_wep_key = 0;
dc822b5d
JB		 3032 static const u8 bcast_addr[ETH_ALEN] =
3033 { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, };
3034 static const u8 *addr;
b481de9c
ZY		 3035
3036 IWL_DEBUG_MAC80211("enter\n");
3037
099b40b7 3038 if (priv->hw_params.sw_crypto) {
b481de9c
ZY		 3039 IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
3040 return -EOPNOTSUPP;
3041 }
3042
dc822b5d 3043 addr = sta ? sta->addr : bcast_addr;
b481de9c 3044
947b13a7 3045 sta_id = iwl_find_station(priv, addr);
6974e363 3046 if (sta_id == IWL_INVALID_STATION) {
e174961c
JB		 3047 IWL_DEBUG_MAC80211("leave - %pM not in station map.\n",
3048 addr);
6974e363 3049 return -EINVAL;
b481de9c 3050
deb09c43 3051 }
b481de9c 3052
6974e363 3053 mutex_lock(&priv->mutex);
2a421b91 3054 iwl_scan_cancel_timeout(priv, 100);
6974e363
EG		 3055 mutex_unlock(&priv->mutex);
3056
3057 /* If we are getting WEP group key and we didn't receive any key mapping
3058 * so far, we are in legacy wep mode (group key only), otherwise we are
3059 * in 1X mode.
3060 * In legacy wep mode, we use another host command to the uCode */
5425e490 3061 if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id &&
05c914fe 3062 priv->iw_mode != NL80211_IFTYPE_AP) {
6974e363
EG		 3063 if (cmd == SET_KEY)
3064 is_default_wep_key = !priv->key_mapping_key;
3065 else
ccc038ab
EG		 3066 is_default_wep_key =
3067 (key->hw_key_idx == HW_KEY_DEFAULT);
6974e363 3068 }
052c4b9f 3069
b481de9c 3070 switch (cmd) {
deb09c43 3071 case SET_KEY:
6974e363
EG		 3072 if (is_default_wep_key)
3073 ret = iwl_set_default_wep_key(priv, key);
deb09c43 3074 else
7480513f 3075 ret = iwl_set_dynamic_key(priv, key, sta_id);
deb09c43
EG		 3076
3077 IWL_DEBUG_MAC80211("enable hwcrypto key\n");
b481de9c
ZY		 3078 break;
3079 case DISABLE_KEY:
6974e363
EG		 3080 if (is_default_wep_key)
3081 ret = iwl_remove_default_wep_key(priv, key);
deb09c43 3082 else
3ec47732 3083 ret = iwl_remove_dynamic_key(priv, key, sta_id);
deb09c43
EG		 3084
3085 IWL_DEBUG_MAC80211("disable hwcrypto key\n");
b481de9c
ZY		 3086 break;
3087 default:
deb09c43 3088 ret = -EINVAL;
b481de9c
ZY		 3089 }
3090
3091 IWL_DEBUG_MAC80211("leave\n");
b481de9c 3092
deb09c43 3093 return ret;
b481de9c
ZY		 3094}
3095
5b9f8cd3 3096static int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
b481de9c
ZY		 3097 const struct ieee80211_tx_queue_params *params)
3098{
c79dd5b5 3099 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 3100 unsigned long flags;
3101 int q;
b481de9c
ZY		 3102
3103 IWL_DEBUG_MAC80211("enter\n");
3104
fee1247a 3105 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY		 3106 IWL_DEBUG_MAC80211("leave - RF not ready\n");
3107 return -EIO;
3108 }
3109
3110 if (queue >= AC_NUM) {
3111 IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
3112 return 0;
3113 }
3114
b481de9c
ZY		 3115 q = AC_NUM - 1 - queue;
3116
3117 spin_lock_irqsave(&priv->lock, flags);
3118
3119 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
3120 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
3121 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
3122 priv->qos_data.def_qos_parm.ac[q].edca_txop =
3330d7be 3123 cpu_to_le16((params->txop * 32));
b481de9c
ZY		 3124
3125 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
3126 priv->qos_data.qos_active = 1;
3127
05c914fe 3128 if (priv->iw_mode == NL80211_IFTYPE_AP)
1ff50bda 3129 iwl_activate_qos(priv, 1);
3109ece1 3130 else if (priv->assoc_id && iwl_is_associated(priv))
1ff50bda 3131 iwl_activate_qos(priv, 0);
b481de9c 3132
1ff50bda 3133 spin_unlock_irqrestore(&priv->lock, flags);
b481de9c 3134
b481de9c
ZY		 3135 IWL_DEBUG_MAC80211("leave\n");
3136 return 0;
3137}
3138
5b9f8cd3 3139static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
d783b061 3140 enum ieee80211_ampdu_mlme_action action,
17741cdc 3141 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
d783b061
TW		 3142{
3143 struct iwl_priv *priv = hw->priv;
d783b061 3144
e174961c
JB		 3145 IWL_DEBUG_HT("A-MPDU action on addr %pM tid %d\n",
3146 sta->addr, tid);
d783b061
TW		 3147
3148 if (!(priv->cfg->sku & IWL_SKU_N))
3149 return -EACCES;
3150
3151 switch (action) {
3152 case IEEE80211_AMPDU_RX_START:
3153 IWL_DEBUG_HT("start Rx\n");
9f58671e 3154 return iwl_sta_rx_agg_start(priv, sta->addr, tid, *ssn);
d783b061
TW		 3155 case IEEE80211_AMPDU_RX_STOP:
3156 IWL_DEBUG_HT("stop Rx\n");
9f58671e 3157 return iwl_sta_rx_agg_stop(priv, sta->addr, tid);
d783b061
TW		 3158 case IEEE80211_AMPDU_TX_START:
3159 IWL_DEBUG_HT("start Tx\n");
17741cdc 3160 return iwl_tx_agg_start(priv, sta->addr, tid, ssn);
d783b061
TW		 3161 case IEEE80211_AMPDU_TX_STOP:
3162 IWL_DEBUG_HT("stop Tx\n");
17741cdc 3163 return iwl_tx_agg_stop(priv, sta->addr, tid);
d783b061
TW		 3164 default:
3165 IWL_DEBUG_HT("unknown\n");
3166 return -EINVAL;
3167 break;
3168 }
3169 return 0;
3170}
9f58671e 3171
5b9f8cd3 3172static int iwl_mac_get_tx_stats(struct ieee80211_hw *hw,
b481de9c
ZY		 3173 struct ieee80211_tx_queue_stats *stats)
3174{
c79dd5b5 3175 struct iwl_priv *priv = hw->priv;
b481de9c 3176 int i, avail;
16466903 3177 struct iwl_tx_queue *txq;
443cfd45 3178 struct iwl_queue *q;
b481de9c
ZY		 3179 unsigned long flags;
3180
3181 IWL_DEBUG_MAC80211("enter\n");
3182
fee1247a 3183 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY		 3184 IWL_DEBUG_MAC80211("leave - RF not ready\n");
3185 return -EIO;
3186 }
3187
3188 spin_lock_irqsave(&priv->lock, flags);
3189
3190 for (i = 0; i < AC_NUM; i++) {
3191 txq = &priv->txq[i];
3192 q = &txq->q;
443cfd45 3193 avail = iwl_queue_space(q);
b481de9c 3194
57ffc589
JB		 3195 stats[i].len = q->n_window - avail;
3196 stats[i].limit = q->n_window - q->high_mark;
3197 stats[i].count = q->n_window;
b481de9c
ZY		 3198
3199 }
3200 spin_unlock_irqrestore(&priv->lock, flags);
3201
3202 IWL_DEBUG_MAC80211("leave\n");
3203
3204 return 0;
3205}
3206
5b9f8cd3 3207static int iwl_mac_get_stats(struct ieee80211_hw *hw,
b481de9c
ZY		 3208 struct ieee80211_low_level_stats *stats)
3209{
bf403db8
EK		 3210 struct iwl_priv *priv = hw->priv;
3211
3212 priv = hw->priv;
b481de9c
ZY		 3213 IWL_DEBUG_MAC80211("enter\n");
3214 IWL_DEBUG_MAC80211("leave\n");
3215
3216 return 0;
3217}
3218
5b9f8cd3 3219static void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
b481de9c 3220{
c79dd5b5 3221 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 3222 unsigned long flags;
3223
3224 mutex_lock(&priv->mutex);
3225 IWL_DEBUG_MAC80211("enter\n");
3226
b481de9c 3227 spin_lock_irqsave(&priv->lock, flags);
fd105e79 3228 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
b481de9c 3229 spin_unlock_irqrestore(&priv->lock, flags);
b481de9c 3230
c7de35cd 3231 iwl_reset_qos(priv);
b481de9c 3232
b481de9c
ZY		 3233 spin_lock_irqsave(&priv->lock, flags);
3234 priv->assoc_id = 0;
3235 priv->assoc_capability = 0;
b481de9c
ZY		 3236 priv->assoc_station_added = 0;
3237
3238 /* new association get rid of ibss beacon skb */
3239 if (priv->ibss_beacon)
3240 dev_kfree_skb(priv->ibss_beacon);
3241
3242 priv->ibss_beacon = NULL;
3243
3244 priv->beacon_int = priv->hw->conf.beacon_int;
3109ece1 3245 priv->timestamp = 0;
05c914fe 3246 if ((priv->iw_mode == NL80211_IFTYPE_STATION))
b481de9c
ZY		 3247 priv->beacon_int = 0;
3248
3249 spin_unlock_irqrestore(&priv->lock, flags);
3250
fee1247a 3251 if (!iwl_is_ready_rf(priv)) {
fde3571f
MA		 3252 IWL_DEBUG_MAC80211("leave - not ready\n");
3253 mutex_unlock(&priv->mutex);
3254 return;
3255 }
3256
052c4b9f 3257 /* we are restarting association process
3258 * clear RXON_FILTER_ASSOC_MSK bit
3259 */
05c914fe 3260 if (priv->iw_mode != NL80211_IFTYPE_AP) {
2a421b91 3261 iwl_scan_cancel_timeout(priv, 100);
052c4b9f 3262 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5b9f8cd3 3263 iwl_commit_rxon(priv);
052c4b9f 3264 }
3265
5da4b55f
MA		 3266 iwl_power_update_mode(priv, 0);
3267
b481de9c 3268 /* Per mac80211.h: This is only used in IBSS mode... */
05c914fe 3269 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
052c4b9f 3270
c90a74ba
EG		 3271 /* switch to CAM during association period.
3272 * the ucode will block any association/authentication
3273 * frome during assiciation period if it can not hear
3274 * the AP because of PM. the timer enable PM back is
3275 * association do not complete
3276 */
3277 if (priv->hw->conf.channel->flags & (IEEE80211_CHAN_PASSIVE_SCAN |
3278 IEEE80211_CHAN_RADAR))
3279 iwl_power_disable_management(priv, 3000);
3280
b481de9c
ZY		 3281 IWL_DEBUG_MAC80211("leave - not in IBSS\n");
3282 mutex_unlock(&priv->mutex);
3283 return;
3284 }
3285
5b9f8cd3 3286 iwl_set_rate(priv);
b481de9c
ZY		 3287
3288 mutex_unlock(&priv->mutex);
3289
3290 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY		 3291}
3292
5b9f8cd3 3293static int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
b481de9c 3294{
c79dd5b5 3295 struct iwl_priv *priv = hw->priv;
b481de9c 3296 unsigned long flags;
2ff75b78 3297 __le64 timestamp;
b481de9c 3298
b481de9c
ZY		 3299 IWL_DEBUG_MAC80211("enter\n");
3300
fee1247a 3301 if (!iwl_is_ready_rf(priv)) {
b481de9c 3302 IWL_DEBUG_MAC80211("leave - RF not ready\n");
b481de9c
ZY		 3303 return -EIO;
3304 }
3305
05c914fe 3306 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
b481de9c 3307 IWL_DEBUG_MAC80211("leave - not IBSS\n");
b481de9c
ZY		 3308 return -EIO;
3309 }
3310
3311 spin_lock_irqsave(&priv->lock, flags);
3312
3313 if (priv->ibss_beacon)
3314 dev_kfree_skb(priv->ibss_beacon);
3315
3316 priv->ibss_beacon = skb;
3317
3318 priv->assoc_id = 0;
2ff75b78 3319 timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
b94d8eea 3320 priv->timestamp = le64_to_cpu(timestamp);
b481de9c
ZY		 3321
3322 IWL_DEBUG_MAC80211("leave\n");
3323 spin_unlock_irqrestore(&priv->lock, flags);
3324
c7de35cd 3325 iwl_reset_qos(priv);
b481de9c 3326
5b9f8cd3 3327 iwl_post_associate(priv);
b481de9c 3328
b481de9c
ZY		 3329
3330 return 0;
3331}
3332
b481de9c
ZY		 3333/*****************************************************************************
3334 *
3335 * sysfs attributes
3336 *
3337 *****************************************************************************/
3338
0a6857e7 3339#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY		 3340
3341/*
3342 * The following adds a new attribute to the sysfs representation
c3a739fa 3343 * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
b481de9c
ZY		 3344 * used for controlling the debug level.
3345 *
3346 * See the level definitions in iwl for details.
3347 */
3348
8cf769c6
EK		 3349static ssize_t show_debug_level(struct device *d,
3350 struct device_attribute *attr, char *buf)
b481de9c 3351{
8cf769c6
EK		 3352 struct iwl_priv *priv = d->driver_data;
3353
3354 return sprintf(buf, "0x%08X\n", priv->debug_level);
b481de9c 3355}
8cf769c6
EK		 3356static ssize_t store_debug_level(struct device *d,
3357 struct device_attribute *attr,
b481de9c
ZY		 3358 const char *buf, size_t count)
3359{
8cf769c6 3360 struct iwl_priv *priv = d->driver_data;
9257746f
TW		 3361 unsigned long val;
3362 int ret;
b481de9c 3363
9257746f
TW		 3364 ret = strict_strtoul(buf, 0, &val);
3365 if (ret)
978785a3 3366 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
b481de9c 3367 else
8cf769c6 3368 priv->debug_level = val;
b481de9c
ZY		 3369
3370 return strnlen(buf, count);
3371}
3372
8cf769c6
EK		 3373static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
3374 show_debug_level, store_debug_level);
3375
b481de9c 3376
0a6857e7 3377#endif /* CONFIG_IWLWIFI_DEBUG */
b481de9c 3378
b481de9c 3379
bc6f59bc
TW		 3380static ssize_t show_version(struct device *d,
3381 struct device_attribute *attr, char *buf)
3382{
3383 struct iwl_priv *priv = d->driver_data;
885ba202 3384 struct iwl_alive_resp *palive = &priv->card_alive;
f236a265
TW		 3385 ssize_t pos = 0;
3386 u16 eeprom_ver;
bc6f59bc
TW		 3387
3388 if (palive->is_valid)
f236a265
TW		 3389 pos += sprintf(buf + pos,
3390 "fw version: 0x%01X.0x%01X.0x%01X.0x%01X\n"
3391 "fw type: 0x%01X 0x%01X\n",
bc6f59bc
TW		 3392 palive->ucode_major, palive->ucode_minor,
3393 palive->sw_rev[0], palive->sw_rev[1],
3394 palive->ver_type, palive->ver_subtype);
bc6f59bc 3395 else
f236a265
TW		 3396 pos += sprintf(buf + pos, "fw not loaded\n");
3397
3398 if (priv->eeprom) {
3399 eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
3400 pos += sprintf(buf + pos, "EEPROM version: 0x%x\n",
3401 eeprom_ver);
3402 } else {
3403 pos += sprintf(buf + pos, "EEPROM not initialzed\n");
3404 }
3405
3406 return pos;
bc6f59bc
TW		 3407}
3408
3409static DEVICE_ATTR(version, S_IWUSR | S_IRUGO, show_version, NULL);
3410
b481de9c
ZY		 3411static ssize_t show_temperature(struct device *d,
3412 struct device_attribute *attr, char *buf)
3413{
c79dd5b5 3414 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c 3415
fee1247a 3416 if (!iwl_is_alive(priv))
b481de9c
ZY		 3417 return -EAGAIN;
3418
91dbc5bd 3419 return sprintf(buf, "%d\n", priv->temperature);
b481de9c
ZY		 3420}
3421
3422static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
3423
b481de9c
ZY		 3424static ssize_t show_tx_power(struct device *d,
3425 struct device_attribute *attr, char *buf)
3426{
c79dd5b5 3427 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
91f39e8e
JS		 3428
3429 if (!iwl_is_ready_rf(priv))
3430 return sprintf(buf, "off\n");
3431 else
3432 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
b481de9c
ZY		 3433}
3434
3435static ssize_t store_tx_power(struct device *d,
3436 struct device_attribute *attr,
3437 const char *buf, size_t count)
3438{
c79dd5b5 3439 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
9257746f
TW		 3440 unsigned long val;
3441 int ret;
b481de9c 3442
9257746f
TW		 3443 ret = strict_strtoul(buf, 10, &val);
3444 if (ret)
978785a3 3445 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
b481de9c 3446 else
630fe9b6 3447 iwl_set_tx_power(priv, val, false);
b481de9c
ZY		 3448
3449 return count;
3450}
3451
3452static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
3453
3454static ssize_t show_flags(struct device *d,
3455 struct device_attribute *attr, char *buf)
3456{
c79dd5b5 3457 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY		 3458
3459 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
3460}
3461
3462static ssize_t store_flags(struct device *d,
3463 struct device_attribute *attr,
3464 const char *buf, size_t count)
3465{
c79dd5b5 3466 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
9257746f
TW		 3467 unsigned long val;
3468 u32 flags;
3469 int ret = strict_strtoul(buf, 0, &val);
926f0b2e 3470 if (ret)
9257746f
TW		 3471 return ret;
3472 flags = (u32)val;
b481de9c
ZY		 3473
3474 mutex_lock(&priv->mutex);
3475 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
3476 /* Cancel any currently running scans... */
2a421b91 3477 if (iwl_scan_cancel_timeout(priv, 100))
39aadf8c 3478 IWL_WARN(priv, "Could not cancel scan.\n");
b481de9c 3479 else {
9257746f 3480 IWL_DEBUG_INFO("Commit rxon.flags = 0x%04X\n", flags);
b481de9c 3481 priv->staging_rxon.flags = cpu_to_le32(flags);
5b9f8cd3 3482 iwl_commit_rxon(priv);
b481de9c
ZY		 3483 }
3484 }
3485 mutex_unlock(&priv->mutex);
3486
3487 return count;
3488}
3489
3490static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
3491
3492static ssize_t show_filter_flags(struct device *d,
3493 struct device_attribute *attr, char *buf)
3494{
c79dd5b5 3495 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY		 3496
3497 return sprintf(buf, "0x%04X\n",
3498 le32_to_cpu(priv->active_rxon.filter_flags));
3499}
3500
3501static ssize_t store_filter_flags(struct device *d,
3502 struct device_attribute *attr,
3503 const char *buf, size_t count)
3504{
c79dd5b5 3505 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
9257746f
TW		 3506 unsigned long val;
3507 u32 filter_flags;
3508 int ret = strict_strtoul(buf, 0, &val);
926f0b2e 3509 if (ret)
9257746f
TW		 3510 return ret;
3511 filter_flags = (u32)val;
b481de9c
ZY		 3512
3513 mutex_lock(&priv->mutex);
3514 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
3515 /* Cancel any currently running scans... */
2a421b91 3516 if (iwl_scan_cancel_timeout(priv, 100))
39aadf8c 3517 IWL_WARN(priv, "Could not cancel scan.\n");
b481de9c
ZY		 3518 else {
3519 IWL_DEBUG_INFO("Committing rxon.filter_flags = "
3520 "0x%04X\n", filter_flags);
3521 priv->staging_rxon.filter_flags =
3522 cpu_to_le32(filter_flags);
5b9f8cd3 3523 iwl_commit_rxon(priv);
b481de9c
ZY		 3524 }
3525 }
3526 mutex_unlock(&priv->mutex);
3527
3528 return count;
3529}
3530
3531static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
3532 store_filter_flags);
3533
b481de9c
ZY		 3534static ssize_t store_power_level(struct device *d,
3535 struct device_attribute *attr,
3536 const char *buf, size_t count)
3537{
c79dd5b5 3538 struct iwl_priv *priv = dev_get_drvdata(d);
298df1f6 3539 int ret;
9257746f
TW		 3540 unsigned long mode;
3541
b481de9c 3542
b481de9c
ZY		 3543 mutex_lock(&priv->mutex);
3544
fee1247a 3545 if (!iwl_is_ready(priv)) {
298df1f6 3546 ret = -EAGAIN;
b481de9c
ZY		 3547 goto out;
3548 }
3549
9257746f 3550 ret = strict_strtoul(buf, 10, &mode);
926f0b2e 3551 if (ret)
9257746f
TW		 3552 goto out;
3553
298df1f6
EK		 3554 ret = iwl_power_set_user_mode(priv, mode);
3555 if (ret) {
5da4b55f
MA		 3556 IWL_DEBUG_MAC80211("failed setting power mode.\n");
3557 goto out;
b481de9c 3558 }
298df1f6 3559 ret = count;
b481de9c
ZY		 3560
3561 out:
3562 mutex_unlock(&priv->mutex);
298df1f6 3563 return ret;
b481de9c
ZY		 3564}
3565
b481de9c
ZY		 3566static ssize_t show_power_level(struct device *d,
3567 struct device_attribute *attr, char *buf)
3568{
c79dd5b5 3569 struct iwl_priv *priv = dev_get_drvdata(d);
298df1f6
EK		 3570 int mode = priv->power_data.user_power_setting;
3571 int system = priv->power_data.system_power_setting;
5da4b55f 3572 int level = priv->power_data.power_mode;
b481de9c
ZY		 3573 char *p = buf;
3574
298df1f6
EK		 3575 switch (system) {
3576 case IWL_POWER_SYS_AUTO:
3577 p += sprintf(p, "SYSTEM:auto");
b481de9c 3578 break;
298df1f6
EK		 3579 case IWL_POWER_SYS_AC:
3580 p += sprintf(p, "SYSTEM:ac");
3581 break;
3582 case IWL_POWER_SYS_BATTERY:
3583 p += sprintf(p, "SYSTEM:battery");
b481de9c 3584 break;
b481de9c 3585 }
298df1f6 3586
c3056065
AK		 3587 p += sprintf(p, "\tMODE:%s", (mode < IWL_POWER_AUTO) ?
3588 "fixed" : "auto");
298df1f6
EK		 3589 p += sprintf(p, "\tINDEX:%d", level);
3590 p += sprintf(p, "\n");
3ac7f146 3591 return p - buf + 1;
b481de9c
ZY		 3592}
3593
3594static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
3595 store_power_level);
3596
b481de9c
ZY		 3597
3598static ssize_t show_statistics(struct device *d,
3599 struct device_attribute *attr, char *buf)
3600{
c79dd5b5 3601 struct iwl_priv *priv = dev_get_drvdata(d);
8f91aecb 3602 u32 size = sizeof(struct iwl_notif_statistics);
b481de9c 3603 u32 len = 0, ofs = 0;
3ac7f146 3604 u8 *data = (u8 *)&priv->statistics;
b481de9c
ZY		 3605 int rc = 0;
3606
fee1247a 3607 if (!iwl_is_alive(priv))
b481de9c
ZY		 3608 return -EAGAIN;
3609
3610 mutex_lock(&priv->mutex);
49ea8596 3611 rc = iwl_send_statistics_request(priv, 0);
b481de9c
ZY		 3612 mutex_unlock(&priv->mutex);
3613
3614 if (rc) {
3615 len = sprintf(buf,
3616 "Error sending statistics request: 0x%08X\n", rc);
3617 return len;
3618 }
3619
3620 while (size && (PAGE_SIZE - len)) {
3621 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
3622 PAGE_SIZE - len, 1);
3623 len = strlen(buf);
3624 if (PAGE_SIZE - len)
3625 buf[len++] = '\n';
3626
3627 ofs += 16;
3628 size -= min(size, 16U);
3629 }
3630
3631 return len;
3632}
3633
3634static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
3635
b481de9c 3636
b481de9c
ZY		 3637/*****************************************************************************
3638 *
3639 * driver setup and teardown
3640 *
3641 *****************************************************************************/
3642
4e39317d 3643static void iwl_setup_deferred_work(struct iwl_priv *priv)
b481de9c
ZY		 3644{
3645 priv->workqueue = create_workqueue(DRV_NAME);
3646
3647 init_waitqueue_head(&priv->wait_command_queue);
3648
5b9f8cd3
EG		 3649 INIT_WORK(&priv->up, iwl_bg_up);
3650 INIT_WORK(&priv->restart, iwl_bg_restart);
3651 INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
3652 INIT_WORK(&priv->rf_kill, iwl_bg_rf_kill);
3653 INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
16e727e8 3654 INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
4a4a9e81
TW		 3655 INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
3656 INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
2a421b91 3657
2a421b91 3658 iwl_setup_scan_deferred_work(priv);
c90a74ba 3659 iwl_setup_power_deferred_work(priv);
bb8c093b 3660
4e39317d
EG		 3661 if (priv->cfg->ops->lib->setup_deferred_work)
3662 priv->cfg->ops->lib->setup_deferred_work(priv);
3663
3664 init_timer(&priv->statistics_periodic);
3665 priv->statistics_periodic.data = (unsigned long)priv;
5b9f8cd3 3666 priv->statistics_periodic.function = iwl_bg_statistics_periodic;
b481de9c
ZY		 3667
3668 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
5b9f8cd3 3669 iwl_irq_tasklet, (unsigned long)priv);
b481de9c
ZY		 3670}
3671
4e39317d 3672static void iwl_cancel_deferred_work(struct iwl_priv *priv)
b481de9c 3673{
4e39317d
EG		 3674 if (priv->cfg->ops->lib->cancel_deferred_work)
3675 priv->cfg->ops->lib->cancel_deferred_work(priv);
b481de9c 3676
3ae6a054 3677 cancel_delayed_work_sync(&priv->init_alive_start);
b481de9c 3678 cancel_delayed_work(&priv->scan_check);
c90a74ba 3679 cancel_delayed_work_sync(&priv->set_power_save);
b481de9c 3680 cancel_delayed_work(&priv->alive_start);
b481de9c 3681 cancel_work_sync(&priv->beacon_update);
4e39317d 3682 del_timer_sync(&priv->statistics_periodic);
b481de9c
ZY		 3683}
3684
5b9f8cd3 3685static struct attribute *iwl_sysfs_entries[] = {
b481de9c
ZY		 3686 &dev_attr_flags.attr,
3687 &dev_attr_filter_flags.attr,
b481de9c 3688 &dev_attr_power_level.attr,
b481de9c 3689 &dev_attr_statistics.attr,
b481de9c 3690 &dev_attr_temperature.attr,
b481de9c 3691 &dev_attr_tx_power.attr,
8cf769c6
EK		 3692#ifdef CONFIG_IWLWIFI_DEBUG
3693 &dev_attr_debug_level.attr,
3694#endif
bc6f59bc 3695 &dev_attr_version.attr,
b481de9c
ZY		 3696
3697 NULL
3698};
3699
5b9f8cd3 3700static struct attribute_group iwl_attribute_group = {
b481de9c 3701 .name = NULL, /* put in device directory */
5b9f8cd3 3702 .attrs = iwl_sysfs_entries,
b481de9c
ZY		 3703};
3704
5b9f8cd3
EG		 3705static struct ieee80211_ops iwl_hw_ops = {
3706 .tx = iwl_mac_tx,
3707 .start = iwl_mac_start,
3708 .stop = iwl_mac_stop,
3709 .add_interface = iwl_mac_add_interface,
3710 .remove_interface = iwl_mac_remove_interface,
3711 .config = iwl_mac_config,
3712 .config_interface = iwl_mac_config_interface,
3713 .configure_filter = iwl_configure_filter,
3714 .set_key = iwl_mac_set_key,
3715 .update_tkip_key = iwl_mac_update_tkip_key,
3716 .get_stats = iwl_mac_get_stats,
3717 .get_tx_stats = iwl_mac_get_tx_stats,
3718 .conf_tx = iwl_mac_conf_tx,
3719 .reset_tsf = iwl_mac_reset_tsf,
3720 .bss_info_changed = iwl_bss_info_changed,
3721 .ampdu_action = iwl_mac_ampdu_action,
cb43dc25 3722 .hw_scan = iwl_mac_hw_scan
b481de9c
ZY		 3723};
3724
5b9f8cd3 3725static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
b481de9c
ZY		 3726{
3727 int err = 0;
c79dd5b5 3728 struct iwl_priv *priv;
b481de9c 3729 struct ieee80211_hw *hw;
82b9a121 3730 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
0359facc 3731 unsigned long flags;
b481de9c 3732
316c30d9
AK		 3733 /************************
3734 * 1. Allocating HW data
3735 ************************/
3736
6440adb5
BC		 3737 /* Disabling hardware scan means that mac80211 will perform scans
3738 * "the hard way", rather than using device's scan. */
1ea87396 3739 if (cfg->mod_params->disable_hw_scan) {
bf403db8
EK		 3740 if (cfg->mod_params->debug & IWL_DL_INFO)
3741 dev_printk(KERN_DEBUG, &(pdev->dev),
3742 "Disabling hw_scan\n");
5b9f8cd3 3743 iwl_hw_ops.hw_scan = NULL;
b481de9c
ZY		 3744 }
3745
5b9f8cd3 3746 hw = iwl_alloc_all(cfg, &iwl_hw_ops);
1d0a082d 3747 if (!hw) {
b481de9c
ZY		 3748 err = -ENOMEM;
3749 goto out;
3750 }
1d0a082d
AK		 3751 priv = hw->priv;
3752 /* At this point both hw and priv are allocated. */
3753
b481de9c
ZY		 3754 SET_IEEE80211_DEV(hw, &pdev->dev);
3755
3756 IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
82b9a121 3757 priv->cfg = cfg;
b481de9c 3758 priv->pci_dev = pdev;
316c30d9 3759
0a6857e7 3760#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 3761 priv->debug_level = priv->cfg->mod_params->debug;
b481de9c
ZY		 3762 atomic_set(&priv->restrict_refcnt, 0);
3763#endif
b481de9c 3764
316c30d9
AK		 3765 /**************************
3766 * 2. Initializing PCI bus
3767 **************************/
3768 if (pci_enable_device(pdev)) {
3769 err = -ENODEV;
3770 goto out_ieee80211_free_hw;
3771 }
3772
3773 pci_set_master(pdev);
3774
093d874c 3775 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
316c30d9 3776 if (!err)
093d874c 3777 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
cc2a8ea8 3778 if (err) {
093d874c 3779 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
cc2a8ea8 3780 if (!err)
093d874c 3781 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
cc2a8ea8 3782 /* both attempts failed: */
316c30d9 3783 if (err) {
978785a3 3784 IWL_WARN(priv, "No suitable DMA available.\n");
316c30d9 3785 goto out_pci_disable_device;
cc2a8ea8 3786 }
316c30d9
AK		 3787 }
3788
3789 err = pci_request_regions(pdev, DRV_NAME);
3790 if (err)
3791 goto out_pci_disable_device;
3792
3793 pci_set_drvdata(pdev, priv);
3794
316c30d9
AK		 3795
3796 /***********************
3797 * 3. Read REV register
3798 ***********************/
3799 priv->hw_base = pci_iomap(pdev, 0, 0);
3800 if (!priv->hw_base) {
3801 err = -ENODEV;
3802 goto out_pci_release_regions;
3803 }
3804
3805 IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
3806 (unsigned long long) pci_resource_len(pdev, 0));
3807 IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
3808
b661c819 3809 iwl_hw_detect(priv);
978785a3 3810 IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s REV=0x%X\n",
b661c819 3811 priv->cfg->name, priv->hw_rev);
316c30d9 3812
e7b63581
TW		 3813 /* We disable the RETRY_TIMEOUT register (0x41) to keep
3814 * PCI Tx retries from interfering with C3 CPU state */
3815 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
3816
91238714
TW		 3817 /* amp init */
3818 err = priv->cfg->ops->lib->apm_ops.init(priv);
316c30d9 3819 if (err < 0) {
91238714 3820 IWL_DEBUG_INFO("Failed to init APMG\n");
316c30d9
AK		 3821 goto out_iounmap;
3822 }
91238714
TW		 3823 /*****************
3824 * 4. Read EEPROM
3825 *****************/
316c30d9
AK		 3826 /* Read the EEPROM */
3827 err = iwl_eeprom_init(priv);
3828 if (err) {
15b1687c 3829 IWL_ERR(priv, "Unable to init EEPROM\n");
316c30d9
AK		 3830 goto out_iounmap;
3831 }
8614f360
TW		 3832 err = iwl_eeprom_check_version(priv);
3833 if (err)
3834 goto out_iounmap;
3835
02883017 3836 /* extract MAC Address */
316c30d9 3837 iwl_eeprom_get_mac(priv, priv->mac_addr);
e174961c 3838 IWL_DEBUG_INFO("MAC address: %pM\n", priv->mac_addr);
316c30d9
AK		 3839 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
3840
3841 /************************
3842 * 5. Setup HW constants
3843 ************************/
da154e30 3844 if (iwl_set_hw_params(priv)) {
15b1687c 3845 IWL_ERR(priv, "failed to set hw parameters\n");
073d3f5f 3846 goto out_free_eeprom;
316c30d9
AK		 3847 }
3848
3849 /*******************
6ba87956 3850 * 6. Setup priv
316c30d9 3851 *******************/
b481de9c 3852
6ba87956 3853 err = iwl_init_drv(priv);
bf85ea4f 3854 if (err)
399f4900 3855 goto out_free_eeprom;
bf85ea4f 3856 /* At this point both hw and priv are initialized. */
316c30d9
AK		 3857
3858 /**********************************
3859 * 7. Initialize module parameters
3860 **********************************/
3861
3862 /* Disable radio (SW RF KILL) via parameter when loading driver */
1ea87396 3863 if (priv->cfg->mod_params->disable) {
316c30d9
AK		 3864 set_bit(STATUS_RF_KILL_SW, &priv->status);
3865 IWL_DEBUG_INFO("Radio disabled.\n");
3866 }
3867
316c30d9
AK		 3868 /********************
3869 * 8. Setup services
3870 ********************/
0359facc 3871 spin_lock_irqsave(&priv->lock, flags);
5b9f8cd3 3872 iwl_disable_interrupts(priv);
0359facc 3873 spin_unlock_irqrestore(&priv->lock, flags);
316c30d9 3874
5b9f8cd3 3875 err = sysfs_create_group(&pdev->dev.kobj, &iwl_attribute_group);
316c30d9 3876 if (err) {
15b1687c 3877 IWL_ERR(priv, "failed to create sysfs device attributes\n");
6ba87956 3878 goto out_uninit_drv;
316c30d9
AK		 3879 }
3880
316c30d9 3881
4e39317d 3882 iwl_setup_deferred_work(priv);
653fa4a0 3883 iwl_setup_rx_handlers(priv);
316c30d9
AK		 3884
3885 /********************
3886 * 9. Conclude
3887 ********************/
5a66926a
ZY		 3888 pci_save_state(pdev);
3889 pci_disable_device(pdev);
b481de9c 3890
6ba87956
TW		 3891 /**********************************
3892 * 10. Setup and register mac80211
3893 **********************************/
3894
3895 err = iwl_setup_mac(priv);
3896 if (err)
3897 goto out_remove_sysfs;
3898
3899 err = iwl_dbgfs_register(priv, DRV_NAME);
3900 if (err)
15b1687c 3901 IWL_ERR(priv, "failed to create debugfs files\n");
6ba87956 3902
58d0f361
EG		 3903 err = iwl_rfkill_init(priv);
3904 if (err)
15b1687c 3905 IWL_ERR(priv, "Unable to initialize RFKILL system. "
58d0f361
EG		 3906 "Ignoring error: %d\n", err);
3907 iwl_power_initialize(priv);
b481de9c
ZY		 3908 return 0;
3909
316c30d9 3910 out_remove_sysfs:
5b9f8cd3 3911 sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
6ba87956
TW		 3912 out_uninit_drv:
3913 iwl_uninit_drv(priv);
073d3f5f
TW		 3914 out_free_eeprom:
3915 iwl_eeprom_free(priv);
b481de9c
ZY		 3916 out_iounmap:
3917 pci_iounmap(pdev, priv->hw_base);
3918 out_pci_release_regions:
3919 pci_release_regions(pdev);
316c30d9 3920 pci_set_drvdata(pdev, NULL);
b481de9c
ZY		 3921 out_pci_disable_device:
3922 pci_disable_device(pdev);
b481de9c
ZY		 3923 out_ieee80211_free_hw:
3924 ieee80211_free_hw(priv->hw);
3925 out:
3926 return err;
3927}
3928
5b9f8cd3 3929static void __devexit iwl_pci_remove(struct pci_dev *pdev)
b481de9c 3930{
c79dd5b5 3931 struct iwl_priv *priv = pci_get_drvdata(pdev);
0359facc 3932 unsigned long flags;
b481de9c
ZY		 3933
3934 if (!priv)
3935 return;
3936
3937 IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
3938
67249625 3939 iwl_dbgfs_unregister(priv);
5b9f8cd3 3940 sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
67249625 3941
5b9f8cd3
EG		 3942 /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
3943 * to be called and iwl_down since we are removing the device
0b124c31
GG		 3944 * we need to set STATUS_EXIT_PENDING bit.
3945 */
3946 set_bit(STATUS_EXIT_PENDING, &priv->status);
c4f55232
RR		 3947 if (priv->mac80211_registered) {
3948 ieee80211_unregister_hw(priv->hw);
3949 priv->mac80211_registered = 0;
0b124c31 3950 } else {
5b9f8cd3 3951 iwl_down(priv);
c4f55232
RR		 3952 }
3953
0359facc
MA		 3954 /* make sure we flush any pending irq or
3955 * tasklet for the driver
3956 */
3957 spin_lock_irqsave(&priv->lock, flags);
5b9f8cd3 3958 iwl_disable_interrupts(priv);
0359facc
MA		 3959 spin_unlock_irqrestore(&priv->lock, flags);
3960
3961 iwl_synchronize_irq(priv);
3962
58d0f361 3963 iwl_rfkill_unregister(priv);
5b9f8cd3 3964 iwl_dealloc_ucode_pci(priv);
b481de9c
ZY		 3965
3966 if (priv->rxq.bd)
a55360e4 3967 iwl_rx_queue_free(priv, &priv->rxq);
1053d35f 3968 iwl_hw_txq_ctx_free(priv);
b481de9c 3969
37deb2a0 3970 iwl_clear_stations_table(priv);
073d3f5f 3971 iwl_eeprom_free(priv);
b481de9c 3972
b481de9c 3973
948c171c
MA		 3974 /*netif_stop_queue(dev); */
3975 flush_workqueue(priv->workqueue);
3976
5b9f8cd3 3977 /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
b481de9c
ZY		 3978 * priv->workqueue... so we can't take down the workqueue
3979 * until now... */
3980 destroy_workqueue(priv->workqueue);
3981 priv->workqueue = NULL;
3982
b481de9c
ZY		 3983 pci_iounmap(pdev, priv->hw_base);
3984 pci_release_regions(pdev);
3985 pci_disable_device(pdev);
3986 pci_set_drvdata(pdev, NULL);
3987
6ba87956 3988 iwl_uninit_drv(priv);
b481de9c
ZY		 3989
3990 if (priv->ibss_beacon)
3991 dev_kfree_skb(priv->ibss_beacon);
3992
3993 ieee80211_free_hw(priv->hw);
3994}
3995
3996#ifdef CONFIG_PM
3997
5b9f8cd3 3998static int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
b481de9c 3999{
c79dd5b5 4000 struct iwl_priv *priv = pci_get_drvdata(pdev);
b481de9c 4001
e655b9f0
ZY		 4002 if (priv->is_open) {
4003 set_bit(STATUS_IN_SUSPEND, &priv->status);
5b9f8cd3 4004 iwl_mac_stop(priv->hw);
e655b9f0
ZY		 4005 priv->is_open = 1;
4006 }
b481de9c 4007
b481de9c
ZY		 4008 pci_set_power_state(pdev, PCI_D3hot);
4009
b481de9c
ZY		 4010 return 0;
4011}
4012
5b9f8cd3 4013static int iwl_pci_resume(struct pci_dev *pdev)
b481de9c 4014{
c79dd5b5 4015 struct iwl_priv *priv = pci_get_drvdata(pdev);
b481de9c 4016
b481de9c 4017 pci_set_power_state(pdev, PCI_D0);
b481de9c 4018
e655b9f0 4019 if (priv->is_open)
5b9f8cd3 4020 iwl_mac_start(priv->hw);
b481de9c 4021
e655b9f0 4022 clear_bit(STATUS_IN_SUSPEND, &priv->status);
b481de9c
ZY		 4023 return 0;
4024}
4025
4026#endif /* CONFIG_PM */
4027
4028/*****************************************************************************
4029 *
4030 * driver and module entry point
4031 *
4032 *****************************************************************************/
4033
fed9017e
RR		 4034/* Hardware specific file defines the PCI IDs table for that hardware module */
4035static struct pci_device_id iwl_hw_card_ids[] = {
4fc22b21 4036#ifdef CONFIG_IWL4965
fed9017e
RR		 4037 {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
4038 {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
4fc22b21 4039#endif /* CONFIG_IWL4965 */
5a6a256e 4040#ifdef CONFIG_IWL5000
47408639
EK		 4041 {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bg_cfg)},
4042 {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bg_cfg)},
4043 {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)},
4044 {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)},
4045 {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)},
4046 {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)},
5a6a256e 4047 {IWL_PCI_DEVICE(0x4232, PCI_ANY_ID, iwl5100_agn_cfg)},
47408639
EK		 4048 {IWL_PCI_DEVICE(0x4235, PCI_ANY_ID, iwl5300_agn_cfg)},
4049 {IWL_PCI_DEVICE(0x4236, PCI_ANY_ID, iwl5300_agn_cfg)},
4050 {IWL_PCI_DEVICE(0x4237, PCI_ANY_ID, iwl5100_agn_cfg)},
e96a8495
TW		 4051/* 5350 WiFi/WiMax */
4052 {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)},
4053 {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)},
4054 {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)},
7100e924
TW		 4055/* 5150 Wifi/WiMax */
4056 {IWL_PCI_DEVICE(0x423C, PCI_ANY_ID, iwl5150_agn_cfg)},
4057 {IWL_PCI_DEVICE(0x423D, PCI_ANY_ID, iwl5150_agn_cfg)},
5a6a256e 4058#endif /* CONFIG_IWL5000 */
7100e924 4059
fed9017e
RR		 4060 {0}
4061};
4062MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
4063
4064static struct pci_driver iwl_driver = {
b481de9c 4065 .name = DRV_NAME,
fed9017e 4066 .id_table = iwl_hw_card_ids,
5b9f8cd3
EG		 4067 .probe = iwl_pci_probe,
4068 .remove = __devexit_p(iwl_pci_remove),
b481de9c 4069#ifdef CONFIG_PM
5b9f8cd3
EG		 4070 .suspend = iwl_pci_suspend,
4071 .resume = iwl_pci_resume,
b481de9c
ZY		 4072#endif
4073};
4074
5b9f8cd3 4075static int __init iwl_init(void)
b481de9c
ZY		 4076{
4077
4078 int ret;
4079 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
4080 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
897e1cf2 4081
e227ceac 4082 ret = iwlagn_rate_control_register();
897e1cf2 4083 if (ret) {
a3139c59
SO		 4084 printk(KERN_ERR DRV_NAME
4085 "Unable to register rate control algorithm: %d\n", ret);
897e1cf2
RC		 4086 return ret;
4087 }
4088
fed9017e 4089 ret = pci_register_driver(&iwl_driver);
b481de9c 4090 if (ret) {
a3139c59 4091 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
897e1cf2 4092 goto error_register;
b481de9c 4093 }
b481de9c
ZY		 4094
4095 return ret;
897e1cf2 4096
897e1cf2 4097error_register:
e227ceac 4098 iwlagn_rate_control_unregister();
897e1cf2 4099 return ret;
b481de9c
ZY		 4100}
4101
5b9f8cd3 4102static void __exit iwl_exit(void)
b481de9c 4103{
fed9017e 4104 pci_unregister_driver(&iwl_driver);
e227ceac 4105 iwlagn_rate_control_unregister();
b481de9c
ZY		 4106}
4107
5b9f8cd3
EG		 4108module_exit(iwl_exit);
4109module_init(iwl_init);
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