[linux.git] / sound / oss / msnd_pinnacle.h

/*********************************************************************
 *
 * msnd_pinnacle.h
 *
 * Turtle Beach MultiSound Sound Card Driver for Linux
 *
 * Some parts of this header file were derived from the Turtle Beach
 * MultiSound Driver Development Kit.
 *
 * Copyright (C) 1998 Andrew Veliath
 * Copyright (C) 1993 Turtle Beach Systems, Inc.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 *
 * $Id: msnd_pinnacle.h,v 1.11 1999/03/21 17:36:09 andrewtv Exp $
 *
 ********************************************************************/
#ifndef __MSND_PINNACLE_H
#define __MSND_PINNACLE_H


#define DSP_NUMIO				0x08

#define IREG_LOGDEVICE				0x07
#define IREG_ACTIVATE				0x30
#define LD_ACTIVATE				0x01
#define LD_DISACTIVATE				0x00
#define IREG_EECONTROL				0x3F
#define IREG_MEMBASEHI				0x40
#define IREG_MEMBASELO				0x41
#define IREG_MEMCONTROL				0x42
#define IREG_MEMRANGEHI				0x43
#define IREG_MEMRANGELO				0x44
#define MEMTYPE_8BIT				0x00
#define MEMTYPE_16BIT				0x02
#define MEMTYPE_RANGE				0x00
#define MEMTYPE_HIADDR				0x01
#define IREG_IO0_BASEHI				0x60
#define IREG_IO0_BASELO				0x61
#define IREG_IO1_BASEHI				0x62
#define IREG_IO1_BASELO				0x63
#define IREG_IRQ_NUMBER				0x70
#define IREG_IRQ_TYPE				0x71
#define IRQTYPE_HIGH				0x02
#define IRQTYPE_LOW				0x00
#define IRQTYPE_LEVEL				0x01
#define IRQTYPE_EDGE				0x00

#define	HP_DSPR					0x04
#define	HP_BLKS					0x04

#define HPDSPRESET_OFF				2
#define HPDSPRESET_ON				0

#define HPBLKSEL_0				2
#define HPBLKSEL_1				3

#define	HIMT_DAT_OFF				0x03

#define	HIDSP_PLAY_UNDER			0x00
#define	HIDSP_INT_PLAY_UNDER			0x01
#define	HIDSP_SSI_TX_UNDER  			0x02
#define HIDSP_RECQ_OVERFLOW			0x08
#define HIDSP_INT_RECORD_OVER			0x09
#define HIDSP_SSI_RX_OVERFLOW			0x0a

#define	HIDSP_MIDI_IN_OVER			0x10

#define	HIDSP_MIDI_FRAME_ERR			0x11
#define	HIDSP_MIDI_PARITY_ERR			0x12
#define	HIDSP_MIDI_OVERRUN_ERR			0x13

#define HIDSP_INPUT_CLIPPING			0x20
#define	HIDSP_MIX_CLIPPING			0x30
#define HIDSP_DAT_IN_OFF			0x21

#define	HDEXAR_SET_ANA_IN			0
#define	HDEXAR_CLEAR_PEAKS			1
#define	HDEXAR_IN_SET_POTS			2
#define	HDEXAR_AUX_SET_POTS			3
#define	HDEXAR_CAL_A_TO_D			4
#define	HDEXAR_RD_EXT_DSP_BITS			5

#define	HDEXAR_SET_SYNTH_IN			4
#define	HDEXAR_READ_DAT_IN			5
#define	HDEXAR_MIC_SET_POTS			6
#define	HDEXAR_SET_DAT_IN			7

#define HDEXAR_SET_SYNTH_48			8
#define HDEXAR_SET_SYNTH_44			9

#define TIME_PRO_RESET_DONE			0x028A
#define TIME_PRO_SYSEX				0x001E
#define TIME_PRO_RESET				0x0032

#define AGND					0x01
#define SIGNAL					0x02

#define EXT_DSP_BIT_DCAL			0x0001
#define EXT_DSP_BIT_MIDI_CON			0x0002

#define BUFFSIZE				0x8000
#define HOSTQ_SIZE				0x40

#define SRAM_CNTL_START				0x7F00
#define SMA_STRUCT_START			0x7F40

#define DAP_BUFF_SIZE				0x2400
#define DAR_BUFF_SIZE				0x2000

#define DAPQ_STRUCT_SIZE			0x10
#define DARQ_STRUCT_SIZE			0x10
#define DAPQ_BUFF_SIZE				(3 * 0x10)
#define DARQ_BUFF_SIZE				(3 * 0x10)
#define MODQ_BUFF_SIZE				0x400
#define MIDQ_BUFF_SIZE				0x800
#define DSPQ_BUFF_SIZE				0x5A0

#define DAPQ_DATA_BUFF				0x6C00
#define DARQ_DATA_BUFF				0x6C30
#define MODQ_DATA_BUFF				0x6C60
#define MIDQ_DATA_BUFF				0x7060
#define DSPQ_DATA_BUFF				0x7860

#define DAPQ_OFFSET				SRAM_CNTL_START
#define DARQ_OFFSET				(SRAM_CNTL_START + 0x08)
#define MODQ_OFFSET				(SRAM_CNTL_START + 0x10)
#define MIDQ_OFFSET				(SRAM_CNTL_START + 0x18)
#define DSPQ_OFFSET				(SRAM_CNTL_START + 0x20)

#define MOP_WAVEHDR				0
#define MOP_EXTOUT				1
#define MOP_HWINIT				0xfe
#define MOP_NONE				0xff
#define MOP_MAX					1

#define MIP_EXTIN				0
#define MIP_WAVEHDR				1
#define MIP_HWINIT				0xfe
#define MIP_MAX					1

/* Pinnacle/Fiji SMA Common Data */
#define SMA_wCurrPlayBytes			0x0000
#define SMA_wCurrRecordBytes			0x0002
#define SMA_wCurrPlayVolLeft			0x0004
#define SMA_wCurrPlayVolRight			0x0006
#define SMA_wCurrInVolLeft			0x0008
#define SMA_wCurrInVolRight			0x000a
#define SMA_wCurrMHdrVolLeft			0x000c
#define SMA_wCurrMHdrVolRight			0x000e
#define SMA_dwCurrPlayPitch			0x0010
#define SMA_dwCurrPlayRate			0x0014
#define SMA_wCurrMIDIIOPatch			0x0018
#define SMA_wCurrPlayFormat			0x001a
#define SMA_wCurrPlaySampleSize			0x001c
#define SMA_wCurrPlayChannels			0x001e
#define SMA_wCurrPlaySampleRate			0x0020
#define SMA_wCurrRecordFormat			0x0022
#define SMA_wCurrRecordSampleSize		0x0024
#define SMA_wCurrRecordChannels			0x0026
#define SMA_wCurrRecordSampleRate		0x0028
#define SMA_wCurrDSPStatusFlags			0x002a
#define SMA_wCurrHostStatusFlags		0x002c
#define SMA_wCurrInputTagBits			0x002e
#define SMA_wCurrLeftPeak			0x0030
#define SMA_wCurrRightPeak			0x0032
#define SMA_bMicPotPosLeft			0x0034
#define SMA_bMicPotPosRight			0x0035
#define SMA_bMicPotMaxLeft			0x0036
#define SMA_bMicPotMaxRight			0x0037
#define SMA_bInPotPosLeft			0x0038
#define SMA_bInPotPosRight			0x0039
#define SMA_bAuxPotPosLeft			0x003a
#define SMA_bAuxPotPosRight			0x003b
#define SMA_bInPotMaxLeft			0x003c
#define SMA_bInPotMaxRight			0x003d
#define SMA_bAuxPotMaxLeft			0x003e
#define SMA_bAuxPotMaxRight			0x003f
#define SMA_bInPotMaxMethod			0x0040
#define SMA_bAuxPotMaxMethod			0x0041
#define SMA_wCurrMastVolLeft			0x0042
#define SMA_wCurrMastVolRight			0x0044
#define SMA_wCalFreqAtoD			0x0046
#define SMA_wCurrAuxVolLeft			0x0048
#define SMA_wCurrAuxVolRight			0x004a
#define SMA_wCurrPlay1VolLeft			0x004c
#define SMA_wCurrPlay1VolRight			0x004e
#define SMA_wCurrPlay2VolLeft			0x0050
#define SMA_wCurrPlay2VolRight			0x0052
#define SMA_wCurrPlay3VolLeft			0x0054
#define SMA_wCurrPlay3VolRight			0x0056
#define SMA_wCurrPlay4VolLeft			0x0058
#define SMA_wCurrPlay4VolRight			0x005a
#define SMA_wCurrPlay1PeakLeft			0x005c
#define SMA_wCurrPlay1PeakRight			0x005e
#define SMA_wCurrPlay2PeakLeft			0x0060
#define SMA_wCurrPlay2PeakRight			0x0062
#define SMA_wCurrPlay3PeakLeft			0x0064
#define SMA_wCurrPlay3PeakRight			0x0066
#define SMA_wCurrPlay4PeakLeft			0x0068
#define SMA_wCurrPlay4PeakRight			0x006a
#define SMA_wCurrPlayPeakLeft			0x006c
#define SMA_wCurrPlayPeakRight			0x006e
#define SMA_wCurrDATSR				0x0070
#define SMA_wCurrDATRXCHNL			0x0072
#define SMA_wCurrDATTXCHNL			0x0074
#define SMA_wCurrDATRXRate			0x0076
#define SMA_dwDSPPlayCount			0x0078
#define SMA__size				0x007c

#ifdef HAVE_DSPCODEH
#  include "pndsperm.c"
#  include "pndspini.c"
#  define PERMCODE		pndsperm
#  define INITCODE		pndspini
#  define PERMCODESIZE		sizeof(pndsperm)
#  define INITCODESIZE		sizeof(pndspini)
#else
#  ifndef CONFIG_MSNDPIN_INIT_FILE
#    define CONFIG_MSNDPIN_INIT_FILE				\
				"/etc/sound/pndspini.bin"
#  endif
#  ifndef CONFIG_MSNDPIN_PERM_FILE
#    define CONFIG_MSNDPIN_PERM_FILE				\
				"/etc/sound/pndsperm.bin"
#  endif
#  define PERMCODEFILE		CONFIG_MSNDPIN_PERM_FILE
#  define INITCODEFILE		CONFIG_MSNDPIN_INIT_FILE
#  define PERMCODE		dspini
#  define INITCODE		permini
#  define PERMCODESIZE		sizeof_dspini
#  define INITCODESIZE		sizeof_permini
#endif
#define LONGNAME		"MultiSound (Pinnacle/Fiji)"

#endif /* __MSND_PINNACLE_H */
Commit	Line	Data
1da177e4 LT	1	/*********************************************************************
	2	*
	3	* msnd_pinnacle.h
	4	*
	5	* Turtle Beach MultiSound Sound Card Driver for Linux
	6	*
	7	* Some parts of this header file were derived from the Turtle Beach
	8	* MultiSound Driver Development Kit.
	9	*
	10	* Copyright (C) 1998 Andrew Veliath
	11	* Copyright (C) 1993 Turtle Beach Systems, Inc.
	12	*
	13	* This program is free software; you can redistribute it and/or modify
	14	* it under the terms of the GNU General Public License as published by
	15	* the Free Software Foundation; either version 2 of the License, or
	16	* (at your option) any later version.
	17	*
	18	* This program is distributed in the hope that it will be useful,
	19	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	20	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	21	* GNU General Public License for more details.
	22	*
	23	* You should have received a copy of the GNU General Public License
	24	* along with this program; if not, write to the Free Software
	25	* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
	26	*
	27	* $Id: msnd_pinnacle.h,v 1.11 1999/03/21 17:36:09 andrewtv Exp $
	28	*
	29	********************************************************************/
	30	#ifndef __MSND_PINNACLE_H
	31	#define __MSND_PINNACLE_H
	32
1da177e4 LT	33
	34	#define DSP_NUMIO 0x08
	35
	36	#define IREG_LOGDEVICE 0x07
	37	#define IREG_ACTIVATE 0x30
	38	#define LD_ACTIVATE 0x01
	39	#define LD_DISACTIVATE 0x00
	40	#define IREG_EECONTROL 0x3F
	41	#define IREG_MEMBASEHI 0x40
	42	#define IREG_MEMBASELO 0x41
	43	#define IREG_MEMCONTROL 0x42
	44	#define IREG_MEMRANGEHI 0x43
	45	#define IREG_MEMRANGELO 0x44
	46	#define MEMTYPE_8BIT 0x00
	47	#define MEMTYPE_16BIT 0x02
	48	#define MEMTYPE_RANGE 0x00
	49	#define MEMTYPE_HIADDR 0x01
	50	#define IREG_IO0_BASEHI 0x60
	51	#define IREG_IO0_BASELO 0x61
	52	#define IREG_IO1_BASEHI 0x62
	53	#define IREG_IO1_BASELO 0x63
	54	#define IREG_IRQ_NUMBER 0x70
	55	#define IREG_IRQ_TYPE 0x71
	56	#define IRQTYPE_HIGH 0x02
	57	#define IRQTYPE_LOW 0x00
	58	#define IRQTYPE_LEVEL 0x01
	59	#define IRQTYPE_EDGE 0x00
	60
	61	#define HP_DSPR 0x04
	62	#define HP_BLKS 0x04
	63
	64	#define HPDSPRESET_OFF 2
	65	#define HPDSPRESET_ON 0
	66
	67	#define HPBLKSEL_0 2
	68	#define HPBLKSEL_1 3
	69
	70	#define HIMT_DAT_OFF 0x03
	71
	72	#define HIDSP_PLAY_UNDER 0x00
	73	#define HIDSP_INT_PLAY_UNDER 0x01
	74	#define HIDSP_SSI_TX_UNDER 0x02
	75	#define HIDSP_RECQ_OVERFLOW 0x08
	76	#define HIDSP_INT_RECORD_OVER 0x09
	77	#define HIDSP_SSI_RX_OVERFLOW 0x0a
	78
	79	#define HIDSP_MIDI_IN_OVER 0x10
	80
	81	#define HIDSP_MIDI_FRAME_ERR 0x11
	82	#define HIDSP_MIDI_PARITY_ERR 0x12
	83	#define HIDSP_MIDI_OVERRUN_ERR 0x13
	84
	85	#define HIDSP_INPUT_CLIPPING 0x20
	86	#define HIDSP_MIX_CLIPPING 0x30
	87	#define HIDSP_DAT_IN_OFF 0x21
	88
	89	#define HDEXAR_SET_ANA_IN 0
	90	#define HDEXAR_CLEAR_PEAKS 1
	91	#define HDEXAR_IN_SET_POTS 2
	92	#define HDEXAR_AUX_SET_POTS 3
	93	#define HDEXAR_CAL_A_TO_D 4
	94	#define HDEXAR_RD_EXT_DSP_BITS 5
	95
	96	#define HDEXAR_SET_SYNTH_IN 4
97	#define HDEXAR_READ_DAT_IN 5
98	#define HDEXAR_MIC_SET_POTS 6
99	#define HDEXAR_SET_DAT_IN 7
100
101	#define HDEXAR_SET_SYNTH_48 8
102	#define HDEXAR_SET_SYNTH_44 9
103
104	#define TIME_PRO_RESET_DONE 0x028A
105	#define TIME_PRO_SYSEX 0x001E
106	#define TIME_PRO_RESET 0x0032
107
108	#define AGND 0x01
109	#define SIGNAL 0x02
110
111	#define EXT_DSP_BIT_DCAL 0x0001
112	#define EXT_DSP_BIT_MIDI_CON 0x0002
113
114	#define BUFFSIZE 0x8000
115	#define HOSTQ_SIZE 0x40
116
117	#define SRAM_CNTL_START 0x7F00
118	#define SMA_STRUCT_START 0x7F40
119
120	#define DAP_BUFF_SIZE 0x2400
121	#define DAR_BUFF_SIZE 0x2000
122
123	#define DAPQ_STRUCT_SIZE 0x10
124	#define DARQ_STRUCT_SIZE 0x10
125	#define DAPQ_BUFF_SIZE (3 * 0x10)
126	#define DARQ_BUFF_SIZE (3 * 0x10)
127	#define MODQ_BUFF_SIZE 0x400
128	#define MIDQ_BUFF_SIZE 0x800
129	#define DSPQ_BUFF_SIZE 0x5A0
130
131	#define DAPQ_DATA_BUFF 0x6C00
132	#define DARQ_DATA_BUFF 0x6C30
133	#define MODQ_DATA_BUFF 0x6C60
134	#define MIDQ_DATA_BUFF 0x7060
135	#define DSPQ_DATA_BUFF 0x7860
136
137	#define DAPQ_OFFSET SRAM_CNTL_START
138	#define DARQ_OFFSET (SRAM_CNTL_START + 0x08)
139	#define MODQ_OFFSET (SRAM_CNTL_START + 0x10)
140	#define MIDQ_OFFSET (SRAM_CNTL_START + 0x18)
141	#define DSPQ_OFFSET (SRAM_CNTL_START + 0x20)
142
143	#define MOP_WAVEHDR 0
144	#define MOP_EXTOUT 1
145	#define MOP_HWINIT 0xfe
146	#define MOP_NONE 0xff
147	#define MOP_MAX 1
148
149	#define MIP_EXTIN 0
150	#define MIP_WAVEHDR 1
151	#define MIP_HWINIT 0xfe
152	#define MIP_MAX 1
153
154	/* Pinnacle/Fiji SMA Common Data */
155	#define SMA_wCurrPlayBytes 0x0000
156	#define SMA_wCurrRecordBytes 0x0002
157	#define SMA_wCurrPlayVolLeft 0x0004
158	#define SMA_wCurrPlayVolRight 0x0006
159	#define SMA_wCurrInVolLeft 0x0008
160	#define SMA_wCurrInVolRight 0x000a
161	#define SMA_wCurrMHdrVolLeft 0x000c
162	#define SMA_wCurrMHdrVolRight 0x000e
163	#define SMA_dwCurrPlayPitch 0x0010
164	#define SMA_dwCurrPlayRate 0x0014
165	#define SMA_wCurrMIDIIOPatch 0x0018
166	#define SMA_wCurrPlayFormat 0x001a
167	#define SMA_wCurrPlaySampleSize 0x001c
168	#define SMA_wCurrPlayChannels 0x001e
169	#define SMA_wCurrPlaySampleRate 0x0020
170	#define SMA_wCurrRecordFormat 0x0022
171	#define SMA_wCurrRecordSampleSize 0x0024
172	#define SMA_wCurrRecordChannels 0x0026
173	#define SMA_wCurrRecordSampleRate 0x0028
174	#define SMA_wCurrDSPStatusFlags 0x002a
175	#define SMA_wCurrHostStatusFlags 0x002c
176	#define SMA_wCurrInputTagBits 0x002e
177	#define SMA_wCurrLeftPeak 0x0030
178	#define SMA_wCurrRightPeak 0x0032
179	#define SMA_bMicPotPosLeft 0x0034
180	#define SMA_bMicPotPosRight 0x0035
181	#define SMA_bMicPotMaxLeft 0x0036
182	#define SMA_bMicPotMaxRight 0x0037
183	#define SMA_bInPotPosLeft 0x0038
184	#define SMA_bInPotPosRight 0x0039
185	#define SMA_bAuxPotPosLeft 0x003a
186	#define SMA_bAuxPotPosRight 0x003b
187	#define SMA_bInPotMaxLeft 0x003c
188	#define SMA_bInPotMaxRight 0x003d
189	#define SMA_bAuxPotMaxLeft 0x003e
190	#define SMA_bAuxPotMaxRight 0x003f
191	#define SMA_bInPotMaxMethod 0x0040
192	#define SMA_bAuxPotMaxMethod 0x0041
193	#define SMA_wCurrMastVolLeft 0x0042
194	#define SMA_wCurrMastVolRight 0x0044
195	#define SMA_wCalFreqAtoD 0x0046
196	#define SMA_wCurrAuxVolLeft 0x0048
197	#define SMA_wCurrAuxVolRight 0x004a
198	#define SMA_wCurrPlay1VolLeft 0x004c
199	#define SMA_wCurrPlay1VolRight 0x004e
200	#define SMA_wCurrPlay2VolLeft 0x0050
201	#define SMA_wCurrPlay2VolRight 0x0052
202	#define SMA_wCurrPlay3VolLeft 0x0054
203	#define SMA_wCurrPlay3VolRight 0x0056
204	#define SMA_wCurrPlay4VolLeft 0x0058
205	#define SMA_wCurrPlay4VolRight 0x005a
206	#define SMA_wCurrPlay1PeakLeft 0x005c
207	#define SMA_wCurrPlay1PeakRight 0x005e
208	#define SMA_wCurrPlay2PeakLeft 0x0060
209	#define SMA_wCurrPlay2PeakRight 0x0062
210	#define SMA_wCurrPlay3PeakLeft 0x0064
211	#define SMA_wCurrPlay3PeakRight 0x0066
212	#define SMA_wCurrPlay4PeakLeft 0x0068
213	#define SMA_wCurrPlay4PeakRight 0x006a
214	#define SMA_wCurrPlayPeakLeft 0x006c
215	#define SMA_wCurrPlayPeakRight 0x006e
216	#define SMA_wCurrDATSR 0x0070
217	#define SMA_wCurrDATRXCHNL 0x0072
218	#define SMA_wCurrDATTXCHNL 0x0074
219	#define SMA_wCurrDATRXRate 0x0076
220	#define SMA_dwDSPPlayCount 0x0078
221	#define SMA__size 0x007c
222
223	#ifdef HAVE_DSPCODEH
224	# include "pndsperm.c"
225	# include "pndspini.c"
226	# define PERMCODE pndsperm
227	# define INITCODE pndspini
228	# define PERMCODESIZE sizeof(pndsperm)
229	# define INITCODESIZE sizeof(pndspini)
230	#else
231	# ifndef CONFIG_MSNDPIN_INIT_FILE
232	# define CONFIG_MSNDPIN_INIT_FILE \
233	"/etc/sound/pndspini.bin"
234	# endif
235	# ifndef CONFIG_MSNDPIN_PERM_FILE
236	# define CONFIG_MSNDPIN_PERM_FILE \
237	"/etc/sound/pndsperm.bin"
238	# endif
239	# define PERMCODEFILE CONFIG_MSNDPIN_PERM_FILE
240	# define INITCODEFILE CONFIG_MSNDPIN_INIT_FILE
241	# define PERMCODE dspini
242	# define INITCODE permini
243	# define PERMCODESIZE sizeof_dspini
244	# define INITCODESIZE sizeof_permini
245	#endif
246	#define LONGNAME "MultiSound (Pinnacle/Fiji)"
247
248	#endif /* __MSND_PINNACLE_H */