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KVM: Portability: Move kvm_x86_ops to x86.c
[linux.git] / drivers / kvm / x86.c
CommitLineData
043405e1
CO		 1/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * derived from drivers/kvm/kvm_main.c
5 *
6 * Copyright (C) 2006 Qumranet, Inc.
7 *
8 * Authors:
9 * Avi Kivity <[email protected]>
10 * Yaniv Kamay <[email protected]>
11 *
12 * This work is licensed under the terms of the GNU GPL, version 2. See
13 * the COPYING file in the top-level directory.
14 *
15 */
16
313a3dc7 17#include "kvm.h"
043405e1 18#include "x86.h"
d825ed0a 19#include "x86_emulate.h"
5fb76f9b 20#include "segment_descriptor.h"
313a3dc7
CO		 21#include "irq.h"
22
23#include <linux/kvm.h>
24#include <linux/fs.h>
25#include <linux/vmalloc.h>
5fb76f9b 26#include <linux/module.h>
043405e1
CO		 27
28#include <asm/uaccess.h>
d825ed0a 29#include <asm/msr.h>
043405e1 30
313a3dc7 31#define MAX_IO_MSRS 256
a03490ed
CO		 32#define CR0_RESERVED_BITS \
33 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
34 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
35 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
36#define CR4_RESERVED_BITS \
37 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
38 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
39 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
40 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
41
42#define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
15c4a640 43#define EFER_RESERVED_BITS 0xfffffffffffff2fe
313a3dc7 44
417bc304
HB		 45#define STAT_OFFSET(x) offsetof(struct kvm_vcpu, stat.x)
46
97896d04
ZX		 47struct kvm_x86_ops *kvm_x86_ops;
48
417bc304
HB		 49struct kvm_stats_debugfs_item debugfs_entries[] = {
50 { "pf_fixed", STAT_OFFSET(pf_fixed) },
51 { "pf_guest", STAT_OFFSET(pf_guest) },
52 { "tlb_flush", STAT_OFFSET(tlb_flush) },
53 { "invlpg", STAT_OFFSET(invlpg) },
54 { "exits", STAT_OFFSET(exits) },
55 { "io_exits", STAT_OFFSET(io_exits) },
56 { "mmio_exits", STAT_OFFSET(mmio_exits) },
57 { "signal_exits", STAT_OFFSET(signal_exits) },
58 { "irq_window", STAT_OFFSET(irq_window_exits) },
59 { "halt_exits", STAT_OFFSET(halt_exits) },
60 { "halt_wakeup", STAT_OFFSET(halt_wakeup) },
61 { "request_irq", STAT_OFFSET(request_irq_exits) },
62 { "irq_exits", STAT_OFFSET(irq_exits) },
63 { "light_exits", STAT_OFFSET(light_exits) },
64 { "efer_reload", STAT_OFFSET(efer_reload) },
65 { NULL }
66};
67
68
5fb76f9b
CO		 69unsigned long segment_base(u16 selector)
70{
71 struct descriptor_table gdt;
72 struct segment_descriptor *d;
73 unsigned long table_base;
74 unsigned long v;
75
76 if (selector == 0)
77 return 0;
78
79 asm("sgdt %0" : "=m"(gdt));
80 table_base = gdt.base;
81
82 if (selector & 4) { /* from ldt */
83 u16 ldt_selector;
84
85 asm("sldt %0" : "=g"(ldt_selector));
86 table_base = segment_base(ldt_selector);
87 }
88 d = (struct segment_descriptor *)(table_base + (selector & ~7));
89 v = d->base_low | ((unsigned long)d->base_mid << 16) |
90 ((unsigned long)d->base_high << 24);
91#ifdef CONFIG_X86_64
92 if (d->system == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
93 v |= ((unsigned long) \
94 ((struct segment_descriptor_64 *)d)->base_higher) << 32;
95#endif
96 return v;
97}
98EXPORT_SYMBOL_GPL(segment_base);
99
6866b83e
CO		 100u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
101{
102 if (irqchip_in_kernel(vcpu->kvm))
103 return vcpu->apic_base;
104 else
105 return vcpu->apic_base;
106}
107EXPORT_SYMBOL_GPL(kvm_get_apic_base);
108
109void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
110{
111 /* TODO: reserve bits check */
112 if (irqchip_in_kernel(vcpu->kvm))
113 kvm_lapic_set_base(vcpu, data);
114 else
115 vcpu->apic_base = data;
116}
117EXPORT_SYMBOL_GPL(kvm_set_apic_base);
118
a03490ed
CO		 119static void inject_gp(struct kvm_vcpu *vcpu)
120{
121 kvm_x86_ops->inject_gp(vcpu, 0);
122}
123
124/*
125 * Load the pae pdptrs. Return true is they are all valid.
126 */
127int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
128{
129 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
130 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
131 int i;
132 int ret;
133 u64 pdpte[ARRAY_SIZE(vcpu->pdptrs)];
134
135 mutex_lock(&vcpu->kvm->lock);
136 ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
137 offset * sizeof(u64), sizeof(pdpte));
138 if (ret < 0) {
139 ret = 0;
140 goto out;
141 }
142 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
143 if ((pdpte[i] & 1) && (pdpte[i] & 0xfffffff0000001e6ull)) {
144 ret = 0;
145 goto out;
146 }
147 }
148 ret = 1;
149
150 memcpy(vcpu->pdptrs, pdpte, sizeof(vcpu->pdptrs));
151out:
152 mutex_unlock(&vcpu->kvm->lock);
153
154 return ret;
155}
156
157void set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
158{
159 if (cr0 & CR0_RESERVED_BITS) {
160 printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
161 cr0, vcpu->cr0);
162 inject_gp(vcpu);
163 return;
164 }
165
166 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
167 printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
168 inject_gp(vcpu);
169 return;
170 }
171
172 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
173 printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
174 "and a clear PE flag\n");
175 inject_gp(vcpu);
176 return;
177 }
178
179 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
180#ifdef CONFIG_X86_64
181 if ((vcpu->shadow_efer & EFER_LME)) {
182 int cs_db, cs_l;
183
184 if (!is_pae(vcpu)) {
185 printk(KERN_DEBUG "set_cr0: #GP, start paging "
186 "in long mode while PAE is disabled\n");
187 inject_gp(vcpu);
188 return;
189 }
190 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
191 if (cs_l) {
192 printk(KERN_DEBUG "set_cr0: #GP, start paging "
193 "in long mode while CS.L == 1\n");
194 inject_gp(vcpu);
195 return;
196
197 }
198 } else
199#endif
200 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->cr3)) {
201 printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
202 "reserved bits\n");
203 inject_gp(vcpu);
204 return;
205 }
206
207 }
208
209 kvm_x86_ops->set_cr0(vcpu, cr0);
210 vcpu->cr0 = cr0;
211
212 mutex_lock(&vcpu->kvm->lock);
213 kvm_mmu_reset_context(vcpu);
214 mutex_unlock(&vcpu->kvm->lock);
215 return;
216}
217EXPORT_SYMBOL_GPL(set_cr0);
218
219void lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
220{
221 set_cr0(vcpu, (vcpu->cr0 & ~0x0ful) | (msw & 0x0f));
222}
223EXPORT_SYMBOL_GPL(lmsw);
224
225void set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
226{
227 if (cr4 & CR4_RESERVED_BITS) {
228 printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
229 inject_gp(vcpu);
230 return;
231 }
232
233 if (is_long_mode(vcpu)) {
234 if (!(cr4 & X86_CR4_PAE)) {
235 printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
236 "in long mode\n");
237 inject_gp(vcpu);
238 return;
239 }
240 } else if (is_paging(vcpu) && !is_pae(vcpu) && (cr4 & X86_CR4_PAE)
241 && !load_pdptrs(vcpu, vcpu->cr3)) {
242 printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
243 inject_gp(vcpu);
244 return;
245 }
246
247 if (cr4 & X86_CR4_VMXE) {
248 printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
249 inject_gp(vcpu);
250 return;
251 }
252 kvm_x86_ops->set_cr4(vcpu, cr4);
253 vcpu->cr4 = cr4;
254 mutex_lock(&vcpu->kvm->lock);
255 kvm_mmu_reset_context(vcpu);
256 mutex_unlock(&vcpu->kvm->lock);
257}
258EXPORT_SYMBOL_GPL(set_cr4);
259
260void set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
261{
262 if (is_long_mode(vcpu)) {
263 if (cr3 & CR3_L_MODE_RESERVED_BITS) {
264 printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
265 inject_gp(vcpu);
266 return;
267 }
268 } else {
269 if (is_pae(vcpu)) {
270 if (cr3 & CR3_PAE_RESERVED_BITS) {
271 printk(KERN_DEBUG
272 "set_cr3: #GP, reserved bits\n");
273 inject_gp(vcpu);
274 return;
275 }
276 if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
277 printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
278 "reserved bits\n");
279 inject_gp(vcpu);
280 return;
281 }
282 }
283 /*
284 * We don't check reserved bits in nonpae mode, because
285 * this isn't enforced, and VMware depends on this.
286 */
287 }
288
289 mutex_lock(&vcpu->kvm->lock);
290 /*
291 * Does the new cr3 value map to physical memory? (Note, we
292 * catch an invalid cr3 even in real-mode, because it would
293 * cause trouble later on when we turn on paging anyway.)
294 *
295 * A real CPU would silently accept an invalid cr3 and would
296 * attempt to use it - with largely undefined (and often hard
297 * to debug) behavior on the guest side.
298 */
299 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
300 inject_gp(vcpu);
301 else {
302 vcpu->cr3 = cr3;
303 vcpu->mmu.new_cr3(vcpu);
304 }
305 mutex_unlock(&vcpu->kvm->lock);
306}
307EXPORT_SYMBOL_GPL(set_cr3);
308
309void set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
310{
311 if (cr8 & CR8_RESERVED_BITS) {
312 printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
313 inject_gp(vcpu);
314 return;
315 }
316 if (irqchip_in_kernel(vcpu->kvm))
317 kvm_lapic_set_tpr(vcpu, cr8);
318 else
319 vcpu->cr8 = cr8;
320}
321EXPORT_SYMBOL_GPL(set_cr8);
322
323unsigned long get_cr8(struct kvm_vcpu *vcpu)
324{
325 if (irqchip_in_kernel(vcpu->kvm))
326 return kvm_lapic_get_cr8(vcpu);
327 else
328 return vcpu->cr8;
329}
330EXPORT_SYMBOL_GPL(get_cr8);
331
043405e1
CO		 332/*
333 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
334 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
335 *
336 * This list is modified at module load time to reflect the
337 * capabilities of the host cpu.
338 */
339static u32 msrs_to_save[] = {
340 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
341 MSR_K6_STAR,
342#ifdef CONFIG_X86_64
343 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
344#endif
345 MSR_IA32_TIME_STAMP_COUNTER,
346};
347
348static unsigned num_msrs_to_save;
349
350static u32 emulated_msrs[] = {
351 MSR_IA32_MISC_ENABLE,
352};
353
15c4a640
CO		 354#ifdef CONFIG_X86_64
355
356static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
357{
358 if (efer & EFER_RESERVED_BITS) {
359 printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
360 efer);
361 inject_gp(vcpu);
362 return;
363 }
364
365 if (is_paging(vcpu)
366 && (vcpu->shadow_efer & EFER_LME) != (efer & EFER_LME)) {
367 printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
368 inject_gp(vcpu);
369 return;
370 }
371
372 kvm_x86_ops->set_efer(vcpu, efer);
373
374 efer &= ~EFER_LMA;
375 efer |= vcpu->shadow_efer & EFER_LMA;
376
377 vcpu->shadow_efer = efer;
378}
379
380#endif
381
382/*
383 * Writes msr value into into the appropriate "register".
384 * Returns 0 on success, non-0 otherwise.
385 * Assumes vcpu_load() was already called.
386 */
387int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
388{
389 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
390}
391
313a3dc7
CO		 392/*
393 * Adapt set_msr() to msr_io()'s calling convention
394 */
395static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
396{
397 return kvm_set_msr(vcpu, index, *data);
398}
399
15c4a640
CO		 400
401int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
402{
403 switch (msr) {
404#ifdef CONFIG_X86_64
405 case MSR_EFER:
406 set_efer(vcpu, data);
407 break;
408#endif
409 case MSR_IA32_MC0_STATUS:
410 pr_unimpl(vcpu, "%s: MSR_IA32_MC0_STATUS 0x%llx, nop\n",
411 __FUNCTION__, data);
412 break;
413 case MSR_IA32_MCG_STATUS:
414 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_STATUS 0x%llx, nop\n",
415 __FUNCTION__, data);
416 break;
417 case MSR_IA32_UCODE_REV:
418 case MSR_IA32_UCODE_WRITE:
419 case 0x200 ... 0x2ff: /* MTRRs */
420 break;
421 case MSR_IA32_APICBASE:
422 kvm_set_apic_base(vcpu, data);
423 break;
424 case MSR_IA32_MISC_ENABLE:
425 vcpu->ia32_misc_enable_msr = data;
426 break;
427 default:
428 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x\n", msr);
429 return 1;
430 }
431 return 0;
432}
433EXPORT_SYMBOL_GPL(kvm_set_msr_common);
434
435
436/*
437 * Reads an msr value (of 'msr_index') into 'pdata'.
438 * Returns 0 on success, non-0 otherwise.
439 * Assumes vcpu_load() was already called.
440 */
441int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
442{
443 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
444}
445
446int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
447{
448 u64 data;
449
450 switch (msr) {
451 case 0xc0010010: /* SYSCFG */
452 case 0xc0010015: /* HWCR */
453 case MSR_IA32_PLATFORM_ID:
454 case MSR_IA32_P5_MC_ADDR:
455 case MSR_IA32_P5_MC_TYPE:
456 case MSR_IA32_MC0_CTL:
457 case MSR_IA32_MCG_STATUS:
458 case MSR_IA32_MCG_CAP:
459 case MSR_IA32_MC0_MISC:
460 case MSR_IA32_MC0_MISC+4:
461 case MSR_IA32_MC0_MISC+8:
462 case MSR_IA32_MC0_MISC+12:
463 case MSR_IA32_MC0_MISC+16:
464 case MSR_IA32_UCODE_REV:
465 case MSR_IA32_PERF_STATUS:
466 case MSR_IA32_EBL_CR_POWERON:
467 /* MTRR registers */
468 case 0xfe:
469 case 0x200 ... 0x2ff:
470 data = 0;
471 break;
472 case 0xcd: /* fsb frequency */
473 data = 3;
474 break;
475 case MSR_IA32_APICBASE:
476 data = kvm_get_apic_base(vcpu);
477 break;
478 case MSR_IA32_MISC_ENABLE:
479 data = vcpu->ia32_misc_enable_msr;
480 break;
481#ifdef CONFIG_X86_64
482 case MSR_EFER:
483 data = vcpu->shadow_efer;
484 break;
485#endif
486 default:
487 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
488 return 1;
489 }
490 *pdata = data;
491 return 0;
492}
493EXPORT_SYMBOL_GPL(kvm_get_msr_common);
494
313a3dc7
CO		 495/*
496 * Read or write a bunch of msrs. All parameters are kernel addresses.
497 *
498 * @return number of msrs set successfully.
499 */
500static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
501 struct kvm_msr_entry *entries,
502 int (*do_msr)(struct kvm_vcpu *vcpu,
503 unsigned index, u64 *data))
504{
505 int i;
506
507 vcpu_load(vcpu);
508
509 for (i = 0; i < msrs->nmsrs; ++i)
510 if (do_msr(vcpu, entries[i].index, &entries[i].data))
511 break;
512
513 vcpu_put(vcpu);
514
515 return i;
516}
517
518/*
519 * Read or write a bunch of msrs. Parameters are user addresses.
520 *
521 * @return number of msrs set successfully.
522 */
523static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
524 int (*do_msr)(struct kvm_vcpu *vcpu,
525 unsigned index, u64 *data),
526 int writeback)
527{
528 struct kvm_msrs msrs;
529 struct kvm_msr_entry *entries;
530 int r, n;
531 unsigned size;
532
533 r = -EFAULT;
534 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
535 goto out;
536
537 r = -E2BIG;
538 if (msrs.nmsrs >= MAX_IO_MSRS)
539 goto out;
540
541 r = -ENOMEM;
542 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
543 entries = vmalloc(size);
544 if (!entries)
545 goto out;
546
547 r = -EFAULT;
548 if (copy_from_user(entries, user_msrs->entries, size))
549 goto out_free;
550
551 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
552 if (r < 0)
553 goto out_free;
554
555 r = -EFAULT;
556 if (writeback && copy_to_user(user_msrs->entries, entries, size))
557 goto out_free;
558
559 r = n;
560
561out_free:
562 vfree(entries);
563out:
564 return r;
565}
566
043405e1
CO		 567long kvm_arch_dev_ioctl(struct file *filp,
568 unsigned int ioctl, unsigned long arg)
569{
570 void __user *argp = (void __user *)arg;
571 long r;
572
573 switch (ioctl) {
574 case KVM_GET_MSR_INDEX_LIST: {
575 struct kvm_msr_list __user *user_msr_list = argp;
576 struct kvm_msr_list msr_list;
577 unsigned n;
578
579 r = -EFAULT;
580 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
581 goto out;
582 n = msr_list.nmsrs;
583 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
584 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
585 goto out;
586 r = -E2BIG;
587 if (n < num_msrs_to_save)
588 goto out;
589 r = -EFAULT;
590 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
591 num_msrs_to_save * sizeof(u32)))
592 goto out;
593 if (copy_to_user(user_msr_list->indices
594 + num_msrs_to_save * sizeof(u32),
595 &emulated_msrs,
596 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
597 goto out;
598 r = 0;
599 break;
600 }
601 default:
602 r = -EINVAL;
603 }
604out:
605 return r;
606}
607
313a3dc7
CO		 608void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
609{
610 kvm_x86_ops->vcpu_load(vcpu, cpu);
611}
612
613void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
614{
615 kvm_x86_ops->vcpu_put(vcpu);
616}
617
618static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
619{
620 u64 efer;
621 int i;
622 struct kvm_cpuid_entry *e, *entry;
623
624 rdmsrl(MSR_EFER, efer);
625 entry = NULL;
626 for (i = 0; i < vcpu->cpuid_nent; ++i) {
627 e = &vcpu->cpuid_entries[i];
628 if (e->function == 0x80000001) {
629 entry = e;
630 break;
631 }
632 }
633 if (entry && (entry->edx & (1 << 20)) && !(efer & EFER_NX)) {
634 entry->edx &= ~(1 << 20);
635 printk(KERN_INFO "kvm: guest NX capability removed\n");
636 }
637}
638
639static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
640 struct kvm_cpuid *cpuid,
641 struct kvm_cpuid_entry __user *entries)
642{
643 int r;
644
645 r = -E2BIG;
646 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
647 goto out;
648 r = -EFAULT;
649 if (copy_from_user(&vcpu->cpuid_entries, entries,
650 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
651 goto out;
652 vcpu->cpuid_nent = cpuid->nent;
653 cpuid_fix_nx_cap(vcpu);
654 return 0;
655
656out:
657 return r;
658}
659
660static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
661 struct kvm_lapic_state *s)
662{
663 vcpu_load(vcpu);
664 memcpy(s->regs, vcpu->apic->regs, sizeof *s);
665 vcpu_put(vcpu);
666
667 return 0;
668}
669
670static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
671 struct kvm_lapic_state *s)
672{
673 vcpu_load(vcpu);
674 memcpy(vcpu->apic->regs, s->regs, sizeof *s);
675 kvm_apic_post_state_restore(vcpu);
676 vcpu_put(vcpu);
677
678 return 0;
679}
680
681long kvm_arch_vcpu_ioctl(struct file *filp,
682 unsigned int ioctl, unsigned long arg)
683{
684 struct kvm_vcpu *vcpu = filp->private_data;
685 void __user *argp = (void __user *)arg;
686 int r;
687
688 switch (ioctl) {
689 case KVM_GET_LAPIC: {
690 struct kvm_lapic_state lapic;
691
692 memset(&lapic, 0, sizeof lapic);
693 r = kvm_vcpu_ioctl_get_lapic(vcpu, &lapic);
694 if (r)
695 goto out;
696 r = -EFAULT;
697 if (copy_to_user(argp, &lapic, sizeof lapic))
698 goto out;
699 r = 0;
700 break;
701 }
702 case KVM_SET_LAPIC: {
703 struct kvm_lapic_state lapic;
704
705 r = -EFAULT;
706 if (copy_from_user(&lapic, argp, sizeof lapic))
707 goto out;
708 r = kvm_vcpu_ioctl_set_lapic(vcpu, &lapic);;
709 if (r)
710 goto out;
711 r = 0;
712 break;
713 }
714 case KVM_SET_CPUID: {
715 struct kvm_cpuid __user *cpuid_arg = argp;
716 struct kvm_cpuid cpuid;
717
718 r = -EFAULT;
719 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
720 goto out;
721 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
722 if (r)
723 goto out;
724 break;
725 }
726 case KVM_GET_MSRS:
727 r = msr_io(vcpu, argp, kvm_get_msr, 1);
728 break;
729 case KVM_SET_MSRS:
730 r = msr_io(vcpu, argp, do_set_msr, 0);
731 break;
732 default:
733 r = -EINVAL;
734 }
735out:
736 return r;
737}
738
1fe779f8
CO		 739static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
740{
741 int ret;
742
743 if (addr > (unsigned int)(-3 * PAGE_SIZE))
744 return -1;
745 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
746 return ret;
747}
748
749static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
750 u32 kvm_nr_mmu_pages)
751{
752 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
753 return -EINVAL;
754
755 mutex_lock(&kvm->lock);
756
757 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
758 kvm->n_requested_mmu_pages = kvm_nr_mmu_pages;
759
760 mutex_unlock(&kvm->lock);
761 return 0;
762}
763
764static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
765{
766 return kvm->n_alloc_mmu_pages;
767}
768
769/*
770 * Set a new alias region. Aliases map a portion of physical memory into
771 * another portion. This is useful for memory windows, for example the PC
772 * VGA region.
773 */
774static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
775 struct kvm_memory_alias *alias)
776{
777 int r, n;
778 struct kvm_mem_alias *p;
779
780 r = -EINVAL;
781 /* General sanity checks */
782 if (alias->memory_size & (PAGE_SIZE - 1))
783 goto out;
784 if (alias->guest_phys_addr & (PAGE_SIZE - 1))
785 goto out;
786 if (alias->slot >= KVM_ALIAS_SLOTS)
787 goto out;
788 if (alias->guest_phys_addr + alias->memory_size
789 < alias->guest_phys_addr)
790 goto out;
791 if (alias->target_phys_addr + alias->memory_size
792 < alias->target_phys_addr)
793 goto out;
794
795 mutex_lock(&kvm->lock);
796
797 p = &kvm->aliases[alias->slot];
798 p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
799 p->npages = alias->memory_size >> PAGE_SHIFT;
800 p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
801
802 for (n = KVM_ALIAS_SLOTS; n > 0; --n)
803 if (kvm->aliases[n - 1].npages)
804 break;
805 kvm->naliases = n;
806
807 kvm_mmu_zap_all(kvm);
808
809 mutex_unlock(&kvm->lock);
810
811 return 0;
812
813out:
814 return r;
815}
816
817static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
818{
819 int r;
820
821 r = 0;
822 switch (chip->chip_id) {
823 case KVM_IRQCHIP_PIC_MASTER:
824 memcpy(&chip->chip.pic,
825 &pic_irqchip(kvm)->pics[0],
826 sizeof(struct kvm_pic_state));
827 break;
828 case KVM_IRQCHIP_PIC_SLAVE:
829 memcpy(&chip->chip.pic,
830 &pic_irqchip(kvm)->pics[1],
831 sizeof(struct kvm_pic_state));
832 break;
833 case KVM_IRQCHIP_IOAPIC:
834 memcpy(&chip->chip.ioapic,
835 ioapic_irqchip(kvm),
836 sizeof(struct kvm_ioapic_state));
837 break;
838 default:
839 r = -EINVAL;
840 break;
841 }
842 return r;
843}
844
845static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
846{
847 int r;
848
849 r = 0;
850 switch (chip->chip_id) {
851 case KVM_IRQCHIP_PIC_MASTER:
852 memcpy(&pic_irqchip(kvm)->pics[0],
853 &chip->chip.pic,
854 sizeof(struct kvm_pic_state));
855 break;
856 case KVM_IRQCHIP_PIC_SLAVE:
857 memcpy(&pic_irqchip(kvm)->pics[1],
858 &chip->chip.pic,
859 sizeof(struct kvm_pic_state));
860 break;
861 case KVM_IRQCHIP_IOAPIC:
862 memcpy(ioapic_irqchip(kvm),
863 &chip->chip.ioapic,
864 sizeof(struct kvm_ioapic_state));
865 break;
866 default:
867 r = -EINVAL;
868 break;
869 }
870 kvm_pic_update_irq(pic_irqchip(kvm));
871 return r;
872}
873
874long kvm_arch_vm_ioctl(struct file *filp,
875 unsigned int ioctl, unsigned long arg)
876{
877 struct kvm *kvm = filp->private_data;
878 void __user *argp = (void __user *)arg;
879 int r = -EINVAL;
880
881 switch (ioctl) {
882 case KVM_SET_TSS_ADDR:
883 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
884 if (r < 0)
885 goto out;
886 break;
887 case KVM_SET_MEMORY_REGION: {
888 struct kvm_memory_region kvm_mem;
889 struct kvm_userspace_memory_region kvm_userspace_mem;
890
891 r = -EFAULT;
892 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
893 goto out;
894 kvm_userspace_mem.slot = kvm_mem.slot;
895 kvm_userspace_mem.flags = kvm_mem.flags;
896 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
897 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
898 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
899 if (r)
900 goto out;
901 break;
902 }
903 case KVM_SET_NR_MMU_PAGES:
904 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
905 if (r)
906 goto out;
907 break;
908 case KVM_GET_NR_MMU_PAGES:
909 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
910 break;
911 case KVM_SET_MEMORY_ALIAS: {
912 struct kvm_memory_alias alias;
913
914 r = -EFAULT;
915 if (copy_from_user(&alias, argp, sizeof alias))
916 goto out;
917 r = kvm_vm_ioctl_set_memory_alias(kvm, &alias);
918 if (r)
919 goto out;
920 break;
921 }
922 case KVM_CREATE_IRQCHIP:
923 r = -ENOMEM;
924 kvm->vpic = kvm_create_pic(kvm);
925 if (kvm->vpic) {
926 r = kvm_ioapic_init(kvm);
927 if (r) {
928 kfree(kvm->vpic);
929 kvm->vpic = NULL;
930 goto out;
931 }
932 } else
933 goto out;
934 break;
935 case KVM_IRQ_LINE: {
936 struct kvm_irq_level irq_event;
937
938 r = -EFAULT;
939 if (copy_from_user(&irq_event, argp, sizeof irq_event))
940 goto out;
941 if (irqchip_in_kernel(kvm)) {
942 mutex_lock(&kvm->lock);
943 if (irq_event.irq < 16)
944 kvm_pic_set_irq(pic_irqchip(kvm),
945 irq_event.irq,
946 irq_event.level);
947 kvm_ioapic_set_irq(kvm->vioapic,
948 irq_event.irq,
949 irq_event.level);
950 mutex_unlock(&kvm->lock);
951 r = 0;
952 }
953 break;
954 }
955 case KVM_GET_IRQCHIP: {
956 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
957 struct kvm_irqchip chip;
958
959 r = -EFAULT;
960 if (copy_from_user(&chip, argp, sizeof chip))
961 goto out;
962 r = -ENXIO;
963 if (!irqchip_in_kernel(kvm))
964 goto out;
965 r = kvm_vm_ioctl_get_irqchip(kvm, &chip);
966 if (r)
967 goto out;
968 r = -EFAULT;
969 if (copy_to_user(argp, &chip, sizeof chip))
970 goto out;
971 r = 0;
972 break;
973 }
974 case KVM_SET_IRQCHIP: {
975 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
976 struct kvm_irqchip chip;
977
978 r = -EFAULT;
979 if (copy_from_user(&chip, argp, sizeof chip))
980 goto out;
981 r = -ENXIO;
982 if (!irqchip_in_kernel(kvm))
983 goto out;
984 r = kvm_vm_ioctl_set_irqchip(kvm, &chip);
985 if (r)
986 goto out;
987 r = 0;
988 break;
989 }
990 default:
991 ;
992 }
993out:
994 return r;
995}
996
043405e1
CO		 997static __init void kvm_init_msr_list(void)
998{
999 u32 dummy[2];
1000 unsigned i, j;
1001
1002 for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
1003 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
1004 continue;
1005 if (j < i)
1006 msrs_to_save[j] = msrs_to_save[i];
1007 j++;
1008 }
1009 num_msrs_to_save = j;
1010}
1011
bbd9b64e
CO		 1012/*
1013 * Only apic need an MMIO device hook, so shortcut now..
1014 */
1015static struct kvm_io_device *vcpu_find_pervcpu_dev(struct kvm_vcpu *vcpu,
1016 gpa_t addr)
1017{
1018 struct kvm_io_device *dev;
1019
1020 if (vcpu->apic) {
1021 dev = &vcpu->apic->dev;
1022 if (dev->in_range(dev, addr))
1023 return dev;
1024 }
1025 return NULL;
1026}
1027
1028
1029static struct kvm_io_device *vcpu_find_mmio_dev(struct kvm_vcpu *vcpu,
1030 gpa_t addr)
1031{
1032 struct kvm_io_device *dev;
1033
1034 dev = vcpu_find_pervcpu_dev(vcpu, addr);
1035 if (dev == NULL)
1036 dev = kvm_io_bus_find_dev(&vcpu->kvm->mmio_bus, addr);
1037 return dev;
1038}
1039
1040int emulator_read_std(unsigned long addr,
1041 void *val,
1042 unsigned int bytes,
1043 struct kvm_vcpu *vcpu)
1044{
1045 void *data = val;
1046
1047 while (bytes) {
1048 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, addr);
1049 unsigned offset = addr & (PAGE_SIZE-1);
1050 unsigned tocopy = min(bytes, (unsigned)PAGE_SIZE - offset);
1051 int ret;
1052
1053 if (gpa == UNMAPPED_GVA)
1054 return X86EMUL_PROPAGATE_FAULT;
1055 ret = kvm_read_guest(vcpu->kvm, gpa, data, tocopy);
1056 if (ret < 0)
1057 return X86EMUL_UNHANDLEABLE;
1058
1059 bytes -= tocopy;
1060 data += tocopy;
1061 addr += tocopy;
1062 }
1063
1064 return X86EMUL_CONTINUE;
1065}
1066EXPORT_SYMBOL_GPL(emulator_read_std);
1067
1068static int emulator_write_std(unsigned long addr,
1069 const void *val,
1070 unsigned int bytes,
1071 struct kvm_vcpu *vcpu)
1072{
1073 pr_unimpl(vcpu, "emulator_write_std: addr %lx n %d\n", addr, bytes);
1074 return X86EMUL_UNHANDLEABLE;
1075}
1076
1077static int emulator_read_emulated(unsigned long addr,
1078 void *val,
1079 unsigned int bytes,
1080 struct kvm_vcpu *vcpu)
1081{
1082 struct kvm_io_device *mmio_dev;
1083 gpa_t gpa;
1084
1085 if (vcpu->mmio_read_completed) {
1086 memcpy(val, vcpu->mmio_data, bytes);
1087 vcpu->mmio_read_completed = 0;
1088 return X86EMUL_CONTINUE;
1089 }
1090
1091 gpa = vcpu->mmu.gva_to_gpa(vcpu, addr);
1092
1093 /* For APIC access vmexit */
1094 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
1095 goto mmio;
1096
1097 if (emulator_read_std(addr, val, bytes, vcpu)
1098 == X86EMUL_CONTINUE)
1099 return X86EMUL_CONTINUE;
1100 if (gpa == UNMAPPED_GVA)
1101 return X86EMUL_PROPAGATE_FAULT;
1102
1103mmio:
1104 /*
1105 * Is this MMIO handled locally?
1106 */
1107 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa);
1108 if (mmio_dev) {
1109 kvm_iodevice_read(mmio_dev, gpa, bytes, val);
1110 return X86EMUL_CONTINUE;
1111 }
1112
1113 vcpu->mmio_needed = 1;
1114 vcpu->mmio_phys_addr = gpa;
1115 vcpu->mmio_size = bytes;
1116 vcpu->mmio_is_write = 0;
1117
1118 return X86EMUL_UNHANDLEABLE;
1119}
1120
1121static int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
1122 const void *val, int bytes)
1123{
1124 int ret;
1125
1126 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
1127 if (ret < 0)
1128 return 0;
1129 kvm_mmu_pte_write(vcpu, gpa, val, bytes);
1130 return 1;
1131}
1132
1133static int emulator_write_emulated_onepage(unsigned long addr,
1134 const void *val,
1135 unsigned int bytes,
1136 struct kvm_vcpu *vcpu)
1137{
1138 struct kvm_io_device *mmio_dev;
1139 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, addr);
1140
1141 if (gpa == UNMAPPED_GVA) {
1142 kvm_x86_ops->inject_page_fault(vcpu, addr, 2);
1143 return X86EMUL_PROPAGATE_FAULT;
1144 }
1145
1146 /* For APIC access vmexit */
1147 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
1148 goto mmio;
1149
1150 if (emulator_write_phys(vcpu, gpa, val, bytes))
1151 return X86EMUL_CONTINUE;
1152
1153mmio:
1154 /*
1155 * Is this MMIO handled locally?
1156 */
1157 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa);
1158 if (mmio_dev) {
1159 kvm_iodevice_write(mmio_dev, gpa, bytes, val);
1160 return X86EMUL_CONTINUE;
1161 }
1162
1163 vcpu->mmio_needed = 1;
1164 vcpu->mmio_phys_addr = gpa;
1165 vcpu->mmio_size = bytes;
1166 vcpu->mmio_is_write = 1;
1167 memcpy(vcpu->mmio_data, val, bytes);
1168
1169 return X86EMUL_CONTINUE;
1170}
1171
1172int emulator_write_emulated(unsigned long addr,
1173 const void *val,
1174 unsigned int bytes,
1175 struct kvm_vcpu *vcpu)
1176{
1177 /* Crossing a page boundary? */
1178 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
1179 int rc, now;
1180
1181 now = -addr & ~PAGE_MASK;
1182 rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
1183 if (rc != X86EMUL_CONTINUE)
1184 return rc;
1185 addr += now;
1186 val += now;
1187 bytes -= now;
1188 }
1189 return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
1190}
1191EXPORT_SYMBOL_GPL(emulator_write_emulated);
1192
1193static int emulator_cmpxchg_emulated(unsigned long addr,
1194 const void *old,
1195 const void *new,
1196 unsigned int bytes,
1197 struct kvm_vcpu *vcpu)
1198{
1199 static int reported;
1200
1201 if (!reported) {
1202 reported = 1;
1203 printk(KERN_WARNING "kvm: emulating exchange as write\n");
1204 }
1205 return emulator_write_emulated(addr, new, bytes, vcpu);
1206}
1207
1208static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
1209{
1210 return kvm_x86_ops->get_segment_base(vcpu, seg);
1211}
1212
1213int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
1214{
1215 return X86EMUL_CONTINUE;
1216}
1217
1218int emulate_clts(struct kvm_vcpu *vcpu)
1219{
1220 kvm_x86_ops->set_cr0(vcpu, vcpu->cr0 & ~X86_CR0_TS);
1221 return X86EMUL_CONTINUE;
1222}
1223
1224int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
1225{
1226 struct kvm_vcpu *vcpu = ctxt->vcpu;
1227
1228 switch (dr) {
1229 case 0 ... 3:
1230 *dest = kvm_x86_ops->get_dr(vcpu, dr);
1231 return X86EMUL_CONTINUE;
1232 default:
1233 pr_unimpl(vcpu, "%s: unexpected dr %u\n", __FUNCTION__, dr);
1234 return X86EMUL_UNHANDLEABLE;
1235 }
1236}
1237
1238int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
1239{
1240 unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
1241 int exception;
1242
1243 kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
1244 if (exception) {
1245 /* FIXME: better handling */
1246 return X86EMUL_UNHANDLEABLE;
1247 }
1248 return X86EMUL_CONTINUE;
1249}
1250
1251void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
1252{
1253 static int reported;
1254 u8 opcodes[4];
1255 unsigned long rip = vcpu->rip;
1256 unsigned long rip_linear;
1257
1258 rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
1259
1260 if (reported)
1261 return;
1262
1263 emulator_read_std(rip_linear, (void *)opcodes, 4, vcpu);
1264
1265 printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
1266 context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
1267 reported = 1;
1268}
1269EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
1270
1271struct x86_emulate_ops emulate_ops = {
1272 .read_std = emulator_read_std,
1273 .write_std = emulator_write_std,
1274 .read_emulated = emulator_read_emulated,
1275 .write_emulated = emulator_write_emulated,
1276 .cmpxchg_emulated = emulator_cmpxchg_emulated,
1277};
1278
1279int emulate_instruction(struct kvm_vcpu *vcpu,
1280 struct kvm_run *run,
1281 unsigned long cr2,
1282 u16 error_code,
1283 int no_decode)
1284{
1285 int r;
1286
1287 vcpu->mmio_fault_cr2 = cr2;
1288 kvm_x86_ops->cache_regs(vcpu);
1289
1290 vcpu->mmio_is_write = 0;
1291 vcpu->pio.string = 0;
1292
1293 if (!no_decode) {
1294 int cs_db, cs_l;
1295 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
1296
1297 vcpu->emulate_ctxt.vcpu = vcpu;
1298 vcpu->emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
1299 vcpu->emulate_ctxt.cr2 = cr2;
1300 vcpu->emulate_ctxt.mode =
1301 (vcpu->emulate_ctxt.eflags & X86_EFLAGS_VM)
1302 ? X86EMUL_MODE_REAL : cs_l
1303 ? X86EMUL_MODE_PROT64 : cs_db
1304 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
1305
1306 if (vcpu->emulate_ctxt.mode == X86EMUL_MODE_PROT64) {
1307 vcpu->emulate_ctxt.cs_base = 0;
1308 vcpu->emulate_ctxt.ds_base = 0;
1309 vcpu->emulate_ctxt.es_base = 0;
1310 vcpu->emulate_ctxt.ss_base = 0;
1311 } else {
1312 vcpu->emulate_ctxt.cs_base =
1313 get_segment_base(vcpu, VCPU_SREG_CS);
1314 vcpu->emulate_ctxt.ds_base =
1315 get_segment_base(vcpu, VCPU_SREG_DS);
1316 vcpu->emulate_ctxt.es_base =
1317 get_segment_base(vcpu, VCPU_SREG_ES);
1318 vcpu->emulate_ctxt.ss_base =
1319 get_segment_base(vcpu, VCPU_SREG_SS);
1320 }
1321
1322 vcpu->emulate_ctxt.gs_base =
1323 get_segment_base(vcpu, VCPU_SREG_GS);
1324 vcpu->emulate_ctxt.fs_base =
1325 get_segment_base(vcpu, VCPU_SREG_FS);
1326
1327 r = x86_decode_insn(&vcpu->emulate_ctxt, &emulate_ops);
1328 if (r) {
1329 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
1330 return EMULATE_DONE;
1331 return EMULATE_FAIL;
1332 }
1333 }
1334
1335 r = x86_emulate_insn(&vcpu->emulate_ctxt, &emulate_ops);
1336
1337 if (vcpu->pio.string)
1338 return EMULATE_DO_MMIO;
1339
1340 if ((r || vcpu->mmio_is_write) && run) {
1341 run->exit_reason = KVM_EXIT_MMIO;
1342 run->mmio.phys_addr = vcpu->mmio_phys_addr;
1343 memcpy(run->mmio.data, vcpu->mmio_data, 8);
1344 run->mmio.len = vcpu->mmio_size;
1345 run->mmio.is_write = vcpu->mmio_is_write;
1346 }
1347
1348 if (r) {
1349 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
1350 return EMULATE_DONE;
1351 if (!vcpu->mmio_needed) {
1352 kvm_report_emulation_failure(vcpu, "mmio");
1353 return EMULATE_FAIL;
1354 }
1355 return EMULATE_DO_MMIO;
1356 }
1357
1358 kvm_x86_ops->decache_regs(vcpu);
1359 kvm_x86_ops->set_rflags(vcpu, vcpu->emulate_ctxt.eflags);
1360
1361 if (vcpu->mmio_is_write) {
1362 vcpu->mmio_needed = 0;
1363 return EMULATE_DO_MMIO;
1364 }
1365
1366 return EMULATE_DONE;
1367}
1368EXPORT_SYMBOL_GPL(emulate_instruction);
1369
de7d789a
CO		 1370static void free_pio_guest_pages(struct kvm_vcpu *vcpu)
1371{
1372 int i;
1373
1374 for (i = 0; i < ARRAY_SIZE(vcpu->pio.guest_pages); ++i)
1375 if (vcpu->pio.guest_pages[i]) {
1376 kvm_release_page(vcpu->pio.guest_pages[i]);
1377 vcpu->pio.guest_pages[i] = NULL;
1378 }
1379}
1380
1381static int pio_copy_data(struct kvm_vcpu *vcpu)
1382{
1383 void *p = vcpu->pio_data;
1384 void *q;
1385 unsigned bytes;
1386 int nr_pages = vcpu->pio.guest_pages[1] ? 2 : 1;
1387
1388 q = vmap(vcpu->pio.guest_pages, nr_pages, VM_READ|VM_WRITE,
1389 PAGE_KERNEL);
1390 if (!q) {
1391 free_pio_guest_pages(vcpu);
1392 return -ENOMEM;
1393 }
1394 q += vcpu->pio.guest_page_offset;
1395 bytes = vcpu->pio.size * vcpu->pio.cur_count;
1396 if (vcpu->pio.in)
1397 memcpy(q, p, bytes);
1398 else
1399 memcpy(p, q, bytes);
1400 q -= vcpu->pio.guest_page_offset;
1401 vunmap(q);
1402 free_pio_guest_pages(vcpu);
1403 return 0;
1404}
1405
1406int complete_pio(struct kvm_vcpu *vcpu)
1407{
1408 struct kvm_pio_request *io = &vcpu->pio;
1409 long delta;
1410 int r;
1411
1412 kvm_x86_ops->cache_regs(vcpu);
1413
1414 if (!io->string) {
1415 if (io->in)
1416 memcpy(&vcpu->regs[VCPU_REGS_RAX], vcpu->pio_data,
1417 io->size);
1418 } else {
1419 if (io->in) {
1420 r = pio_copy_data(vcpu);
1421 if (r) {
1422 kvm_x86_ops->cache_regs(vcpu);
1423 return r;
1424 }
1425 }
1426
1427 delta = 1;
1428 if (io->rep) {
1429 delta *= io->cur_count;
1430 /*
1431 * The size of the register should really depend on
1432 * current address size.
1433 */
1434 vcpu->regs[VCPU_REGS_RCX] -= delta;
1435 }
1436 if (io->down)
1437 delta = -delta;
1438 delta *= io->size;
1439 if (io->in)
1440 vcpu->regs[VCPU_REGS_RDI] += delta;
1441 else
1442 vcpu->regs[VCPU_REGS_RSI] += delta;
1443 }
1444
1445 kvm_x86_ops->decache_regs(vcpu);
1446
1447 io->count -= io->cur_count;
1448 io->cur_count = 0;
1449
1450 return 0;
1451}
1452
1453static void kernel_pio(struct kvm_io_device *pio_dev,
1454 struct kvm_vcpu *vcpu,
1455 void *pd)
1456{
1457 /* TODO: String I/O for in kernel device */
1458
1459 mutex_lock(&vcpu->kvm->lock);
1460 if (vcpu->pio.in)
1461 kvm_iodevice_read(pio_dev, vcpu->pio.port,
1462 vcpu->pio.size,
1463 pd);
1464 else
1465 kvm_iodevice_write(pio_dev, vcpu->pio.port,
1466 vcpu->pio.size,
1467 pd);
1468 mutex_unlock(&vcpu->kvm->lock);
1469}
1470
1471static void pio_string_write(struct kvm_io_device *pio_dev,
1472 struct kvm_vcpu *vcpu)
1473{
1474 struct kvm_pio_request *io = &vcpu->pio;
1475 void *pd = vcpu->pio_data;
1476 int i;
1477
1478 mutex_lock(&vcpu->kvm->lock);
1479 for (i = 0; i < io->cur_count; i++) {
1480 kvm_iodevice_write(pio_dev, io->port,
1481 io->size,
1482 pd);
1483 pd += io->size;
1484 }
1485 mutex_unlock(&vcpu->kvm->lock);
1486}
1487
1488static struct kvm_io_device *vcpu_find_pio_dev(struct kvm_vcpu *vcpu,
1489 gpa_t addr)
1490{
1491 return kvm_io_bus_find_dev(&vcpu->kvm->pio_bus, addr);
1492}
1493
1494int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
1495 int size, unsigned port)
1496{
1497 struct kvm_io_device *pio_dev;
1498
1499 vcpu->run->exit_reason = KVM_EXIT_IO;
1500 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
1501 vcpu->run->io.size = vcpu->pio.size = size;
1502 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
1503 vcpu->run->io.count = vcpu->pio.count = vcpu->pio.cur_count = 1;
1504 vcpu->run->io.port = vcpu->pio.port = port;
1505 vcpu->pio.in = in;
1506 vcpu->pio.string = 0;
1507 vcpu->pio.down = 0;
1508 vcpu->pio.guest_page_offset = 0;
1509 vcpu->pio.rep = 0;
1510
1511 kvm_x86_ops->cache_regs(vcpu);
1512 memcpy(vcpu->pio_data, &vcpu->regs[VCPU_REGS_RAX], 4);
1513 kvm_x86_ops->decache_regs(vcpu);
1514
1515 kvm_x86_ops->skip_emulated_instruction(vcpu);
1516
1517 pio_dev = vcpu_find_pio_dev(vcpu, port);
1518 if (pio_dev) {
1519 kernel_pio(pio_dev, vcpu, vcpu->pio_data);
1520 complete_pio(vcpu);
1521 return 1;
1522 }
1523 return 0;
1524}
1525EXPORT_SYMBOL_GPL(kvm_emulate_pio);
1526
1527int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
1528 int size, unsigned long count, int down,
1529 gva_t address, int rep, unsigned port)
1530{
1531 unsigned now, in_page;
1532 int i, ret = 0;
1533 int nr_pages = 1;
1534 struct page *page;
1535 struct kvm_io_device *pio_dev;
1536
1537 vcpu->run->exit_reason = KVM_EXIT_IO;
1538 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
1539 vcpu->run->io.size = vcpu->pio.size = size;
1540 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
1541 vcpu->run->io.count = vcpu->pio.count = vcpu->pio.cur_count = count;
1542 vcpu->run->io.port = vcpu->pio.port = port;
1543 vcpu->pio.in = in;
1544 vcpu->pio.string = 1;
1545 vcpu->pio.down = down;
1546 vcpu->pio.guest_page_offset = offset_in_page(address);
1547 vcpu->pio.rep = rep;
1548
1549 if (!count) {
1550 kvm_x86_ops->skip_emulated_instruction(vcpu);
1551 return 1;
1552 }
1553
1554 if (!down)
1555 in_page = PAGE_SIZE - offset_in_page(address);
1556 else
1557 in_page = offset_in_page(address) + size;
1558 now = min(count, (unsigned long)in_page / size);
1559 if (!now) {
1560 /*
1561 * String I/O straddles page boundary. Pin two guest pages
1562 * so that we satisfy atomicity constraints. Do just one
1563 * transaction to avoid complexity.
1564 */
1565 nr_pages = 2;
1566 now = 1;
1567 }
1568 if (down) {
1569 /*
1570 * String I/O in reverse. Yuck. Kill the guest, fix later.
1571 */
1572 pr_unimpl(vcpu, "guest string pio down\n");
1573 inject_gp(vcpu);
1574 return 1;
1575 }
1576 vcpu->run->io.count = now;
1577 vcpu->pio.cur_count = now;
1578
1579 if (vcpu->pio.cur_count == vcpu->pio.count)
1580 kvm_x86_ops->skip_emulated_instruction(vcpu);
1581
1582 for (i = 0; i < nr_pages; ++i) {
1583 mutex_lock(&vcpu->kvm->lock);
1584 page = gva_to_page(vcpu, address + i * PAGE_SIZE);
1585 vcpu->pio.guest_pages[i] = page;
1586 mutex_unlock(&vcpu->kvm->lock);
1587 if (!page) {
1588 inject_gp(vcpu);
1589 free_pio_guest_pages(vcpu);
1590 return 1;
1591 }
1592 }
1593
1594 pio_dev = vcpu_find_pio_dev(vcpu, port);
1595 if (!vcpu->pio.in) {
1596 /* string PIO write */
1597 ret = pio_copy_data(vcpu);
1598 if (ret >= 0 && pio_dev) {
1599 pio_string_write(pio_dev, vcpu);
1600 complete_pio(vcpu);
1601 if (vcpu->pio.count == 0)
1602 ret = 1;
1603 }
1604 } else if (pio_dev)
1605 pr_unimpl(vcpu, "no string pio read support yet, "
1606 "port %x size %d count %ld\n",
1607 port, size, count);
1608
1609 return ret;
1610}
1611EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
1612
043405e1
CO		 1613__init void kvm_arch_init(void)
1614{
1615 kvm_init_msr_list();
1616}
8776e519
HB		 1617
1618int kvm_emulate_halt(struct kvm_vcpu *vcpu)
1619{
1620 ++vcpu->stat.halt_exits;
1621 if (irqchip_in_kernel(vcpu->kvm)) {
1622 vcpu->mp_state = VCPU_MP_STATE_HALTED;
1623 kvm_vcpu_block(vcpu);
1624 if (vcpu->mp_state != VCPU_MP_STATE_RUNNABLE)
1625 return -EINTR;
1626 return 1;
1627 } else {
1628 vcpu->run->exit_reason = KVM_EXIT_HLT;
1629 return 0;
1630 }
1631}
1632EXPORT_SYMBOL_GPL(kvm_emulate_halt);
1633
1634int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
1635{
1636 unsigned long nr, a0, a1, a2, a3, ret;
1637
1638 kvm_x86_ops->cache_regs(vcpu);
1639
1640 nr = vcpu->regs[VCPU_REGS_RAX];
1641 a0 = vcpu->regs[VCPU_REGS_RBX];
1642 a1 = vcpu->regs[VCPU_REGS_RCX];
1643 a2 = vcpu->regs[VCPU_REGS_RDX];
1644 a3 = vcpu->regs[VCPU_REGS_RSI];
1645
1646 if (!is_long_mode(vcpu)) {
1647 nr &= 0xFFFFFFFF;
1648 a0 &= 0xFFFFFFFF;
1649 a1 &= 0xFFFFFFFF;
1650 a2 &= 0xFFFFFFFF;
1651 a3 &= 0xFFFFFFFF;
1652 }
1653
1654 switch (nr) {
1655 default:
1656 ret = -KVM_ENOSYS;
1657 break;
1658 }
1659 vcpu->regs[VCPU_REGS_RAX] = ret;
1660 kvm_x86_ops->decache_regs(vcpu);
1661 return 0;
1662}
1663EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
1664
1665int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
1666{
1667 char instruction[3];
1668 int ret = 0;
1669
1670 mutex_lock(&vcpu->kvm->lock);
1671
1672 /*
1673 * Blow out the MMU to ensure that no other VCPU has an active mapping
1674 * to ensure that the updated hypercall appears atomically across all
1675 * VCPUs.
1676 */
1677 kvm_mmu_zap_all(vcpu->kvm);
1678
1679 kvm_x86_ops->cache_regs(vcpu);
1680 kvm_x86_ops->patch_hypercall(vcpu, instruction);
1681 if (emulator_write_emulated(vcpu->rip, instruction, 3, vcpu)
1682 != X86EMUL_CONTINUE)
1683 ret = -EFAULT;
1684
1685 mutex_unlock(&vcpu->kvm->lock);
1686
1687 return ret;
1688}
1689
1690static u64 mk_cr_64(u64 curr_cr, u32 new_val)
1691{
1692 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
1693}
1694
1695void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
1696{
1697 struct descriptor_table dt = { limit, base };
1698
1699 kvm_x86_ops->set_gdt(vcpu, &dt);
1700}
1701
1702void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
1703{
1704 struct descriptor_table dt = { limit, base };
1705
1706 kvm_x86_ops->set_idt(vcpu, &dt);
1707}
1708
1709void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
1710 unsigned long *rflags)
1711{
1712 lmsw(vcpu, msw);
1713 *rflags = kvm_x86_ops->get_rflags(vcpu);
1714}
1715
1716unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
1717{
1718 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
1719 switch (cr) {
1720 case 0:
1721 return vcpu->cr0;
1722 case 2:
1723 return vcpu->cr2;
1724 case 3:
1725 return vcpu->cr3;
1726 case 4:
1727 return vcpu->cr4;
1728 default:
1729 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __FUNCTION__, cr);
1730 return 0;
1731 }
1732}
1733
1734void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
1735 unsigned long *rflags)
1736{
1737 switch (cr) {
1738 case 0:
1739 set_cr0(vcpu, mk_cr_64(vcpu->cr0, val));
1740 *rflags = kvm_x86_ops->get_rflags(vcpu);
1741 break;
1742 case 2:
1743 vcpu->cr2 = val;
1744 break;
1745 case 3:
1746 set_cr3(vcpu, val);
1747 break;
1748 case 4:
1749 set_cr4(vcpu, mk_cr_64(vcpu->cr4, val));
1750 break;
1751 default:
1752 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __FUNCTION__, cr);
1753 }
1754}
1755
1756void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
1757{
1758 int i;
1759 u32 function;
1760 struct kvm_cpuid_entry *e, *best;
1761
1762 kvm_x86_ops->cache_regs(vcpu);
1763 function = vcpu->regs[VCPU_REGS_RAX];
1764 vcpu->regs[VCPU_REGS_RAX] = 0;
1765 vcpu->regs[VCPU_REGS_RBX] = 0;
1766 vcpu->regs[VCPU_REGS_RCX] = 0;
1767 vcpu->regs[VCPU_REGS_RDX] = 0;
1768 best = NULL;
1769 for (i = 0; i < vcpu->cpuid_nent; ++i) {
1770 e = &vcpu->cpuid_entries[i];
1771 if (e->function == function) {
1772 best = e;
1773 break;
1774 }
1775 /*
1776 * Both basic or both extended?
1777 */
1778 if (((e->function ^ function) & 0x80000000) == 0)
1779 if (!best || e->function > best->function)
1780 best = e;
1781 }
1782 if (best) {
1783 vcpu->regs[VCPU_REGS_RAX] = best->eax;
1784 vcpu->regs[VCPU_REGS_RBX] = best->ebx;
1785 vcpu->regs[VCPU_REGS_RCX] = best->ecx;
1786 vcpu->regs[VCPU_REGS_RDX] = best->edx;
1787 }
1788 kvm_x86_ops->decache_regs(vcpu);
1789 kvm_x86_ops->skip_emulated_instruction(vcpu);
1790}
1791EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
d0752060 1792
b6c7a5dc
HB		 1793/*
1794 * Check if userspace requested an interrupt window, and that the
1795 * interrupt window is open.
1796 *
1797 * No need to exit to userspace if we already have an interrupt queued.
1798 */
1799static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
1800 struct kvm_run *kvm_run)
1801{
1802 return (!vcpu->irq_summary &&
1803 kvm_run->request_interrupt_window &&
1804 vcpu->interrupt_window_open &&
1805 (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF));
1806}
1807
1808static void post_kvm_run_save(struct kvm_vcpu *vcpu,
1809 struct kvm_run *kvm_run)
1810{
1811 kvm_run->if_flag = (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
1812 kvm_run->cr8 = get_cr8(vcpu);
1813 kvm_run->apic_base = kvm_get_apic_base(vcpu);
1814 if (irqchip_in_kernel(vcpu->kvm))
1815 kvm_run->ready_for_interrupt_injection = 1;
1816 else
1817 kvm_run->ready_for_interrupt_injection =
1818 (vcpu->interrupt_window_open &&
1819 vcpu->irq_summary == 0);
1820}
1821
1822static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1823{
1824 int r;
1825
1826 if (unlikely(vcpu->mp_state == VCPU_MP_STATE_SIPI_RECEIVED)) {
1827 pr_debug("vcpu %d received sipi with vector # %x\n",
1828 vcpu->vcpu_id, vcpu->sipi_vector);
1829 kvm_lapic_reset(vcpu);
1830 r = kvm_x86_ops->vcpu_reset(vcpu);
1831 if (r)
1832 return r;
1833 vcpu->mp_state = VCPU_MP_STATE_RUNNABLE;
1834 }
1835
1836preempted:
1837 if (vcpu->guest_debug.enabled)
1838 kvm_x86_ops->guest_debug_pre(vcpu);
1839
1840again:
1841 r = kvm_mmu_reload(vcpu);
1842 if (unlikely(r))
1843 goto out;
1844
1845 kvm_inject_pending_timer_irqs(vcpu);
1846
1847 preempt_disable();
1848
1849 kvm_x86_ops->prepare_guest_switch(vcpu);
1850 kvm_load_guest_fpu(vcpu);
1851
1852 local_irq_disable();
1853
1854 if (signal_pending(current)) {
1855 local_irq_enable();
1856 preempt_enable();
1857 r = -EINTR;
1858 kvm_run->exit_reason = KVM_EXIT_INTR;
1859 ++vcpu->stat.signal_exits;
1860 goto out;
1861 }
1862
1863 if (irqchip_in_kernel(vcpu->kvm))
1864 kvm_x86_ops->inject_pending_irq(vcpu);
1865 else if (!vcpu->mmio_read_completed)
1866 kvm_x86_ops->inject_pending_vectors(vcpu, kvm_run);
1867
1868 vcpu->guest_mode = 1;
1869 kvm_guest_enter();
1870
1871 if (vcpu->requests)
1872 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
1873 kvm_x86_ops->tlb_flush(vcpu);
1874
1875 kvm_x86_ops->run(vcpu, kvm_run);
1876
1877 vcpu->guest_mode = 0;
1878 local_irq_enable();
1879
1880 ++vcpu->stat.exits;
1881
1882 /*
1883 * We must have an instruction between local_irq_enable() and
1884 * kvm_guest_exit(), so the timer interrupt isn't delayed by
1885 * the interrupt shadow. The stat.exits increment will do nicely.
1886 * But we need to prevent reordering, hence this barrier():
1887 */
1888 barrier();
1889
1890 kvm_guest_exit();
1891
1892 preempt_enable();
1893
1894 /*
1895 * Profile KVM exit RIPs:
1896 */
1897 if (unlikely(prof_on == KVM_PROFILING)) {
1898 kvm_x86_ops->cache_regs(vcpu);
1899 profile_hit(KVM_PROFILING, (void *)vcpu->rip);
1900 }
1901
1902 r = kvm_x86_ops->handle_exit(kvm_run, vcpu);
1903
1904 if (r > 0) {
1905 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
1906 r = -EINTR;
1907 kvm_run->exit_reason = KVM_EXIT_INTR;
1908 ++vcpu->stat.request_irq_exits;
1909 goto out;
1910 }
1911 if (!need_resched()) {
1912 ++vcpu->stat.light_exits;
1913 goto again;
1914 }
1915 }
1916
1917out:
1918 if (r > 0) {
1919 kvm_resched(vcpu);
1920 goto preempted;
1921 }
1922
1923 post_kvm_run_save(vcpu, kvm_run);
1924
1925 return r;
1926}
1927
1928int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1929{
1930 int r;
1931 sigset_t sigsaved;
1932
1933 vcpu_load(vcpu);
1934
1935 if (unlikely(vcpu->mp_state == VCPU_MP_STATE_UNINITIALIZED)) {
1936 kvm_vcpu_block(vcpu);
1937 vcpu_put(vcpu);
1938 return -EAGAIN;
1939 }
1940
1941 if (vcpu->sigset_active)
1942 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
1943
1944 /* re-sync apic's tpr */
1945 if (!irqchip_in_kernel(vcpu->kvm))
1946 set_cr8(vcpu, kvm_run->cr8);
1947
1948 if (vcpu->pio.cur_count) {
1949 r = complete_pio(vcpu);
1950 if (r)
1951 goto out;
1952 }
1953#if CONFIG_HAS_IOMEM
1954 if (vcpu->mmio_needed) {
1955 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
1956 vcpu->mmio_read_completed = 1;
1957 vcpu->mmio_needed = 0;
1958 r = emulate_instruction(vcpu, kvm_run,
1959 vcpu->mmio_fault_cr2, 0, 1);
1960 if (r == EMULATE_DO_MMIO) {
1961 /*
1962 * Read-modify-write. Back to userspace.
1963 */
1964 r = 0;
1965 goto out;
1966 }
1967 }
1968#endif
1969 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL) {
1970 kvm_x86_ops->cache_regs(vcpu);
1971 vcpu->regs[VCPU_REGS_RAX] = kvm_run->hypercall.ret;
1972 kvm_x86_ops->decache_regs(vcpu);
1973 }
1974
1975 r = __vcpu_run(vcpu, kvm_run);
1976
1977out:
1978 if (vcpu->sigset_active)
1979 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
1980
1981 vcpu_put(vcpu);
1982 return r;
1983}
1984
1985int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
1986{
1987 vcpu_load(vcpu);
1988
1989 kvm_x86_ops->cache_regs(vcpu);
1990
1991 regs->rax = vcpu->regs[VCPU_REGS_RAX];
1992 regs->rbx = vcpu->regs[VCPU_REGS_RBX];
1993 regs->rcx = vcpu->regs[VCPU_REGS_RCX];
1994 regs->rdx = vcpu->regs[VCPU_REGS_RDX];
1995 regs->rsi = vcpu->regs[VCPU_REGS_RSI];
1996 regs->rdi = vcpu->regs[VCPU_REGS_RDI];
1997 regs->rsp = vcpu->regs[VCPU_REGS_RSP];
1998 regs->rbp = vcpu->regs[VCPU_REGS_RBP];
1999#ifdef CONFIG_X86_64
2000 regs->r8 = vcpu->regs[VCPU_REGS_R8];
2001 regs->r9 = vcpu->regs[VCPU_REGS_R9];
2002 regs->r10 = vcpu->regs[VCPU_REGS_R10];
2003 regs->r11 = vcpu->regs[VCPU_REGS_R11];
2004 regs->r12 = vcpu->regs[VCPU_REGS_R12];
2005 regs->r13 = vcpu->regs[VCPU_REGS_R13];
2006 regs->r14 = vcpu->regs[VCPU_REGS_R14];
2007 regs->r15 = vcpu->regs[VCPU_REGS_R15];
2008#endif
2009
2010 regs->rip = vcpu->rip;
2011 regs->rflags = kvm_x86_ops->get_rflags(vcpu);
2012
2013 /*
2014 * Don't leak debug flags in case they were set for guest debugging
2015 */
2016 if (vcpu->guest_debug.enabled && vcpu->guest_debug.singlestep)
2017 regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
2018
2019 vcpu_put(vcpu);
2020
2021 return 0;
2022}
2023
2024int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
2025{
2026 vcpu_load(vcpu);
2027
2028 vcpu->regs[VCPU_REGS_RAX] = regs->rax;
2029 vcpu->regs[VCPU_REGS_RBX] = regs->rbx;
2030 vcpu->regs[VCPU_REGS_RCX] = regs->rcx;
2031 vcpu->regs[VCPU_REGS_RDX] = regs->rdx;
2032 vcpu->regs[VCPU_REGS_RSI] = regs->rsi;
2033 vcpu->regs[VCPU_REGS_RDI] = regs->rdi;
2034 vcpu->regs[VCPU_REGS_RSP] = regs->rsp;
2035 vcpu->regs[VCPU_REGS_RBP] = regs->rbp;
2036#ifdef CONFIG_X86_64
2037 vcpu->regs[VCPU_REGS_R8] = regs->r8;
2038 vcpu->regs[VCPU_REGS_R9] = regs->r9;
2039 vcpu->regs[VCPU_REGS_R10] = regs->r10;
2040 vcpu->regs[VCPU_REGS_R11] = regs->r11;
2041 vcpu->regs[VCPU_REGS_R12] = regs->r12;
2042 vcpu->regs[VCPU_REGS_R13] = regs->r13;
2043 vcpu->regs[VCPU_REGS_R14] = regs->r14;
2044 vcpu->regs[VCPU_REGS_R15] = regs->r15;
2045#endif
2046
2047 vcpu->rip = regs->rip;
2048 kvm_x86_ops->set_rflags(vcpu, regs->rflags);
2049
2050 kvm_x86_ops->decache_regs(vcpu);
2051
2052 vcpu_put(vcpu);
2053
2054 return 0;
2055}
2056
2057static void get_segment(struct kvm_vcpu *vcpu,
2058 struct kvm_segment *var, int seg)
2059{
2060 return kvm_x86_ops->get_segment(vcpu, var, seg);
2061}
2062
2063void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
2064{
2065 struct kvm_segment cs;
2066
2067 get_segment(vcpu, &cs, VCPU_SREG_CS);
2068 *db = cs.db;
2069 *l = cs.l;
2070}
2071EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
2072
2073int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
2074 struct kvm_sregs *sregs)
2075{
2076 struct descriptor_table dt;
2077 int pending_vec;
2078
2079 vcpu_load(vcpu);
2080
2081 get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
2082 get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
2083 get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
2084 get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
2085 get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
2086 get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
2087
2088 get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
2089 get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
2090
2091 kvm_x86_ops->get_idt(vcpu, &dt);
2092 sregs->idt.limit = dt.limit;
2093 sregs->idt.base = dt.base;
2094 kvm_x86_ops->get_gdt(vcpu, &dt);
2095 sregs->gdt.limit = dt.limit;
2096 sregs->gdt.base = dt.base;
2097
2098 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
2099 sregs->cr0 = vcpu->cr0;
2100 sregs->cr2 = vcpu->cr2;
2101 sregs->cr3 = vcpu->cr3;
2102 sregs->cr4 = vcpu->cr4;
2103 sregs->cr8 = get_cr8(vcpu);
2104 sregs->efer = vcpu->shadow_efer;
2105 sregs->apic_base = kvm_get_apic_base(vcpu);
2106
2107 if (irqchip_in_kernel(vcpu->kvm)) {
2108 memset(sregs->interrupt_bitmap, 0,
2109 sizeof sregs->interrupt_bitmap);
2110 pending_vec = kvm_x86_ops->get_irq(vcpu);
2111 if (pending_vec >= 0)
2112 set_bit(pending_vec,
2113 (unsigned long *)sregs->interrupt_bitmap);
2114 } else
2115 memcpy(sregs->interrupt_bitmap, vcpu->irq_pending,
2116 sizeof sregs->interrupt_bitmap);
2117
2118 vcpu_put(vcpu);
2119
2120 return 0;
2121}
2122
2123static void set_segment(struct kvm_vcpu *vcpu,
2124 struct kvm_segment *var, int seg)
2125{
2126 return kvm_x86_ops->set_segment(vcpu, var, seg);
2127}
2128
2129int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
2130 struct kvm_sregs *sregs)
2131{
2132 int mmu_reset_needed = 0;
2133 int i, pending_vec, max_bits;
2134 struct descriptor_table dt;
2135
2136 vcpu_load(vcpu);
2137
2138 dt.limit = sregs->idt.limit;
2139 dt.base = sregs->idt.base;
2140 kvm_x86_ops->set_idt(vcpu, &dt);
2141 dt.limit = sregs->gdt.limit;
2142 dt.base = sregs->gdt.base;
2143 kvm_x86_ops->set_gdt(vcpu, &dt);
2144
2145 vcpu->cr2 = sregs->cr2;
2146 mmu_reset_needed |= vcpu->cr3 != sregs->cr3;
2147 vcpu->cr3 = sregs->cr3;
2148
2149 set_cr8(vcpu, sregs->cr8);
2150
2151 mmu_reset_needed |= vcpu->shadow_efer != sregs->efer;
2152#ifdef CONFIG_X86_64
2153 kvm_x86_ops->set_efer(vcpu, sregs->efer);
2154#endif
2155 kvm_set_apic_base(vcpu, sregs->apic_base);
2156
2157 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
2158
2159 mmu_reset_needed |= vcpu->cr0 != sregs->cr0;
2160 vcpu->cr0 = sregs->cr0;
2161 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
2162
2163 mmu_reset_needed |= vcpu->cr4 != sregs->cr4;
2164 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
2165 if (!is_long_mode(vcpu) && is_pae(vcpu))
2166 load_pdptrs(vcpu, vcpu->cr3);
2167
2168 if (mmu_reset_needed)
2169 kvm_mmu_reset_context(vcpu);
2170
2171 if (!irqchip_in_kernel(vcpu->kvm)) {
2172 memcpy(vcpu->irq_pending, sregs->interrupt_bitmap,
2173 sizeof vcpu->irq_pending);
2174 vcpu->irq_summary = 0;
2175 for (i = 0; i < ARRAY_SIZE(vcpu->irq_pending); ++i)
2176 if (vcpu->irq_pending[i])
2177 __set_bit(i, &vcpu->irq_summary);
2178 } else {
2179 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
2180 pending_vec = find_first_bit(
2181 (const unsigned long *)sregs->interrupt_bitmap,
2182 max_bits);
2183 /* Only pending external irq is handled here */
2184 if (pending_vec < max_bits) {
2185 kvm_x86_ops->set_irq(vcpu, pending_vec);
2186 pr_debug("Set back pending irq %d\n",
2187 pending_vec);
2188 }
2189 }
2190
2191 set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
2192 set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
2193 set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
2194 set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
2195 set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
2196 set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
2197
2198 set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
2199 set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
2200
2201 vcpu_put(vcpu);
2202
2203 return 0;
2204}
2205
2206int kvm_arch_vcpu_ioctl_debug_guest(struct kvm_vcpu *vcpu,
2207 struct kvm_debug_guest *dbg)
2208{
2209 int r;
2210
2211 vcpu_load(vcpu);
2212
2213 r = kvm_x86_ops->set_guest_debug(vcpu, dbg);
2214
2215 vcpu_put(vcpu);
2216
2217 return r;
2218}
2219
d0752060
HB		 2220/*
2221 * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
2222 * we have asm/x86/processor.h
2223 */
2224struct fxsave {
2225 u16 cwd;
2226 u16 swd;
2227 u16 twd;
2228 u16 fop;
2229 u64 rip;
2230 u64 rdp;
2231 u32 mxcsr;
2232 u32 mxcsr_mask;
2233 u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
2234#ifdef CONFIG_X86_64
2235 u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
2236#else
2237 u32 xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
2238#endif
2239};
2240
2241int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
2242{
2243 struct fxsave *fxsave = (struct fxsave *)&vcpu->guest_fx_image;
2244
2245 vcpu_load(vcpu);
2246
2247 memcpy(fpu->fpr, fxsave->st_space, 128);
2248 fpu->fcw = fxsave->cwd;
2249 fpu->fsw = fxsave->swd;
2250 fpu->ftwx = fxsave->twd;
2251 fpu->last_opcode = fxsave->fop;
2252 fpu->last_ip = fxsave->rip;
2253 fpu->last_dp = fxsave->rdp;
2254 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
2255
2256 vcpu_put(vcpu);
2257
2258 return 0;
2259}
2260
2261int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
2262{
2263 struct fxsave *fxsave = (struct fxsave *)&vcpu->guest_fx_image;
2264
2265 vcpu_load(vcpu);
2266
2267 memcpy(fxsave->st_space, fpu->fpr, 128);
2268 fxsave->cwd = fpu->fcw;
2269 fxsave->swd = fpu->fsw;
2270 fxsave->twd = fpu->ftwx;
2271 fxsave->fop = fpu->last_opcode;
2272 fxsave->rip = fpu->last_ip;
2273 fxsave->rdp = fpu->last_dp;
2274 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
2275
2276 vcpu_put(vcpu);
2277
2278 return 0;
2279}
2280
2281void fx_init(struct kvm_vcpu *vcpu)
2282{
2283 unsigned after_mxcsr_mask;
2284
2285 /* Initialize guest FPU by resetting ours and saving into guest's */
2286 preempt_disable();
2287 fx_save(&vcpu->host_fx_image);
2288 fpu_init();
2289 fx_save(&vcpu->guest_fx_image);
2290 fx_restore(&vcpu->host_fx_image);
2291 preempt_enable();
2292
2293 vcpu->cr0 |= X86_CR0_ET;
2294 after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
2295 vcpu->guest_fx_image.mxcsr = 0x1f80;
2296 memset((void *)&vcpu->guest_fx_image + after_mxcsr_mask,
2297 0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
2298}
2299EXPORT_SYMBOL_GPL(fx_init);
2300
2301void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
2302{
2303 if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
2304 return;
2305
2306 vcpu->guest_fpu_loaded = 1;
2307 fx_save(&vcpu->host_fx_image);
2308 fx_restore(&vcpu->guest_fx_image);
2309}
2310EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
2311
2312void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
2313{
2314 if (!vcpu->guest_fpu_loaded)
2315 return;
2316
2317 vcpu->guest_fpu_loaded = 0;
2318 fx_save(&vcpu->guest_fx_image);
2319 fx_restore(&vcpu->host_fx_image);
2320}
2321EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
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